INA333-Q1 [TI]
汽车类低功耗零漂移精密仪表放大器;
| 型号： | INA333-Q1 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 汽车类低功耗零漂移精密仪表放大器 放大器 仪表 仪表放大器 |
| 文件： | 总29页 (文件大小：1349K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INA333-Q1
ZHCSKC7B –SEPTEMBER 2019 –REVISED JUNE 2023
INA333-Q1 汽车类零温漂微功率仪表放大器
1 特性
3 说明
• 符合面向汽车应用的AEC-Q100 标准：
– 温度等级1：–40°C ≤TA ≤+125°C
• 功能安全型
INA333-Q1 是一款具备出色精度的低功耗精密仪表放
大器。该器件具有三级运算放大器设计、小尺寸和低功
耗，是需要漏电流检测等精密测量的汽车应用的理想选
择。此 INA333-Q1 也是使用电阻式电桥传感器的应用
的理想选择。
– 可提供用于功能安全系统设计的文档
• 低失调电压：25μV（最大值），G ≥100
• 低温漂：0.1μV/°C，G ≥100
• 低噪声：50nV/√Hz，G ≥100
• 高CMRR：96dB（最小值），G ≥10
• 低输入偏置电流：280pA（最大值）
• 电源电压范围：1.8V 至5.5V
• 输入电压：(V-) + 0.1V 至(V+) - 0.1V
• 输出范围：(V-) + 0.05V 至(V+) - 0.05V
• 低静态电流：50μA
可通过单个外部电阻器在1 到1000 范围内设置增益。
INA333-Q1 的设计适用业界通用的增益公式：G = 1 +
(100kΩ/RG)。
INA333-Q1 提供极低的失调电压（ 25μV， G ≥
100）、出色的温漂（0.1μV/°C，G ≥ 100）和高共
模抑制（G ≥ 10 时为 96dB）。该器件采用低至 1.8V
(±0.9V) 的电源电压，静态电流仅为 50µA。自动校准
技术可在汽车温度范围内保持出色的精度。INA333-Q1
提供1µV 的极低峰峰值噪声。
• 工作温度：–40°C 至+125°C
• RFI 滤波输入
• 封装：8 引脚VSSOP
INA333-Q1 器件采用 8 引脚 VSSOP 封装，额定温度
范围为TA = –40°C 至+125°C。
2 应用
封装信息
封装(1)
• 动力总成扭矩传感器
• 动力总成压力传感器
• 动力总成温度传感器
• 动力总成爆震传感器
• 车辆乘员检测传感器
• 驾驶员生命体征监测
• 控制面板，基于力传感器的开关
封装尺寸(2)
器件型号
INA333-Q1
VSSOP (8)
3 mm × 4.9 mm
(1) 如需了解所有可用封装，请参阅数据表末尾的封装选项附录。
(2) 封装尺寸（长× 宽）为标称值，并包括引脚（如适用）。
V+
7
150 k
150 k
2
1
VIN-
RFI Filtered Inputs
+
–
A1
RFI Filtered Inputs
50 k
–
6
5
A3
+
RG
VOUT
50 k
8
150 k
RFI Filtered Inputs
RFI Filtered Inputs
–
150 k
A2
REF
VIN+ 3
+
INA333-Q1
100 k
4
V
G = 1 +
RG
简化原理图
本文档旨在为方便起见，提供有关TI 产品中文版本的信息，以确认产品的概要。有关适用的官方英文版本的最新信息，请访问
www.ti.com，其内容始终优先。TI 不保证翻译的准确性和有效性。在实际设计之前，请务必参考最新版本的英文版本。
English Data Sheet: SBOS464
INA333-Q1
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ZHCSKC7B –SEPTEMBER 2019 –REVISED JUNE 2023
Table of Contents
7.4 Device Functional Modes..........................................13
8 Application and Implementation..................................14
8.1 Application Information............................................. 14
8.2 Typical Application.................................................... 15
8.3 Power Supply Recommendations.............................20
8.4 Layout....................................................................... 20
9 Device and Documentation Support............................21
9.1 Device Support......................................................... 21
9.2 Documentation Support............................................ 22
9.3 接收文档更新通知..................................................... 22
9.4 支持资源....................................................................22
9.5 Trademarks...............................................................22
9.6 静电放电警告............................................................ 22
9.7 术语表....................................................................... 22
10 Mechanical, Packaging, and Orderable
1 特性................................................................................... 1
2 应用................................................................................... 1
3 说明................................................................................... 1
4 Revision History.............................................................. 2
5 Pin Configuration and Functions...................................3
6 Specifications.................................................................. 4
6.1 Absolute Maximum Ratings........................................ 4
6.2 ESD Ratings............................................................... 4
6.3 Recommended Operating Conditions.........................4
6.4 Thermal Information ...................................................4
6.5 Electrical Characteristics.............................................5
6.6 Typical Characteristics................................................7
7 Detailed Description......................................................13
7.1 Overview...................................................................13
7.2 Functional Block Diagram.........................................13
7.3 Feature Description...................................................13
Information.................................................................... 22
4 Revision History
注：以前版本的页码可能与当前版本的页码不同
Changes from Revision A (May 2020) to Revision B (June 2023)
Page
• 添加了“功能安全”特性要点.............................................................................................................................1
• 将首页图中的四个电阻器从150Ω更改为 150kΩ............................................................................................. 1
• Changed four resistors in functional block diagram from 150 Ωto 150 kΩ.....................................................13
Changes from Revision * (October 2019) to Revision A (May 2020)
Page
• 将器件状态从“预告信息（预发布）”更改为“量产数据（正在供货）”........................................................ 1
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English Data Sheet: SBOS464
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5 Pin Configuration and Functions
RG
VINœ
VIN+
Vœ
1
2
3
4
8
7
6
5
RG
V+
VOUT
REF
Not to scale
图5-1. DGK Package, 8-Pin VSSOP (Top View)
表5-1. Pin Functions
PIN
TYPE
DESCRIPTION
NAME
REF
RG
NO.
5
Input Reference input. This pin must be driven by low impedance or connected to ground.
1, 8
7
Gain setting pins. For gains greater than 1, place a gain resistor between pins 1 and 8.
—
—
—
V+
Positive supply
Negative supply
4
V–
VIN+
VIN–
VOUT
3
Input Positive input
Input Negative input
Output Output
2
6
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN
MAX
UNIT
Single-supply, VS = (V+)
7
±3.5
VS
Supply voltage
Input voltage
V
Dual-supply, VS = (V+) –(V–)
Common-mode
(V+) + 0.3
(V–) –0.3
V
(V+) –(V–) +
Differential
0.2
Input current
±10
Continuous
150
mA
Output short circuit(2)
Operating temperature
Junction temperature
Storage temperature
Continuous
TA
°C
°C
°C
–55
TJ
150
Tstg
150
–65
(1) Operation outside of Absolute Maximum Ratings may cause permanent damage to the device. Absolute Maximum Ratings do not
imply functional operation of the device at these or any other conditions beyond those listed under Recommended Operating
Conditions. If used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be
fully functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime.
(2) Short-circuit to ground, one amplifier per package.
6.2 ESD Ratings
VALUE
UNIT
Human-body model (HBM), per AEC Q100-002
HBM ESD classification level 2(1)
±2000
V(ESD)
Electrostatic discharge
V
Charge device model (CDM), per AEC Q100-011
CDM ESD classification level C5
±750
(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
1.8
MAX
5.5
UNIT
VS
TA
Supply voltage
V
Operating temperature
125
°C
–40
6.4 Thermal Information
INA333-Q1
DGK (VSSOP)
8 PINS
169.5
THERMAL METRIC(1)
UNIT
RθJA
Junction-to-ambient thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
RθJC(top)
RθJB
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
62.7
90.3
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
7.6
ψJT
88.7
ψJB
RθJC(bot)
N/A
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
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English Data Sheet: SBOS464
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6.5 Electrical Characteristics
at VS = 1.8 V to 5.5 V at TA = 25°C, RL = 10 kΩ, VREF = VS / 2, and G = 1 (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
INPUT(1)
±10
±25
±0.1
±110
±0.5
μV
μV/°C
μV
VOSI
Input stage offset voltage(2)
vs temperature, TA = –40°C to +125°C
vs temperature, TA = –40°C to +125°C
±25
Output stage offset
voltage(2)
VOSO
μV/°C
Power-supply rejection
ratio
PSRR
90
102
dB
Zid
Zic
Differential impedance
100 || 3
100 || 3
GΩ || pF
GΩ || pF
Common-mode impedance
(V–) +
(V+) –
VCM
Common-mode voltage
VO = 0 V
V
0.1
0.1
G = 1
78
96
96
96
90
110
115
115
DC to 60 Hz,
G = 10
Common-mode rejection
ratio
CMRR
VS = 5.5 V, VCM = (V–) +
0.1 V to (V+) –0.1 V
dB
G = 100
G = 1000
INPUT BIAS CURRENT
±70
See 图6-26
±50
±280
±280
pA
pA/°C
pA
IB
Input bias current
TA = –40°C to +125°C
TA = –40°C to +125°C
IOS
Input offset current
pA/°C
See 图6-28
INPUT VOLTAGE NOISE
f = 10 Hz
50
50
50
1
f = 100 Hz
nV/√Hz
eNI
Input voltage noise
G = 100, RS = 0 Ω
f = 1 kHz
f = 0.1 Hz to 10 Hz
μVPP
fA/√Hz
pAPP
f = 10 Hz
100
2
In
Input current noise
f = 0.1 Hz to 10 Hz
GAIN
1 + (100
kΩ / RG)
Gain equation
Gain
V/V
V/V
G
1
1000
±0.1
±0.25
±0.25
±0.5
±5
G = 1
±0.01
±0.05
±0.07
±0.25
±1
VS = 5.5 V,
(V–) + 100 mV ≤VO ≤
(V+) –100 mV
G = 10
G = 100
G = 1000
GE
Gain error
%
Gain vs temperature
Gain nonlinearity
ppm/°C
ppm
TA = –40°C to +125°C
G > 1(3)
±15
±50
G = 1 to 1000
10
40
VS = 5.5 V, (V–) + 100 mV ≤VO ≤(V+) –100 mV
OUTPUT
Output voltage swing from
rail
VS = 5.5 V
50
mV
Capacitive load drive
Short-circuit current
500
pF
ISC
Continuous to common
mA
–40, +5
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6.5 Electrical Characteristics (continued)
at VS = 1.8 V to 5.5 V at TA = 25°C, RL = 10 kΩ, VREF = VS / 2, and G = 1 (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
FREQUENCY RESPONSE
G = 1
150
35
G = 10
G = 100
G = 1000
kHz
BW
SR
tS
Bandwidth, –3 dB
3.5
350
0.16
0.05
50
Hz
G = 1
Slew rate
VS = 5 V, VO = 4-V step
VSTEP = 4 V
V/μs
G = 100
G = 1
Settling time to 0.01%
G = 100
G = 1
400
60
μs
μs
Settling time to 0.001%
Overload recovery
VSTEP = 4 V
G = 100
500
75
50% overdrive
REFERENCE INPUT
RIN
Input impedance
300
50
kΩ
Voltage range
V+
V
V–
POWER SUPPLY
VIN = VS / 2
75
80
IQ
Quiescent current
μA
TA = –40°C to +125°C
(1) Total VOS, referred-to-input = (VOSI) + (VOSO / G).
(2) RTI = Referred-to-input.
(3) Does not include effects of external resistor RG.
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6.6 Typical Characteristics
at TA = 25°C, VS = 5 V, RL = 10 kΩ, VREF = midsupply, and G = 1 (unless otherwise noted)
Input Offset Voltage (µV)
Input Voltage Offset Drift (µV/°C)
图6-1. Input Offset Voltage
图6-2. Input Voltage Offset Drift (–40°C to 125°C)
Output Offset Voltage (µV)
图6-3. Output Offset Voltage
VS = 1.8 V
Output Voltage Offset Drift (µV/°C)
图6-4. Output Voltage Offset Drift (–40°C to 125°C)
0
-5
VS = 5 V
-10
-15
-20
-25
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
VCM (V)
Time (1 s/div)
图6-5. Offset Voltage vs Common-Mode Voltage
图6-6. 0.1-Hz to 10-Hz Noise
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6.6 Typical Characteristics (continued)
at TA = 25°C, VS = 5 V, RL = 10 kΩ, VREF = midsupply, and G = 1 (unless otherwise noted)
1000
1000
100
Output Noise
100
Current Noise
Input Noise
10
1
10
2
(Output Noise)
G
Total Input-Referred Noise =
(Input Noise)2
+
1
0.1
1
10
100
1k
10k
Time (1 s/div)
Frequency (Hz)
图6-7. 0.1-Hz to 10-Hz Noise
图6-8. Spectral Noise Density
0.012
0.008
0.004
0
G = 1000
G = 100
G = 10
G = 1
-0.004
-0.008
-0.012
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
VOUT (V)
Time (25 µs/div)
图6-9. Nonlinearity Error
图6-10. Large Signal Response
Time (100 µs/div)
Time (10 µs/div)
图6-11. Large-Signal Step Response
图6-12. Small-Signal Step Response
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6.6 Typical Characteristics (continued)
at TA = 25°C, VS = 5 V, RL = 10 kΩ, VREF = midsupply, and G = 1 (unless otherwise noted)
10000
1000
0.001%
100
0.01%
10
0.1%
1
10
100
1000
Time (100 µs/div)
Gain (V/V)
图6-13. Small-Signal Step Response
图6-14. Settling Time vs Gain
80
60
G = 1000
Supply
G = 100
G = 10
40
VOUT
20
G = 1
0
-20
-40
-60
10
100
1k
10k
100k
1M
Time (50 µs/div)
Frequency (Hz)
图6-15. Start-Up Settling Time
图6-16. Gain vs Frequency
10
8
VS
VS
=
=
2.75 V
0.ꢀ V
G = 1
6
4
G = 10
2
0
-2
-4
-6
-8
-10
G = 100,
G = 1000
-50
-25
0
25
50
75
100
125
150
CMRR (µV/V)
Temperature (°C)
图6-17. Common-Mode Rejection Ratio
图6-18. Common-Mode Rejection Ratio vs Temperature
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6.6 Typical Characteristics (continued)
at TA = 25°C, VS = 5 V, RL = 10 kΩ, VREF = midsupply, and G = 1 (unless otherwise noted)
160
140
120
100
80
2.5
2.0
G = 1000
G = 100
1.0
0
60
G = 1
-1.0
40
G = 10
20
-2.0
2.5
0
10
100
1k
Frequency (Hz)
10k
100k
-2.5 -2.0
-1.0
0
1.0
2.0 2.5
Output Voltage (V)
图6-19. Common-Mode Rejection Ratio vs Frequency
图6-20. Typical Common-Mode Range vs Output Voltage
5
0.9
0.7
4
3
2
1
0
0.5
0.3
0.1
-0.1
-0.3
-0.5
-0.7
-0.9
0
1
2
3
4
5
-0.9 -0.7 -0.5 -0.3 -0.1 0.1 0.3
Output Voltage (V)
0.5
0.7
0.9
Output Voltage (V)
图6-21. Typical Common-Mode Range vs Output Voltage
图6-22. Typical Common-Mode Range vs Output Voltage
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
160
140
G = 1000
120
100
G = 100
80
60
G = 10
40
20
G = 1
0
0
0.2
0.4
0.5
0.8
1.0 1.2
1.4
1.6
1.8
1
10
1k
10k
100k
1M
100
Output Voltage (V)
Frequency (Hz)
图6-23. Typical Common-Mode Range vs Output Voltage
图6-24. Positive Power-Supply Rejection Ratio
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6.6 Typical Characteristics (continued)
at TA = 25°C, VS = 5 V, RL = 10 kΩ, VREF = midsupply, and G = 1 (unless otherwise noted)
160
140
120
100
80
1200
1000
800
600
400
200
0
+IB
-IB
G = 100
G = 1000
G = 10
60
V
=
0ꢀ ꢁ V
V
= 2ꢀ75 V
S
S
40
G = 1
20
0
-200
-20
0.1
1
10
100
1k
10k
100k
1M
-50
-25
0
25
50
75
100
125
150
Frequency (Hz)
Temperature (°C)
图6-25. Negative Power-Supply Rejection Ratio
200
图6-26. Input Bias Current vs Temperature
250
200
150
100
50
180
160
140
120
100
80
V
V
=
=
2ꢀ75 V
0ꢀ. V
S
60
0
S
40
-50
-100
20
0
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
VCM (V)
-50
-25
0
25
50
75
100
125
150
Temperature (°C)
图6-27. Input Bias Current vs Common-Mode Voltage
图6-28. Input Offset Current vs Temperature
80
(V+)
VS
VS
=
=
2.75 V
0.ꢀ V
(V+) - 0.25
(V+) - 0.50
(V+) - 0.75
(V+) - 1.00
(V+) - 1.25
(V+) - 1.50
(V+) - 1.75
70
60
50
40
30
20
10
0
VS = 5 V
(V-) + 1.75
(V-) + 1.50
(V-) + 1.25
(V-) + 1.00
(V-) + 0.75
(V-) + 0.50
(V-) + 0.25
(V-)
VS = 1.8 V
125°C
25°C
-40°C
0
10
20
30
40
50
60
-50
0
25
50
75
100
125
150
-25
IOUT (mA)
Temperature (°C)
图6-29. Output Voltage Swing vs Output Current
图6-30. Quiescent Current vs Temperature
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6.6 Typical Characteristics (continued)
at TA = 25°C, VS = 5 V, RL = 10 kΩ, VREF = midsupply, and G = 1 (unless otherwise noted)
80
70
VS = 5 V
60
50
40
VS = 1.8 V
30
20
10
0
0
1.0
2.0
3.0
4.0
5.0
VCM (V)
图6-31. Quiescent Current vs Common-Mode Voltage
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7 Detailed Description
7.1 Overview
The INA333-Q1 is a monolithic instrumentation amplifier (INA) based on the precision zero-drift INA333-Q1
(operational amplifier) core. The INA333-Q1 also integrates laser-trimmed resistors to maintain excellent
common-mode rejection and low gain error. The combination of the zero-drift amplifier core and the precision
resistors allows this device to achieve outstanding dc precision, and makes the INA333-Q1 an excellent choice
for many 3.3-V and 5-V automotive applications.
7.2 Functional Block Diagram
V+
7
150 k
150 k
2
1
VIN-
RFI Filtered Inputs
+
–
A1
RFI Filtered Inputs
50 k
–
6
5
A3
+
RG
VOUT
50 k
8
3
150 k
RFI Filtered Inputs
RFI Filtered Inputs
–
150 k
A2
REF
VIN+
+
INA333-Q1
100 k
4
V
G = 1 +
RG
7.3 Feature Description
7.3.1 Internal Offset Correction
The INA333-Q1 internal operational amplifiers use an autocalibration technique with a time-continuous, 350‑kHz
operational amplifier in the signal path. The amplifier is zero-corrected every 8 µs using a proprietary technique.
At power up, the amplifier requires approximately 100 µs to achieve the specified VOS accuracy. This design has
no aliasing or flicker noise.
7.3.2 Input Protection
The input pins of the INA333-Q1 are protected with internal diodes connected to the power-supply rails. These
diodes clamp and prevent the applied signal from damaging the input circuitry. If the input signal voltage exceeds
the power supplies by greater than 0.3 V, limit the input signal current to less than 10 mA to protect the internal
clamp diodes. This current limiting is generally done with a series input resistor. Some signal sources are
inherently current-limited and do not require limiting resistors.
7.4 Device Functional Modes
The INA333-Q1 has a single functional mode, and is operational when the power-supply voltage is greater than
1.8 V. The recommended maximum specified power-supply voltage for the INA333-Q1 is 5.5 V.
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8 Application and Implementation
备注
Information in the following applications sections is not part of the TI component specification, and TI
does not warrant its accuracy or completeness. TI’s customers are responsible for determining
suitability of components for their purposes. Customers should validate and test their design
implementation to confirm system functionality.
8.1 Application Information
The INA333-Q1 measures small differential voltages with high common-mode voltage developed between the
noninverting and inverting input. The high input impedance makes the INA333-Q1 a great choice for a wide
range of applications. The ability to set the reference pin to adjust the functionality of the output signal offers
additional flexibility that is practical for multiple configurations.
8.1.1 Input Common-Mode Range
The linear input voltage range of the input circuitry of the INA333-Q1 is from approximately 0.1 V below the
positive supply voltage to 0.1 V above the negative supply. As a differential input voltage causes the output
voltage to increase, however, the linear input range is limited by the output voltage swing of amplifiers A1 and
A2. Thus, the linear common-mode input range is related to the output voltage of the complete amplifier. This
behavior also depends on supply voltage; see 图6-20 to 图6-23 in 节6.6.
Input overload conditions can produce an output voltage that appears normal. For example, if an input overload
condition drives both input amplifiers to the respective positive output swing limit, the difference voltage
measured by the output amplifier is near zero. The output of the INA333-Q1 is near 0 V even though both inputs
are overloaded.
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8.2 Typical Application
图8-1 shows the basic connections required for operation of the INA333-Q1. Good layout practice mandates the
use of bypass capacitors placed close to the device pins as shown.
The output of the INA333-Q1 is referred to the output reference (REF) pin, which is normally grounded. This
connection must be low-impedance to maintain good common-mode rejection. Although 15 Ω or less of stray
resistance can be tolerated while maintaining specified CMRR, small stray resistances of tens of ohms in series
with the REF pin can cause noticeable degradation in CMRR.
0.1 µF
V+
7
150 kꢀ
150 kꢀ
2
1
VINœ
RFI Filtered Inputs
+
VO = G ì V
- VIN-
IN+
A1
RFI Filtered Inputs
œ
100 kW
RG
G = 1 +
50 kꢀ
œ
A3
+
6
5
+
RG
Also drawn in simplified form:
VOUT
50 kꢀ
VINœ
œ
Load
VO
8
3
150 kꢀ
INA333-Q1
RFI Filtered Inputs
RFI Filtered Inputs
RG
VO
œ
150 kꢀ
REF
œ
A2
VIN+
+
+
REF
VIN+
INA333-Q1
4
0.1 µF
Vœ
图8-1. Basic Connections
8.2.1 Design Requirements
The device can be configured to monitor the input differential voltage when the gain of the input signal is set by
external resistor RG. The output signal references to the REF pin. The most common application is where the
output is referenced to ground when no input signal is present by connecting the REF pin to ground. When the
input signal increases, the output voltage at the OUT pin also increases.
8.2.2 Detailed Design Procedure
8.2.2.1 Setting the Gain
The gain of the INA333-Q1 is set by a single external resistor, RG, connected between pins 1 and 8. The value of
RG is selected according to 方程式1:
G = 1 + (100 kΩ / RG)
(1)
表 8-1 lists several commonly-used gains and resistor values. The 100 kΩ in 方程式 1 comes from the sum of
the two internal feedback resistors of A1 and A2. These on-chip resistors are laser trimmed to accurate absolute
values. The accuracy and temperature coefficient of these resistors are included in the gain accuracy and drift
specifications of the INA333-Q1.
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The stability and temperature drift of the external gain setting resistor, RG, also affects gain. The contribution of
RG to gain accuracy and drift can be directly inferred from 方程式 1. Low resistor values required for high gain
can make wiring resistance important. Sockets add to the wiring resistance and contribute additional gain error
(possibly an unstable gain error) in gains of approximately 100 or greater. To maintain stability, avoid parasitic
capacitance greater than a few picofarads at the RG connections. Careful matching of any parasitics on both RG
pins maintains optimal CMRR over frequency.
表8-1. Commonly Used Gains and Resistor Values
DESIRED GAIN
RG (Ω)
NC(1)
100k
NEAREST 1% RG (Ω)
1
2
NC
100k
24.9k
11k
5
25k
10
11.1k
5.26k
2.04k
1.01k
502.5
200.4
100.1
20
5.23k
2.05
1k
50
100
200
500
1000
499
200
100
(1) NC denotes no connection. When using the SPICE model, the simulation does not converge unless
a resistor is connected to the RG pins; use a very large resistor value.
8.2.2.2 Offset Trimming
Most applications require no external offset adjustment. However, if necessary, adjustments can be made by
applying a voltage to the REF pin. 图 8-2 shows an optional circuit for trimming the output offset voltage. The
voltage applied to REF pin is summed at the output. The operational amplifier buffer provides low impedance at
the REF pin to preserve good common-mode rejection.
VIN-
œ
V+
VO
INA333-Q1
RG
100 µA
½ REF200
+
VIN+
Ref
100 ꢀ
OPA333
10mV
Adjustment Range
10 kꢀ
100 ꢀ
100 µA
½ REF200
V-
图8-2. Optional Trimming of Output Offset Voltage
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8.2.2.3 Noise Performance
The autocalibration technique used by the INA333-Q1 results in reduced low frequency noise, typically only
50 nV/√Hz (G = 100). The spectral noise density is shown in detail in 图 6-8. The low-frequency noise of the
device is approximately 1 μVPP measured from 0.1 Hz to 10 Hz (G = 100).
8.2.2.4 Input Bias Current Return Path
The input impedance of the INA333-Q1 is extremely high; approximately 100 GΩ. However, a path must be
provided for the input bias current of both inputs. This input bias current is typically ±70 pA. High input
impedance means that this input bias current changes very little with varying input voltage.
Input circuitry must provide a path for this input bias current for proper operation. 图 8-3 shows various
provisions for an input bias current path. Without a bias current path, the inputs float to a potential that exceeds
the common-mode range of the device, and the input amplifiers saturate. If the differential source resistance is
low, the bias current return path can be connected to one input (see the thermocouple example in 图 8-3). With
higher source impedance, use two equal resistors to provide a balanced input with the possible advantages of a
lower input offset voltage as a result of bias current, and improved high-frequency common-mode rejection.
œ
Microphone,
Hydrophone,
and more
INA333-Q1
+
œ
Thermocouple
INA333-Q1
+
10 kΩ
œ
INA333-Q1
+
GND
图8-3. Providing an Input Common-Mode Current Path
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8.2.2.5 Low Voltage Operation
The INA333-Q1 can be operated on power supplies as low as ±0.9 V. Most parameters vary only slightly
throughout this supply voltage range; see 节 6.6. Operation at a very-low supply voltage requires careful
attention to make sure that the input voltages remain within the linear range. Voltage swing requirements of
internal nodes limit the input common-mode range with low power-supply voltage. 图 6-20 to 图 6-23 show the
range of linear operation for various supply voltages and gains.
8.2.2.6 Single-Supply Operation
The INA333-Q1 can be used on single power supplies of 1.8 V to 5.5 V. 图 8-4 shows a basic single-supply
circuit. The output REF pin is connected to midsupply. Zero differential input voltage demands an output voltage
of midsupply. Actual output voltage swing is limited to approximately 50 mV more than ground, when the load is
referred to ground as shown. 图6-29 shows how the output voltage swing varies with output current.
With single-supply operation, VIN+ and VIN– must both be 0.1 V greater than ground for linear operation. For
instance, the inverting input cannot be connected to ground to measure a voltage connected to the noninverting
input.
To show the issues affecting low-voltage operation, consider the circuit in 图 8-4 that shows the device operating
from a single 3-V supply. A resistor in series with the low side of the bridge makes sure that the bridge output
voltage is within the common-mode range of the amplifier inputs.
+3 V
3 V
2 V - DV
œ
RG
INA333-Q1
VO
300 Ω
+
REF
2 V + DV
1.5 V
150 Ω
R1(1)
(1) R1 creates proper common-mode voltage, only for low-voltage operation; see 节8.2.2.6.
图8-4. Single-Supply Bridge Amplifier
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8.2.3 Application Curves
Time (25 µs/div)
Time (100 µs/div)
图8-5. Large Signal Response
图8-6. Large-Signal Step Response
Time (10 µs/div)
Time (100 µs/div)
图8-7. Small-Signal Step Response
图8-8. Small-Signal Step Response
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8.3 Power Supply Recommendations
The minimum power supply voltage for the INA333-Q1 is 1.8 V, and the maximum power supply voltage is 5.5 V;
for specified performance, 3.3 V to 5 V is recommended. Add a bypass capacitor at the input to compensate for
the layout and power supply source impedance.
8.4 Layout
8.4.1 Layout Guidelines
Attention to good layout practices is always recommended.
• Keep traces short.
• When possible, use a printed-circuit-board (PCB) ground plane with surface-mount components placed as
close to the device pins as possible.
• Place a 0.1-μF bypass capacitor closely across the supply pins.
Apply these guidelines throughout the analog circuit to improve performance and provide benefits such as
reducing the electromagnetic-interference (EMI) susceptibility.
Instrumentation amplifiers vary in susceptibility to radio-frequency interference (RFI). RFI can generally be
identified as a variation in offset voltage or dc signal levels with changes in the interfering RF signal. The
INA333-Q1 has been specifically designed to minimize susceptibility to RFI by incorporating passive RC filters
with an 8-MHz corner frequency at the VIN+ and VIN– inputs. As a result, the INA333-Q1 demonstrates
remarkably low sensitivity compared to previous-generation devices. Strong RF fields can continue to cause
varying offset levels, however, and can require additional shielding.
8.4.2 Layout Example
Gain Resistor
Bypass
Capacitor
RG
V-IN
V+IN
V-
RG
V+
VO
V+
VIN-
VOUT
GND
VIN+
Ref
Bypass
Capacitor
V-
GND
图8-9. Layout Example
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9 Device and Documentation Support
9.1 Device Support
9.1.1 Development Support
9.1.1.1 TINA-TI Simulation Software (Free Download)
TINA™ is a simple, powerful, and easy-to-use circuit simulation program based on a SPICE engine. TINA-TI™ is
a free, fully functional version of the TINA software, preloaded with a library of macromodels in addition to a
range of both passive and active models. TINA-TI provides all the conventional dc, transient, and frequency
domain analysis of SPICE as well as additional design capabilities.
Available as a free download from the Design tools and simulation web page, TINA-TI simulation software offers
extensive post-processing capability that allows users to format results in a variety of ways. Virtual instruments
offer the ability to select input waveforms and probe circuit nodes, voltages, and waveforms, creating a dynamic
quick-start tool.
Virtual instruments offer users the ability to select input waveforms and probe circuit nodes, voltages, and
waveforms, creating a dynamic quick-start tool.
图 9-1 shows example TINA-TI circuits for the device that can be used to develop, modify, and assess the circuit
design for specific applications. Links to download these simulation files are given below.
备注
These files require that either the TINA software (from DesignSoft) or TINA-TI software be installed.
Download the free TINA-TI software from the TINA-TI folder.
3 V
R1
2 kΩ
Rwa
3Ω
EMU21 RTD3
œ
Pt100 RTD
U2
OPA333-Q1
RWb
3Ω
+
2
+
VT+
RTD+
RTD-
U1 INA333-Q1
VOFF
œ
œ
VT 25
RG
V-
VT-
Mon-
1
8
PGA112
MSP430
RGAIN
100 kΩ
Out
3 V
Mon-
Ref
6
RG
+
V+
RWc
4Ω
5
RZERO
100 Ω
3
7
+
Temp (°C)
(Volts = °C)
V
VREF
3 V
VRTD
RWd
3Ω
RTD Resistance
(Volts = Ohms)
+
+
A
IREF1
A
IREF2
3 V
VREF
3 V
3 V
Use BF861A
T3 BF256A
Use BF861A
T1 BF256A
U1 REF3212
VREF
VREF
EN
+
+
+
+
OUTF
OUTS
U3
OPA333-Q1
In
œ
œ
OPA333-Q1
C7
470 nF
GNDF GNDS
3 V
+
V4 3
RSET1
2.5 kΩ
RSET2
2.5 kΩ
NOTE: RWa, RWb, RWc, and RWd simulate wire resistance. These resistors are included to show the four-wire sense technique
immunity to line mismatches. This method assumes the use of a four-wire RTD.
图9-1. Four-Wire, 3-V Conditioner for a PT100 RTD With Programmable Gain Acquisition System
Download the TINA-TI simulation file for this circuit with the following link: PT100 RTD.
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9.2 Documentation Support
9.2.1 Related Documentation
For related documentation see the following:
• Texas Instruments, OPA188-Q1 Precision, Low-Noise, Rail-to-Rail Output, 36-V, Zero-Drift, Automotive-
Grade Operational Amplifier data sheet
• Texas Instruments, OPA333-Q1 1.8-V microPower CMOS Operational Amplifier Zero-Drift Series data sheet
• Texas Instruments, Circuit board layout techniques
9.3 接收文档更新通知
要接收文档更新通知，请导航至 ti.com 上的器件产品文件夹。点击订阅更新 进行注册，即可每周接收产品信息更
改摘要。有关更改的详细信息，请查看任何已修订文档中包含的修订历史记录。
9.4 支持资源
TI E2E™ 支持论坛是工程师的重要参考资料，可直接从专家获得快速、经过验证的解答和设计帮助。搜索现有解
答或提出自己的问题可获得所需的快速设计帮助。
链接的内容由各个贡献者“按原样”提供。这些内容并不构成 TI 技术规范，并且不一定反映 TI 的观点；请参阅
TI 的《使用条款》。
9.5 Trademarks
TINA™ is a trademark of DesignSoft, Inc.
TINA-TI™ and TI E2E™ are trademarks of Texas Instruments.
所有商标均为其各自所有者的财产。
9.6 静电放电警告
静电放电(ESD) 会损坏这个集成电路。德州仪器(TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理
和安装程序，可能会损坏集成电路。
ESD 的损坏小至导致微小的性能降级，大至整个器件故障。精密的集成电路可能更容易受到损坏，这是因为非常细微的参
数更改都可能会导致器件与其发布的规格不相符。
9.7 术语表
TI 术语表
本术语表列出并解释了术语、首字母缩略词和定义。
10 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
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PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
INA333QDGKRQ1
ACTIVE
VSSOP
DGK
8
2500 RoHS & Green
NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
333Q
Samples
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF INA333-Q1 :
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
13-Jun-2023
Catalog : INA333
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
13-Jun-2023
TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
K0
P1
W
B0
Reel
Diameter
Cavity
A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
Overall width of the carrier tape
W
P1 Pitch between successive cavity centers
Reel Width (W1)
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2
Q3 Q4
Q1 Q2
Q3 Q4
User Direction of Feed
Pocket Quadrants
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
INA333QDGKRQ1
VSSOP
DGK
8
2500
330.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
13-Jun-2023
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W
L
*All dimensions are nominal
Device
Package Type Package Drawing Pins
VSSOP DGK
SPQ
Length (mm) Width (mm) Height (mm)
366.0 364.0 50.0
INA333QDGKRQ1
8
2500
Pack Materials-Page 2
重要声明和免责声明
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保。
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