LM4877ITPX/NOPB [TI]
IC,AUDIO AMPLIFIER,SINGLE,BGA,8PIN,PLASTIC;
| 型号： | LM4877ITPX/NOPB |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | IC,AUDIO AMPLIFIER,SINGLE,BGA,8PIN,PLASTIC 放大器 商用集成电路 |
| 文件： | 总15页 (文件大小：481K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
October 2002
LM4877
1 Watt Audio Power Amplifier in micro SMD package
with Shutdown Logic Low
General Description
Features
n micro SMD package (see App. note AN-1112)
n 5V - 2V operation
The LM4877 is a bridge-connected audio power amplifier
capable of delivering 1 W of continuous average power to an
8Ω load with less than .2% (THD) from a 5V power supply.
n No output coupling capacitors or bootstrap capacitors.
n Unity-gain stable
n External gain configuration capability
Boomer audio power amplifiers were designed specifically to
provide high quality output power with a minimal amount of
external components. Since the LM4877 does not require
output coupling capacitors or bootstrap capacitors. It is op-
timally suited for low-power portable applications.
Applications
n Cellular Phones
n Portable Computers
n Low Voltage Audio Systems
The LM4877 features an externally controlled, low-power
consumption shutdown mode, as well as an internal thermal
shutdown protection mechanism.
The unity-gain stable LM4877 can be configured by external
gain-setting resistors.
Key Specifications
n Power Output at 0.2% THD
n Shutdown Current
1W (typ)
0.01µA (typ)
Typical Application
10129001
FIGURE 1. Typical Audio Amplifier Application Circuit
Boomer® is a registered trademark of National Semiconductor Corporation.
© 2004 National Semiconductor Corporation
DS101290
www.national.com
Connection Diagram
8 Bump micro SMD
10129023
Top View
Order Number LM4877IBP, LM4877IBPX
See NS Package Number BPA08B6B
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2
Absolute Maximum Ratings (Note 2)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Soldering Information
See AN-1112 "Micro-SMD Wafers Level Chip Scale
Package".
Supply Voltage
6.0V
−65˚C to +150˚C
−0.3V to VDD +0.3V
Internally Limited
2500V
Storage Temperature
Input Voltage
Operating Ratings
Temperature Range
Power Dissipation (Note 3)
ESD Susceptibility (Note 4)
ESD Susceptibility (Note 5)
Junction Temperature
TMIN ≤ TA ≤ TMAX
−40˚C ≤ TA ≤ 85˚C
2.0V ≤ VDD ≤ 5.5V
Supply Voltage
250V
150˚C
Electrical Characteristics VDD = 5V (Notes 1, 2, 9)
The following specifications apply for VDD = 5V and 8Ω Load unless otherwise specified. Limits apply for TA = 25˚C.
LM4877
Units
(Limits)
Symbol
VDD
Parameter
Supply Voltage
Conditions
Typical
Limit
(Note 6)
(Note 7)
2.0
5.5
7
V (min)
V (max)
mA (max)
µA (max)
mV (max)
W
IDD
Quiescent Power Supply Current
Shutdown Current
VIN = 0V, Io = 0A
5.3
0.01
5
ISD
VPIN5 = 0V
2
VOS
Po
Output Offset Voltage
Output Power
VIN = 0V
50
THD = 0.2% (max); f = 1 kHz
Po = 0.25 Wrms; AVD = 2; 20 Hz ≤
f ≤ 20 kHz
1
THD+N
Total Harmonic Distortion+Noise
0.1
%
PSRR
Power Supply Rejection Ratio
VDD = 4.9V to 5.1V
65
dB
Electrical Characteristics VDD = 3.3V (Notes 1, 2, 9)
The following specifications apply for VDD = 3.3V and 8Ω Load unless otherwise specified. Limits apply for TA = 25˚C.
LM4877
Units
(Limits)
Symbol
VDD
Parameter
Supply Voltage
Conditions
Typical
Limit
(Note 7)
2.0
(Note 6)
V (min)
V (max)
mA (max)
µA (max)
mV (max)
W
5.5
IDD
Quiescent Power Supply Current
Shutdown Current
VIN = 0V, Io = 0A
4
0.01
5
ISD
VPIN5 = 0V
VOS
Po
Output Offset Voltage
Output Power
VIN = 0V
THD = 1% (max); f = 1 kHz
Po = 0.25 Wrms; AVD = 2; 20 Hz ≤
f ≤ 20 kHz
.5
.45
THD+N
Total Harmonic Distortion+Noise
0.15
%
PSRR
Power Supply Rejection Ratio
VDD = 3.2V to 3.4V
65
dB
Electrical Characteristics VDD = 2.6V (Notes 1, 2, 8, 9)
The following specifications apply for VDD = 2.6V and 8Ω Load unless otherwise specified. Limits apply for TA = 25˚C.
LM4877
Units
(Limits)
Symbol
VDD
Parameter
Supply Voltage
Conditions
Typical
Limit
(Note 7)
2.0
(Note 6)
V (min)
V (max)
5.5
IDD
ISD
Quiescent Power Supply Current
Shutdown Current
VIN = 0V, Io = 0A
3.4
0.01
5
mA (max)
µA (max)
mV (max)
VPIN5 = 0V
VIN = 0V
VOS
Output Offset Voltage
3
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Electrical Characteristics VDD = 2.6V (Notes 1, 2, 8, 9)
The following specifications apply for VDD = 2.6V and 8Ω Load unless otherwise specified. Limits apply for TA
=
25˚C. (Continued)
LM4877
Units
(Limits)
Symbol
P0
Parameter
Output Power ( 8Ω )
Conditions
Typical
(Note 6)
0.25
Limit
(Note 7)
THD = 0.3% (max); f = 1 kHz THD
= 0.5% (max); f = 1 kHz
Po = 0.25 Wrms; AVD = 2; 20 Hz ≤
f ≤ 20 kHz
W
W
%
Output Power ( 4Ω )
0.5
THD+N
PSRR
Total Harmonic Distortion+Noise
0.25
Power Supply Rejection Ratio
VDD = 2.5V to 2.7V
65
dB
Note 1: All voltages are measured with respect to the ground pin, unless otherwise specified.
Note 2: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which
guarantee specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not guaranteed for parameters where no limit
is given, however, the typical value is a good indication of device performance.
Note 3: The maximum power dissipation must be derated at elevated temperatures and is dictated by T
, θ , and the ambient temperature T . The maximum
A
JMAX JA
allowable power dissipation is P
= (T
–T )/θ or the number given in Absolute Maximum Ratings, whichever is lower. For the LM4877, T = 150˚C.
DMAX
JMAX
A
JA
JMAX
The typical junction-to-ambient thermal resistance is 150˚C/W.
Note 4: Human body model, 100 pF discharged through a 1.5 kΩ resistor.
Note 5: Machine Model, 220 pF–240 pF discharged through all pins.
Note 6: Typicals are measured at 25˚C and represent the parametric norm.
Note 7: Limits are guaranteed to National’s AOQL (Average Outgoing Quality Level).
Note 8: Low Voltage Circuit - See Fig. 4
Note 9: Shutdown current is measured in a Normal Room Environment. Exposure to direct sunlight will increase I by a maximum of 2µA.
SD
Electrical Characteristics VDD = 5/3.3/2.6V Shutdown Input
LM4877
Units
(Limits)
V(min)
Symbol
Parameter
Conditions
Typical
Limit
1.2
VIH
VIL
Shutdown Input Voltage High
Shutdown Input Voltage Low
0.4
V(max)
External Components Description
(Figure 1)
Components
Functional Description
1.
Ri
Inverting input resistance which sets the closed-loop gain in conjunction with Rf. This resistor also forms a
high pass filter with Ci at fC= 1/(2π RiCi).
2.
Ci
Input coupling capacitor which blocks the DC voltage at the amplifiers input terminals. Also creates a
highpass filter with Ri at fc = 1/(2π RiCi). Refer to the section, Proper Selection of External Components,
for an explanation of how to determine the value of Ci.
3.
4.
Rf
Feedback resistance which sets the closed-loop gain in conjunction with Ri.
CS
Supply bypass capacitor which provides power supply filtering. Refer to the Power Supply Bypassing
section for information concerning proper placement and selection of the supply bypass capacitor.
Bypass pin capacitor which provides half-supply filtering. Refer to the section, Proper Selection of External
Components, for information concerning proper placement and selection of CB.
5.
CB
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4
Typical Performance Characteristics
THD+N vs Frequency
THD+N vs Frequency
at 5V and 8Ω
at 3.3V and 8Ω
10129003
10129006
THD+N vs Frequency
THD+N vs Frequency
at 2.6V and 8Ω
at 2.6V and 4Ω
10129005
10129004
THD+N vs Output Power
THD+N vs Output Power
@
@
VDD = 5V
VDD = 3.3V
10129007
10129008
5
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Typical Performance Characteristics (Continued)
THD+N vs
Output Power
2.6V at 8Ω
THD+N vs
Output Power
2.6V at 4Ω
10129009
10129010
Output Power vs
Supply Voltage
Output Power vs
Load Resistance
10129011
10129012
Power Dissipation vs
Output Power
VDD = 5V
Power Derating Curve
10129014
10129026
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6
Typical Performance Characteristics (Continued)
Power Dissipation vs
Output Power
Power Dissipation vs
Output Power
VDD = 3.3V
VDD = 2.6V
10129027
10129028
Supply Current vs
Shutdown Voltage
Clipping Voltage vs
Supply Voltage
@
LM4877 VDD = 5/3.3/2.6Vdc
10129015
10129035
Frequency Response vs
Input Capacitor Size
Power Supply
Rejection Ratio
10129017
10129018
7
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Typical Performance Characteristics (Continued)
Open Loop
Frequency Response
Noise Floor
10129019
10129016
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8
duced supply voltage, higher load impedance, or reduced
ambient temperature. The National Reference Design board
using a 5V supply and an 8 ohm load will run in a 110˚C
ambient environement without exceeding TJMAX. Internal
power dissipation is a function of output power. Refer to the
Typical Performance Characteristics curves for power dis-
sipation information for different output powers and output
loading.
Application Information
BRIDGE CONFIGURATION EXPLANATION
As shown in Figure 1, the LM4877 has two operational
amplifiers internally, allowing for a few different amplifier
configurations. The first amplifier’s gain is externally config-
urable, while the second amplifier is internally fixed in a
unity-gain, inverting configuration. The closed-loop gain of
the first amplifier is set by selecting the ratio of Rf to Ri while
the second amplifier’s gain is fixed by the two internal 10 kΩ
resistors. Figure 1 shows that the output of amplifier one
serves as the input to amplifier two which results in both
amplifiers producing signals identical in magnitude, but out
of phase by 180˚. Consequently, the differential gain for the
IC is
POWER SUPPLY BYPASSING
As with any amplifier, proper supply bypassing is critical for
low noise performance and high power supply rejection. The
capacitor location on both the bypass and power supply pins
should be as close to the device as possible. Typical appli-
cations employ a 5V regulator with 10 µF Tantalum or elec-
trolytic capacitor and a 0.1 µF bypass capacitor which aid in
supply stability. This does not eliminate the need for bypass-
ing the supply nodes of the LM4877. The selection of a
bypass capacitor, especially CB, is dependent upon PSRR
requirements, click and pop performance as explained in the
section Proper Selection of External Components, sys-
tem cost, and size constraints.
AVD= 2 *(Rf/Ri)
By driving the load differentially through outputs Vo1 and
Vo2, an amplifier configuration commonly referred to as
“bridged mode” is established. Bridged mode operation is
different from the classical single-ended amplifier configura-
tion where one side of its load is connected to ground.
A bridge amplifier design has a few distinct advantages over
the single-ended configuration, as it provides differential
drive to the load, thus doubling output swing for a specified
supply voltage. Four times the output power is possible as
compared to a single-ended amplifier under the same con-
ditions. This increase in attainable output power assumes
that the amplifier is not current limited or clipped. In order to
choose an amplifier’s closed-loop gain without causing ex-
cessive clipping, please refer to the Audio Power Amplifier
Design section.
SHUTDOWN FUNCTION
In order to reduce power consumption while not in use, the
LM4877 contains a shutdown pin to externally turn off the
amplifier’s bias circuitry. This shutdown feature turns the
amplifier off when a logic low is placed on the shutdown pin.
By switching the shutdown pin to ground, the LM4877 supply
current draw will be minimized in idle mode. While the device
will be disabled with shutdown pin voltages less than
0.4VDC, the idle current may be greater than the typical
value of 0.01 µA.
A bridge configuration, such as the one used in LM4877,
also creates a second advantage over single-ended amplifi-
ers. Since the differential outputs, Vo1 and Vo2, are biased
at half-supply, no net DC voltage exists across the load. This
eliminates the need for an output coupling capacitor which is
required in a single supply, single-ended amplifier configura-
tion. Without an output coupling capacitor, the half-supply
bias across the load would result in both increased internal
IC power dissipation and also possible loudspeaker damage.
In many applications, a microcontroller or microprocessor
output is used to control the shutdown circuitry which pro-
vides a quick, smooth transition into shutdown. Another so-
lution is to use a single-pole, single-throw switch in conjunc-
tion with an external pull-up resistor. When the switch is
closed, the shutdown pin is connected to ground and dis-
ables the amplifier. If the switch is open, then the external
pull-up resistor will enable the LM4877. This scheme guar-
antees that the shutdown pin will not float thus preventing
unwanted state changes. Another way to operate the shut-
down circuit is with a pulldown resistor (R1), as shown in the
applications circuit on Figure 3. J1 operates the shutdown
function. J1 must be installed to operate the part. A switch
may be installed in place of J1 for easier evaluation of the
shutdown function.
POWER DISSIPATION
Power dissipation is a major concern when designing a
successful amplifier, whether the amplifier is bridged or
single-ended. A direct consequence of the increased power
delivered to the load by a bridge amplifier is an increase in
internal power dissipation. Since the LM4877 has two opera-
tional amplifiers in one package, the maximum internal
power dissipation is 4 times that of a single-ended amplifier.
The maximum power dissipation for a given application can
be derived from the power dissipation graphs or from Equa-
tion 1.
PROPER SELECTION OF EXTERNAL COMPONENTS
Proper selection of external components in applications us-
ing integrated power amplifiers is critical to optimize device
and system performance. While the LM4877 is tolerant of
external component combinations, consideration to compo-
nent values must be used to maximize overall system qual-
ity.
PDMAX = 4*(VDD)2/(2π2RL)
(1)
It is critical that the maximum junction temperature TJMAX of
150˚C is not exceeded. TJMAX can be determined from the
power derating curves by using PDMAX and the PC board foil
area. By adding additional copper foil, the thermal resistance
of the application can be reduced from a free air value of
150˚C/W, resulting in higher PDMAX. Additional copper foil
can be added to any of the leads connected to the LM4877.
It is especially effective when connected to VDD, GND, and
the output pins. Refer to the application information on the
LM4877 reference design board for an example of good heat
sinking. If TJMAX still exceeds 150˚C, then additional
changes must be made. These changes can include re-
The LM4877 is unity-gain stable which gives a designer
maximum system flexibility. The LM4877 should be used in
low gain configurations to minimize THD+N values, and
maximize the signal to noise ratio. Low gain configurations
require large input signals to obtain a given output power.
Input signals equal to or greater than 1 Vrms are available
from sources such as audio codecs. Please refer to the
section, Audio Power Amplifier Design, for a more com-
plete explanation of proper gain selection.
9
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AUDIO POWER AMPLIFIER DESIGN
Application Information (Continued)
A 1W/8Ω AUDIO AMPLIFIER
Besides gain, one of the major considerations is the closed-
loop bandwidth of the amplifier. To a large extent, the band-
width is dictated by the choice of external components
shown in Figure 1. The input coupling capacitor, Ci, forms a
first order high pass filter which limits low frequency re-
sponse. This value should be chosen based on needed
frequency response for a few distinct reasons.
Given:
Power Output
Load Impedance
Input Level
1 Wrms
8Ω
1 Vrms
20 kΩ
Input Impedance
Selection Of Input Capacitor Size
Bandwidth
100 Hz–20 kHz 0.25 dB
Large input capacitors are both expensive and space hungry
for portable designs. Clearly, a certain sized capacitor is
needed to couple in low frequencies without severe attenu-
ation. But in many cases the speakers used in portable
systems, whether internal or external, have little ability to
reproduce signals below 100 Hz to 150 Hz. Thus, using a
large input capacitor may not increase actual system perfor-
mance.
A designer must first determine the minimum supply rail to
obtain the specified output power. By extrapolating from the
Output Power vs Supply Voltage graphs in the Typical Per-
formance Characteristics section, the supply rail can be
easily found. A second way to determine the minimum sup-
ply rail is to calculate the required Vopeak using Equation 2
and add the output voltage. Using this method, the minimum
supply voltage would be (Vopeak + (VOD
+ VODBOT)), where
VOD
and VOD
are extrapolated frToOmP the Dropout Volt-
In addition to system cost and size, click and pop perfor-
mance is effected by the size of the input coupling capacitor,
Ci. A larger input coupling capacitor requires more charge to
reach its quiescent DC voltage (nominally 1/2 VDD). This
charge comes from the output via the feedback and is apt to
create pops upon device enable. Thus, by minimizing the
capacitor size based on necessary low frequency response,
turn-on pops can be minimized.
TOP
age BvOsT Supply Voltage curve in the Typical Performance
Characteristics section.
(2)
Using the Output Power vs Supply Voltage graph for an 8Ω
load, the minimum supply rail is 4.6V. But since 5V is a
standard voltage in most applications, it is chosen for the
supply rail. Extra supply voltage creates headroom that al-
lows the LM4877 to reproduce peaks in excess of 1W with-
out producing audible distortion. At this time, the designer
must make sure that the power supply choice along with the
output impedance does not violate the conditions explained
in the Power Dissipation section.
Besides minimizing the input capacitor size, careful consid-
eration should be paid to the bypass capacitor value. Bypass
capacitor, CB, is the most critical component to minimize
turn-on pops since it determines how fast the LM4877 turns
on. The slower the LM4877’s outputs ramp to their quiescent
DC voltage (nominally 1/2 VDD), the smaller the turn-on pop.
Choosing CB equal to 1.0 µF along with a small value of Ci
(in the range of 0.1 µF to 0.39 µF), should produce a virtually
clickless and popless shutdown function. While the device
will function properly, (no oscillations or motorboating), with
CB equal to 0.1 µF, the device will be much more susceptible
to turn-on clicks and pops. Thus, a value of CB equal to
1.0 µF is recommended in all but the most cost sensitive
designs.
Once the power dissipation equations have been addressed,
the required differential gain can be determined from Equa-
tion 3.
(3)
Rf/Ri = AVD/2
LOW VOLTAGE APPLICATIONS ( BELOW 3.0 VDD
)
From Equation 3, the minimum AVD is 2.83; use AVD = 3.
The LM4877 will function at voltages below 3 volts but this
mode of operation requires the addition of a 1kΩ resistor
from each of the differential output pins ( pins 8 and 4 )
directly to ground. The addition of the pair of 1kΩ resistors (
R4 & R5 ) assures stable operation below 3 Volt Vdd opera-
tion. The addition of the two resistors will however increase
the idle current by as much as 5mA. This is because at 0v
input both of the outputs of the LM4877’s 2 internal opamps
go to 1/2 VDD ( 2.5 volts for a 5v power supply ), causing
current to flow through the 1K resistors from output to
ground. See fig 4.
Since the desired input impedance was 20 kΩ, and with a
AVD impedance of 2, a ratio of 1.5:1 of Rf to Ri results in an
allocation of Ri = 20 kΩ and Rf = 30 kΩ. The final design step
is to address the bandwidth requirements which must be
stated as a pair of −3 dB frequency points. Five times away
from a −3 dB point is 0.17 dB down from passband response
which is better than the required 0.25 dB specified.
fL = 100 Hz/5 = 20 Hz
fH = 20 kHz * 5 = 100 kHz
As stated in the External Components section, Ri in con-
junction with Ci create a highpass filter.
Jumper options have been included on the reference design,
Fig. 4, to accommodate the low voltage application. J2 & J3
connect R4 and R5 to the outputs.
Ci ≥ 1/(2π*20 kΩ*20 Hz) = 0.397 µF; use 0.39 µF
The high frequency pole is determined by the product of the
desired frequency pole, fH, and the differential gain, AVD
.
With a AVD = 3 and fH = 100 kHz, the resulting GBWP =
150 kHz which is much smaller than the LM4877 GBWP of
4 MHz. This figure displays that if a designer has a need to
design an amplifier with a higher differential gain, the
LM4877 can still be used without running into bandwidth
limitations.
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10
HIGHER GAIN AUDIO AMPLIFIER
Application Information (Continued)
10129024
Figure 2
The LM4877 is unity-gain stable and requires no external
components besides gain-setting resistors, an input coupling
capacitor, and proper supply bypassing in the typical appli-
cation. However, if a closed-loop differential gain of greater
than 10 is required, a feedback capacitor may be needed as
shown in Figure 2 to bandwidth limit the amplifier. This
feedback capacitor creates a low pass filter that eliminates
possible high frequency oscillations. Care should be taken
when calculating the -3dB frequency in that an incorrect
combination of R3 and C4 will cause rolloff before 20kHz. A
typical combination of feedback resistor and capacitor that
will not produce audio band high frequency rolloff is R3
=
20kΩ and C4 = 25pf. These components result in a -3dB
point of approximately 320 kHz. It is not recommended that
the feedback resistor and capacitor be used to implement a
band limiting filter below 100kHZ.
11
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Application Information (Continued)
DIFFERENTIAL AMPLIFIER CONFIGURATION FOR
LM4877
10129029
Figure 3
Mono LM4877 Reference Design Board - Assembly Part Number: 980011207-100 Revision: A Bill of Material
Item
1
Part Number
Part Description
Qty
1
Ref Designator
551011208-001
482911183-001
151911207-001
151911207-002
152911207-001
472911207-001
472911207-002
210007039-002
210007582-001
LM4877 Mono Reference Design Board PCB etch 001
LM4877 Audio AMP micro SMD 8 Bumps
Cer Cap 0.1uF 50V +80/-20% 1206
Cer Cap 0.39uF 50V Z5U 20% 1210
Tant Cap 1uF 16V 10% Size=A 3216
Res 20K Ohm 1/10W 5% 0805
10
20
21
25
30
31
35
36
1
U1
1
C1
1
C2
1
C3
3
R1, R2, R3
R4, R5,
J1, J2, J3
Res 1K Ohm 1/10W 5% 0805
2
Jumper Header Vertical Mount 2X1 0.100
Jumper Shunt 2 position 0.100
3
3
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Application Information (Continued)
Inner Layer VDD
Silk Screen
10129033
10129030
Inner Layer Ground
Top Layer
10129034
10129031
Bottom Layer
10129032
13
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Application Information (Continued)
REFERENCE DESIGN BOARD and PCB LAYOUT
GUIDELINES
10129025
Figure 4
PCB Layout Guidelines
Single-Point Power / Ground Connections
This section provides practical guidelines for mixed signal
PCB layout that involves various digital/analog power and
ground traces. Designers should note that these are only
"rule-of-thumb" recommendations and the actual results will
depend heavily on the final layout.
The analog power traces should be connected to the digital
traces through a single point (link). A "Pi-filter" can be helpful
in minimizing High Frequency noise coupling between the
analog and digital sections. It is further recommended to put
digital and analog power traces over the corresponding digi-
tal and analog ground traces to minimize noise coupling.
General Mixed Signal Layout Recommendation
Power and Ground Circuits
Placement of Digital and Analog Components
All digital components and high-speed digital signals traces
should be located as far away as possible from the analog
components and the analog circuit traces.
For 2 layer mixed signal design, it is important to isolate the
digital power and ground trace paths from the analog power
and ground trace paths. Star trace routing techniques (bring-
ing individual traces back to a central point rather than daisy
chaining traces together in a serial manner) can have a
major impact on low level signal performance. Star trace
routing refers to using individual traces to feed power and
ground to each circuit or even device. This technique will
take require a greater amount of design time but will not
increase the final price of the board. The only extra parts
required will be some jumpers.
Avoiding Typical Design / Layout Problems
Avoid ground loops or running digital and analog traces
parallel to each other (side-by-side) on the same PCB layer.
When traces must cross over each other do it at 90 degrees.
Running digital and analog traces at 90 degrees to each
other from the top to the bottom side as much as possible will
minimize capacitive noise coupling and cross talk.
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14
Physical Dimensions inches (millimeters)
unless otherwise noted
Note: Unless otherwise specified.
1. Epoxy coating.
2. 63Sn/37Pb eutectic bump.
3. Recommend non-solder mask defined landing pad.
4. Pin 1 is established by lower left corner with respect to text orientation pins are numbered counterclockwise.
5. Reference JEDEC registration MO-211, variation BC.
8-Bump micro SMD
Order Number LM4877IBP, LM4877IBPX
NS Package Number BPA08B6B
X1 = 1.31 0.03 X2 = 1.97 0.03 X3 = 0.850 0.10
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves
the right at any time without notice to change said circuitry and specifications.
For the most current product information visit us at www.national.com.
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WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body, or
(b) support or sustain life, and whose failure to perform when
properly used in accordance with instructions for use
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