LM66100-Q1 [TI]
具有集成式 FET 的汽车类 1.5V 至 5.5V、1.5A、0.5µA IQ 理想二极管;
| 型号： | LM66100-Q1 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 具有集成式 FET 的汽车类 1.5V 至 5.5V、1.5A、0.5µA IQ 理想二极管 二极管 |
| 文件： | 总22页 (文件大小：1923K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LM66100-Q1
ZHCSO26A –NOVEMBER 2021 –REVISED MARCH 2022
LM66100-Q1 具有输入极性保护功能的5.5V、1.5A、79mΩ、汽车类低IQ 理想二
极管
1 特性
3 说明
• 符合面向汽车应用的AEC-Q100 标准：
LM66100-Q1 是一款单输入单输出 (SISO) 集成式理想
二极管，是各种应用的理想之选。该器件包含一个可在
1.5V 至 5.5V 输入电压范围内运行的 P 沟道
MOSFET，并且支持1.5A 的最大持续电流。
– 器件温度等级1：-40°C 至125°C 环境工作温度
范围
• 宽工作电压范围：1.5V 至5.5V
• VIN 反向关断电压：
绝对最大值为–6V
• 最大持续电流(IMAX)：1.5A
• 导通电阻(RON)：
– 5V VIN = 79mΩ（典型值）
– 3.6V VIN = 91mΩ（典型值）
– 1.8V VIN = 141mΩ（典型值）
• 启用比较器芯片(CE)
• 通道状态指示(ST)
• 低电流消耗：
该芯片通过比较 CE 引脚电压和输入电压来提供支持。
当 CE 引脚电压高于输入电压时，该器件被禁用并且
MOSFET 关断。当 CE 引脚电压比较低时，MOSFET
开启。LM66100-Q1 还具有反极性保护 (RPP) 功能，
可保护器件不受输入接线错误的影响，例如电池装反。
可在 ORing 配置中使用两个 LM66100-Q1 器件，其实
施方法与双二极管 ORing 相似。在此配置中，该器件
将最高输入电压传递到输出端，同时阻断反向电流流入
输入电源。这些器件可比较输入和输出电压，从而确保
内部电压比较器成功阻断反向电流。
– 3.6V VIN 关断电流(ISD,VIN)：120nA（典型值）
– 3.6V VIN 静态电流(IQ, VIN)：150nA（典型值）
LM66100-Q1 采用标准 SC-70 封装，工作结温范围为
–40°C 至150°C。
2 应用
器件信息(1)
• 信息娱乐系统、仪表组和音响主机
• 汽车仪表组显示器
• ADAS 环视系统ECU
• 车身控制模块和网关
封装尺寸（标称值）
器件型号
封装
SC-70 (6)
LM66100-Q1
2.1mm × 2.0mm
(1) 如需了解所有可用封装，请参阅数据表末尾的可订购产品附
录。
典型应用
本文档旨在为方便起见，提供有关TI 产品中文版本的信息，以确认产品的概要。有关适用的官方英文版本的最新信息，请访问
www.ti.com，其内容始终优先。TI 不保证翻译的准确性和有效性。在实际设计之前，请务必参考最新版本的英文版本。
English Data Sheet: SLVSGD6
LM66100-Q1
ZHCSO26A –NOVEMBER 2021 –REVISED MARCH 2022
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Table of Contents
8.3 Feature Description...................................................11
8.4 Device Functional Modes..........................................12
9 Application and Implementation..................................12
9.1 Application Information............................................. 12
9.2 Typical Applications.................................................. 12
10 Power Supply Recommendations..............................15
11 Layout...........................................................................16
11.1 Layout Guidelines................................................... 16
11.2 Layout Example...................................................... 16
12 Device and Documentation Support..........................17
12.1 Receiving Notification of Documentation Updates..17
12.2 支持资源..................................................................17
12.3 Trademarks.............................................................17
12.4 Electrostatic Discharge Caution..............................17
12.5 术语表..................................................................... 17
13 Mechanical, Packaging, and Orderable
1 特性................................................................................... 1
2 应用................................................................................... 1
3 说明................................................................................... 1
4 Revision History.............................................................. 2
5 Pin Configuration and Functions...................................3
6 Specifications.................................................................. 4
6.1 Absolute Maximum Ratings........................................ 4
6.2 ESD Ratings............................................................... 4
6.3 Recommended Operating Conditions.........................4
6.4 Thermal Information....................................................4
6.5 Electrical Characteristics.............................................5
6.6 Switching Characteristics............................................6
6.7 Typical Characteristics................................................7
7 Parameter Measurement Information............................9
8 Detailed Description......................................................10
8.1 Overview...................................................................10
8.2 Functional Block Diagram.........................................10
Information.................................................................... 17
4 Revision History
注：以前版本的页码可能与当前版本的页码不同
Changes from Revision * (November 2021) to Revision A (March 2022)
Page
• 将数据表状态从“预告信息”更改为“量产数据”.............................................................................................1
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5 Pin Configuration and Functions
图5-1. DCK Package 6-Pin SC-70 Top View
表5-1. Pin Functions
PIN
I/O
DESCRIPTION
NO.
1
NAME
VIN
I
Device input
Device ground
2
GND
—
Active-low chip enable. Can be connected to VOUT for reverse current protection. Do not
leave floating.
3
4
5
6
CE
N/C
I
Not internally connected, can be tied to GND or left floating.
—
O
O
Active-low open-drain output, pulled low when the chip is disabled. Hi-Z when the chip is
enabled. Connect to GND if not required.
ST
VOUT
Device output
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN
–6
MAX
6
UNIT
V
VIN
Maximum Input Voltage Range
VOUT
VCE
Maximum Output Voltage Range
Maximum CE Pin Voltage
6
V
–0.3
–0.3
–0.3
6
V
VST
Maximum ST Pin Voltage
6
V
ISW, MAX
ISW, PLS
ID, PLS
ICE
Maximum Continuous Switch Current
Maximum Pulsed Switch Current (≤120 ms, 2% Duty Cycle)
Maximum Pulsed Body Diode Current (≤0.1 ms, 0.2% Duty Cycle)
Maximum CE Pin Current
1.5
2.5
2.5
A
A
A
mA
mA
°C
°C
°C
–1
–1
IST
Maximum ST Pin Current
TJ
Junction temperature
150
150
300
–40
–65
TSTG
TLEAD
Storage temperature
Maximum Lead Temperature (10 s soldering time)
(1) Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply
functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If
used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully
functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime.
6.2 ESD Ratings
VALUE
UNIT
Human body model (HBM), per AEC Q100-
002(1)
±2000
HBM ESD classification level 2
V(ESD)
Electrostatic discharge
V
Charged device model (CDM), per AEC Q100-
011
±500
CDM ESD classification level C4A
(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
1.5
1
TYP
MAX
5.5
UNIT
VIN
Input Voltage Range
Output Voltage Range
CE Pin Voltage Range
ST Pin Voltage Range
V
V
V
V
VOUT
VCE
VST
5.5
0
5.5
0
5.5
6.4 Thermal Information
LM66100
THERMAL METRIC(1)
DCK (SC-70)
UNIT
6 PINS
192
124
52
RθJA
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
Junction-to-top characterization parameter
°C/W
°C/W
°C/W
°C/W
RθJC(top)
RθJB
34
ΨJT
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LM66100
THERMAL METRIC(1)
DCK (SC-70)
6 PINS
52
UNIT
Junction-to-board characterization parameter
°C/W
ΨJB
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
6.5 Electrical Characteristics
Typical values are at 25°C with an input voltage of 3.6V. Maximum and minimum values are across the entire operating
voltage range, from 1.5V to 5.5V. (unless otherwise noted)
UNI
T
PARAMETER
Input Supply (VIN)
TEST CONDITIONS
MIN TYP MAX
VOUT = VIN
VCE > VIN + 80 mV
IOUT = 0 A (VOUT = open)
25°C
0.12 0.3 µA
0.3 µA
ISD,VIN
VIN Shutdown Current
VIN Quiescent Current
–40°C to 125°C
25°C
VOUT = VIN
VCE < VIN –250 mV
IOUT = 0 A (VOUT = open)
0.15 0.3 µA
0.3 µA
IQ,VIN
–40°C to 125°C
25°C
0.2 0.5 µA
2.7 µA
VOUT –VIN ≤5.5 V
VCE > VIN + 80 mV
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
8
µA
OUT to IN Leakage Current
(Current out of VIN)
1.7 µA
5.1 µA
0.7 µA
2.1 µA
IOUT, OFF
VOUT –VIN ≤4.5 V
VCE > VIN + 80 mV
VOUT –VIN ≤1.0 V
VCE > VIN + 80 mV
ON-Resistance (RON)
25°C
79
95
110
RON
RON
RON
ON-State Resistance
VIN = 5 V
–40°C to 85°C
–40°C to 125°C
25°C
IOUT = –200 mA
IOUT = –200 mA
IOUT = –200 mA
mΩ
120
91 110
125
ON-State Resistance
ON-State Resistance
VIN = 3.6 V
VIN = 1.8 V
–40°C to 85°C
–40°C to 125°C
25°C
mΩ
mΩ
140
141 180
210
–40°C to 85°C
–40°C to 125°C
230
Comparator Chip Enable (CE)
–
–
VON
Turn ON Threshold
mV
VCE –VIN
–40°C to 125°C
–80
250 150
VOFF
ICE
Turn OFF Threshold
0
0
0
35
80 mV
VCE –VIN
–40°C to 125°C
–40°C to 125°C
–40°C to 125°C
CE Pin Leakage Current
CE Pin Leakage Current
160 300 nA
400 610 nA
VCE < VIN –250 mV
VCE > VIN + 80 mV
ICE
Reverse Current Blocking (RCB) and Body Diode Characteristics
IRCB
Reverse Activation Current
Body Diode Forward Voltage
VCE = VOUT
0.5
1
A
V
–40°C to 125°C
–40°C to 125°C
IOUT = 10 mA
VCE > VIN + 80 mV
VFWD
0.1 0.5 1.1
Status Indication (ST)
VOL, ST
Output Low Voltage
IST = 1 mA
0.1
V
–40°C to 125°C
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6.5 Electrical Characteristics (continued)
Typical values are at 25°C with an input voltage of 3.6V. Maximum and minimum values are across the entire operating
voltage range, from 1.5V to 5.5V. (unless otherwise noted)
UNI
T
PARAMETER
TEST CONDITIONS
MIN TYP MAX
tST
IST
Status Delay Time
VCE transitions from low to high
VCE < VIN –250 mV
1
µs
–40°C to 125°C
ST Pin Leakage Current
20 nA
–40°C to 125°C –20
6.6 Switching Characteristics
Unless otherwise noted, the typical characteristics in the following table applies over the entire recommended operating
voltage at an ambient temperature of 25°C and a load of CL = 100 nF and RL = 1 kΩ
PARAMETER
TEST CONDITIONS
MIN
TYP
90
40
27
2
MAX
UNIT
µs
VIN = 1.8 V
tON
Turn ON Time
VIN = 3.6 V
VIN = 5 V
µs
µs
VIN = 1.8 V
VIN = 3.6 V
VIN = 5 V
µs
tOFF
Turn OFF Time
Output Fall Time
2
µs
2
µs
VIN = 1.8 V
VIN = 3.6 V
VIN = 5 V
20
10
7.5
µs
tFALL
µs
µs
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6.7 Typical Characteristics
240
200
180
160
140
120
100
80
-40èC
-40èC
25èC
85èC
105èC
220
25èC
85èC
105èC
200
180
160
140
120
100
80
60
40
60
20
1.5
2
2.5
3
Input Voltage (V)
3.5
4
4.5
5
5.5
1.5
2
2.5
3
Input Voltage (V)
3.5
4
4.5
5
5.5
D001
D002
VCE > VIN
图6-1. Shutdown Current vs Input Voltage
VCE < VIN
图6-2. Quiescent Current vs Input Voltage
1200
180
VOUT - VIN = 1V
VOUT - VIN = 4.5V
VOUT - VIN = 5.5V
VIN = 1.8V
VIN = 3.6V
VIN = 5V
1000
800
600
400
200
0
160
140
120
100
80
60
-40
-20
0
20
40
60
80
100
120
-40
-20
0
20
40
60
80
100
120
Temperature (èC)
Temperature (èC)
D003
D004
VCE > VIN
VCE < VIN
IOUT = 200 mA
图6-3. Reverse Leakage Current vs Junction Temperature
图6-4. On-Resistance vs Junction Temperature
-50
65
-40èC
25èC
-40èC
25èC
85èC
105èC
60
55
50
45
40
35
30
25
-75
85èC
105èC
-100
-125
-150
-175
-200
1.5
2
2.5
3
Input Voltage (V)
3.5
4
4.5
5
5.5
1.5
2
2.5
3
Input Voltage (V)
3.5
4
4.5
5
5.5
D007
D008
图6-5. Turn ON Threshold vs Input Voltage
图6-6. Turn OFF Threshold vs Input Voltage
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6.7 Typical Characteristics (continued)
0.6
0.5
0.4
0.3
0.2
120
100
80
60
40
20
0
VIN = 1.8V
VIN = 3.6V
VIN = 5V
-40èC
25èC
85èC
105èC
0.1
0
1.5
2
2.5
3
Input Voltage (V)
3.5
4
4.5
5
5.5
-40
-20
0
20
40
60
80
100
120
Junction Temperature (èC)
D005
D009
VCE > VIN
IOUT = 10 mA
CL = 100 nF
RL = 1 kΩ
图6-7. Body Diode Forward Voltage vs Input Voltage
图6-8. Turn ON Time vs Junction Temperature
10
22
VIN = 1.8V
VIN = 3.6V
VIN = 5V
20
18
16
14
12
10
8
8
6
4
2
0
6
4
-40
-40
-20
0
20
40
60
80
100
120
-20
0
20
40
60
80
100
120
Junction Temperature (èC)
D010
Junction Temperature (èC)
D011
CL = 100nF
VIN = 1.8 V to 5 V
RL = 1 kΩ
CL = 100 nF
RL = 1 kΩ
图6-9. Turn OFF Time vs Junction Temperature
图6-10. Fall Time vs Junction Temperature
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7 Parameter Measurement Information
图7-1. Timing Diagram
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8 Detailed Description
8.1 Overview
The LM66100-Q1 is a Single-Input, Single-Output (SISO) integrated ideal diode that contains a P-channel
MOSFET to minimize the voltage drop from input to output. The LM66100-Q1 can operate over an input voltage
range of 1.5 V to 5.5 V and support a maximum continuous current of 1.5 A.
The chip enable works by comparing the CE pin voltage to the input voltage. When the CE pin voltage is higher
than VIN by 80 mV, the device is disabled and the MOSFET is off. When the CE pin voltage is lower than VIN by
250 mV, the MOSFET is on. The LM66100-Q1 also comes with reverse polarity protection (RPP) that protects
against events where the VIN and GND terminals are swapped.
8.2 Functional Block Diagram
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8.3 Feature Description
8.3.1 Reverse Polarity Protection (RPP)
In the event a negative input voltage is applied, the ideal diode stays off and prevent current flow to protect the
system load. For a stand-alone, always on application, CE can be tied to GND so it does not go negative with
respect to GND. See 图8-1.
图8-1. RPP Protection Circuit
8.3.2 Always-ON Reverse Current Blocking (RCB)
By connecting the CE pin to VOUT, this allows the comparator to detect reverse current flow through the switch.
If the output is forced above the selected input by VOFF, the channel switches off to stop the reverse current IRCB
within tOFF. Once the output falls below VIN by VON, the device turns back on.
图8-2. RCB Circuit
图8-3. RCB Waveforms
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8.4 Device Functional Modes
表8-1 summarizes the Device Functional Modes:
表8-1. Device Functional Modes
State
OFF
ON
IN-to-OUT
Power Dissipation
ST State
Diode
IOUT × VFWD
L
Switch
IOUT 2 × RON
H
9 Application and Implementation
备注
Information in the following applications sections is not part of the TI component specification, and TI
does not warrant its accuracy or completeness. TI’s customers are responsible for determining
suitability of components for their purposes, as well as validating and testing their design
implementation to confirm system functionality.
9.1 Application Information
The LM66100-Q1 Ideal Diode can be used in a variety of stand-alone and multi-channel applications.
9.2 Typical Applications
9.2.1 Dual Ideal Diode ORing
Two LM66100-Q1 Ideal Diodes can be used together for ORing between two power supplies.
图9-1. Dual Ideal Diode ORing
9.2.1.1 Design Requirements
Design a circuit that allows the highest input voltage to power a downstream system while providing reverse
current protection.
9.2.1.2 Detailed Design Procedure
This circuit ties the CE of each device to the opposite power source. In this configuration, the highest supply is
always selected using a make-before-break logic. This selection prevents any reverse current flow between the
supplies and avoids the need of a dedicated reverse current blocking comparator. For ORing applications that
need RPP, TI recommends to use a series resistor (RCE) to limit the current into the CE pin during a negative
voltage event.
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9.2.1.3 Application Curves
The below scope shot shows the output voltage (VOUT) being initially powered by VIN1. When VIN2 is applied,
it powers VOUT because it is a higher voltage. When VIN2 is removed, VOUT is once again powered by VIN1.
图9-2. Dual Ideal Diode ORing Behavior
9.2.2 Dual Ideal Diode ORing for Continuous Output Power
图9-3. Dual Ideal Diode ORing for Continuous Output Power
9.2.2.1 Design Requirements
The shortcoming of the previous implementation happens when both input voltages are the same for a long
period of time. Then, both devices completely turn off, powering down the output load. To avoid this case, use
the status output from the priority supply and a pullup resistor, causing both devices to switchover at the same
time. For ORing applications that need RPP, TI recommends to use a series resistor (RCE) to limit the current
into the CE pin during a negative voltage event.
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9.2.2.2 Application Curves
The figures below show the switchover performance between VIN1 and VIN2.
图9-4. Switchover From VIN1 (5 V) to VIN2 (3.3 V) 图9-5. Switchover From VIN2 (3.3 V) to VIN1 (5 V)
9.2.3 ORing with Discrete MOSFET
图9-6. ORing with a Discrete MOSFET
9.2.3.1 Design Requirements
Similar to the Dual Ideal Diode circuit, the Status Output can also be used to control a discrete P-Channel
MOSFET. This action can be useful in applications that want to minimize the leakage current on the secondary
supply, such as battery backup systems. This configuration can also be used on systems that require a lower
RON on the secondary rail, useful for higher current applications.
When the Ideal Diode path is enabled, the status is Hi-Z and pulls up the gate of the external PFET to keep it off.
When the main supply (VIN1) drops such that backup supply (VIN2) is higher than VIN1, the ideal diode is
disabled and pulls the ST pin and the PFET gate low to turn on the discrete MOSFET path.
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9.2.3.2 Application Curves
The figures below show the switchover performance between VIN1 and VIN2.
图9-7. Switchover From VIN1 5 V to VIN2 3.3 V
图9-8. Switchover From VIN2 3.3 V to VIN1 5 V
10 Power Supply Recommendations
The device is designed to operate with a VIN range of 1.5 V to 5.5 V. The VIN power supply must be well
regulated and placed as close to the device terminal as possible. The power supply must be able to withstand all
transient load current steps. In most situations, using an input capacitance (CIN) of 1 μF is sufficient to prevent
the supply voltage from dipping when the switch is turned on. In cases where the power supply is slow to
respond to a large transient current or large load current step, additional bulk capacitance can be required on the
input.
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Product Folder Links: LM66100-Q1
LM66100-Q1
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11 Layout
11.1 Layout Guidelines
For best performance, all traces must be as short as possible. To be most effective, place the input and output
capacitors close to the device to minimize the effects that parasitic trace inductances can have on normal
operation. Using wide traces for VIN, VOUT, and GND helps minimize the parasitic electrical effects.
11.2 Layout Example
图11-1. LM66100-Q1 Layout Example
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12 Device and Documentation Support
12.1 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
12.2 支持资源
TI E2E™ 支持论坛是工程师的重要参考资料，可直接从专家获得快速、经过验证的解答和设计帮助。搜索现有解
答或提出自己的问题可获得所需的快速设计帮助。
链接的内容由各个贡献者“按原样”提供。这些内容并不构成 TI 技术规范，并且不一定反映 TI 的观点；请参阅
TI 的《使用条款》。
12.3 Trademarks
TI E2E™ is a trademark of Texas Instruments.
所有商标均为其各自所有者的财产。
12.4 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
12.5 术语表
TI 术语表
本术语表列出并解释了术语、首字母缩略词和定义。
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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Product Folder Links: LM66100-Q1
PACKAGE OPTION ADDENDUM
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13-Mar-2022
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
LM66100QDCKRQ1
PLM66100QDCKRQ1
ACTIVE
ACTIVE
SC70
SC70
DCK
DCK
6
6
3000 RoHS & Green
3000 RoHS & Green
NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 125
-40 to 125
1IW
PIW
NIPDAU
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
13-Mar-2022
OTHER QUALIFIED VERSIONS OF LM66100-Q1 :
Catalog : LM66100
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
Addendum-Page 2
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Copyright © 2022，德州仪器 (TI) 公司
相关型号：
LM6687IM
IC DUAL COMPARATOR, 1900 uV OFFSET-MAX, PDSO16, 0.150 INCH, PLASTIC, SOP-16, Comparator
NSC
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