LME49723MAX/NOPB [TI]
2 通道、17MHz、高保真、高性能音频运算放大器 | D | 8 | -40 to 85;
| 型号： | LME49723MAX/NOPB |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 2 通道、17MHz、高保真、高性能音频运算放大器 | D | 8 | -40 to 85 放大器 运算放大器 |
| 文件： | 总29页 (文件大小：1490K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LME49723
www.ti.com
SNAS429B –JANUARY 2008–REVISED APRIL 2013
LME49723 Dual High Fidelity Audio Operational Amplifier
Check for Samples: LME49723
1
FEATURES
DESCRIPTION
The LME49723 is part of the ultra-low distortion, low
noise, high slew rate operational amplifier series
optimized and fully specified for high performance,
high fidelity applications. Combining advanced
leading-edge process technology with state-of-the-art
circuit design, the LME49723 audio operational
amplifiers deliver superior audio signal amplification
for outstanding audio performance. The LME49723
combines extremely low voltage noise density
(3.6nV/√Hz) with vanishingly low THD+N (0.0002%)
to easily satisfy the most demanding audio
applications. To ensure that the most challenging
loads are driven without compromise, the LME49723
has a high slew rate of ±20V/μs and an output current
capability of ±26mA. Further, dynamic range is
maximized by an output stage that drives 2kΩ loads
to within 1V of either power supply voltage and to
within 1.4V when driving 600Ω loads.
2
•
•
•
•
•
Easily Drives 600Ω Loads
Optimized for Superior Audio Signal Fidelity
Output Short Circuit Protection
PSRR and CMRR Exceed 100dB (typ)
SOIC Package
APPLICATIONS
•
•
•
•
•
•
High Quality Audio Amplification
High Fidelity Preamplifiers
High Fidelity Multimedia
Phono Pre Amps
High Performance Professional Audio
High Fidelity Equalization and Crossover
Networks
•
•
•
High Performance Line Drivers
High Performance Line Receivers
High Fidelity Active Filters
The LME49723's outstanding CMRR (100dB), PSRR
(100dB), and VOS (0.3mV) give the amplifier excellent
operational amplifier DC performance.
The LME49723 has a wide supply range of ±2.5V to
±17V. Over this supply range the LME49723’s input
circuitry maintains excellent common-mode and
power supply rejection, as well as maintaining its low
input bias current. The LME49723 is unity gain
stable.
KEY SPECIFICATIONS
•
•
Power Supply Voltage Range: ±2.5 to ±17 V
THD+N (AV = 1, VOUT = 3VRMS, fIN = 1kHz)
–
–
RL = 2kΩ: 0.0002 % (typ)
RL = 600Ω: 0.0002 % (typ)
The LME49723 is available in an 8–lead narrow body
SOIC package. Demonstration boards are available
for each package.
•
•
•
•
•
•
Input Noise Density: 3.6 nV/√Hz (typ)
Slew Rate: ±8 V/μs (typ)
Gain Bandwidth Product: 17 MHz (typ)
Open Loop Gain (RL = 600Ω): 105 dB (typ)
Input Bias Current: 200 nA (typ)
Input Offset Voltage: 0.3 mV (typ)
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2008–2013, Texas Instruments Incorporated
LME49723
SNAS429B –JANUARY 2008–REVISED APRIL 2013
TYPICAL APPLICATION
150W
www.ti.com
150W
3320W
3320W
26.1 kW
+
909W
-
-
-
-
LME49723
LME49723
+
+
+
+
3.83 kW
+
100W
OUTPUT
22 nF//4.7 nF//500 pF
10 pF
INPUT
47 kW
47 nF//33 nF
Note: 1% metal film resistors, 5% polypropylene capacitors
Figure 1. Passively Equalized RIAA Phono Preamplifier
CONNECTION DIAGRAM
Dual-In-Line Package
1
2
3
4
8
7
6
5
+
OUTPUT A
V
INVERTING INPUT A
OUTPUT B
A
B
-
+
+
-
NON-INVERTING
INPUT A
INVERTING INPUT B
NON-INVERTING
INPUT B
-
V
Figure 2. SOIC Package
See Package Number D0008A
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
2
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SNAS429B –JANUARY 2008–REVISED APRIL 2013
ABSOLUTE MAXIMUM RATINGS(1)(2)(3)
Power Supply Voltage (VS = V+ - V-)
Storage Temperature
36V
−65°C to 150°C
(V-) - 0.7V to (V+) + 0.7V
Continuous
Input Voltage
Output Short Circuit(4)
Power Dissipation
ESD Susceptibility(5)
Internally Limited
800V
ESD Susceptibility(6)
180V
Junction Temperature
150°C
Thermal Resistance θJA (SO)
Temperature Range TMIN ≤ TA ≤ TMAX
Supply Voltage Range
145°C/W
–40°C ≤ TA ≤ 85°C
±2.5V ≤ VS ≤ ± 17V
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.
(2) Operating Ratings indicate conditions for which the device is functional, but do not ensure specific performance limits. For ensured
specifications and test conditions, see the Electrical Characteristics. The ensured specifications apply only for the test conditions listed.
Some performance characteristics may degrade when the device is not operated under the listed test conditions.
(3) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
(4) Amplifier output connected to GND, any number of amplifiers within a package.
(5) Human body model, 100pF discharged through a 1.5kΩ resistor.
(6) Machine Model ESD test is covered by specification EIAJ IC-121-1981. A 200pF cap is charged to the specified voltage and then
discharged directly into the IC with no external series resistor (resistance of discharge path must be under 50Ω).
ELECTRICAL CHARACTERISTICS FOR THE LME49723(1)(2)
The specifications apply for VS = ±15V, RL = 2kΩ, fIN = 1kHz, TA = 25°C, unless otherwise specified.
LME49723
Typical(3) Limit(4)
0.0002
Units
(Limits)
Symbol
Parameter
Conditions
AV = 1, VOUT = 3Vrms
RL = 2kΩ
RL = 600Ω
Total Harmonic Distortion +
Noise
THD+N
IMD
% (max)
%
0.0002
0.0004
AV = 1, VOUT = 3VRMS
Two-tone, 60Hz & 7kHz 4:1
Intermodulation Distortion
0.0005
GBWP
SR
Gain Bandwidth Product
Slew Rate
19
±8
15
±6
MHz (min)
V/μs (min)
VOUT = 1VP-P, –3dB
referenced to output magnitude
at f = 1kHz
FPBW
en
Full Power Bandwidth
4
MHz
Equivalent Input Noise Voltage fBW = 20Hz to 20kHz
0.45
0.65
5
μVRMS (max)
f = 1kHz
Equivalent Input Noise Density
f = 10Hz
3.2
8.5
nV/√Hz
(max)
in
f = 1kHz
Current Noise Density
f = 10Hz
0.7
1.3
pA/√Hz
mV (max)
μV/°C
VOS
Offset Voltage
±0.3
1
ΔVOS/ΔTe Average Input Offset Voltage
mp
–40°C ≤ TA ≤ 85°C
ΔVS = 20V(5)
0.2
Drift vs Temperature
Average Input Offset Voltage
Shift vs Power Supply Voltage
PSRR
100
95
dB (min)
fIN = 1kHz
fIN = 20kHz
118
112
ISOCH-CH
IB
Channel-to-Channel Isolation
Input Bias Current
dB
VCM = 0V
200
300
nA (max)
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.
(2) Operating Ratings indicate conditions for which the device is functional, but do not ensure specific performance limits. For ensured
specifications and test conditions, see the Electrical Characteristics. The ensured specifications apply only for the test conditions listed.
Some performance characteristics may degrade when the device is not operated under the listed test conditions.
(3) Typical specifications are specified at +25ºC and represent the most likely parametric norm.
(4) Tested limits are specified to AOQL (Average Outgoing Quality Level).
(5) PSRR is measured as follows: VOS is measured at two supply voltages, ±5V and ±15V. PSRR = | 20log(ΔVOS/ΔVS) |.
Copyright © 2008–2013, Texas Instruments Incorporated
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ELECTRICAL CHARACTERISTICS FOR THE LME49723(1)(2) (continued)
The specifications apply for VS = ±15V, RL = 2kΩ, fIN = 1kHz, TA = 25°C, unless otherwise specified.
LME49723
Typical(3) Limit(4)
Units
(Limits)
Symbol
Parameter
Conditions
ΔIOS/ΔTe
mp
Input Bias Current Drift vs
Temperature
–40°C ≤ TA ≤ 85°C
0.1
nA/°C
IOS
Input Offset Current
VCM = 0V
7
100
nA (max)
(V+) –
2.0
(V-) + 2.0
Common-Mode Input Voltage
Range
VIN-CM
CMRR
±14
V (min)
Common-Mode Rejection
–10V<Vcm<10V
–10V<Vcm<10V
100
30
90
dB (min)
Differential Input Impedance
kΩ
ZIN
Common Mode Input
Impedance
1000
MΩ
–10V<Vout<10V, RL = 600Ω
–10V<Vout<10V, RL = 2kΩ
–10V<Vout<10V, RL = 10kΩ
RL = 600Ω
100
105
98
±12.5
±21
AVOL
Open Loop Voltage Gain
dB (min)
105
±13.5
±14.0
±14.1
±25
Maximum Output Voltage
Swing
VOUTMAX
RL = 2kΩ
V (min)
RL = 10kΩ
IOUT
Output Current
RL = 600Ω, VS = ±17V
mA (min)
mA
Instantaneous Short Circuit
Current
+53
–42
IOUT-CC
fIN = 10kHz
Closed-Loop
Open-Loop
ROUT
Output Impedance
0.01
13
Ω
Capacitive Load Drive
Overshoot
CLOAD
IS
100pF
16
%
Total Quiescent Current
IOUT = 0mA
6.7
7.5
mA (max)
4
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SNAS429B –JANUARY 2008–REVISED APRIL 2013
TYPICAL PERFORMANCE CHARACTERISTICS
THD+N vs Output Voltage
THD+N vs Output Voltage
VS = ±5V, RL = 2kΩ
VS = ±5V, RL = 10kΩ
0.1
0.1
0.01
0.01
0.001
0.001
0.0001
0.0001
10m
100m
1
3
10m
100m
1
2
3
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
Figure 3.
Figure 4.
THD+N vs Output Voltage
THD+N vs Output Voltage
VS = ±5V, RL = 600Ω
VS = ±15V, RL = 2kΩ
0.1
0.1
0.01
0.01
0.001
0.0001
0.001
0.0001
0.00001
20
10m
100m
1
10
10m
100m
1
2
3
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
Figure 5.
Figure 6.
THD+N vs Output Voltage
VS = ±15V, RL = 10kΩ
THD+N vs Output Voltage
VS = ±15V, RL = 600Ω
0.1
0.1
0.01
0.01
0.001
0.0001
0.001
0.0001
0.00001
0.00001
20
10m
100m
1
10
10m
100m
1
10 20
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
Figure 7.
Figure 8.
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)
THD+N vs Frequency
VS = ±15V, VOUT = 3VRMS, RL = 2kΩ
THD+N vs Frequency
VS = ±15V, VOUT = 3VRMS, RL = 10kΩ
0.1
0.001
0.1
0.001
0.0001
0.00001
0.0001
0.00001
20
200
2k
20k
20
200
2k
20k
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 9.
Figure 10.
THD+N vs Frequency
VS = ±15V, VOUT = 3VRMS, RL = 600Ω
PSRR+ vs Frequency
VS = ±15V, RL = 2kΩ, VRIPPLE = 200mVPP
0.1
0.001
+0
-10
-20
-30
-40
-50
-60
-70
-80
-90
0.0001
0.00001
-100
-110
-120
-130
-140
20
200
2k
20k
10
100
1k
10k
100k
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 11.
Figure 12.
PSRR+ vs Frequency
VS = ±5V, RL = 10kΩ, VRIPPLE = 200mVPP
+0
PSRR+ vs Frequency
VS = ±5V, RL = 600Ω, VRIPPLE = 200mVPP
+0
-10
-20
-10
-20
-30
-30
-40
-40
-50
-50
-60
-60
-70
-70
-80
-80
-90
-90
-100
-110
-120
-130
-140
-100
-110
-120
-130
-140
10
100
1k
10k
100k
10
100
1k
10k
100k
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 13.
Figure 14.
6
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)
PSRR+ vs Frequency
VS = ±15V, RL = 2kΩ, VRIPPLE = 200mVPP
+0
PSRR+ vs Frequency
VS = ±15V, RL = 10kΩ, VRIPPLE = 200mVPP
+0
-10
-20
-10
-20
-30
-30
-40
-40
-50
-50
-60
-60
-70
-70
-80
-80
-90
-90
-100
-110
-120
-130
-140
-100
-110
-120
-130
-140
10
100
1k
10k
100k
10
100
1k
10k
100k
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 15.
Figure 16.
PSRR+ vs Frequency
PSRR- vs Frequency
VS = ±5V, RL = 2kΩ, VRIPPLE = 200mVPP
+0
VS = ±15V, RL = 600Ω, VRIPPLE = 200mVPP
+0
-10
-20
-10
-20
-30
-30
-40
-40
-50
-50
-60
-60
-70
-70
-80
-80
-90
-90
-100
-110
-120
-130
-140
-100
-110
-120
-130
-140
10
100
1k
10k
100k
10
100
1k
10k
100k
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 17.
Figure 18.
PSRR- vs Frequency
PSRR- vs Frequency
VS = ±5V, RL = 600Ω, VRIPPLE = 200mVPP
+0
VS = ±5V, RL = 10kΩ, VRIPPLE = 200mVPP
+0
-10
-20
-10
-20
-30
-30
-40
-40
-50
-50
-60
-60
-70
-70
-80
-80
-90
-90
-100
-110
-120
-130
-140
-100
-110
-120
-130
-140
10
100
1k
10k
100k
10
100
1k
10k
100k
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 19.
Figure 20.
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)
PSRR- vs Frequency
PSRR- vs Frequency
VS = ±15V, RL = 10kΩ, VRIPPLE = 200mVPP
+0
VS = ±15V, RL = 2kΩ, VRIPPLE = 200mVPP
+0
-10
-20
-10
-20
-30
-30
-40
-40
-50
-50
-60
-60
-70
-70
-80
-80
-90
-90
-100
-110
-120
-130
-140
-100
-110
-120
-130
-140
10
100
1k
10k
100k
10
100
1k
10k
100k
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 21.
Figure 22.
PSRR- vs Frequency
VS = ±15V, RL = 10kΩ, VRIPPLE = 200mVPP
CMRR vs Frequency
VS = ±15V, RL = 2kΩ, VIN = 200mVPP
+0
-10
-20
+0
-10
-20
-30
-40
-50
-30
-40
-50
-60
-70
-60
-70
-80
-90
-80
-100
-110
-120
-130
-140
-90
-100
-110
-120
10
100
1k
10k
100k
10
100
1k
10k
100k
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 23.
Figure 24.
CMRR vs Frequency
VS = ±15V, RL = 10kΩ, VIN = 200mVPP
CMRR vs Frequency
VS = ±15V, RL = 600Ω, VIN = 200mVPP
+0
-10
-20
-30
-40
-50
+0
-10
-20
-30
-40
-50
-60
-70
-60
-70
-80
-80
-90
-90
-100
-110
-120
-100
-110
-120
10
100
1k
10k
100k
10
100
1k
10k
100k
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 25.
Figure 26.
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Crosstalk vs Frequency
VS = ±15V, VOUT = 3VRMS, RL = 2kΩ,
Crosstalk vs Frequency
VS = ±15V, VOUT = 3VRMS, RL = 10kΩ,
0.01
+0
-10
0.005
-20
0.002
0.001
-30
-40
-50
0.0005
-60
0.0002
0.0001
-70
-80
-90
0.00005
-100
-110
-120
0.00002
0.00001
20 50 100 200 500 1k 2k 5k 10k 20k
20
200
2k
20k
Hz
FREQUENCY (Hz)
Figure 27.
Figure 28.
Crosstalk vs Frequency
VS = ±15V, VOUT = 3VRMS, RL = 600Ω,
IMD vs Output Voltage
VS = ±5V, RL = 2kΩ,
0.01
0.1
0.01
0.005
0.002
0.001
0.0005
0.0002
0.0001
0.001
0.00005
0.00002
0.00001
0.0001
10m
20 50 100 200 500 1k 2k 5k 10k 20k
100m
1
2
5
Hz
OUTPUT VOLTAGE (V)
Figure 29.
Figure 30.
IMD vs Output Voltage
VS = ±5V, RL = 10kΩ,
IMD vs Output Voltage
VS = ±5V, RL = 600Ω,
0.1
0.01
0.1
0.01
0.001
0.0001
0.001
0.0001
10m
100m
1
2
5
10m
100m
1
2
5
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
Figure 31.
Figure 32.
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Output Voltage vs Load Resistance
VS = ±5V, THD+N = 1%
Output Voltage vs Load Resistance
VDD = 15V, VSS = –15V, THD+N = 0.1%
10.0
9.8
9.6
9.4
9.2
9.0
3.0
2.8
2.6
2.4
2.2
2.0
500
600
800
2k
5k
10k
500
600
800
2k
5k
10k
LOAD RESISTANCE
LOAD RESISTANCE
Figure 33.
Figure 34.
Output Voltage vs Supply Voltage
Output Voltage vs Supply Voltage
RL = 2kΩ, THD+N = 0.1%
RL = 10kΩ, THD+N = 0.1%
12
10
8
12
10
8
6
6
4
4
2
2
0
0
4
6
8
10
12
14
16
18
4
6
8
10
12
14
16
18
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
Figure 35.
Figure 36.
Output Voltage vs Supply Voltage
Supply Current vs Supply Voltage
RL = 600Ω, THD+N = 1%
RL = 2kΩ
7
6
12
10
8
5
4
6
3
2
4
2
1
0
0
4
6
8
10
12
14
16
18
2.5 4.5 6.5 8.5 10.5 12.5 14.5 16.5 18.5
SUPPLY VOLTAGE (±V)
SUPPLY VOLTAGE (V)
Figure 37.
Figure 38.
10
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Supply Current vs Supply Voltage
Supply Current vs Supply Voltage
RL = 10kΩ
RL = 600Ω
7
6
7
6
5
4
5
4
3
2
3
2
1
0
1
0
2.5 4.5 6.5 8.5 10.5 12.5 14.5 16.5 18.5
2.5 4.5 6.5 8.5 10.5 12.5 14.5 16.5 18.5
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
Figure 39.
Figure 40.
Noninverting Amp
Noninverting Amp
Figure 41.
Figure 42.
Inverting Amp
Voltage Gain & Phase vs Frequency
Figure 43.
Figure 44.
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Power Bandwidth
Equivalent Input Noise vs Frequency
10
5
2
1
10
100
1k
10k
100k
FREQUENCY (Hz)
Figure 45.
Figure 46.
12
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APPLICATION INFORMATION
DISTORTION MEASUREMENTS
The vanishingly low residual distortion produced by LME49723 is below the capabilities of all commercially
available equipment. This makes distortion measurements just slightly more difficult than simply connecting a
distortion meter to the amplifier’s inputs and outputs. The solution, however, is quite simple: an additional
resistor. Adding this resistor extends the resolution of the distortion measurement equipment.
The LME49723’s low residual distortion is an input referred internal error. As shown in Figure 47, adding the 10Ω
resistor connected between the amplifier’s inverting and non-inverting inputs changes the amplifier’s noise gain.
The result is that the error signal (distortion) is amplified by a factor of 101. Although the amplifier’s closed-loop
gain is unaltered, the feedback available to correct distortion errors is reduced by 101, which means that
measurement resolution increases by 101. To ensure minimum effects on distortion measurements, keep the
value of R1 low as shown in Figure 47.
This technique is verified by duplicating the measurements with high closed loop gain and/or making the
measurements at high frequencies. Doing so produces distortion components that are within the measurement
equipment’s capabilities. This datasheet’s THD+N and IMD values were generated using the above described
circuit connected to an Audio Precision System Two Cascade.
R2
1000W
-
LME49723
R1
10W
Distortion Signal Gain = 1+(R2/R1)
+
Analyzer Input
Generator Output
Audio Precision
System Two
Cascade
Actual Distortion = AP Value/100
Figure 47. THD+N and IMD Distortion Test Circuit
The LME49723 is a high speed op amp with excellent phase margin and stability. Capacitive loads up to 100pF
will cause little change in the phase characteristics of the amplifiers and are therefore allowable.
Capacitive loads greater than 100pF must be isolated from the output. The most straightforward way to do this is
to put a resistor in series with the output. This resistor will also prevent excess power dissipation if the output is
accidentally shorted.
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Complete shielding is required to prevent induced pick up from external sources. Always check with oscilloscope for
power line noise.
Figure 48. Noise Measurement Circuit Total Gain: 115 dB @f = 1 kHz
Input Referred Noise Voltage: en = V0/560,000 (V)
Figure 49. RIAA Preamp Voltage Gain,
RIAA Deviation vs Frequency
Figure 50. Flat Amp Voltage Gain vs Frequency
TYPICAL APPLICATIONS
VO = V1–V2
Figure 51. Balanced to Single Ended Converter
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VO = V1 + V2 − V3 − V4
Figure 52. Adder/Subtracter
Figure 53. Sine Wave Oscillator
Illustration is f0 = 1 kHz
Figure 54. Second Order High Pass Filter (Butterworth)
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Illustration is f0 = 1 kHz
Figure 55. Second Order Low Pass Filter (Butterworth)
Illustration is f0 = 1 kHz, Q = 10, ABP = 1
Figure 56. State Variable Filter
Figure 57. AC/DC Converter
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SNAS429B –JANUARY 2008–REVISED APRIL 2013
Figure 58. 2 Channel Panning Circuit (Pan Pot)
Figure 59. Line Driver
Illustration is:
fL = 32 Hz, fLB = 320 Hz
fH =11 kHz, fHB = 1.1 kHz
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Figure 60. Tone Control
Av = 35 dB
En = 0.33 μV
S/N = 90 dB
f = 1 kHz
A Weighted
A Weighted, VIN = 10 mV
@f = 1 kHz
Figure 61. RIAA Preamp
Illustration is:
V0 = 101(V2 − V1)
Figure 62. Balanced Input Mic Amp
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SNAS429B –JANUARY 2008–REVISED APRIL 2013
Figure 63. Band Graphic Equalizer
fo (Hz)
C1
C2
R1
R2
32
64
0.12μF
0.056μF
0.033μF
0.015μF
8200pF
3900pF
2000pF
1100pF
510pF
4.7μF
3.3μF
75kΩ
68kΩ
62kΩ
68kΩ
62kΩ
68kΩ
68kΩ
62kΩ
68kΩ
51kΩ
500Ω
510Ω
510Ω
470Ω
470Ω
470Ω
470Ω
470Ω
510Ω
510Ω
125
250
500
1k
1.5μF
0.82μF
0.39μF
0.22μF
0.1μF
2k
4k
0.056μF
0.022μF
0.012μF
8k
16k
330pF
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REVISION HISTORY
Rev
1.0
1.01
B
Date
Description
01/07/08
02/11/08
04/04/13
Initial release.
Text edits.
Changed layout of National Data Sheet to TI format.
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PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
LME49723MA/NOPB
LME49723MAX/NOPB
ACTIVE
SOIC
SOIC
D
D
8
8
95
RoHS & Green
SN
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 85
-40 to 85
L49723
MA
ACTIVE
2500 RoHS & Green
SN
L49723
MA
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
28-Feb-2022
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
LME49723MAX/NOPB
SOIC
D
8
2500
330.0
12.4
6.5
5.4
2.0
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
28-Feb-2022
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SOIC
SPQ
Length (mm) Width (mm) Height (mm)
367.0 367.0 35.0
LME49723MAX/NOPB
D
8
2500
Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
28-Feb-2022
TUBE
*All dimensions are nominal
Device
Package Name Package Type
SOIC
Pins
SPQ
L (mm)
W (mm)
T (µm)
B (mm)
LME49723MA/NOPB
D
8
95
495
8
4064
3.05
Pack Materials-Page 3
PACKAGE OUTLINE
D0008A
SOIC - 1.75 mm max height
SCALE 2.800
SMALL OUTLINE INTEGRATED CIRCUIT
C
SEATING PLANE
.228-.244 TYP
[5.80-6.19]
.004 [0.1] C
A
PIN 1 ID AREA
6X .050
[1.27]
8
1
2X
.189-.197
[4.81-5.00]
NOTE 3
.150
[3.81]
4X (0 -15 )
4
5
8X .012-.020
[0.31-0.51]
B
.150-.157
[3.81-3.98]
NOTE 4
.069 MAX
[1.75]
.010 [0.25]
C A B
.005-.010 TYP
[0.13-0.25]
4X (0 -15 )
SEE DETAIL A
.010
[0.25]
.004-.010
[0.11-0.25]
0 - 8
.016-.050
[0.41-1.27]
DETAIL A
TYPICAL
(.041)
[1.04]
4214825/C 02/2019
NOTES:
1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches.
Dimensioning and tolerancing per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed .006 [0.15] per side.
4. This dimension does not include interlead flash.
5. Reference JEDEC registration MS-012, variation AA.
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EXAMPLE BOARD LAYOUT
D0008A
SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT
8X (.061 )
[1.55]
SYMM
SEE
DETAILS
1
8
8X (.024)
[0.6]
SYMM
(R.002 ) TYP
[0.05]
5
4
6X (.050 )
[1.27]
(.213)
[5.4]
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:8X
SOLDER MASK
OPENING
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
EXPOSED
METAL
EXPOSED
METAL
.0028 MAX
[0.07]
.0028 MIN
[0.07]
ALL AROUND
ALL AROUND
SOLDER MASK
DEFINED
NON SOLDER MASK
DEFINED
SOLDER MASK DETAILS
4214825/C 02/2019
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
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EXAMPLE STENCIL DESIGN
D0008A
SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT
8X (.061 )
[1.55]
SYMM
1
8
8X (.024)
[0.6]
SYMM
(R.002 ) TYP
[0.05]
5
4
6X (.050 )
[1.27]
(.213)
[5.4]
SOLDER PASTE EXAMPLE
BASED ON .005 INCH [0.125 MM] THICK STENCIL
SCALE:8X
4214825/C 02/2019
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
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