OPA317QDBVRQ1 [TI]
具有低失调电压、RRIO 和低电流消耗且通过汽车级认证的运算放大器 | DBV | 5 | -40 to 125;
| 型号： | OPA317QDBVRQ1 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 具有低失调电压、RRIO 和低电流消耗且通过汽车级认证的运算放大器 | DBV | 5 | -40 to 125 放大器 运算放大器 |
| 文件： | 总29页 (文件大小：931K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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OPA317-Q1, OPA2317-Q1, OPA4317-Q1
ZHCSFA4 –JULY 2016
OPAx317-Q1 零漂移、低偏移、轨到轨 I/O 运算放大器
1 特性
3 说明
1
•
•
适用于汽车电子 应用
具有符合 AEC-Q100 标准的下列结果：
OPA317-Q1 系列 CMOS 运算放大器不但具备精密的
性能，而且价格极具竞争力。这些器件属于采用专有自
动校准技术的零漂移系列放大器，在整个时间和温度范
围内的偏移电压非常低（最大 90μV）且几乎零漂移，
并且静态电流只有 35μA（最大值）。
–
–
–
器件温度 1 级：-40℃ 至 +125℃ 的环境运行温
度范围
器件人体放电模型 (HBM) 静电放电 (ESD) 分类
等级 3A
OPA317-Q1 系列放大器 具有 轨到轨输入和输出以及
几乎不变的 1/f 噪声特性，因此是许多应用 应用的理
想选择，更容易设计到系统中。此类器件经过优化，适
合在 1.8V (±0.9V) 至 5.5V (±2.75V) 的低电压状态下
工作。
器件带电器件模型 (CDM) ESD 分类等级 C6
•
•
电源电压：1.8V 至 5.5V
微型封装：
–
–
–
单通道：SOT23-5
双通道：VSSOP-8
四通道：TSSOP-14
OPA317-Q1（单通道版本）提供 SOT23-5 三种封
装。OPA2317-Q1（双通道版本）提供 VSSOP-8 两种
封装。OPA4317-Q1 提供 TSSOP-14 两种封装。所有
器件版本的额定工作温度范围均为 -40°C 至 +125°C。
•
•
低偏移电压：20μV（典型值）
共模抑制比 (CMRR)：108dB（典型值）电源抑制
比 (PSRR)
•
•
•
•
静态电流：35μA（最大值）
增益带宽：300kHz
器件信息(1)
产品型号
OPA317-Q1
封装
SOT-23 (5)
封装尺寸（标称值）
1.60mm x 2.90mm
3.00mm × 3.00mm
4.40mm × 5.00mm
轨到轨输入和输出
内部电磁干扰 (EMI) 和内部射频干扰 (RFI) 滤波功
能
OPA2317-Q1
OPA4317-Q1
VSSOP (8)
TSSOP (14)
(1) 要了解所有可用封装，请见数据表末尾的可订购产品附录。
2 应用
•
•
•
•
•
•
•
混合动力汽车-电动汽车 (HEV-EV) 动力传动
高级驾驶员辅助系统 (ADAS)
自动恒温控制
低噪声、低功耗电路
航空电子设备、起落装置
医疗器械
电流感测
偏移电压分布
Offset Voltage (mV)
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
English Data Sheet: SLOS914
OPA317-Q1, OPA2317-Q1, OPA4317-Q1
ZHCSFA4 –JULY 2016
www.ti.com.cn
目录
8.4 Device Functional Modes ....................................... 15
Application and Implementation ........................ 16
9.1 Application Information............................................ 16
9.2 Typical Applications ................................................ 17
9.3 System Example ..................................................... 19
1
2
3
4
5
6
特性.......................................................................... 1
应用.......................................................................... 1
说明.......................................................................... 1
修订历史记录 ........................................................... 2
Pin Configuration and Functions......................... 3
Specifications......................................................... 6
6.1 Absolute Maximum Ratings ...................................... 6
6.2 ESD Ratings.............................................................. 6
6.3 Recommended Operating Conditions ...................... 6
6.4 Thermal Information: OPA317-Q1 ............................ 7
6.5 Thermal Information: OPA2317-Q1 .......................... 7
6.6 Thermal Information: OPA4317-Q1 .......................... 7
6.7 Electrical Characteristics: VS = 1.8 V to 5.5 V .......... 8
6.8 Typical Characteristics.............................................. 9
Parameter Measurement Information ................ 12
Detailed Description ............................................ 13
8.1 Overview ................................................................ 13
8.2 Functional Block Diagram ...................................... 13
8.3 Feature Description................................................. 13
9
10 Power Supply Recommendations ..................... 19
11 Layout................................................................... 20
11.1 Layout Guidelines ................................................. 20
11.2 Layout Example .................................................... 20
12 器件和文档支持 ..................................................... 21
12.1 文档支持................................................................ 21
12.2 接收文档更新通知 ................................................. 21
12.3 相关链接................................................................ 21
12.4 社区资源................................................................ 21
12.5 商标....................................................................... 21
12.6 静电放电警告......................................................... 21
12.7 Glossary................................................................ 21
13 机械、封装和可订购信息....................................... 21
7
8
4 修订历史记录
日期
修订版本
注释
2016 年 2016
*
最初发布。
2
Copyright © 2016, Texas Instruments Incorporated
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5 Pin Configuration and Functions
OPA317-Q1: DBV Package
5-Pin SOT-23
Top View
OUT
1
2
3
5
4
V+
V-
+IN
-IN
Pin Functions: OPA317-Q1
PIN
NO.
I/O
DESCRIPTION
NAME
SOT-23
+IN
–IN
3
4
1
5
2
I
Noninverting input
I
Inverting input
OUT
V+
O
—
—
Output
Positive (highest) power supply
Negative (lowest) power supply
V–
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OPA2317-Q1: DGK Package
8-Pin VSSOP
Top View
OUT A
1
2
3
4
8
7
6
5
V+
A
-IN A
+IN A
V-
OUT B
-IN B
+IN B
B
Pin Functions: OPA2317-Q1
PIN
NO.
I/O
DESCRIPTION
NAME
+IN A
VSSOP
3
2
5
6
1
7
8
4
I
I
Noninverting input, channel A
Inverting input, channel A
Noninverting input, channel B
Inverting input, channel B
Output, channel A
–IN A
+IN B
–IN B
OUT A
OUT B
V+
I
I
O
O
—
—
Output, channel B
Positive (highest) power supply
Negative (lowest) power supply
V–
4
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OPA317-Q1, OPA2317-Q1, OPA4317-Q1
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ZHCSFA4 –JULY 2016
OPA4317-Q1: SW Package
14-Pin TSSOP
Top View
OUT A
1
2
3
4
5
6
7
14 OUT D
-IN A
+IN A
V+
13 -IN D
12 +IN D
11 V-
10
9
+IN C
-IN C
OUT C
+IN B
-IN B
OUT B
8
Pin Functions: OPA4317-Q1
PIN
NO.
I/O
DESCRIPTION
NAME
TSSOP
+IN A
–IN A
+IN B
–IN B
+IN C
–IN C
+IN D
–IN D
OUT A
OUT B
OUT C
OUT D
V+
3
2
I
I
Noninverting input, channel A
Inverting input, channel A
Noninverting input, channel B
Inverting input, channel B
Noninverting input, channel C
Inverting input, channel C
Noninverting input, channel D
Inverting input, channel D
Output, channel A
5
I
6
I
10
9
I
I
12
13
1
I
I
O
O
O
O
—
—
7
Output, channel B
8
Output, channel C
14
4
Output, channel D
Positive (highest) power supply
Negative (lowest) power supply
V–
11
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6 Specifications
6.1 Absolute Maximum Ratings
Over operating free-air temperature range, unless otherwise noted.(1)
MIN
MAX
UNIT
V
VS = (V+) – (V–)
Supply voltage
7
(V+) + 0.3
10
(2)
Signal input terminals
(V–) – 0.3
–10
V
Signal input terminals(2)
Output short circuit(3)
Operating temperature
Junction temperature
Storage temperature
mA
Continuous
TA
–40
150
150
150
°C
°C
°C
TJ
Tstg
–65
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Input terminals are diode-clamped to the power-supply rails. Input signals that can swing more than 0.3 V beyond the supply rails must
be current-limited to 10 mA or less.
(3) Short-circuit to ground, one amplifier per package.
6.2 ESD Ratings
VALUE
±4000
±1000
±1000
UNIT
Human-body model (HBM), per AEC Q100-002(1)
V(ESD)
Electrostatic discharge
All pins
Corner pins
V
Charged-device model (CDM), per AEC
Q100-011
(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted).
MIN
1.8 (±0.9)
–40
MAX
UNIT
V
(V+ – V–)
TA
Supply voltage
5.5 (±2.25)
125
Specified temperature
°C
6
Copyright © 2016, Texas Instruments Incorporated
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6.4 Thermal Information: OPA317-Q1
OPA317-Q1
THERMAL METRIC(1)
DBV (SOT-23)
5 PINS
220.8
UNIT
RθJA
RθJC(top)
RθJB
ψJT
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
97.5
61.7
Junction-to-top characterization parameter
Junction-to-board characterization parameter
7.6
ψJB
61.1
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
6.5 Thermal Information: OPA2317-Q1
OPA2317-Q1
THERMAL METRIC(1)
DGK (VSSOP)
8 PINS
180.3
UNIT
RθJA
RθJC(top)
RθJB
ψJT
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
48.1
100.9
Junction-to-top characterization parameter
Junction-to-board characterization parameter
2.4
ψJB
99.3
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
6.6 Thermal Information: OPA4317-Q1
OPA4317-Q1
THERMAL METRIC(1)
PW (TSSOP)
14 PINS
120.8
34.3
UNIT
RθJA
RθJC(top)
RθJB
ψJT
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
62.8
Junction-to-top characterization parameter
Junction-to-board characterization parameter
1
ψJB
56.5
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
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6.7 Electrical Characteristics: VS = 1.8 V to 5.5 V
At TA = 25°C, RL = 10 kΩ connected to midsupply, VCM = VOUT = midsupply, unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
OFFSET VOLTAGE
VS = 5 V
20
±90
VOS
Input offset voltage
μV
TA = –40°C to +125°C, VS = 5 V
TA = –40°C to +125°C
±100
Input offset voltage
vs temperature
dVOS/dT
PSRR
0.05
μV/°C
μV/V
Input offset voltage
vs power supply
TA = –40°C to +125°C, VS = 1.8 V to 5.5 V
1
10
(1)
Long-term stability(1)
See
Channel separation, DC
5
μV/V
INPUT BIAS CURRENT
±275
±155
±300
±400
±140
IB
Input bias current
OPA4317-Q1
pA
pA
TA = –40°C to +125°C
IOS
Input offset current
OPA4317-Q1
NOISE
en
Input voltage noise density
Input voltage noise
f = 1 kHz
55
0.3
nV/√Hz
μVPP
f = 0.01 Hz to 1 Hz
f = 0.1 Hz to 10 Hz
f = 10 Hz
1.1
in
Input current noise
100
fA/√Hz
INPUT VOLTAGE RANGE
VCM
Common-mode voltage
(V–) – 0.1
95
(V+) + 0.1
V
TA = –40°C to +125°C
(V–) – 0.1 V < VCM < (V+) + 0.1 V
108
108
CMRR
Common-mode rejection ratio
dB
OPA4317
TA = –40°C to +125°C
95
(V–) – 0.1 V < VCM < (V+) + 0.1 V, VS = 5.5 V
INPUT CAPACITANCE
Differential
2
4
pF
pF
Common-mode
OPEN-LOOP GAIN
TA = –40°C to +125°C, RL = 10 kΩ
(V–) + 100 mV < VO < (V+) – 100 mV
AOL
Open-loop voltage gain
100
110
dB
FREQUENCY RESPONSE
GBW
Gain-bandwidth product
CL = 100 pF
G = 1
300
kHz
SR
Slew rate
0.15
V/μs
OUTPUT
Voltage output swing from rail
Short-circuit current
TA = –40°C to +125°C
f = 350 kHz, IO = 0
30
±5
100
mV
mA
ISC
CL
Capacitive load drive
See the Typical Characteristics section
Open-loop output impedance
2
kΩ
POWER SUPPLY
VS
IQ
Specified voltage
Quiescent current per amplifier TA = –40°C to +125°C, IO = 0
Turnon time VS = 5 V
1.8
5.5
35
V
21
μA
µs
100
(1) 300-hour life test at 150°C demonstrated randomly distributed variation of approximately 1 μV.
8
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6.8 Typical Characteristics
At TA = 25°C, CL = 0 pF, RL = 10 kΩ connected to midsupply, VCM = VOUT = midsupply, unless otherwise noted.
120
100
250
200
150
100
50
80
Phase
60
40
Gain
20
0
0
-50
-100
-20
10
100
1k
10k
100k
1M
Frequency (Hz)
Offset Voltage (mV)
Figure 2. Open-Loop Gain vs Frequency
Figure 1. Offset Voltage Production Distribution
140
120
100
80
120
100
80
60
40
20
0
+PSRR
-PSRR
60
40
20
0
1
10
100
1k
10k
100k
1M
1
10
100
1k
10k
100k
1M
Frequency (Hz)
Frequency (Hz)
Figure 3. Common-Mode Rejection Ratio vs Frequency
Figure 4. Power-Supply Rejection Ratio vs Frequency
210
3
VS = ±2.75V
205
200
195
190
VS = ±0.9V
2
–IB
-40°C
1
+25°C
+125°C
0
+25°C
-40°C
-190
-195
-200
-205
-210
-1
+125°C
+IB
+25°C
-2
-40°C
-3
0
1
2
3
4
5
6
7
8
9
10
0
1
2
3
4
5
Output Current (mA)
Common-Mode Voltage (V)
Figure 5. Output Voltage Swing vs Output Current
Figure 6. Input Bias Current vs Common-Mode Voltage
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Typical Characteristics (continued)
At TA = 25°C, CL = 0 pF, RL = 10 kΩ connected to midsupply, VCM = VOUT = midsupply, unless otherwise noted.
250
200
150
100
50
25
20
15
10
5
–IB
VS = 5.5 V
VS = 1.8 V
–IB
VS = 5.5 V
VS = 1.8 V
0
-50
-100
-150
-200
-250
+IB
+IB
0
-50
-25
0
25
50
75
100
125
-50
-25
0
25
50
75
100
125
Temperature (°C)
Temperature (°C)
Figure 7. Input Bias Current vs Temperature
Figure 8. Quiescent Current vs Temperature
Time (50 µs/div)
Time (5 µs/div)
G = 1
RL = 10 kΩ
G = 1
RL = 10 kΩ
Figure 9. Large-Signal Step Response
Figure 10. Small-Signal Step Response
0
Input
Input
0
0
Output
Output
0
Time (50 ms/div)
Time (50 ms/div)
See Figure 18
See Figure 18
Figure 12. Negative Overvoltage Recovery
Figure 11. Positive Overvoltage Recovery
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Typical Characteristics (continued)
At TA = 25°C, CL = 0 pF, RL = 10 kΩ connected to midsupply, VCM = VOUT = midsupply, unless otherwise noted.
40
35
30
25
20
15
10
5
600
500
400
300
200
100
0
0.001%
0.01%
0
10
100
1000
1
10
100
Load Capacitance (pF)
Gain (dB)
4-V Step
Figure 14. Small-Signal Overshoot vs Load Capacitance
Figure 13. Settling Time vs Closed-Loop Gain
1000
100
10
1000
Continues with no 1/f (flicker) noise.
Current Noise
100
Voltage Noise
10
1
10
100
1k
10k
1 s/div
Frequency (Hz)
Figure 16. Current and Voltage Noise Spectral Density vs
Frequency
Figure 15. 0.1-Hz to 10-Hz Noise
50
Normal Operating Range
40
30
20
10
0
-10
-20
-30
-40
-50
Over-Driven Condition
Over-Driven Condition
200 400 600 800
-1V -800 -600 -400 -200
0
Input Differential Voltage (mV)
See the Input Differential Voltage section
Figure 17. Input Bias Current vs
Input Differential Voltage
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7 Parameter Measurement Information
10 kW
2.5 V
1 kW
Device
-2.5 V
Figure 18. Overvoltage Recovery Circuit
12
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8 Detailed Description
8.1 Overview
The OPA317-Q1 is a family of low-power, rail-to-rail input and output operational amplifiers. These devices
operate from 1.8 V to 5.5 V, are unity-gain stable, and are suitable for a wide range of general-purpose
applications. The class AB output stage is capable of driving ≤ 10-kΩ loads connected to any point between V+
and ground. The input common-mode voltage range includes both rails and allows the OPA317 series to be used
in virtually any single-supply application. Rail-to-rail input and output swing significantly increases dynamic range,
especially in low-supply applications, and makes them ideal for driving sampling analog-to-digital converters
(ADCs).
8.2 Functional Block Diagram
C2
Notch
Filter
GM1
CHOP1
CHOP2
GM2
GM3
OUT
+IN
-IN
C1
GM_FF
Copyright © 2016, Texas Instruments Incorporated
8.3 Feature Description
8.3.1 Operating Voltage
The OPA317-Q1 series of operational amplifiers can be used with single or dual supplies from an operating
range of VS = 1.8 V (±0.9 V) up to 5.5 V (±2.75 V).
CAUTION
Supply voltages greater than 7 V can permanently damage the device.
See the Absolute Maximum Ratings table. Key parameters that vary over the supply voltage or temperature
range are shown in the Typical Characteristics section.
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Feature Description (continued)
8.3.2 Input Voltage
The OPA317-Q1, OPA2317-Q1, and OPA4317-Q1 input common-mode voltage range extends 0.1 V beyond the
supply rails. The OPA317-Q1 device is designed to cover the full range without the troublesome transition region
found in some other rail-to-rail amplifiers.
Typically, input bias current is about 200 pA; however, input voltages exceeding the power supplies can cause
excessive current to flow into or out of the input pins. Momentary voltages greater than the power supply can be
tolerated if the input current is limited to 10 mA. This limitation is easily accomplished with an input resistor, as
shown in Figure 19.
5 V
IOVERLOAD
10 mA max
Device
VOUT
VIN
5 kW
NOTE: Current limiting resistor required if input voltage exceeds supply rails by ≥ 0.3 V.
Figure 19. Input Current Protection
8.3.3 Input Differential Voltage
The typical input bias current of the OPA317-Q1 during normal operation is approximately 200 pA. In overdriven
conditions, the bias current can increase significantly (see Figure 17).The most common cause of an overdriven
condition occurs when the operational amplifier is outside of the linear range of operation. When the output of the
operational amplifier is driven to one of the supply rails, the feedback loop requirements cannot be satisfied, and
a differential input voltage develops across the input pins. This differential input voltage results in activation of
parasitic diodes inside the front-end input chopping switches that combine with 10-kΩ electromagnetic
interference (EMI) filter resistors to create the equivalent circuit shown in Figure 20.
NOTE
The input bias current remains within specification within the linear region.
10 kW
Clamp
+IN
CORE
-IN
10 kW
Figure 20. Equivalent Input Circuit
8.3.4 Internal Offset Correction
The OPA317-Q1, OPA2317-Q1, and OPA4317-Q1 operational amplifiers use an auto-calibration technique with
a time-continuous, 125-kHz operational amplifier in the signal path. This amplifier is zero-corrected every 8 μs
using a proprietary technique. Upon power up, the amplifier requires approximately 100 μs to achieve specified
VOS accuracy. This design has no aliasing or flicker noise.
8.3.5 EMI Susceptibility and Input Filtering
Operational amplifiers vary in susceptibility to EMI. If conducted EMI enters the operational amplifier, the DC
offset observed at the amplifier output may shift from its nominal value while the EMI is present. This shift is a
result of signal rectification associated with the internal semiconductor junctions. While all operational amplifier
pin functions can be affected by EMI, the input pins are likely to be the most susceptible. The OPA317-Q1
operational amplifier family incorporates an internal input low-pass filter that reduces the amplifier response to
EMI. Both common-mode and differential mode filtering are provided by the input filter. The filter is designed for a
cutoff frequency of approximately 8 MHz (–3 dB), with a roll-off of 20 dB per decade.
14
Copyright © 2016, Texas Instruments Incorporated
OPA317-Q1, OPA2317-Q1, OPA4317-Q1
www.ti.com.cn
ZHCSFA4 –JULY 2016
8.4 Device Functional Modes
The OPAx317-Q1 family of devices are powered on when the supply is connected. The device can be operated
as a single-supply operational amplifier or a dual-supply amplifier, depending on the application.
Copyright © 2016, Texas Instruments Incorporated
15
OPA317-Q1, OPA2317-Q1, OPA4317-Q1
ZHCSFA4 –JULY 2016
www.ti.com.cn
9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The OPA317-Q1, OPA2317-Q1, and OPA4317-Q1 are unity-gain stable, precision operational amplifiers free
from unexpected output and phase reversal. Proprietary Zerø-Drift circuitry gives the benefit of low input offset
voltage over time and temperature, as well as lowering the 1/f noise component. As a result of the high PSRR,
these devices work well in applications that run directly from battery power without regulation. The OPA317-Q1
family is optimized for low-voltage, single-supply operation. These miniature, high-precision, low quiescent
current amplifiers offer high impedance inputs that have a common-mode range 100 mV beyond the supplies,
and a rail-to-rail output that swings within 100 mV of the supplies under normal test conditions. The OPA317-Q1
series are precision amplifiers for cost-sensitive applications.
9.1.1 Achieving Output Swing to the Op Amp Negative Rail
Some applications require output voltage swings from 0 V to a positive full-scale voltage (such as 2.5 V) with
excellent accuracy. With most single-supply operational amplifiers, problems arise when the output signal
approaches 0 V, near the lower output swing limit of a single-supply operational amplifier. A good single-supply
operational amplifier may swing close to single-supply ground, but does not reach ground. The output of the
OPA317-Q1, OPA2317-Q1, and OPA4317-Q1 can be made to swing to ground, or slightly below, on a single-
supply power source. To do so requires the use of another resistor and an additional, more negative power
supply than the operational amplifier negative supply. A pulldown resistor can be connected between the output
and the additional negative supply to pull the output down below the value that the output would otherwise
achieve, as shown in Figure 21.
V+ = 5 V
Device
VOUT
VIN
RP = 20 kW
Op Amp V- = GND
-5 V
Additional
Negative
Supply
Figure 21. For VOUT Range to Ground
The OPA317-Q1, OPA2317-Q1, and OPA4317-Q1 have an output stage that allows the output voltage to be
pulled to its negative supply rail, or slightly below, using the technique previously described. This technique only
works with some types of output stages. The OPA317-Q1, OPA2317-Q1, and OPA4317-Q1 have been
characterized to perform with this technique; the recommended resistor value is approximately 20 kΩ. This
configuration increases the current consumption by several hundreds of microamps. Accuracy is excellent down
to 0 V and as low as –2 mV. Limiting and nonlinearity occur below –2 mV, but excellent accuracy returns as the
output drives back up above –2 mV. Lowering the resistance of the pulldown resistor allows the operational
amplifier to swing even further below the negative rail. Use resistances as low as 10 kΩ to achieve excellent
accuracy down to –10 mV.
16
Copyright © 2016, Texas Instruments Incorporated
OPA317-Q1, OPA2317-Q1, OPA4317-Q1
www.ti.com.cn
ZHCSFA4 –JULY 2016
9.2 Typical Applications
The circuit shown in Figure 22 is a high-side voltage-to-current (V-I) converter. It translates an input voltage of
0 V to 2 V to an output current of 0 mA to 100 mA. Figure 23 shows the measured transfer function for this
circuit. The low offset voltage and offset drift of the OPA317 facilitate excellent DC accuracy for the circuit.
V+
RS2
470 ꢀ
VRS2
RS3
4.7 ꢀ
IRS2
IRS3
R4
VRS3
10 kꢀ
C7
2200 pF
R5
A2
Q2
+
330 ꢀ
V+
200 ꢀ
+
Q1
A1
R3
+
VIN
1000 pF
C6
œ
VRS1
VLOAD
10 kꢀ
R2
RS1
2 kꢀ
RLOAD
ILOAD
IRS1
Copyright © 2016, Texas Instruments Incorporated
Figure 22. High-Side Voltage-to-Current (V-I) Converter
9.2.1 Design Requirements
The design requirements are as follows:
•
•
•
Supply Voltage: 5-V DC
Input: 0-V to 2-V DC
Output: 0-mA to 100-mA DC
9.2.2 Detailed Design Procedure
The V-I transfer function of the circuit is based on the relationship between the input voltage, VIN, and the three
current-sensing resistors: RS1, RS2, and RS3. The relationship between VIN and RS1 determines the current that
flows through the first stage of the design. The current gain from the first stage to the second stage is based on
the relationship between RS2 and RS3.
Copyright © 2016, Texas Instruments Incorporated
17
OPA317-Q1, OPA2317-Q1, OPA4317-Q1
ZHCSFA4 –JULY 2016
www.ti.com.cn
Typical Applications (continued)
For a successful design, pay close attention to the DC characteristics of the operational amplifier chosen for the
application. To meet the performance goals, this application benefits from an operational amplifier with low offset
voltage, low temperature drift, and rail-to-rail output. The OPA2317 CMOS operational amplifier is a high-
precision, 5-µV offset, 0.05-μV/°C drift amplifier optimized for low-voltage, single-supply operation with an output
swing to within 50 mV of the positive rail. The OPA2317 family uses chopping techniques to provide low initial
offset voltage and near-zero drift over time and temperature. Low offset voltage and low drift reduce the offset
error in the system, making these devices appropriate for precise DC control. The rail-to-rail output stage of the
OPA2317 ensures that the output swing of the operational amplifier is able to fully control the gate of the
MOSFET devices within the supply rails.
9.2.3 Application Curve
0.1
Load
0.075
0.05
0.025
0
0
0.5
1
Input Voltage (V)
1.5
2
D001
Figure 23. Measured Transfer Function for High-Side V-I Converter
18
Copyright © 2016, Texas Instruments Incorporated
OPA317-Q1, OPA2317-Q1, OPA4317-Q1
www.ti.com.cn
ZHCSFA4 –JULY 2016
9.3 System Example
RN are operational resistors used to isolate the ADS1100 from the noise of the digital I2C bus. The ADS1100
device is a 16-bit converter; therefore, a precise reference is essential for maximum accuracy. If absolute
accuracy is not required and the 5-V power supply is sufficiently stable, the REF3130 device may be omitted.
3 V
REF3130
+5 V
Load
R1
4.99 kW
R2
49.9 kW
R6
71.5 kW
RN
56 W
V
RSHUNT
1 W
ILOAD
Device
I2C
R3
4.99 kW
R4
48.7 kW
RN
56 W
ADS1100
R7
1.18 kW
(PGA Gain = 4)
FS = 3.0 V
Stray Ground-Loop Resistance
Copyright © 2016, Texas Instruments Incorporated
NOTE: 1% resistors provide adequate common-mode rejection at small ground-loop errors.
Figure 24. Low-Side Current Monitor
10 Power Supply Recommendations
The OPAx317-Q1 device is specified for operation from 1.8 V to 5.5 V (±0.9 V to ±2.75 V); many specifications
apply from –40°C to +125°C. The Electrical Characteristics: VS = 1.8 V to 5.5 V table presents parameters that
can exhibit significant variance with regard to operating voltage or temperature.
CAUTION
Supply voltages larger than 7 V can permanently damage the device (see the Absolute
Maximum Ratings) table.
Place 0.1-μF bypass capacitors close to the power-supply pins to reduce errors coupling in from noisy or high-
impedance power supplies. For more detailed information on bypass capacitor placement, see the Layout
Guidelines section.
Copyright © 2016, Texas Instruments Incorporated
19
OPA317-Q1, OPA2317-Q1, OPA4317-Q1
ZHCSFA4 –JULY 2016
www.ti.com.cn
11 Layout
11.1 Layout Guidelines
Attention to good layout practice is always recommended. Keep traces short and, when possible, use a printed-
circuit board (PCB) ground plane with surface-mount components placed as close to the device pins as possible.
Place a 0.1-μF capacitor closely across the supply pins. Apply these guidelines throughout the analog circuit to
improve performance and provide benefits, such as reducing the electromagnetic interference (EMI)
susceptibility.
Optimize circuit layout and mechanical conditions for lowest offset voltage and precision performance. Avoid
temperature gradients that create thermoelectric (Seebeck) effects in the thermocouple junctions formed from
connecting dissimilar conductors. These thermally-generated potentials can be made to cancel by assuring they
are equal on both input terminals. Other layout and design considerations include:
•
•
•
Use low thermoelectric-coefficient conditions (avoid dissimilar metals).
Thermally isolate components from power supplies or other heat sources.
Shield operational amplifier and input circuitry from air currents, such as cooling fans.
Following these guidelines reduces the likelihood of junctions being at different temperatures, which can cause
thermoelectric voltage drift of 0.1 μV/°C or higher, depending on the materials used.
11.2 Layout Example
VS+
VOUT
VSœ
V+
OUT
GND
Vœ
Use a low-ESR,
Use a low-ESR,
ceramic bypass
capacitor.
ceramic bypass
capacitor.
RG
+IN
œIN
VIN
GND
GND
Run the input traces
as far away from
the supply lines
as possible.
Place components
close to the device
and to each other to
reduce parasitic
errors.
RF
Copyright © 2016, Texas Instruments Incorporated
Figure 25. OPAx317-Q1 Layout Example
20
版权 © 2016, Texas Instruments Incorporated
OPA317-Q1, OPA2317-Q1, OPA4317-Q1
www.ti.com.cn
ZHCSFA4 –JULY 2016
12 器件和文档支持
12.1 文档支持
12.1.1 相关文档ꢀ
相关文档如下：
•
•
《自校准 16 位模数转换器》，
《最大 15ppm/°C、100μA，SOT23-3 系列电压基准》，
12.2 接收文档更新通知
如需接收文档更新通知，请访问 ti.com 上的器件产品文件夹。点击右上角的提醒我 (Alert me) 注册后，即可每周定
期收到已更改的产品信息。有关更改的详细信息，请查阅已修订文档中包含的修订历史记录。
12.3 相关链接
列出了快速访问链接。范围包括技术文档、支持与社区资源、工具和软件，并且可以快速访问样片或购买链接。
表 1. 相关链接
器件
产品文件夹
请单击此处
请单击此处
请单击此处
样片与购买
请单击此处
请单击此处
请单击此处
技术文档
请单击此处
请单击此处
请单击此处
工具与软件
请单击此处
请单击此处
请单击此处
支持与社区
请单击此处
请单击此处
请单击此处
OPA317-Q1
OPA2317-Q1
OPA4317-Q1
12.4 社区资源
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
12.5 商标
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
12.6 静电放电警告
ESD 可能会损坏该集成电路。德州仪器 (TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理措施和安装程序 , 可
能会损坏集成电路。
ESD 的损坏小至导致微小的性能降级 , 大至整个器件故障。 精密的集成电路可能更容易受到损坏 , 这是因为非常细微的参数更改都可
能会导致器件与其发布的规格不相符。
12.7 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 机械、封装和可订购信息
以下页中包括机械、封装和可订购信息。这些信息是针对指定器件可提供的最新数据。这些数据会在无通知且不对
本文档进行修订的情况下发生改变。欲获得该数据表的浏览器版本，请查阅左侧的导航栏。
版权 © 2016, Texas Instruments Incorporated
21
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
OPA2317QDGKRQ1
OPA317QDBVRQ1
ACTIVE
ACTIVE
VSSOP
SOT-23
DGK
DBV
8
5
2500 RoHS & Green
3000 RoHS & Green
NIPDAUAG
Level-2-260C-1 YEAR
Level-3-260C-168 HR
-40 to 125
-40 to 125
2317
317Q
NIPDAU
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
Addendum-Page 2
PACKAGE OUTLINE
DBV0005A
SOT-23 - 1.45 mm max height
S
C
A
L
E
4
.
0
0
0
SMALL OUTLINE TRANSISTOR
C
3.0
2.6
0.1 C
1.75
1.45
1.45
0.90
B
A
PIN 1
INDEX AREA
1
2
5
(0.1)
2X 0.95
1.9
3.05
2.75
1.9
(0.15)
4
3
0.5
5X
0.3
0.15
0.00
(1.1)
TYP
0.2
C A B
NOTE 5
0.25
GAGE PLANE
0.22
0.08
TYP
8
0
TYP
0.6
0.3
TYP
SEATING PLANE
4214839/G 03/2023
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Refernce JEDEC MO-178.
4. Body dimensions do not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.25 mm per side.
5. Support pin may differ or may not be present.
www.ti.com
EXAMPLE BOARD LAYOUT
DBV0005A
SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
PKG
5X (1.1)
1
5
5X (0.6)
SYMM
(1.9)
2
3
2X (0.95)
4
(R0.05) TYP
(2.6)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:15X
SOLDER MASK
OPENING
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
EXPOSED METAL
EXPOSED METAL
0.07 MIN
ARROUND
0.07 MAX
ARROUND
NON SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4214839/G 03/2023
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
DBV0005A
SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
PKG
5X (1.1)
1
5
5X (0.6)
SYMM
(1.9)
2
3
2X(0.95)
4
(R0.05) TYP
(2.6)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:15X
4214839/G 03/2023
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
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Copyright © 2023，德州仪器 (TI) 公司
相关型号：
OPA320SAIDBVR
Precision, 20MHz, 0.9pA, Low-Noise, RRIO, CMOS Operational Amplifier with Shutdown
NSC
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