OPT4001YMNT_技术文档

OPT4001

ZHCSPI9A –DECEMBER 2021 –REVISED DECEMBER 2022

OPT4001 高速高精度数字环境光传感器

1 特性

3 说明

• 通过高速I²C 接口以两种封装型号实现高精度、高

速光/数转换

• 精密光学滤波，可与人眼紧密匹配，具有出色的近

红外(IR) 阻隔能力

• 半对数输出，具有9 个二进制对数满标度照度范

围，在每个范围内具有高度线性响应

• 内置自动满标度照度范围选择逻辑，可根据输入光

条件切换测量范围，范围之间具有良好的增益匹配

• 28 位有效动态范围：

OPT4001 是一款用于测量可见光强度的光/数传感器

（单芯片照度计）。该传感器的光谱响应与人眼的明视

响应高度匹配。该器件上专门设计的滤波器可去除常见

光源中的近红外成分，以便测量准确的光强度。

OPT4001 的输出是半对数的，具有 9 个二进制对数满

标度光范围，每个范围内具有高度线性响应，使得

PicoStar^™型号的测量能力为 312.5μlux 至 83klux，

而 SOT-5X3 型号的测量能力为 437.5μlux 至

117klux。此功能允许光传感器具有 28 位有效动态范

围。通过内置自动满标度范围选择逻辑，用户无需根据

照度级别选择适当的增益设置。

– 对于PicoStar^™封装型号，此范围为312.5μlux

至83klux

– 对于SOT-5x3 封装型号，此范围为437.5μlux

至117klux

器件信息

封装⁽¹⁾

封装尺寸（标称值）

器件型号

• 12 个可配置转换时间为600μs 到800ms，非常适

用于各种高速和高精度应用

0.84mm x 1.05mm x

0.226mm

PicoStar^™(4)

SOT-5X3 (8)

OPT4001

• 用于硬件同步触发和中断的外部引脚中断（仅在

SOT-5X3 封装型号上）

1.9mm X 2.1mm X

0.6mm

• 带I²C 突发读出的输出寄存器的内部FIFO

• 低工作电流：30μA，

(1) 要了解所有可用封装，请参见数据表末尾的封装选项附录。

1

OPT4001 PicoStar^TM

OPT4001 SOT-5X3

Human Eye

0.9

具有超低待机功耗：2μA

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0

• 工作温度范围：–40°C 至+85°C

• 宽电源范围：1.6V 至3.6V

• 可耐受5.5V 电压的I/O 引脚

• 可选择的I²C 地址

300

400

500

600

700

800

900

1000

Wavelength (nm)

• 小巧的外形

– PicoStar^™封装：0.84mm x 1.05mm x

0.226mm

光谱响应：OPT4001 和人眼

– SOT-5X3：2.1mm x 1.9mm x 0.6mm

2 应用

• 显示屏背光控制，适用于：

– 智能手表、可穿戴电子产品和健身手环

– 平板电脑和笔记本电脑

– 多功能打印机

– 家庭自动化接口

– 温度调节装置和家庭自动化电器

• 用于检测照度级别（白天或夜晚）的照明控制系统

• 销售点终端

• 室外交通和街道照明

• IP 网络摄像机

• 光源闪烁速率检测

OPT4001 的典型应用图

本文档旨在为方便起见，提供有关TI 产品中文版本的信息，以确认产品的概要。有关适用的官方英文版本的最新信息，请访问

www.ti.com，其内容始终优先。TI 不保证翻译的准确性和有效性。在实际设计之前，请务必参考最新版本的英文版本。

English Data Sheet: SBOS993

OPT4001

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ZHCSPI9A –DECEMBER 2021 –REVISED DECEMBER 2022

Table of Contents

8.5 Programming............................................................ 20

8.6 Register Maps...........................................................26

9 Application and Implementation..................................35

9.1 Application Information............................................. 35

9.2 Typical Application.................................................... 35

9.3 Do's and Don'ts.........................................................39

9.4 Power Supply Recommendations.............................39

9.5 Layout....................................................................... 39

10 Device and Documentation Support..........................45

10.1 Documentation Support.......................................... 45

10.2 接收文档更新通知................................................... 45

10.3 支持资源..................................................................45

10.4 Trademarks.............................................................45

10.5 Electrostatic Discharge Caution..............................45

10.6 术语表..................................................................... 45

11 Mechanical, Packaging, and Orderable

1 特性................................................................................... 1

2 应用................................................................................... 1

3 说明................................................................................... 1

4 Revision History.............................................................. 2

5 说明（续）.........................................................................3

6 Pin Configuration and Functions...................................4

7 Specifications.................................................................. 5

7.1 Absolute Maximum Ratings........................................ 5

7.2 ESD Ratings............................................................... 5

7.3 Recommended Operating Conditions.........................5

7.4 Thermal Information....................................................5

7.5 Electrical Characteristics.............................................6

7.6 Typical Characteristics................................................8

8 Detailed Description......................................................11

8.1 Overview................................................................... 11

8.2 Functional Block Diagram......................................... 11

8.3 Feature Description...................................................12

8.4 Device Functional Modes..........................................13

Information.................................................................... 45

4 Revision History

注：以前版本的页码可能与当前版本的页码不同

Changes from Revision * (August 2019) to Revision A (January 2022)

Page

• 为器件添加了新的封装型号SOT-5X3.................................................................................................................1

• Added 节8.4.2 for package variants................................................................................................................ 15

• Changed values for 表8-3 ...............................................................................................................................17

• Added and changed register names for both package variants....................................................................... 26

2

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5 说明（续）

OPT4001 上设计的光学滤波器提供了强大的红外抑制功能，尽管传感器放置在深色玻璃下（这是最终产品工业设

计出于美学考虑的常见要求），但这一功能也有助于保持高精度。

OPT4001 设计用于需要照度级别检测以增强用户体验的系统，该器件通常使用不起眼的人眼匹配和近红外抑制功

能来取代低精度光电二极管、光敏电阻器和其他环境光传感器。

OPT4001 器件可通过 12 个步骤配置为以600μs 到800ms 的光转换时间运行，从而能够根据应用需要提供系统

灵活性。转换时间包括光采集时间和 ADC 转换时间。测量分辨率由光强度和采集时间两者决定，PicoStar^™型号

可有效地测量低至312.5μlux 的光强度变化，SOT-5X3 型号可有效测量低至437.5μlux 的光强度变化。

数字操作可灵活用于系统集成。测量可以是连续的，也可以通过寄存器写入或硬件引脚一次性触发（仅适用于

SOT-5X3 型号）。此器件提供了阈值检测逻辑，这允许处理器进入休眠状态，同时传感器会搜索适当的唤醒事件

以通过中断引脚进行报告（只在SOT-5X3 型号上）。

数字输出，表示通过兼容 I²C 和SMBus 的双线制串行接口报告照度级别。输出寄存器上的内部FIFO 可用于以较

慢的速度从传感器读取测量值，同时仍保留器件捕获的所有数据。OPT4001 还支持 I²C 突发模式，以更小的 I²C

开销帮助主机从FIFO 读取数据。

OPT4001 兼具低功耗和低电源电压功能，可延长电池供电系统的电池寿命。

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6 Pin Configuration and Functions

1

2

GND

SCL

A

Optical

Sensing

Area

VDD

SDA

B

图6-1. YMN (PicoStar^™) Package, 4-Pin, Top View

表6-1. Pin Functions

DESCRIPTION

NO.

A1

NAME

GND

VDD

SCL

TYPE

Power

Ground

B1

Device power. Connect to a 1.6-V to 3.6-V supply.

I²C clock. Connect with a 10-kΩresistor to a 1.6-V to 5.5-V supply.

A2

Digital input

Digital input/

output

I²C data. Connect with a 10-kΩresistor to a 1.6-V to 5.5-V supply.

B2

SDA

INT

NC

1

2

3

4

8

7

6

5

VDD

ADDR

NC

GND

SCL

图6-2. DTS Package, 6-Pin USON, Top View

表6-2. Pin Functions

TYPE

DESCRIPTION

NO.

NAME

1

2

3

4

5

6

7

8

VDD

ADDR

NC

Power

Digital input

No Connection

Power

Device power. Connect to a 1.6-V to 3.6-V supply.

Address pin. This pin sets the LSBs of the I²C address.

No Connection

GND

SCL

NC

Ground

I²C clock. Connect with a 10-kΩresistor to a 1.6-V to 5.5-V supply.

Digital input

No Connection

Digital I/O

No Connection

INT

Interrupt input/output open-drain. Connect with a 10-kΩresistor to a 1.6-V to 5.5-V supply.

I²C data. Connect with a 10-kΩresistor to a 1.6-V to 5.5-V supply.

SDA

Digital I/O

4

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7 Specifications

7.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)⁽¹⁾

MIN

–0.5

MAX

6

UNIT

V

Voltage

VDD to GND

SDA and SCL to GND

6

V

Current in to any pin

10

mA

°C

T_J

Junction temperature

Storage temperature

150

150⁽²⁾

T_stg

°C

–65

(1) Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply

functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If

used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully

functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime.

(2) Long exposure to temperatures higher than 105°C can cause package discoloration, spectral distortion, and measurement inaccuracy.

7.2 ESD Ratings

VALUE

UNIT

Human body model (HBM), per ANSI/ESDA/

JEDEC JS-001, all pins⁽¹⁾

±2000

V_(ESD)

Electrostatic discharge

V

Charged device model (CDM), per ANSI/ESDA/

JEDEC JS-002, all pins⁽²⁾

±500

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.precautions.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

7.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

MIN

1.6

NOM

MAX

3.6

UNIT

V

VDD

T_J

Supply voltage

Junction temperature

85

°C

–40

7.4 Thermal Information

OPT4001

THERMAL METRIC⁽¹⁾

PicoStar^TM(YMN)

SOT-5X3 (DTS)

UNIT

4 Pins

122.8

1.4

8 Pins

112.2

28.4

22.1

1.2

R_θJA

R_θJC(top)

R_θJB

Ψ_JT

Junction-to-ambient thermal resistance

Junction-to-case (top) thermal resistance

Junction-to-board thermal resistance

°C/W

34.9

0.8

Junction-to-top characterization parameter

Junction-to-board characterization parameter

35.3

22

Ψ_JB

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report.

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7.5 Electrical Characteristics

All specifications at TA = 25°C, VDD = 3.3 V, 800-ms conversion-time (CONVERSION_TIME=0xB), automatic full-scale

range, white LED and normal-angle incidence of light, unless otherwise specified.

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

OPTICAL

PicoStar^TMVariant

Lowest auto gain range, 800 ms

converion-time

E_vLSB

312.5

2.5

µlux

Resolution

Lowest auto gain range, 100 ms

converion-time

E_vLSB

E_vFS

mlux

Full-scale illuminance

83886

96

lux

°

Angular response (FWHM)

Drift across temperature

Visible Light, Input illuminance = 2000 lux

0.01

%/°C

Input illuminance > 328 lux

100 ms conversion-time

CONVERSION_TIME=0x8

2

5

%

Linearity

Input illuminance < 328 lux

100 ms conversion-time

CONVERSION_TIME=0x8

SOT-5X3 Variant

E_vLSB

Lowest auto gain range, 800 ms

converion-time

437.5

3.5

µlux

Resolution

Lowest auto gain range, 100 ms

converion-time

E_vLSB

E_vFS

mlux

Full-scale illuminance

117441

120

lux

°

Angular response (FWHM)

Drift across temperature

Visible Light, Input illuminance = 2000 lux

0.015

%/°C

Input illuminance > 459 lux

100 ms conversion-time

CONVERSION_TIME=0x8

2

5

%

Linearity

Input illuminance < 459 lux

100 ms conversion-time

CONVERSION_TIME=0x8

Common Specifications

Peak irradiance spectral responsivity

550

nm

Effective MANTISSA bits (Register

R_MSB & R_LSB)

Dependent on Converstion Time

selected (Register CONVERSION_TIME)

9

20

bits

Exponent bits (Register E)

Measurement output result

Denotes the full-scale range

2000 lux input⁽¹⁾

4

bits

lux

E_v

1800

2000

2200

Minimum Selectable

(CONVERSION_TIME=0x0), fixed lux

range, 2000 lux input

600

800

µs

Tconv

Light Conversion-time⁽⁴⁾

Maximum Selectable

(CONVERSION_TIME=0xB), fixed lux

range, 2000 lux input

ms

Light source variation (incandescent,

halogen, fluorescent)

Bare device, no cover glass

850nm Near Infrared

4

0.2

0.4

%

E_vIR

Infrared response

Relative accuracy between gain ranges

(2)

Dark Measurement

0

10

mlux

%/V

PSRR

Power-supply rejection ratio⁽³⁾

VDD at 3.6 V and 1.6 V

0.1

POWER SUPPLY

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7.5 Electrical Characteristics (continued)

All specifications at TA = 25°C, VDD = 3.3 V, 800-ms conversion-time (CONVERSION_TIME=0xB), automatic full-scale

range, white LED and normal-angle incidence of light, unless otherwise specified.

PARAMETER

Power supply

Power supply for I²C pull up resistor

TEST CONDITIONS

MIN

TYP

MAX

UNIT

V_DD

V_I2C

1.6

3.6

V

I²C pullup resistor, V_DD≤_VI2C

1.6

5.5

V

Dark

22

30

1.6

2

µA

uA

V

I_QACTIVEActive Current

Full-scale lux

Dark

I_Q

Quiescent current

Full-scale lux

POR

DIGITAL

C_IO

Power-on-reset threshold

0.8

I/O Pin Capacitance

3

pF

T_ss

Trigger to Sample Start

Low-power shutdown mode

0.5

ms

Low-level input voltage (SDA, SCL, and

ADDR)

0.3 X

V_DD

V_IL

V_IH

0

V

High-level input voltage (SDA, SCL, and

ADDR)

0.7 X

V_DD

5.5

Low-level input current (SDA, SCL, and

ADDR)

I_IL

0.01

0.25⁽⁵⁾

0.32

µA

V

V_OL

I_ZH

Low-level output voltage (SDA and INT)

I_OL=3mA

Output logic high, high-Z leakage current

(SDA, INT)

Measured with V_DDat pin

0.25⁽⁵⁾

µA

TEMPERATURE

Specified temperature range

85

°C

–40

(1) Tested with the white LED calibrated to 2000 lux

(2) Characterized by measuring fixed near-full-scale light levels on the higher adjacent full-scale range setting.

(3) PSRR is the percent change of the measured lux output from the current value, divided by the change in power supply voltage, as

characterized by results from 3.6-V and 1.6-V power supplies

(4) The conversion-time, from start of conversion until the data are ready to be read, is the integration-time plus analog-to-digital

conversion-time.

(5) The specified leakage current is dominated by the production test equipment limitations. Typical values are much smaller

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7.6 Typical Characteristics

At T_A= 25°C, V_DD= 3.3 V, 800-ms conversion time (CONVERSION_TIME = 0xB), automatic full-scale range (RANGE =

0xC), white LED, and normal-angle incidence of light, unless otherwise specified.

1

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0

1

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0

OPT4001 PicoStar^TM

OPT4001 SOT-5X3

Human Eye

OPT4001 PicoStar^TM

OPT4001 SOT-5X3

-100 -80 -60 -40 -20

0

20

40

60

80 100

300

400

500

600

700

800

900

1000

Illuminance Angle (°)

Wavelength (nm)

Normalized to 0°

spacer

图7-1. Spectral Response vs Wavelength

图7-2. Device Response vs Illuminance Angle

1.5

1.25

1.2

1.45

1.4

1.35

1.3

1.15

1.1

1.25

1.2

1.15

1.1

1.05

1

1.05

1

0.95

0.9

0.95

0.001 0.01

0.1

1

10

100 1000 10000 100000

0.1

1

10

100 1000 10000 100000

Input Illuminance (Lux)

Normalized to dark condition

图7-3. Active Current vs Input Light Level

图7-4. Standby Current vs Input Light Level

1.1

1.08

1.06

1.04

1.02

1

1.05

1.04

1.03

1.02

1.01

1

0.99

0.98

0.97

0.96

0.95

0.94

0.98

0.96

0.94

0.92

0.9

1.6 1.8

2

2.2 2.4 2.6 2.8

Power Supply (V)

3

3.2 3.4 3.6

1.6 1.8

2

2.2 2.4 2.6 2.8

Supply Voltage (V)

3

3.2 3.4 3.6

Normalized to 3.3 V

图7-5. Active Current vs Power Supply

Normalized to 3.3 V

图7-6. Standby Current vs Power Supply

8

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7.6 Typical Characteristics (continued)

At T_A= 25°C, V_DD= 3.3 V, 800-ms conversion time (CONVERSION_TIME = 0xB), automatic full-scale range (RANGE =

0xC), white LED, and normal-angle incidence of light, unless otherwise specified.

1.005

1.004

1.003

1.002

1.001

1

2

1.8

1.6

1.4

1.2

1

E=0

E=1

E=2

E=3

E=4

E=5

E=6

E=7

E=8

0.999

0.998

0.997

0.996

0.995

0.8

1.6 1.8

2

2.2 2.4 2.6 2.8

Supply Voltage (V)

3

3.2 3.4 3.6

20 30 50 100 200 500 1000

10000

Input Illuminance (Lux)

100000

Normalized to 3.3 V

图7-7. Device Response vs Power Supply

Register E (exponent) denotes the full-scale range

Normalized to 600 μs

图7-8. Conversion Time at 600 μs vs Input Light Level

1.035

1.03

1.05

1.04

1.03

1.02

1.01

1

E=0

E=1

E=2

E=3

E=4

E=5

E=6

E=7

E=8

1.025

1.02

0.99

0.98

0.97

0.96

0.95

1.015

1.01

1.005

20 30 50 100 200 500 1000

10000

Input Illuminance (Lux)

100000

-40 -25 -10

5

20

35

50

65

80

95

Temperature (°C)

Register E (exponent) denotes the full-scale range

Normalized to 25 ms

Normalized to 25°C

spacer

图7-9. Conversion Time at 25 ms vs Input Light Level

图7-10. Active Current vs Temperature

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7.6 Typical Characteristics (continued)

At T_A= 25°C, V_DD= 3.3 V, 800-ms conversion time (CONVERSION_TIME = 0xB), automatic full-scale range (RANGE =

0xC), white LED, and normal-angle incidence of light, unless otherwise specified.

1.4

1.35

1.3

1.25

1.2

1.15

1.1

1.05

1

0.95

-40

-20

0

20

40

60

80

100

Temperature (°C)

Normalized to 25°C

图7-11. Standby Current vs Temperature

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8 Detailed Description

8.1 Overview

OPT4001 measures the ambient light that illuminates the device. This device measures light with a spectral

response very closely matched to the human eye, and with excellent infrared rejection.

Matching the sensor spectral response to that of the human eye response is vital because ambient light sensors

are used to measure and help create excellent human lighting experiences. Strong rejection of infrared light,

which a human does not see, is a crucial component of this matching. This matching makes the OPT4001

especially good for operation underneath windows that are visibly dark, but infrared transmissive.

OPT4001 is fully self-contained to measure the ambient light and report the result in ADC codes directly

proportional to lux digitally over the I²C bus. The result can also be used to alert a system and interrupt a

processor with the INT pin (with SOT-5X3 package variant). The result can also be summarized with a

programmable threshold comparison and communicated with the INT pin(with SOT-5X3 package variant).

OPT4001 is by default configured to operate in automatic full-scale range detection mode that always selects the

best full-scale range setting for the given lighting conditions. There are 9 full-scale range settings, one of which

can be selected manually as well. Setting the device to operate in automatic full-scale range detection mode

frees the user from having to program their software for potential iterative cycles of measurement and

readjustment of the full-scale range until good for any given measurement. With device exhibiting excellent

linearity over the entire 28 bit dynamic range of measurement no additional linearity calibration is required at

system level.

OPT4001 can be configured to operate in continuous or one-shot measurement modes. The device offers 12

conversion times ranging from 600 μs to 800 ms. The device starts up in a low-power shutdown state, such that

the OPT4001 only consumes active-operation power after being programmed into an active state.

OPT4001 optical filtering system is not excessively sensitive to small particles and micro-shadows on the optical

surface. This reduced sensitivity is a result of the relatively minor device dependency on uniform density optical

illumination of the sensor area for infrared rejection. Proper optical surface cleanliness is always recommended

for best results on all optical devices.

8.2 Functional Block Diagram

VDD

Ambient

Light

OPT4001

SCL

I²C

Interface

SDA

Photopic

Light Filter

ADC

Only SOT-5X3 package

INT

ADDR

GND

图8-1. Functional Block Diagram of OPT4001

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8.3 Feature Description

8.3.1 Spectral Matching to Human Eye

OPT4001 spectral response closely matches that of the human eye. If the ambient light sensor measurement is

used to help create a good human experience, or create optical conditions that are good for humans, then the

sensor must measure the same spectrum of light that a human sees.

OPT4001 also has excellent infrared light (IR) rejection. This IR rejection is especially important because many

real-world lighting sources have significant infrared content that humans do not see. If the sensor measures

infrared light that the human eye does not see, then a true human experience is not accurately represented.

If the application demands hiding OPT4001 underneath dark window (such that the end-product user cannot see

the sensor) the infrared rejection of the OPT4001 becomes significantly more important because many dark

windows attenuate visible light but transmit infrared light. This attenuation of visible light and lack of attenuation

of IR light amplifies the ratio of the infrared light to visible light that illuminates the sensor. Results can still be

well matched to the human eye under this condition because of the high infrared rejection of the OPT4001.

8.3.2 Automatic Full-Scale Range Setting

The OPT4001 has an automatic full-scale range setting feature that eliminates the need to predict and set the

best range for the device. In this mode, the device automatically selects the best full-scale range for varying

lighting condition each measurement. The device has a high degree of result matching between the full-scale

range settings. This matching eliminates the problem of varying results or the need for range-specific, user-

calibrated gain factors when different full-scale ranges are chosen.

8.3.3 Output Register CRC and Counter

OPT4001 device features additional bits as part of the output register which helps in improving the reliability of

light measurements for the application.

8.3.3.1 Output Sample Counter

The OPT4001 device features a register COUNTER as part of the output registers which increments for every

successful measurement. This register can be read as part of the output registers which helps the application to

keep track of measurements. The 4 bit counter starts at 0 on power-up and counts up to 15 after which the

counter resets back to 0 and continues to count up, which is particularly helpful in situations like the following:

• Host or the controller needs consecutive measurements. Utilizing the COUNTER register allows the controller

to compare samples and makes sure that the samples are in expected order without missing intermediate

counter values.

• As a safety feature where when light level are not changing, the controller can make sure that the

measurements from OPT4001 are not stuck by comparing values of register COUNTER between

measurements. If the COUNTER values continue to change over samples, the device is updating the output

register with the most recent measurement of light levels.

8.3.3.2 Output CRC

CRC register consists of Cyclic Redundancy Checker bits part of the output registers calculated within the

OPT4001 device and updated on every measurement. This feature helps in detecting communication related bit

errors during the output readout from the device. The calculation method for the CRC bits is shown in 图 8-14,

which can be independently verified in the controller or host firmware/software to validate if communication

between the controller and the device was successful without bit errors during transmission.

8.3.4 Output Register FIFO

Output registers always contain the most recent light measurement. Along with output registers there are 3 more

shadow registers which have the data from the previous 3 measurements. For every new measurement, the

data on the 3 shadow registers are updated to contain the most recent measurements discarding the oldest

measurement similar to a FIFO scheme. These shadow registers along with output registers act like a FIFO with

a depth of 4. The INT pin (only on SOT-5X3 variant) can be configured as shown in the figure below to generate

an interrupt every measurement or can be configured to generate an interrupt every 4 measurements using the

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register INT_CFG. This way the controller reading data from OPT4001 device can minimize the number of

interrupts by a factor of 4 and still get access to all the four measurements between the interrupts. By using the

Burst Read Mode the output and FIFO registers can be read out with minimal I²C clocks.

Continuous Mode

Measurement

Output registers

FIFO 0 registers

(n-1)

(n+2)

(n+1)

(n)

Measurement

(n-2)

(n-1)

(n)

(n+1)

Measurement

(n-2)

(n-1)

(n)

(n-3)

FIFO 1 registers

FIFO 2 registers

Measurement

(n-4)

(n-1)

(n-2)

(n-3)

INT (output)

On SOT-5X3 only

Interrupt_(n+1)

Interrupt_(n)

Interrupt_(n-1)

Conversion Time

图8-2. FIFO registers data movement

8.3.5 Threshold Detection

OPT4001 features a threshold detection logic which can be programmed to indicate and update register flags if

measured light levels cross thresholds set by the user. There are independent low and high threshold target

registers with independent flag registers to indicate the status of measured light level. Measured light level

reaching below low threshold and above the high threshold are called faults. Users can program a fault count

register, which counts consecutive number of faults before the flag registers are set. This is particularly useful in

cases where the controller can read the flag register alone to get indication of measured light level not really

needing to do the lux calculations. Details on the register and setting up the threshold is available in 节8.3.5 and

calculations for setting this up is available inThreshold Detection Calculations.

8.4 Device Functional Modes

8.4.1 Modes of Operation

The OPT4001 device has the following modes of operation:

• Power-down mode: This is power-down or standby mode where the device enters a low power state. There

is no active light sensing or conversion in this mode. Device still responds to I²C transactions which can be

utilized to bring the device out of this mode. Register OPERATING_MODE is set to 0.

• Continuous mode: In this mode OPT4001 measures and updates the output registers continuously

determined by the conversion time and generates hardware interrupt on pin INT (Only on SOT-5X3 package

variant) for every successful conversion. TI recommends to configure the INT pin in output mode using the

INT_DIR register. The device active circuits are continuously kept active to minimize the interval between

measurements. Register OPERATING_MODE is set to 3.

• One shot mode of operation: There are several ways in which OPT4001 can be used in one shot mode of

operation with one common theme where OPT4001 stays in standby mode and a conversion is triggered

either by a register write to configuration register or hardware interrupt on the INT pin.

There are two types of one shot modes.

– Force auto-range one shot mode: Every one shot trigger forces a full reset on auto-ranging control logic

and a fresh auto-range detection is initiated ignoring the previous measurements. This is particularly

useful in situations where lighting conditions are expected to change a lot and one shot trigger frequency

is not very often. There is small penalty on conversion time due for the auto-ranging logic to recover from

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reset state. The full reset cycle on the auto-ranging control logic takes around 500 μs which needs to be

accounted for between measurements when this mode is used. Register OPERATING_MODE is set to 1.

– Regular auto-range one shot mode: Auto-range selection logic utilizes the information from the previous

measurements to decide the range for the current trigger. This mode is recommended only when the

device needs time synchronized measurements with frequent triggers from the controller. In other words,

this mode can be used as an alternative to continuous mode the key difference being that the interval

between measurements is determined by the one shot triggers. Register OPERATING_MODE is set to 2.

One Shot can be triggered by the following

– Hardware trigger (Only on SOT-5X3 variant):INT pin can be configured to be an input to trigger a

measurement setting INT_DIR register to 0. Since INT pin is used as input, there is no hardware interrupt

to indicate completion of measurement. The controller needs to keep time from the trigger mechanism and

read out output registers.

– Register trigger: An I²C write to the OPERATING_MODE register triggers a measurement (value of 1 or

2). The register value is reset after next successful measurement. INT pin can be configured to indicate

measurement completion to read out output registers setting the INT_DIR register to 1.

TI highly recommends to set the interval between subsequent triggers to account for all the aspects involved

in the trigger mechanism like the I²C transaction time, device wake-up time, auto-range time (if used) and

device conversion time. If a conversion trigger is received before the completion of current measurement, the

device simply ignores the new request until the previous conversion is completed.

Since the device enters standby after each one shot trigger, measurement interval in the one shot trigger

mechanism needs to account for additional time T_ssas specified in the specification table for the circuits to

recover from standby state. However setting the quick wake up register QWAKE eliminates the need for this

additional T_ssat the cost of not powering down the active circuit with device not entering the standby mode

between triggers.

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Continuous Mode

Output registers

Measurement

(n+1)

Measurement

(n+2)

Measurement

(n-1)

(n)

INT (output)

On SOT-5X3 only

Interrupt_(n+1)

Interrupt_(n)

Interrupt_(n-1)

Conversion Time

Active Power

Device Power

One-shot Mode (Pin Trigger)

Output registers

Measurement

(n)

Measurement

(n-1)

(n+1)

INT (input)

On SOT-5X3 only

Trigger_(n)

Trigger_(n+1)

Conversion Time

Active Power

Conversion Time

Active Power

Standby

Device Power

One-shot Mode (Register Trigger)

Output registers

Config register

Measurement

(n)

Measurement

(n-1)

(n+1)

Trigger bits set by Controller

Trigger bits reset by Device

Trigger_(n+1)

Trigger bits reset by Device

Trigger_(n)

Conversion Time

INT (output)

On SOT-5X3 only

Interrupt_(n)

Standby

Interrupt_(n+1)

Standby

Active Power

Standby

Device Power

图8-3. Timing Diagrams for different Operating modes

8.4.2 Interrupt Modes of Operation

The device has an interrupt reporting system that allows the processor connected to the I²C bus to go to sleep,

or otherwise ignore the device results, until a user-defined event occurs that requires possible action.

Alternatively, this same mechanism can also be used with any system that can take advantage of a single digital

signal that indicates whether the light is above or below levels of interest.

The INT pin has an open-drain output, which requires the use of a pull-up resistor. This open-drain output allows

multiple devices with open-drain INT pins to be connected to the same line, thus creating a logical NOR or AND

function between the devices. The polarity of the INT pin can be controlled by the INT_POL.

There are two major types of interrupt reporting mechanism modes: latched window comparison mode and

transparent hysteresis comparison mode. The configuration register LATCH controls which of these two modes

is used. 表 8-1 and 图 8-4 summarize the function of these two modes. Additionally, the INT pin can either be

used to indicate a fault in one of these modes (INT_CFG=0) or to indicate a conversion completion (INT_CFG

>0). This is shown in 表8-2.

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图8-4. Interrupt Pin Status (for INT_CFG=0 setting) and Register Flag Behavior

表8-1. Interrupt Pin Status (for INT_CFG=0 setting) and Register Flag Behavior

INT Pin State (when

LATCH Setting

FLAG_H Value

FLAG_L Value

Latching Behavior

INT_CFG=0)

INT pin indicates if

measurement is above

(INT active) or below (INT

inactive) the threshold. If

measurement is between

the high and low threshold

values then the previous

INT value is maintained.

This prevents the INT pin

from repeated toggling

when the measurement

values are close to the

threshold.

0: If measurement is

below the low limit

1: If measurement is

above the high limit

If measurement is

between high and low

limits previous value is

maintained

0: If measurement is

above the high limit

1: If measurement is

below the low limit

If measurement is

between high and low

limits previous value is

maintained

Not latching: Values are

updated after each

conversion

0: Transparent hysteresis

mode

INT pin becomes active if

the measurement is

outside the window (above

high threshold or below

the low threshold). The

INT pin does not reset and

return to the inactive state

until register 0xC is read.

Latching: INT pin,

FLAG_H and FLAG_L

values do not reset until

the register 0x0C is read.

1: If measurement is

above the high limit

1: If measurement is

below the low limit

1: Latched window mode

The THRESHOLD_H, THRESHOLD_L, LATCH and FAULT_COUNT registers control the interrupt behavior. The

LATCH field setting allows a choice between the latched window mode and transparent hysteresis mode as

shown in the table. Interrupt reporting can be observed on INT pin (for SOT-5X3 variant only), the FLAG_H, and

the FLAG_L registers.

Results from comparing the current sensor measurements with THRESHOLD_H and THRESHOLD_L registers

are referred to as fault events. The calculations to set these registers can be found in Threshold Detection

Calculations. The FAULT_COUNT register dictates the number of continuous fault events required to trigger an

interrupt event and subsequently change the state of the interrupt reporting mechanisms. For example, with a

FAULT_COUNT value of 2 corresponding to 4 fault counts, the INT pin (for SOT-5X3 variant only), FLAG_H and

FLAG_L states shown in the table are not realized unless 4 consecutive measurements are taken that satisfy the

fault condition.

INT pin function (for SOT-5X3 variant only) listed in 表 8-1is valid only when INT_CFG=0. The INT pin function

can be changed to indicate an end of conversion or FIFO full state as shown in 表 8-2. The FLAG_H and

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FLAG_L registers continue to behave as listed in 表 8-1 even while INT_CFG>0. The polarity of the INT pin is

controlled by the INT_POL register.

表8-2. INT_CFG Setting and Resulting INT Pin Behavior

INT_CFG Setting

INT Pin Function

0

1

As per 表8-1

INT pin asserted with 1us pulse width after every conversion

INT pin asserted with 1us pulse width every 4 conversions to indicate

the FIFO is full

3

8.4.3 Light Range Selection

The OPT4001 has an automatic full-scale-range setting mode that eliminates the need for a user to predict and

set the best range for the device. This mode is entered when register RANGE is set to 0xC. The device

determines the appropriate full-scale range to take the measurement based on a combination of current lighting

conditions and the previous measurement.

If a measurement is towards the low side of full-scale, then the full-scale range is decreased by one or two

settings for the next measurement. If a measurement is towards the upper side of full-scale, the full-scale range

is increased by one setting for the next measurement.

If the measurement exceeds the full-scale range, resulting from a fast increasing optical transient event, then the

current measurement is aborted. This invalid measurement is not reported. If the scale is not at the maximum,

then the device increases the scale by one step and a new measurement is retaken with that scale. Therefore,

during a fast increasing optical transient in this mode, a measurement can possibly take longer to complete and

report than indicated by the configuration register CONVERSION_TIME.

TI highly recommends to use this feature, since the device selects the best range setting based on lighting

condition. However, there is an option to manually set the range. Setting the range manually turns off the

automatic full-scale selection logic and the device operates for a particular range setting.

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表8-3. Range Selection Table

Typical Full-scale Light level for PicoStar^™Typical Full-scale Light level for SOT-5X3

RANGE register setting

variant

0

1

328 lux

459 lux

918 lux

655 lux

2

1311 lux

2621 lux

5243 lux

10486 lux

20972 lux

41943 lux

83886 lux

1835 lux

3670 lux

7340 lux

14680 lux

29360 lux

58720 lux

117441 lux

3

4

5

6

7

8

12

Determined by automatic full-scale range logic

8.4.4 Selecting Conversion Time

The OPT4001 device offers several conversion times to select from. Conversion Time is defined as how much

time for one measurement to complete and update the results in output register from the time measurement is

initiated. Measurement initiation is determined by the mode of operation as specified in Modes of Operation.

表8-4. Conversion Time Selection

CONVERSION_TIME register

Typical Conversion Time

0

1

0.6 ms

1 ms

2

1.8 ms

3

3.4 ms

4

6.5 ms

5

12.7 ms

25 ms

6

7

50 ms

8

100 ms

9

200 ms

10

11

400 ms

800 ms

8.4.5 Light Measurement in Lux

The OPT4001 device measures light and updates output registers with proportional ADC codes. Output of the

device is represented by two parts (i) 4 bits of EXPONENT and (ii) 20 bits of MANTISSA. This arrangement of

binary logarithmic full-scale range with linear representation with in a range helps in covering a large dynamic

range of measurements. MANTISSA represents the linear ADC codes proportional to the measured light within a

given full-scale range and the EXPONENT represents the current-full scale range selected. The selected range

can be automatically determined by the auto-range selection logic or manually selected as per 表8-3.

Lux level can be determined using the following equations:

MANTISSA=(RESULT_MSB<<8) + RESULT_LSB

(1)

(2)

or

MANTISSA=(RESULT_MSB x 2^8) + RESULT_LSB

where RESULT_MSB, RESULT_LSB and EXPONENT are parts of the output register

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RESULT_MSB register carries the most significant 12 bits of the MANTISSA and RESULT_LSB register carries

the least significant 8 bits of the MANTISSA. MANTISSA is then computed using the above equations to get the

20 bit number. EXPONENT is directly read from the register which is 4 bits.

Once the EXPONENT and MANTISSA portions are calculated the linearized ADC_CODES is calculated using

the following equation:

ADC_CODES = (MANTISSA<<E)

(3)

or

ADC_CODES = (MANTISSA x 2^E)

(4)

With maximum value for register E being 8 ADC_CODES is effectively a 28 bit number. The semi-logarithmic

numbers have been converted to a linear ADC_CODES representation, which is simple to convert to lux given

by the following formula

lux = ADC_CODES x 312.5E-6 for the PicoStar^™variant

lux = ADC_CODES x 437.5E-6 for the SOT-5X3 variant

(5)

(6)

The MANTISSA and ADC_CODES are large numbers with 20 and 28 bits required to represent them. While

developing firmware or software for these calculations, allocating appropriate data types to prevent data overflow

is important. Some explicit typecasting to a larger data type such as 32 bit representation before left shift

operation (<<) operations is recommended.

Threshold Detection Calculations

Threshold result registers THRESHOLD_H_RESULT and THRESHOLD_L_RESULT are 12 bit, while threshold

exponent registers THRESHOLD_H_EXPONENT and THRESHOLD_L_EXPONENT are 4 bits. Since threshold

is compared at linear ADC_CODES, the threshold registers are padded with zeros internally as shown to

compare with the ADC_CODES

ADC_CODES_TH = THRESHOLD_H_RESULT << (8 + THRESHOLD_H_EXPONENT)

ADC_CODES_TH = THRESHOLD_H_RESULT x 2^(8 + THRESHOLD_H_EXPONENT)

ADC_CODES_TL = THRESHOLD_L_RESULT << (8 + THRESHOLD_L_EXPONENT)

ADC_CODES_TL=THRESHOLD_L_RESULT x 2^(8 + THRESHOLD_L_EXPONENT)

(7)

or

(8)

and

or

(9)

(10)

(11)

(12)

Threshold are then compared as shown to detect fault events.

If ADC_CODES < ADC_CODES_TL a fault low is detected

and

If ADC_CODES > ADC_CODES_TH a fault high is detected

Based on the FAULT_COUNT register setting, with consecutive fault high or fault low events, respective

FLAG_H and FLAG_L registers are set, more details of which can be found in 节 8.4.2. Understanding the

relation between THRESHOLD_H_EXPONENT, THRESHOLD_H_RESULT, THRESHOLD_L_EXPONENT,

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THRESHOLD_L_RESULT and the output registers is important to be able to set appropriate threshold based on

application needs.

8.4.6 Light Resolution

The OPT4001 device's effective resolution is dependent on both the conversion time setting and the full-scale

light range. Although the LSB resolution of the linear ADC_CODES doesn’t change, the effective or useful

resolution of the device is dependent on the conversion time setting and the full-scale range as per the table

below. In conversion times where the effective resolution is lower, the LSBs are padded with 0.

表8-5. Resolution Table for the Picostar^™Variant

EXPONE

0

1

2

3

4

5

6

7

8

CONVE

RSION_ Convers

MANTES

SA

NT

Full-

scale lux

TIME

register

ion Time effective

bits

328

655

1310

2621

5243

10486

20972

41943

83886

Effective Resolution in lux

0

1

600us

1 ms

9

640 m

320 m

160 m

80 m

1.28

640 m

320 m

160 m

80 m

40 m

20 m

10 m

5 m

2.56

1.28

5.12

2.56

10.24

5.12

20.48

10.24

5.12

40.96

20.48

10.24

5.12

81.92

40.96

20.48

10.24

5.12

163.84

81.92

40.98

20.48

10.24

5.12

10

11

12

13

14

15

16

17

18

19

20

2

1.8 ms

3.4 ms

6.5 ms

12.7 ms

25 ms

640 m

320 m

160 m

80 m

40 m

20 m

10 m

5 m

1.28

2.56

3

640 m

320 m

160 m

80 m

40 m

20 m

10 m

5 m

1.28

2.56

4

40 m

640 m

320 m

160 m

80 m

40 m

20 m

10 m

5 m

1.28

2.56

5

20 m

640 m

320 m

160 m

80 m

40 m

20 m

10 m

1.28

2.56

6

10 m

640 m

320 m

160 m

80 m

40 m

20 m

1.28

2.56

7

50 ms

5 m

640 m

320 m

160 m

80 m

40 m

1.28

8

100 ms

200 ms

400 ms

800 ms

2.5 m

1.25 m

640 m

320 m

160 m

80 m

9

2.5 m

10

11

0.625 m 1.25 m

2.5 m

0.3125 m 0.625 m 1.25 m

2.5 m

表8-6. Resolution Table for the SOT-5X3 variant

EXPONE

NT

0

1

2

3

4

5

6

7

8

CONVE

RSION_ Convers

TIME

register

MANTES

SA

ion Time effective

bits

Full-

scale lux

459

918

1835

3670

7340

14680

29360

58720

117441

Effective Resolution in lux

0

1

600 us

1 ms

9

896 m

448 m

224 m

112 m

56 m

1.792

896 m

448 m

224 m

112 m

56 m

3.584

1.792

896 m

448 m

224 m

112 m

56 m

7.168

3.584

1.792

896 m

448 m

224 m

112 m

56 m

14.336

7.168

3.584

1.792

896 m

448 m

224 m

112 m

56 m

28.672

14.336

7.168

3.584

1.792

896 m

448 m

224 m

112 m

56 m

47.344 114.688 229.376

10

11

12

13

14

15

16

17

18

19

20

28.672

14.336

7.168

3.584

1.792

896 m

448 m

224 m

112 m

56 m

47.344 114.688

2

1.8 ms

3.4 ms

6.5 ms

12.7 ms

25 ms

28.672

14.336

7.168

3.584

1.792

896 m

448 m

224 m

112 m

56 m

47.344

28.672

14.336

7.168

3

4

5

28 m

6

14 m

28 m

3.584

7

50 ms

7 m

14 m

28 m

1.792

8

100 ms

200 ms

400 ms

800 ms

3.5 m

1.75 m

0.875 m

7 m

14 m

28 m

896 m

448 m

224 m

112 m

9

3.5m

7 m

14 m

28 m

10

11

1.75m

3.5 m

7 m

14 m

28 m

0.4375 m 0.875 m 1.75 m

3.5 m

7 m

14 m

28 m

8.5 Programming

The OP4001 supports the transmission protocol for standard mode (up to 100 kHz), fast mode (up to 400 kHz),

and high-speed mode (up to 2.6 MHz). Fast and standard modes are described as the default protocol, referred

to as F/S. High-speed mode is described in the High-Speed I2C Mode section.

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8.5.1 I²C Bus Overview

The OPT4001 offers compatibility with both I²C and SMBus interfaces. The I²C and SMBus protocols are

essentially compatible with one another. The I²C interface is used throughout this document as the primary

example with the SMBus protocol specified only when a difference between the two protocols is discussed.

The device is connected to the bus with two pins: an SCL clock input pin and an SDA open-drain bidirectional

data pin. The bus must have a controller device that generates the serial clock (SCL), controls the bus access,

and generates start and stop conditions. To address a specific device, the controller initiates a start condition by

pulling the data signal line (SDA) from a high logic level to a low logic level while SCL is high. All targets on the

bus shift in the target address byte on the SCL rising edge, with the last bit indicating whether a read or write

operation is intended. During the ninth clock pulse, the target being addressed responds to the controller by

generating an acknowledge bit by pulling SDA low.

Data transfer is then initiated and eight bits of data are sent, followed by an acknowledge bit. During data

transfer, SDA must remain stable while SCL is high. Any change in SDA while SCL is high is interpreted as a

start or stop condition. When all data are transferred, the controller generates a stop condition, indicated by

pulling SDA from low to high while SCL is high. The device includes a 28-ms timeout on the I²C interface to

prevent locking up the bus. If the SCL line is held low for this duration of time, the bus state machine is reset.

8.5.1.1 Serial Bus Address

To communicate with the OPT4001, the controller must first initiate an I²C start command. Then, the controller

must address target devices via a target address byte. The target address byte consists of a seven bit address

and a direction bit that indicates whether the action is to be a read or write operation.

For the SOT 5X3 variant, four I²C addresses are possible by connecting the ADDR pin to one of four pins: GND,

VDD, SDA, or SCL. Table below summarizes the possible addresses with the corresponding ADDR pin

configuration. The state of the ADDR pin is sampled on every bus communication and must be driven or

connected to the desired level before any activity on the interface occurs.

ADDR PIN CONNECTION

DEVICE I²C ADDRESS

GND

VDD

SDA

SCL

1000100

1000101

1000110

1000101

In case of the PicoStar^™variant there is no target address selection capability and the device address is hard

coded to 1000101b (0x45).

8.5.1.2 Serial Interface

The OPT4001 operates as a target device on both the I²C bus and SMBus. Connections to the bus are made via

the SCL clock input line and the SDA open-drain I/O line. The device supports the transmission protocol for

standard mode (up to 100 kHz), fast mode (up to 400 kHz), and high-speed mode (up to 2.6 MHz). All data bytes

are transmitted most-significant bits first.

The SDA and SCL pins feature integrated spike-suppression filters and Schmitt triggers to minimize the effects

of input spikes and bus noise. See the 节9.2.1 for further details of the I²C bus noise immunity.

8.5.2 Writing and Reading

Accessing a specific register on the OPT4001 is accomplished by writing the appropriate register address during

the I²C transaction sequence. Refer to 节 8.6 for a complete list of registers and their corresponding register

addresses. The value for the register address (as shown in 图 8-5) is the first byte transferred after the target

address byte with the R/W bit low.

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1

9

1

9

SCL

A0

or

1

A1

or

0

RA RA RA RA RA RA RA RA

SDA

1

0

1

R/W

7

6

5

4

3

2

1

0

A1 A0 for SOT-5X3 package only

Stop by

Controller

(optional)

Start by

Controller

ACK by

Device

ACK by

Device

Frame 1: Two-Wire Slave Address Byte ⁽¹⁾

Frame 2: Register Address Byte

图8-5. Setting the I²C Register Address

Writing to a register begins with the first byte transmitted by the controller. This byte is the target address with

the R/W bit low. The device then acknowledges receipt of a valid address. The next byte transmitted by the

controller is the address of the register that data are to be written to. The next two bytes are written to the

register addressed by the register address. The device acknowledges receipt of each data byte. The controller

can terminate the data transfer by generating a start or stop condition.

When reading from the device, the last value stored in the register address by a write operation determines

which register is read during a read operation. To change the register address for a read operation, a new partial

I²C write transaction must be initiated. This partial write is accomplished by issuing a target address byte with

the R/W bit low, followed by the register address byte and a stop command. The controller then generates a start

condition and sends the target address byte with the R/W bit high to initiate the read command. The next byte is

transmitted by the terget and is the most significant byte of the register indicated by the register address. This

byte is followed by an acknowledge from the controller; then the target transmits the least significant byte. The

controller acknowledges receipt of the data byte. The controller can terminate the data transfer by generating a

not-acknowledge after receiving any data byte, or by generating a start or stop condition. If repeated reads from

the same register are desired, continually sending the register address bytes is not necessary; the device retains

the register address until that number is changed by the next write operation.

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图 8-6 and 图 8-7 show the write and read operation timing diagrams, respectively. Note that register bytes are

sent most significant byte first, followed by the least significant byte.

1

9

1

9

1

9

1

9

SCL

SDA

A0

or

1

A1

or

0

RA RA RA RA RA RA RA RA

1

0

1

R/W

D15 D14 D13 D12 D11 D10 D9 D8

D7 D6 D5 D4 D3 D2 D1 D0

7

6

5

4

3

2

1

0

Start by

Controller

ACK by

Device

ACK by

Device

ACK by

Device

Stop by

Controller

ACK by

Device

A1 A0 for SOT-5X3 package only

Frame 1 Two-Wire Slave Address Byte ⁽¹⁾

Frame 2 Register Address Byte

Frame 3 Data MSByte

Frame 4 Data LSByte

图8-6. I²C Write Example

1

9

1

9

1

9

SCL

SDA

A1

or

0

A0

or

1

R/W

1

0

1

D15 D14 D13 D12 D11 D10 D9 D8

D7 D6 D5 D4 D3 D2 D1 D0

No ACK

by

Controller(2)

Stop by

Controller

Start by

Controller

ACK by

Device

From

Device

ACK by

Controller

A1 A0 for SOT-5X3 package only

From Device

Frame 1 Two-Wire Slave Address Byte ⁽¹⁾

Frame 2 Data MSByte

Frame 3 Data LSByte

A. An ACK by the controller can also be sent.

图8-7. I²C Read Example

8.5.2.1 High-Speed I²C Mode

When the bus is idle, both the SDA and SCL lines are pulled high by the pullup resistors or active pullup devices.

The controller generates a start condition followed by a valid serial byte containing the high-speed (HS)

controller code 0000 1XXXb. This transmission is made in either standard mode or fast mode (up to 400 kHz).

The device does not acknowledge the HS controller code but does recognize the code and switches its internal

filters to support a 2.6-MHz operation.

The controller then generates a repeated start condition (a repeated start condition has the same timing as the

start condition). After this repeated start condition, the protocol is the same as F/S mode, except that

transmission speeds up to 2.6 MHz are allowed. Instead of using a stop condition, use repeated start conditions

to secure the bus in HS mode. A stop condition ends the HS mode and switches all internal filters of the ddevice

to support the F/S mode.

8.5.2.2 Burst Read Mode

OPT4001 supports I²C burst read mode which helps in minimizing the number of transactions on the bus for

efficient data transfer from the device to the controller.

Before considering the burst mode, a regular I²C read transaction involves an I²C write operation to the device

read pointer, followed by the actual I²C read operation. If the output registers and FIFO registers which are in

continuous locations, are writing the register pointer every 2 bytes, this takes up several clock cycles. With the

burst mode enabled, the read pointer address is auto incremented after every register read (2 bytes), eliminating

the need write operations to set the pointer for subsequent register reads.

Burst mode can be enabled by setting the register I2C_BURST. When a STOP command is issued the pointer

resets to the original register address before the auto-increments.

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Register Write Operation

Register

Address

data[15:8]

Target Address

data[7:0]

W

Register Read Operation

Register

Address

Target Address

data[15:8]

data[7:0]

R

Target Address

W

pointer set

Register Address

Register

Address

Target Address

data[15:8]

Target Address W

Register Address+2

data[15:8]

Register Address+1

Start

data[15:8]

data[7:0]

Stop

Register Address+4

data[15:8]

data[7:0]

Register Address+3

data[15:8]

Pointer reset to

Register Address

data[7:0]

pointer auto increments by 1 every 2 bytes

图8-8. I²C Operations

8.5.2.3 General-Call Reset Command

The I²C general-call reset allows the host controller in one command to reset all devices on the bus that respond

to the general-call reset command. The general call is initiated by writing to the I²C address 0 (0000 0000b). The

reset command is initiated when the subsequent second address byte is 06h (0000 0110b). With this transaction,

the device issues an acknowledge bit and sets all registers to the power-on-reset default condition.

8.5.2.4 SMBus Alert Response

The SMBus alert response provides a quick identification for which device issued the interrupt. Without this alert

response capability, the processor does not know which device pulled the interrupt line when there are multiple

target devices connected.

OPT4001 is designed to respond to the SMBus alert response address, when in the latched window-style

comparison mode. The OPT4001 does not respond to the SMBus alert response when in transparent mode.

The response behavior of the device to the SMBus alert response is shown in 图 8-9. When the interrupt line to

the processor is pulled to active, the controller can broadcast the alert response target address. Following this

alert response, any target devices that generated an alert identify themselves by acknowledging the alert

response and sending respective I²C address on the bus. The alert response can activate several different

target devices simultaneously. If more than one target attempts to respond, bus arbitration rules apply. The

device with the lowest address wins the arbitration. If the OPT4001 loses the arbitration, the device does not

acknowledge the I²C transaction and the INT pin remains in an active state, prompting the I²C controller

processor to issue a subsequent SMBus alert response. When the OPT4001 wins the arbitration, the device

acknowledges the transaction and sets the INT pin to inactive. The controller can issue that same command

again, as many times as necessary to clear the INT pin. See 节 8.4.2 for additional details of how the flags and

INT pin are controlled. The controller can obtain information about the source of the OPT4001 interrupt from the

address broadcast in the above process. The FLAG_H value is sent as the final LSB of the address to provide

the controller additional information about the cause of the OPT4001 interrupt. If the controller requires

additional information, the result register or the configuration register can be queried. The FLAG_H and FLAG_L

fields are not cleared upon an SMBus alert response.

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INT

1

9

1

9

SCL

SDA

FH⁽¹⁾

0

1

0

R/ W

1

0

1

A1

A0

Start By

ACK By

Device

From

Device

NACK By

Controller

Stop By

Controller

Frame 2 Target Address Byte⁽²⁾

Frame 1 SMBus ALERT Response Address Byte

A. FH is the FLAG_H register

B. A1 and A0 are determined by the ADDR pin (only on SOT-5X3 version)

图8-9. Timing Diagram for SMBus Alert Response

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8.6.1 ALL Register Map

8.6.1.1 Register 0h (offset = 0h) [reset = 0h]

图8-11. Register 0h

15

7

14

6

13

5

12

11

10

2

9

1

8

0

EXPONENT

R-0h

RESULT_MSB

R-0h

4

3

RESULT_MSB

R-0h

LEGEND: R/W = Read/Write; W = Write only; -n = value after reset

图8-12. Register 00 Field Descriptions

Bit

Field

Type

Reset

Description

EXPONENT output. Determines the full-scale range of the

light measurement. Used as a scaling factor for lux

calculation

15-12

EXPONENT

R

0h

Result register MSB (Most significant bits). Used to

calculate the MANTISSA representing light level within a

given EXPONENT or full-scale range

11-0

RESULT_MSB

R

0h

8.6.1.2 Register 1h (offset = 1h) [reset = 0h]

图8-13. Register 1h

15

14

13

12

11

10

2

9

1

8

0

RESULT_LSB

R-0h

7

6

5

4

3

COUNTER

R-0h

CRC

R-0h

LEGEND: R/W = Read/Write; W = Write only; -n = value after reset

图8-14. Register 01 Field Descriptions

Bit

Field

Type

Reset

Description

Result register LSB(Least significant bits). Used to

15-8

RESULT_LSB

R

0h

calculate MANTISSA representing light level within a given

EXPONENT or full-scale range

Sample counter. Rolling counter which increments for every

conversion

7-4

3-0

COUNTER

CRC

R

0h

CRC bits.

R[19:0]=MANTISSA=((RESULT_MSB<<8)+ RESULT_LSB

X[0]=XOR(E[3:0],R[19:0],C[3:0]) XOR of all bits

X[1]=XOR(C[1],C[3],R[1],R[3],R[5],R[7],R[9],R[11],R[13],R[1

5],R[17],R[19],E[1],E[3])

X[2]=XOR(C[3],R[3],R[7],R[11],R[15],R[19],E[3])

X[3]=XOR(R[3],R[11],R[19])

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8.6.1.3 Register 2h (offset = 2h) [reset = 0h]

图8-15. Register 2h

15

14

13

12

11

10

9

8

0

EXPONENT_FIFO0

R-0h

RESULT_MSB_FIFO0

R-0h

7

6

5

4

3

2

1

RESULT_MSB_FIFO0

R-0h

LEGEND: R/W = Read/Write; W = Write only; -n = value after reset

图8-16. Register 02 Field Descriptions

Bit

Field

Type

Reset

Description

EXPONENT register from FIFO 0

RESULT_MSB Register from FIFO 0

EXPONENT_FIF

O0

15-12

R

0h

RESULT_MSB_FI

FO0

11-0

R

0h

8.6.1.4 Register 3h (offset = 3h) [reset = 0h]

图8-17. Register 3h

15

14

13

12

11

10

2

9

1

8

0

RESULT_LSB_FIFO0

R-0h

7

6

5

4

3

COUNTER_FIFO0

R-0h

CRC_FIFO0

R-0h

LEGEND: R/W = Read/Write; W = Write only; -n = value after reset

图8-18. Register 03 Field Descriptions

Bit

Field

Type

Reset

Description

RESULT_LSB_FI

FO0

15-8

R

0h

RESULT_LSB Register from FIFO 0

COUNTER_FIFO

0

7-4

3-0

R

0h

COUNTER Register from FIFO 0

CRC Register from FIFO 0

CRC_FIFO0

8.6.1.5 Register 4h (offset = 4h) [reset = 0h]

图8-19. Register 4h

15

14

13

12

11

10

9

8

0

EXPONENT_FIFO1

R-0h

RESULT_MSB_FIFO1

R-0h

7

6

5

4

3

2

1

RESULT_MSB_FIFO1

R-0h

LEGEND: R/W = Read/Write; W = Write only; -n = value after reset

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图8-20. Register 04 Field Descriptions

Bit

Field

Type

Reset

Description

EXPONENT_FIF

O1

15-12

R

0h

EXPONENT register from FIFO 1

RESULT_MSB_FI

FO1

11-0

R

0h

RESULT_MSB Register from FIFO 1

8.6.1.6 Register 5h (offset = 5h) [reset = 0h]

图8-21. Register 5h

15

14

13

12

11

10

2

9

1

8

0

RESULT_LSB_FIFO1

R-0h

7

6

5

4

3

COUNTER_FIFO1

R-0h

CRC_FIFO1

R-0h

LEGEND: R/W = Read/Write; W = Write only; -n = value after reset

图8-22. Register 05 Field Descriptions

Bit

Field

Type

Reset

Description

RESULT_LSB_FI

FO1

15-8

R

0h

RESULT_LSB Register from FIFO 1

COUNTER_FIFO

1

7-4

3-0

R

0h

COUNTER Register from FIFO 1

CRC Register from FIFO 1

CRC_FIFO1

8.6.1.7 Register 6h (offset = 6h) [reset = 0h]

图8-23. Register 6h

15

14

13

12

11

10

9

8

0

EXPONENT_FIFO2

R-0h

RESULT_MSB_FIFO2

R-0h

7

6

5

4

3

2

1

RESULT_MSB_FIFO2

R-0h

LEGEND: R/W = Read/Write; W = Write only; -n = value after reset

图8-24. Register 06 Field Descriptions

Bit

Field

Type

Reset

Description

EXPONENT register from FIFO 2

RESULT_MSB Register from FIFO 2

EXPONENT_FIF

O2

15-12

R

0h

RESULT_MSB_FI

FO2

11-0

R

0h

8.6.1.8 Register 7h (offset = 7h) [reset = 0h]

图8-25. Register 7h

15

14

13

12

11

10

9

8

RESULT_LSB_FIFO2

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图8-25. Register 7h (continued)

R-0h

7

6

5

4

3

2

1

0

COUNTER_FIFO2

R-0h

CRC_FIFO2

R-0h

LEGEND: R/W = Read/Write; W = Write only; -n = value after reset

图8-26. Register 07 Field Descriptions

Bit

Field

Type

Reset

Description

RESULT_LSB_FI

FO2

15-8

R

0h

RESULT_LSB Register from FIFO 2

COUNTER_FIFO

2

7-4

3-0

R

0h

COUNTER Register from FIFO 2

CRC Register from FIFO 2

CRC_FIFO2

8.6.1.9 Register 8h (offset = 8h) [reset = 0h]

图8-27. Register 8h

15

14

13

12

11

10

9

8

0

THRESHOLD_L_EXPONENT

R/W-0h

THRESHOLD_L_RESULT

R/W-0h

7

6

5

4

3

2

1

THRESHOLD_L_RESULT

R/W-0h

LEGEND: R/W = Read/Write; W = Write only; -n = value after reset

图8-28. Register 08 Field Descriptions

Bit

Field

Type

Reset

Description

THRESHOLD_L_

EXPONENT

15-12

R/W

0h

Threshold low register exponent

Threshold low register result

THRESHOLD_L_

RESULT

11-0

R/W

0h

8.6.1.10 Register 9h (offset = 9h) [reset = BFFFh]

图8-29. Register 9h

15

14

13

12

11

10

9

8

0

THRESHOLD_H_EXPONENT

R/W-Bh

THRESHOLD_H_RESULT

R/W-Fh

7

6

5

4

3

2

1

THRESHOLD_H_RESULT

R/W-FFh

LEGEND: R/W = Read/Write; W = Write only; -n = value after reset

图8-30. Register 09 Field Descriptions

Bit

Field

Type

Reset

Description

THRESHOLD_H_

EXPONENT

15-12

R/W

Bh

Threshold high register exponent

30

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图8-30. Register 09 Field Descriptions (continued)

Bit

Field

Type

Reset

Description

THRESHOLD_H_

RESULT

11-0

R/W

FFFh

Threshold high register result

8.6.1.11 Register Ah (offset = Ah) [reset = 3208h]

图8-31. Register Ah

15

14

13

12

11

10

9

8

QWAKE

R/W-0h

0

RANGE

R/W-Ch

CONVERSION_TIME

R/W-2h

R/W-0h

7

6

5

4

3

2

1

0

CONVERSION_TIME

R/W-0h

OPERATING_MODE

R/W-0h

LATCH

R/W-1h

INT_POL

R/W-0h

FAULT_COUNT

R/W-0h

LEGEND: R/W = Read/Write; W = Write only; -n = value after reset

图8-32. Register 0A Field Descriptions

Bit

Field

QWAKE

0

Type

R/W

Reset

Description

Quick Wake-up from Standby in one shot mode by not

powering down all circuits. Applicable only in One-shot

mode and helps get out of standby mode faster with penalty

in power consumption compared to full standby mode.

15-15

14-14

0h

Must read or write 0

Controls the full-scale light level range of the device. The

format of this register is same as the EXPONENT register

for all values from 0 to 8. PicoStar^™variant:

0 : 328lux

1 : 655lux

2 : 1.3klux

3 : 2.6klux

4 : 5.2klux

5 : 10.5klux

6 : 21klux

7 : 42klux

8 : 83klux

13-10

RANGE

R/W

Ch

12 : Auto-Range

SOT-5X3 variant:

0 : 459lux

1 : 918lux

2 : 1.8klux

3 : 3.7klux

4 : 7.3klux

5 : 14.7klux

6 : 29.4klux

7 : 58.7klux

8 : 117.4klux

12 : Auto-range

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图8-32. Register 0A Field Descriptions (continued)

Bit

Field

Type

Reset

Description

Controls the device conversion time

0 : 600us

1 : 1ms

2 : 1.8ms

3 : 3.4ms

4 : 6.5ms

5 : 12.7ms

6 : 25ms

CONVERSION_TI

ME

9-6

R/W

8h

7 : 50ms

8 : 100ms

9 : 200ms

10 : 400ms

11 : 800ms

Controls device mode of operation

0 : Power-down

1 : Forced auto-range One-shot

2 : One-shot

OPERATING_MO

DE

5-4

R/W

0h

3 : Continuous

Controls the functionality of the interrupt reporting

mechanisms for INT pin for the threshold detection logic.

3-3

2-2

LATCH

R/W

1h

0h

Controls the polarity or active state of the INT pin.

0 : Active Low

INT_POL

1 : Active High

Fault count register instructs the device as to how many

consecutive fault events are required to trigger the

threshold mechanisms: the flag high (FLAG_H) and the flag

low (FLAG_L) registers.

1-0

FAULT_COUNT

R/W

0h

0 : One fault Count

1 : Two Fault Counts

2 : Four Fault Counts

3 : Eight Fault Counts

8.6.1.12 Register Bh (offset = Bh) [reset = 8011h]

图8-33. Register Bh

15

14

13

12

11

10

0

9

0

8

0

1

0

R/W-1h

R/W-0h

7

0

6

0

5

0

4

3

2

1

0

INT_DIR

R/W-1h

INT_CFG

R/W-0h

I2C_BURST

R/W-1h

R/W-0h

LEGEND: R/W = Read/Write; W = Write only; -n = value after reset

图8-34. Register 0B Field Descriptions

Bit

Field

Type

Reset

Description

15-5

1024

R/W

400h

Must read or write 1024

Determines the direction of the INT pin.

4-4

INT_DIR

R/W

1h

0 : Input

1 : Output

Controls the output interrupt mechanism after end of

conversion

0 : SMBUS Alert

1 : INT Pin asserted after every conversion

2: Invalid

3-2

1-1

INT_CFG

0

R/W

0h

3: INT pin asserted after every 4 conversions (FIFO full)

Must read or write 0

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图8-34. Register 0B Field Descriptions (continued)

Bit

Field

Type

Reset

Description

When set, enables I2C burst mode minimizing I2C read

cycles by auto incrementing read register pointer by 1 after

every register read

0-0

I2C_BURST

R/W

1h

8.6.1.13 Register Ch (offset = Ch) [reset = 0h]

图8-35. Register Ch

15

14

13

12

11

10

0

9

0

8

0

R/W-0h

7

0

6

0

5

0

4

0

3

2

1

0

OVERLOAD_F CONVERSION

FLAG_H

FLAG_L

LAG

_READY_FLAG

R/W-0h

R-0h

LEGEND: R/W = Read/Write; W = Write only; -n = value after reset

图8-36. Register 0C Field Descriptions

Bit

Field

Type

Reset

Description

15-4

0

R/W

0h

Must read or write 0

Indicates when an overflow condition occurs in the data

conversion process, typically because the light illuminating

the device exceeds the full-scale range.

OVERLOAD_FLA

G

3-3

2-2

R

0h

Conversion ready flag indicates when a conversion

completes. The flag is set to 1 at the end of a conversion

and is cleared (set to 0) when register address 0xC is either

read or written with any non-zero value

CONVERSION_R

EADY_FLAG

0 : Conversion in progress

1 : Conversion is complete

Flag high register identifies that the result of a conversion is

measurement than a specified level of interest. FLAG_H is

set to 1 when the result is larger than the level in the

THRESHOLD_H_EXPONENT and

THRESHOLD_H_RESULT registers for a consecutive

number of measurements defined by the FAULT_COUNT

register.

1-1

0-0

FLAG_H

FLAG_L

R

0h

Flag low register identifies that the result of a measurement

is smaller than a specified level of interest. FL is set to 1

when the result is smaller than the level in the

THRESHOLD_LOW_EXPONENT and

THRESHOLD_L_RESULT registers for a consecutive

number of measurements defined by the FAULT_COUNT

register.

8.6.1.14 Register 11h (offset = 11h) [reset = 121h]

图8-37. Register 11h

15

14

13

12

11

10

2

9

1

8

0

DIDL

R-0h

DIDH

R-1h

R/W-0h

7

6

5

4

3

DIDH

R-21h

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LEGEND: R/W = Read/Write; W = Write only; -n = value after reset

图8-38. Register 11 Field Descriptions

Bit

Field

0

Type

R/W

R

Reset

Description

15-14

13-12

11-0

0h

Must read or write 0

Device ID L

DIDL

DIDH

0h

R

121h

Device ID H

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9 Application and Implementation

备注

以下应用部分中的信息不属于TI 器件规格的范围，TI 不担保其准确性和完整性。TI 的客户应负责确定

器件是否适用于其应用。客户应验证并测试其设计，以确保系统功能。

9.1 Application Information

Ambient light sensors are used in a wide variety of applications that require precise measurement of light as

perceived by human eye, since they have a specialized filter that mimic human eye. The following sections

shows crucial information about integrating OPT4001 in applications.

9.2 Typical Application

9.2.1 Electrical Interface

The electrical interface is quite simple, as illustrated in 图 9-1 below. Connect the OPT4001 I²C SDA and SCL

pins to the same pins of an applications processor, micro controller, or other digital processor. If that digital

processor requires an interrupt resulting from an event of interest from theOPT4001, then connect the INT pin to

either an interrupt or general-purpose I/O pin of the processor (Only for the SOT-5X3). There are multiple uses

for this INT pin, including triggering a measurement on one-shot mode, signaling the system to wake up from

low-power mode, processing other tasks while waiting for an ambient light event of interest, or alerting the

processor that a sample is ready to be read.. Connect pullup resistors between a power supply appropriate for

digital communication and the SDA and SCL pins (because the pins have open-drain output structures). If the

INT pin is used, connect a pullup resistor to the INT pin. A typical value for these pullup resistors is 10 kΩ. The

resistor choice can be optimized in conjunction to the bus capacitance to balance the system speed, power,

noise immunity, and other requirements.

Short or Open

VIO: 1.6V to 5V

0.1uF

10k

VDD:1.6V to 3.6V

VDD

Ambient

Light

VIO

OPT4001_SDA

SDA

SCL

GPIO/TimerPin

INT

Only SOT-5X3

ADDR

Controller

GND

Micro Controller or Processor

GND

图9-1. Typical Application Schematic

The power supply and grounding considerations are discussed in the 节9.4.

Although spike suppression is integrated in the SDA and SCL pin circuits, use proper layout practices to

minimize the amount of coupling into the communication lines. One possible introduction of noise occurs from

capacitively coupling signal edges between the two communication lines themselves. Another possible noise

introduction comes from other switching noise sources present in the system, especially for long communication

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lines. In noisy environments, shield communication lines to reduce the possibility of unintended noise coupling

into the digital I/O lines that can be incorrectly interpreted.

9.2.1.1 Design Requirements

9.2.1.1.1 Optical Interface

The optical interface is physically located on the same side of the device pins as the electrical interface for the

PicoStar^™variant and facing away from the pins for the SOT-5X3 variant, as shown in 图9-2 and 图9-3

2

1

VDD

SDA

B

0.38

SCL

GND

A

图9-2. Sensor Position on PicoStar^™Variant

1

8

A

0.38

Section A

图9-3. Sensor Position on the SOT-5X3 Variant

In case of the PicoStar^™variant systems, light that illuminates the sensor must come through the FPCB.

Typically, the best method is to create a cutout area in the FPCB. Other methods are possible, but with

associated design tradeoffs. This cutout must be carefully designed because the dimensions and tolerances

impact the net-system, optical field-of-view performance. The design of this cutout is discussed more in the 节

9.5.2.

Physical components, such as a plastic housing and a window that allows light from outside of the design to

illuminate the sensor (see 图 9-4), can help protect the device and neighboring circuitry. Sometimes, a dark or

opaque window is used to further enhance the visual appeal of the design by hiding the sensor from view. This

window material is typically transparent plastic or glass.

Generally for both package variants, any physical component that affects the light that illuminates the sensing

area of a light sensor also affects the performance of that light sensor. Therefore, for the best performance,

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make sure to understand and control the effect of these components. Design a window width and height to

permit light from a sufficient field of view to illuminate the sensor. For best performance, use a field of view of at

least ±35°, or preferably ±45° or more. Understanding and designing the field of view is discussed further in

application report OPT3001: Ambient Light Sensor Application Guide (SBEA002).

The visible-spectrum transmission for dark windows typically ranges between 5% to 30%, but can be less than

1%. Specify a visible-spectrum transmission as low as, but no more than, necessary to achieve sufficient visual

appeal because decreased transmission decreases the available light for the sensor to measure. The windows

are made dark by either applying an ink to a transparent window material, or including a dye or other optical

substance within the window material itself. This attenuating transmission in the visible spectrum of the window

creates a ratio between the light on the outside of the design and the light that is measured by the device. To

accurately measure the light outside of the design, compensate the device measurement for this ratio.

Although the inks and dyes of dark windows serve their primary purpose of being minimally transmissive to

visible light, some inks and dyes can also be very transmissive to infrared light. The use of these inks and dyes

further decreases the ratio of visible to infrared light, and thus decreases sensor measurement accuracy.

However, because of the excellent red and infrared rejection of the device, this effect is minimized, and good

results are achieved under a dark window with similar spectral responses.

For best accuracy, avoid grill-like window structures, unless the designer understands the optical effects

sufficiently. These grill-like window structures create a nonuniform illumination pattern at the sensor that make

light measurement results vary with placement tolerances and angle of incidence of the light. If a grill-like

structure is desired, then the device is an excellent sensor choice because the device is minimally sensitive to

illumination uniformity issues disrupting the measurement process.

Light pipes can appear attractive for aiding in the optomechanical design that brings light to the sensor; however,

do not use light pipes with any light sensor unless the system designer fully understands the ramifications of the

optical physics of light pipes within the full context of his design and objectives.

9.2.1.2 Detailed Design Procedure

9.2.1.2.1 Optomechanical Design (PicoStar^™Variant)

After completing the electrical design and understanding optical interface, the next task is the optomechanical

design of the FPCB cutout. Design this cutout in conjunction with the tolerance capabilities of the FPCB

manufacturer. Or, conversely, choose the FPCB manufacturer for the capabilities of creating this cutout. A semi-

rectangular shape of the cutout, created with a standard FPCB laser, is presented here. There are many

alternate approaches with different cost, tolerance, and performance tradeoffs.

An image of the created FPCB with the plus shaped cutout and a rectangular shaped cutout is shown below.

The plus shape is a good choice for light collection in both directions with a wider field of view. In case of the

rectangular cutout shape, the long (vertical) direction of the cutout has minimal effect on the angular response

because any shadows created from the FPCB do not come near the sensor. The long cutout direction defines

the axis of rotation with the less restricted field of view. The narrow (horizontal) direction of the cutout, which is

limited by the electrical connections to OPT4001, can create shadows that can have a minor impact on the

angular response. The narrow cutout direction defines the axis of rotation of the more restricted view. The

possibility of shadows are illustrated in 图 9-6, a cross-sectional diagram showing the OPT4001 device, with the

sensing area, so ldered to the FPCB with the cutout. A circular cutout is more restrictive in the field of view

casting shadow from all directions of light. TI recommends to take in to account the effect of shadows and impact

of this on the field of view of the sensor. The product folder has application notes and tools to help understand

these artifacts.

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图9-4. Image of FPCB With OPT4001 Mounted, Receiving Light Through the Cutout with a Plus Shape

图9-5. Image of FPCB With OPT4001 Mounted, Receiving Light Through the Cutout with a Rectangular

Shape

Device

Illuminated

Sensor

Shadowed

Sensor

Copper Pillar Electrical Connection

Solder

Sensing Area

Shadow

FPCB

Shadow Limiting

Point

Light entering from

30 degree angle

图9-6. Cross-Sectional Diagram of OPT4001 Soldered to an FPCB With a Cutout, Including Light

Entering From an Angle

There can be an additional need to put a product casing over the assembly of the device and the FPCB. The

window sizing and placement for such an assembly is discussed in more rigorous detail in application report

OPT3001: Ambient Light Sensor Application Guide (SBEA002).

9.2.1.2.2 Optomechanical Design (SOT-5X3 Variant)

After completing the electrical design, the next task is the optomechanical design. Window sizing and placement

is discussed in more rigorous detail in OPT3001: Ambient Light Sensor Application Guide.

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9.2.1.3 Application Curves (PicoStar^™Variant)

图 9-7 and 图 9-8 show example response curves of the device for a rectangular cut out hole as shown in 图

9-13. The shape of the cutout affects the overall light collection and the field of view can clearly be seen.

1

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0

1

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0

-90 -75 -60 -45 -30 -15

0

Incidence Angle (Degrees)

15 30 45 60 75 90

-90 -75 -60 -45 -30 -15

0

Incidence Angle (Degrees)

15 30 45 60 75 90

D010

D022

图9-7. Angular Response of this FPCB Design

图9-8. Angular Response of this FPCB Design

Along the Less-Restricted Rotational Axis

Along the More-Restricted Rotational Axis

9.3 Do's and Don'ts

As with any optical product, take special care when handling the OPT4001. In case of the PicoStar^™variant, the

device is a piece of active silicon, without the mechanical protection of an epoxy-like package or other

reinforcement. This design allows the device to be as thin as possible. Take extra care to handle the device

gently to not crack or break the device. Use a properly-sized vacuum manipulation tool to handle the device.

Generally for both package variants, the optical surface of the device must be kept clean for the best

performance, both when prototyping with the device, and during mass production manufacturing procedures.

Keep the optical surface clean of fingerprints, dust, and other optical-inhibiting contaminants.

If the optical surface of the device requires cleaning, then use a few gentle brushes with a soft swab of deionized

water or isopropyl alcohol. Avoid potentially abrasive cleaning and manipulating tools and excessive force that

can scratch the optical surface.

If the OPT4001 performs less than excellent, then inspect the optical surface for dirt, scratches, or other optical

artifacts.

9.4 Power Supply Recommendations

Although the OPT4001 has low sensitivity to power-supply issues, good practices are always recommended. For

best performance, the device VDD pin must have a stable, low-noise power supply with a 100-nF bypass

capacitor close to the device and solid grounding. There are many options for powering the device because of

the device low current consumption levels.

9.5 Layout

9.5.1 Layout Guidelines

Before understanding the layout requirement for OPT4001, understanding the placement on the PCB is critical.

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OPT4001

SOT-5X3

0.2mm thickness

OPT4001 PicoStar^TM

Hole

FPCB

PCB

1.2mm thickness

图9-9. Placement Side View of Packages

In case of the SOT-5X3 package variant the device, since the lighting sensitive area and the device pins are on

opposite sides of each other, a conventional placement on the PCB makes sure of good light collection. In case

of the PicoStar^™variant of the device, since the light sensitive area and the device pins are on the same side,

special arrangement as shown in the figure is required to achieve good light collection. Typically a thin flexible

PCB with a hole or a cutout centered around the optical area is required for wide angle light collection for the

PicoStar^™variant. A regular PCB can be used but the amount of light collected and the field of view of light

collection are not very good and generally not recommended. Cut out for the light collection can be of any shape

with large enough opening to let ample light fall on the light sensitive area. 图 9-12 and 图 9-13 show examples

of two such shapes which help maximize light collection. A circular cut out as much larger as the manufacturing

allows is also acceptable but can restrict the field of view and reduce the light collection. Tools and

documentation are available on TI product folder to estimate the field of view based on the hole size.

Placing the decoupling capacitor close to the device is highly recommended at the same time, note that optically

reflective surfaces of components also affect the performance of the design. The three-dimensional geometry of

all components and structures around the sensor must be taken into consideration to prevent unexpected results

from secondary optical reflections. Placing capacitors and components at a distance of at least twice the height

of the component is usually sufficient. The best optical layout is to place all close components on the opposite

side of the PCB from the OPT4001. However, this approach is not be practical for the constraints of every

design.

The device layout is also critical for good SMT assembly. Two types of land pattern pads can be used for this

package: solder mask defined pads (SMD) and non-solder mask defined pads (NSMD). SMD pads have a

solder mask opening that is smaller than the metal pads, whereas NSMD has a solder mask opening that is

larger than the metal pad. 图 9-10 illustrates these types of landing-pattern pads. SMD is preferred because

SMD provides a more accurate soldering-pad dimension with the trace connections. For further discussion of

SMT and PCB recommendations, see the Soldering and Handling Recommendations.

图9-10. Soldermask Defined Pad (SMD) and Non-Soldermask Defined Pad (NSMD)

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9.5.2 Layout Example

VDD

ADDR

NC

SDA

INT

VDD

GND

NC

VSS

SCL

图9-11. Layout Example for SOT-5X3 package

GND

SCL

A1

A2

+ shape Cut-out

for

Light Collection

B2

B1

SDA

VDD

图9-12. Layout Example with a plus shaped cut out

SCL

GND

VDD

A2

A1

Rectangular Cut-out

for

Light Collection

B1

B2

SDA

图9-13. Layout Example with a rectangular shaped cut out

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9.5.2.1 Soldering and Handling Recommendations (SOT-5X3 Variant)

The OPT4001 has been qualified for three soldering reflow operations per JEDEC JSTD-020.

Note that excessive heat can discolor the device and affect optical performance.

See application report SLUA271, QFN/SON PCB Attachment, for details on soldering thermal profile and other

information. If the OPT4001 must be removed from a PCB, discard the device and do not reattach.

As with most optical devices, handle the device with special care to make sure that optical surfaces stay clean

and free from damage. See 节 9.3 for more detailed recommendations. For best optical performance, solder flux

and any other possible debris must be cleaned after soldering processes.

备注

The bottom side of the device features an angled feature to denote the PIN 1

图9-14. Identification Feature for PIN 1

图9-15. Identification Features for PIN 1 on Package

9.5.2.2 Soldering and Handling Recommendations (PicoStar^™Variant)

The OPT4001 is a small device with special soldering and handling considerations. See 节 9.2.1.2.1 for

implications of alignment between the device and the cutout area. See 节 9.5.1 for considerations of the

soldering pads.

If the OPT4001 must be removed from a PCB, discard the device and do not reattach.

Note that excessive heat can discolor the device and affect optical performance.

As with most optical devices, handle the OPT4001 with special care to make sure that optical surfaces stay

clean and free from damage. See 节 9.3 for more detailed recommendations. For best optical performance,

solder flux and any other possible debris must be cleaned after soldering processes.

9.5.2.2.1 Solder Paste

For solder-paste deposition, use a stencil-printing process that involves the transfer of solder paste through

predefined apertures with the application of pressure. Stencil parameters, such as aperture area ratio and

fabrication process, have a significant impact on paste deposition. Cut the stencil apertures using a laser with an

electropolish-fabrication method. Taper the stencil aperture walls by 5° to facilitate paste release. Shifting the

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solder-paste towards the outside of the device minimizes the possibility of solder getting into the device sensing

area. See the mechanical packages attached to the end of this data sheet.

Use solder paste selection type 4 or higher, no-clean, lead-free solder paste. If solder splatters in the reflow

process, choose a solder paste with normal- or low-flux contents, or alter the reflow profile per the 节9.5.2.2.3.

9.5.2.2.2 Package Placement

Use a pick-and-place nozzle with a size number larger than 0.6 mm. If the placement method is done by

programming the component thickness, then add 0.04 mm to the actual component thickness so that the

package sits halfway into the solder paste. If placement is by force, then choose minimum force no larger than

3N to avoid forcing out solder paste, or free falling the package, and to avoid soldering problems such as

bridging and solder balling.

9.5.2.2.3 Reflow Profile

Use the profile in 图 9-16, and adjust if necessary. Use a slow solder reflow ramp rate of 1°C to 1.2°C/s to

minimize chances of solder splattering onto the sensing area.

图9-16. Recommended Solder Reflow Temperature Profile

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9.5.2.2.4 Special Flexible Printed-Circuit Board (FPCB) Recommendations

Special flexible printed-circuit board (FPCB) design recommendations include:

• Fabricate per IPC-6013.

• Use material of flexible copper clad per IPC 4204/11 (Define polyimide and copper thickness per product

application).

• Finish: All exposed copper are electroless Ni immersion gold (ENIG) per IPC 4556.

• Solder mask per IPC SM840.

• Use a laser to create the cutout for light sensing for better accuracy, and to avoid affecting the soldering pad

dimension. Other options, such as punched cutouts, are possible. See the 节9.2.1.2.1 for further discussion

ranging from the implications of the device to cutout region size and alignment. The full design must be

considered, including the tolerances.

To assist the handling of the very thin flexible circuit, design and fabricate a fixture to hold the flexible circuit

through the paste-printing, pick-and-place, and reflow processes. Contact the factory for examples of such

fixtures.

9.5.2.2.5 Rework Process

If the device must be removed from a PCB, discard the device and do not reattach. To remove the package from

the PCB/Flexi cable, heat the solder joints above liquidus temperature. Bake the board at 125°C for 4 hours prior

to rework to remove moisture that may crack the PCB or causing delamination. Use a thermal heating profile to

remove a package that is close to the profile that mounts the package. Clean the site to remove any excess

solder and residue to prepare for installing a new package. Use a mini stencil (localized stencil) to apply solder

paste to the land pattern. In case a mini stencil cannot be used because of spacing or other reasons, apply

solder paste on the package pads directly, then mount, and reflow.

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10 Device and Documentation Support

10.1 Documentation Support

10.1.1 Related Documentation

For related documentation see the following:

• OPT3001: Ambient Light Sensor Application Guide (SBEA002)

• OPT4001EVM User's Guide (SBOU278)

• QFN/SON PCB Attachment Application Report (SLUA271)

10.2 接收文档更新通知

要接收文档更新通知，请导航至 ti.com 上的器件产品文件夹。点击订阅更新进行注册，即可每周接收产品信息更

改摘要。有关更改的详细信息，请查看任何已修订文档中包含的修订历史记录。

10.3 支持资源

TI E2E^™支持论坛是工程师的重要参考资料，可直接从专家获得快速、经过验证的解答和设计帮助。搜索现有解

答或提出自己的问题可获得所需的快速设计帮助。

链接的内容由各个贡献者“按原样”提供。这些内容并不构成 TI 技术规范，并且不一定反映 TI 的观点；请参阅

TI 的《使用条款》。

10.4 Trademarks

PicoStar^™, Picostar^™, and TI E2E^™are trademarks of Texas Instruments.

所有商标均为其各自所有者的财产。

10.5 Electrostatic Discharge Caution

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled

with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may

be more susceptible to damage because very small parametric changes could cause the device not to meet its published

specifications.

10.6 术语表

TI 术语表

本术语表列出并解释了术语、首字母缩略词和定义。

11 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most

current data available for the designated devices. This data is subject to change without notice and revision of

this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

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PACKAGE MATERIALS INFORMATION

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10-Jan-2022

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device

Package Package Pins

Type Drawing

SPQ

Reel

A0

B0

K0

P1

W

Pin1

Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant

(mm) W1 (mm)

OPT4001YMNR

OPT4001YMNT

PICOST

AR

YMN

4

3000

250

180.0

8.4

0.94

1.15

0.37

2.0

8.0

Q1

PICOST

AR

180.0

8.4

0.94

1.15

0.37

2.0

8.0

Q1

Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION

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10-Jan-2022

*All dimensions are nominal

Device

Package Type Package Drawing Pins

SPQ

Length (mm) Width (mm) Height (mm)

OPT4001YMNR

OPT4001YMNT

PICOSTAR

YMN

4

3000

250

182.0

20.0

Pack Materials-Page 2

PACKAGE OUTLINE

FCSOT - 0.6 mm max height

FLIPCHIP SOT

DTS0008A

1.3

1.1

B

A

PIN 1

INDEX AREA

1

8

7

6X (0.5)

2

3

2.2

2.0

6

5

4

0.27

8X

0.17

0.1

C A B

C

2.0

1.8

0.05

SEATING PLANE

0.18

0.08

C

0.6 MAX

0.45

8X

0.05

0.00

0.25

4

5

6

7

8

3

2

1

0.05 C

4226132/B 07/2021

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing

per ASME Y14.5M.

2. This drawing is subject to change without notice.

3. Body dimensions do not incude mold flash, protrusions or gate burrs.

Mold flash, interlead flash, protrusions or gate burrs shall not exceed 0.15 per end or side

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EXAMPLE BOARD LAYOUT

FCSOT - 0.6 mm max height

FLIPCHIP SOT

DTS0008A

(1.72)

8X (0.72)

8X (0.3)

1

8

7

6

2

3

SYMM

6X (0.5)

5

4

SYMM

(R0.05) TYP

LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN

SCALE: 30X

METAL UNDER

SOLDER MASK

OPENING

SOLDER MASK

OPENING

METAL

NON SOLDER MASK

DEFINED

(PREFERRED)

SOLDER MASK

DEFINED

SOLDER MASK DETAILS

4226132/B 07/2021

NOTES: (continued)

4. Publication IPC-7351 may have alternate designs.

5. Solder mask tolerances between and around signal pads can vary based on board fabrication site.

www.ti.com

EXAMPLE STENCIL DESIGN

FCSOT - 0.6 mm max height

FLIPCHIP SOT

DTS0008A

(1.72)

8X (0.72)

1

8

7

8X (0.3)

2

3

SYMM

6

5

6X (0.5)

4

SYMM

(R0.05) TYP

SOLDER PASTE EXAMPLE

BASED ON 0.125 mm THICK STENCIL

SCALE: 30X

4226132/B 07/2021

NOTES: (continued)

6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate

design recommendations.

7. Board assembly site may have different recommendations for stencil design.

www.ti.com

PACKAGE OUTLINE

YMN0004A

PicoStar ^TM- 0.226 mm max height

S

C

A

L

E

1

5

.

0

PicoStar

0.87

0.81

B

A

PIN A1

CORNER

1.08

1.02

C

0.226 MAX

0.0087 TYP

SEATING PLANE

0.007

OPTICAL FILTER

(0.397)

(0.04) TYP

SENSING AREA

PULL BACK

NO CONNECT

PAD

B

SENSING AREA

(0.286)

PKG

0.83

TYP

(0.314)

D: Max = 1.08 mm, Min = 1.02 mm

(0.743)

E: Max = 0.87 mm, Min = 0.81 mm

0.415

TYP

NO CONNECT

PAD

A

0.18

0.12

4X

1

2

(0.478)

0.62

0.015

C A B

OPTICAL FILTER

4226006/A 06/2020

PicoStar is a trademark of Texas Instruments.

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing

per ASME Y14.5M.

2. This drawing is subject to change without notice.

www.ti.com

EXAMPLE BOARD LAYOUT

YMN0004A

PicoStar ^TM- 0.226 mm max height

PicoStar

(0.93)

(0.31) TYP

(

0.15) TYP

SOLDER MASK

OPENING

1

2

A

PCB CUTOUT

(REFER TO THE LAYOUT GUIDELINES

SECTION OF THE DATASHEET)

SYMM

(0.83) TYP

ALTERNATE PCB

CUT OUT SHAPE

B

(

0.25)

METAL UNDER

SOLDER MASK

SYMM

LAND PATTERN EXAMPLE

SCALE: 55X

4226006/A 06/2020

NOTES: (continued)

3. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints.

For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271).

www.ti.com

EXAMPLE STENCIL DESIGN

YMN0004A

PicoStar ^TM- 0.226 mm max height

PicoStar

(0.315)

TYP

PCB CUT OUT

(0.21)

TYP

2

1

A

ALTERNATE PCB

CUT OUT

SYMM

(0.83)

TYP

4X SOLDER MASK

OPENING

B

(R0.05)

TYP

SYMM

4X METAL UNDER

SOLDER MASK

SOLDER PASTE EXAMPLE

BASED on 0.075 mm THICK STENCIL

SCALE: 55X

4226006/A 06/2020

NOTES: (continued)

4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release.

www.ti.com

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型号：	OPT4001YMNT
厂家：	TEXAS INSTRUMENTS
描述：	高速高精度数字环境光传感器 (ALS) \| YMN \| 4 \| -40 to 85 传感器
文件：	总56页 (文件大小：2726K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

OPT4001YMNT [TI]

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