PCA9306_08 [TI]
DUAL BIDIRECTIONAL I2C BUS AND SMBus VOLTAGE-LEVEL TRANSLATOR; 双路双向I2C总线和SMBus电压电平转换
| 型号： | PCA9306_08 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | DUAL BIDIRECTIONAL I2C BUS AND SMBus VOLTAGE-LEVEL TRANSLATOR |
| 文件： | 总16页 (文件大小：421K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PCA9306
www.ti.com ....................................................................................................................................................... SCPS113I–OCTOBER 2004–REVISED JULY 2008
DUAL BIDIRECTIONAL I2C BUS AND SMBus
VOLTAGE-LEVEL TRANSLATOR
1
FEATURES
•
2-Bit Bidirectional Translator for SDA and SCL
•
•
•
•
Lock-Up-Free Operation for Isolation When
EN = Low
Lines in Mixed-Mode I2C Applications
•
•
I2C and SMBus Compatible
Flow-Through Pinout for Ease of Printed
Circuit Board Trace Routing
Less Than 1.5-ns Maximum Propagation Delay
to Accommodate Standard-Mode and
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
Fast-Mode I2C Devices and Multiple Masters
•
Allows Voltage-Level Translator Between
ESD Protection Exceeds JESD 22
–
1.2-V VREF1 and 1.8-V, 2.5-V, 3.3-V,
or 5-V VREF2
–
–
–
2000-V Human-Body Model (A114-A)
200-V Machine Model (A115-A)
–
–
–
1.8-V VREF1 and 2.5-V, 3.3-V, or 5-V VREF2
2.5-V VREF1 and 3.3-V or 5-V VREF2
3.3-V VREF1 and 5-V VREF2
1000-V Charged-Device Model (C101)
DCT OR DCU PACKAGE
(TOP VIEW)
•
•
Provides Bidirectional Voltage Translation
With No Direction Pin
EN
1
2
3
4
8
7
6
5
GND
Low 3.5-Ω ON-State Connection Between Input
and Output Ports Provides Less Signal
Distortion
Open-Drain I2C I/O Ports (SCL1, SDA1, SCL2,
and SDA2)
5-V Tolerant I2C I/O Ports to Support
Mixed-Mode Signal Operation
VREF1
VREF2
SCL1
SDA1
SCL2
SDA2
•
•
•
High-Impedance SCL1, SDA1, SCL2, and SDA2
Pins for EN = Low
DESCRIPTION/ORDERING INFORMATION
This dual bidirectional I2C and SMBus voltage-level translator, with an enable (EN) input, is operational from
1.2-V to 3.3-V VREF1 and 1.8-V to 5.5-V VREF2
.
The PCA9306 allows bidirectional voltage translations between 1.2 V and 5 V, without the use of a direction pin.
The low ON-state resistance (ron) of the switch allows connections to be made with minimal propagation delay.
When EN is high, the translator switch is ON, and the SCL1 and SDA1 I/O are connected to the SCL2 and SDA2
I/O, respectively, allowing bidirectional data flow between ports. When EN is low, the translator switch is off, and
a high-impedance state exists between ports.
In I2C applications, the bus capacitance limit of 400 pF restricts the number of devices and bus length. Using the
PCA9306 enables the system designer to isolate two halves of a bus; thus, more I2C devices or longer trace
length can be accommodated.
The PCA9306 also can be used to run two buses, one at 400-kHz operating frequency and the other at 100-kHz
operating frequency. If the two buses are operating at different frequencies, the 100-kHz bus must be isolated
when the 400-kHz operation of the other bus is required. If the master is running at 400 kHz, the maximum
system operating frequency may be less than 400 kHz because of the delays added by the repeater.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2004–2008, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
PCA9306
SCPS113I–OCTOBER 2004–REVISED JULY 2008....................................................................................................................................................... www.ti.com
As with the standard I2C system, pullup resistors are required to provide the logic high levels on the translator's
bus. The PCA9306 has a standard open-collector configuration of the I2C bus. The size of these pullup resistors
depends on the system, but each side of the repeater must have a pullup resistor. The device is designed to
work with standard-mode and fast-mode I2C devices, in addition to SMBus devices. Standard-mode I2C devices
only specify 3 mA in a generic I2C system where standard-mode devices and multiple masters are possible.
Under certain conditions, high termination currents can be used.
When the SDA1 or SDA2 port is low, the clamp is in the ON state, and a low resistance connection exists
between the SDA1 and SDA2 ports. Assuming the higher voltage is on the SDA2 port when the SDA2 port is
high, the voltage on the SDA1 port is limited to the voltage set by VREF1. When the SDA1 port is high, the SDA2
port is pulled to the drain pullup supply voltage (VDPU) by the pullup resistors. This functionality allows a
seamless translation between higher and lower voltages selected by the user, without the need for directional
control. The SCL1/SCL2 channel also functions as the SDA1/SDA2 channel.
All channels have the same electrical characteristics, and there is minimal deviation from one output to another in
voltage or propagation delay. This is a benefit over discrete transistor voltage translation solutions, since the
fabrication of the switch is symmetrical. The translator provides excellent ESD protection to lower-voltage devices
and at the same time protects less ESD-resistant devices.t
ORDERING INFORMATION
TA
PACKAGE(1)(2)
ORDERABLE PART NUMBER
PCA9306DCTR
TOP-SIDE MARKING(3)
7BD_ _ _
Reel of 3000
SSOP – DCT
Reel of 250
Reel of 3000
Reel of 250
PCA9306DCTT
–40°C to 85°C
PCA9306DCUR
VSSOP – DCU
7BD_
PCA9306DCUT
(1) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
(2) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
(3) DCT: The actual top-side marking has three additional characters that designate the year, month, and wafer fab/assembly site.
DCU: The actual top-side marking has one additional character that designates the assembly/test site.
TERMINAL FUNCTIONS
TERMINAL
DESCRIPTION
NAME
GND
VREF1
SCL1
SDA1
SDA2
SCL2
VREF2
EN
NO.
1
Ground, 0 V
2
Low-voltage-side reference supply voltage for SCL1 and SDA1
Serial clock, low-voltage side
3
4
Serial data, low-voltage side
5
Serial data, high-voltage side
6
Serial clock, high-voltage side
7
High-voltage-side reference supply voltage for SCL2 and SDA2
Switch enable input
8
2
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PCA9306
www.ti.com ....................................................................................................................................................... SCPS113I–OCTOBER 2004–REVISED JULY 2008
FUNCTION TABLE
LOGIC DIAGRAM (POSITIVE LOGIC)
INPUT
TRANSLATOR FUNCTION
V
REF2
EN(1)
V
REF1
H
L
SCL1 = SCL2, SDA1 = SDA2
Disconnect
2
7
8
EN
3
6
SW
SW
SCL1
SDA1
SCL2
4
5
SDA2
1
(1) The SCL switch conducts if EN is ≥ 1 V higher than SCL1 or
GND
SCL2. The same is true of SDA.
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PCA9306
SCPS113I–OCTOBER 2004–REVISED JULY 2008....................................................................................................................................................... www.ti.com
ABSOLUTE MAXIMUM RATINGS(1)
over operating free-air temperature range (unless otherwise noted)
MIN
–0.5
–0.5
–0.5
–0.5
MAX
7
UNIT
V
VREF1 DC reference voltage range
VREF2 DC reference bias voltage range
7
V
VI
Input voltage range(2)
7
V
VI/O
Input/output voltage range(2)
Continuous channel current
Input clamp current
7
V
128
–50
220
227
150
mA
mA
IIK
VI < 0
DCT package
DCU package
θJA
Tstg
Package thermal impedance(3)
Storage temperature range
°C/W
°C
–65
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input and input/output negative voltage ratings may be exceeded if the input and output current ratings are observed.
(3) The package thermal impedance is calculated in accordance with JESD 51-7.
RECOMMENDED OPERATING CONDITIONS
MIN
0
MAX UNIT
VI/O
Input/output voltage
Reference voltage
SCL1, SDA1, SCL2, SDA2
5
5
V
V
VREF1
VREF2
EN
0
Reference voltage
0
5
V
Enable input voltage
Pass switch current
Operating free-air temperature
0
5
V
IPASS
TA
64
85
mA
°C
–40
ELECTRICAL CHARACTERISTICS
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
Input clamp voltage
Input leakage current
TEST CONDITIONS
EN = 0 V
MIN TYP(1)
MAX UNIT
VIK
IIH
II = –18 mA,
VI = 5 V,
–1.2
5
V
EN = 0 V
µA
pF
pF
pF
Ci(EN) Input capacitance
VI = 3 V or 0
VO = 3 V or 0,
VO = 3 V or 0,
11
4
Cio(off)
Cio(on)
Off capacitance
On capacitance
SCLn, SDAn
SCLn, SDAn
EN = 0 V
EN = 3 V
6
12.5
5.5
7
10.5
3.5
4.7
6.3
25.5
6
EN = 4.5 V
EN = 3 V
VI = 0,
IO = 64 mA
EN = 2.3 V
EN = 1.5 V
EN = 4.5 V
EN = 3 V
9.5
32
(2)
ron
On-state resistance SCLn, SDAn
Ω
1
20
20
15
VI = 2.4 V,
VI = 1.7 V,
IO = 15 mA
IO = 15 mA
60
140
140
EN = 2.3 V
60
(1) All typical values are at TA = 25°C.
(2) Measured by the voltage drop between the SCL1 and SCL2, or SDA1 and SDA2 terminals, at the indicated current through the switch.
ON-state resistance is determined by the lowest voltage of the two terminals.
4
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PCA9306
www.ti.com ....................................................................................................................................................... SCPS113I–OCTOBER 2004–REVISED JULY 2008
AC PERFORMANCE (TRANSLATING DOWN)(3)
Switching Characteristics
over recommended operating free-air temperature range, EN = 3.3 V, VIH = 3.3 V, VIL = 0, VM = 1.15 V (unless otherwise
noted) (see Figure 1)
CL = 50 pF
CL = 30 pF
CL = 15 pF
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
MIN
0
MAX
MIN
0
MAX
MIN
0
MAX
tPLH
tPHL
0.8
1.2
0.6
1
0.3
0.5
SCL2 or SDA2
SCL1 or SDA1
ns
0
0
0
(3) Translating down–the high voltage side driving toward the lower voltage side
Switching Characteristics
over recommended operating free-air temperature range, EN = 2.5 V, VIH = 3.3 V, VIL = 0, VM = 0.75 V (unless otherwise
noted) (see Figure 1)
CL = 50 pF
CL = 30 pF
CL = 15 pF
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
MIN
0
MAX
MIN
0
MAX
MIN
0
MAX
tPLH
tPHL
1
0.7
1
0.4
0.6
SCL2 or SDA2
SCL1 or SDA1
ns
0
1.3
0
0
AC PERFORMANCE (TRANSLATING UP)(1)
Switching Characteristics
over recommended operating free-air temperature range, EN = 3.3 V, VIH = 2.3 V, VIL = 0, VT = 3.3 V, VM = 1.15 V, RL = 300
Ω (unless otherwise noted) (see Figure 1)
CL = 50 pF
CL = 30 pF
CL = 15 pF
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
MIN
0
MAX
MIN
0
MAX
MIN
0
MAX
tPLH
tPHL
0.9
1.4
0.6
1.1
0.4
0.7
SCL1 or SDA1
SCL2 or SDA2
ns
0
0
0
(1) Translating up–the lower voltage side driving toward the higher voltage side
Switching Characteristics
over recommended operating free-air temperature range, EN = 2.5 V, VIH = 1.5 V, VIL = 0, VT = 2.5 V, VM = 0.75 V, RL = 300
Ω, (unless otherwise noted) (see Figure 1)
CL = 50 pF
CL = 30 pF
CL = 15 pF
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
MIN
0
MAX
MIN
0
MAX
MIN
0
MAX
tPLH
tPHL
1
0.6
1.3
0.4
0.8
SCL1 or SDA1
SCL2 or SDA2
ns
0
1.3
0
0
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PCA9306
SCPS113I–OCTOBER 2004–REVISED JULY 2008....................................................................................................................................................... www.ti.com
PARAMETER MEASUREMENT INFORMATION
V
T
USAGE
SWITCH
S1
Translating up
Translating down
R
L
S2
S1
Open
S2
From Output
Under Test
3.3 V
Input
V
V
M
M
M
C
L
V
IL
(see Note A)
5 V
Output
V
M
V
LOAD CIRCUIT
V
OL
TRANSLATING UP
5 V
Input
V
V
V
M
M
V
IL
2 V
Output
V
M
M
V
OL
TRANSLATING DOWN
NOTES: A. C includes probe and jig capacitance.
L
B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω, t ≤ 2 ns, t ≤ 2 ns.
C. The outputs are measured one at a time, with one transition per measurement.
O
r
f
Figure 1. Load Circuit for Outputs
6
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www.ti.com ....................................................................................................................................................... SCPS113I–OCTOBER 2004–REVISED JULY 2008
APPLICATION INFORMATION
General Applications of I2C
In I2C applications, the bus capacitance limit of 400 pF restricts the number of devices and bus length. Using the
PCA9306 enables the system designer to isolate two halves of a bus; thus, more I2C devices or longer trace
length can be accommodated.
The PCA9306 also can be used to run two buses, one at 400-kHz operating frequency and the other at 100-kHz
operating frequency. If the two buses are operating at different frequencies, the 100-kHz bus must be isolated
when the 400-kHz operation of the other bus is required. If the master is running at 400 kHz, the maximum
system operating frequency may be less than 400 kHz because of the delays added by the repeater.
As with the standard I2C system, pullup resistors are required to provide the logic high levels on the translator's
bus. The PCA9306 has a standard open-collector configuration of the I2C bus. The size of these pullup resistors
depends on the system, but each side of the repeater must have a pullup resistor. The device is designed to
work with standard-mode and fast-mode I2C devices, in addition to SMBus devices. Standard-mode I2C devices
only specify 3 mA in a generic I2C system where standard-mode devices and multiple masters are possible.
Under certain conditions, high termination currents can be used.
VDPU = 3.3 V
200 kΩ
PCA9306
VREF1 = 1.8 V
EN
8
RPU
RPU
2
7
VREF1
VREF2
RPU
RPU
VCC
VCC
SCL1
SCL2
3
6
SCL
SW
SCL
2
I C Bus
2
I C Bus
Master
Device
SDA2
SDA1
5
4
SDA
SDA
SW
GND
GND
GND
1
Figure 2. Typical Application Circuit (Switch Always Enabled)
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PCA9306
SCPS113I–OCTOBER 2004–REVISED JULY 2008....................................................................................................................................................... www.ti.com
V
DPU
= 3.3 V
3.3-V Enable Signal
On
Off
200 kΩ
PCA9306
EN
8
7
V
REF1
= 1.8 V
R
PU
R
PU
2
V
V
REF1
REF2
R
R
PU
PU
V
CC
V
CC
3
SCL1
SCL2
6
SCL
SCL
2
SW
2
I C Bus
Device
I C Bus
Master
SDA1
SDA2
5
4
SW
SDA
SDA
GND
1
GND
GND
Figure 3. Typical Application Circuit (Switch Enable Control)
Bidirectional Translation
For the bidirectional clamping configuration (higher voltage to lower voltage or lower voltage to higher voltage),
the EN input must be connected to VREF2 and both pins pulled to high-side VDPU through a pullup resistor
(typically 200 kΩ). This allows VREF2 to regulate the EN input. A filter capacitor on VREF2 is recommended. The
I2C bus master output can be totem pole or open drain (pullup resistors may be required) and the I2C bus device
output can be totem pole or open drain (pullup resistors are required to pull the SCL2 and SDA2 outputs to
VDPU). However, if either output is totem pole, data must be unidirectional or the outputs must be 3-stateable and
be controlled by some direction-control mechanism to prevent high-to-low contentions in either direction. If both
outputs are open drain, no direction control is needed.
The reference supply voltage (VREF1) is connected to the processor core power-supply voltage.
Application Operating Conditions
see Figure 2
MIN TYP(1)
MAX UNIT
VREF2
EN
Reference voltage
VREF1 + 0.6
2.1
2.1
1.5
14
5
5
5
V
V
Enable input voltage
VREF1 + 0.6
0
VREF1
IPASS
IREF
TA
Reference voltage
4.4
V
Pass switch current
mA
µA
°C
Reference-transistor current
Operating free-air temperature
–40
85
(1) All typical values are at TA = 25°C.
8
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PCA9306
www.ti.com ....................................................................................................................................................... SCPS113I–OCTOBER 2004–REVISED JULY 2008
Sizing Pullup Resistor
The pullup resistor value needs to limit the current through the pass transistor, when it is in the on state, to about
15 mA. This ensures a pass voltage of 260 mV to 350 mV. If the current through the pass transistor is higher
than 15 mA, the pass voltage also is higher in the on state. To set the current through each pass transistor at 15
mA, the pullup resistor value is calculated as:
VDPU * 0.35 V
+
RPU
0.015 A
The following table summarizes resistor values, reference voltages, and currents at 15 mA, 10 mA, and 3 mA.
The resistor value shown in the +10% column (or a larger value) should be used to ensure that the pass voltage
of the transistor is 350 mV or less. The external driver must be able to sink the total current from the resistors on
both sides of the PCA9306 device at 0.175 V, although the 15 mA applies only to current flowing through the
PCA9306 device.
(1)(2)
PULLUP RESISTOR VALUES
PULLUP RESISTOR VALUE (Ω)
15 mA
10 mA
3 mA
VDPU
NOMINAL
310
+10%(3)
341
217
158
106
85
NOMINAL
465
+10%(3)
512
NOMINAL
1550
983
+10%(3)
1705
1082
788
5 V
3.3 V
2.5 V
1.8 V
1.5 V
1.2 V
197
295
325
143
215
237
717
97
145
160
483
532
77
115
127
383
422
57
63
85
94
283
312
(1) Calculated for VOL = 0.35 V
(2) Assumes output driver VOL = 0.175 V at stated current
(3) +10% to compensate for VDD range and resistor tolerance
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PACKAGE OPTION ADDENDUM
www.ti.com
18-Sep-2008
PACKAGING INFORMATION
Orderable Device
PCA9306DCTR
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SM8
DCT
8
8
8
8
8
8
8
8
8
8
8
8
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
PCA9306DCTRE4
PCA9306DCTRG4
PCA9306DCTT
SM8
SM8
SM8
SM8
SM8
US8
US8
US8
US8
US8
US8
DCT
DCT
DCT
DCT
DCT
DCU
DCU
DCU
DCU
DCU
DCU
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
PCA9306DCTTE4
PCA9306DCTTG4
PCA9306DCUR
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
PCA9306DCURE4
PCA9306DCURG4
PCA9306DCUT
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
PCA9306DCUTE4
PCA9306DCUTG4
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
18-Sep-2008
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF PCA9306 :
Automotive: PCA9306-Q1
•
NOTE: Qualified Version Definitions:
Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
•
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
2-Jul-2008
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0 (mm)
B0 (mm)
K0 (mm)
P1
W
Pin1
Diameter Width
(mm) W1 (mm)
(mm) (mm) Quadrant
PCA9306DCUR
US8
DCU
8
3000
180.0
9.2
2.25
3.35
1.05
4.0
8.0
Q3
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
2-Jul-2008
*All dimensions are nominal
Device
Package Type Package Drawing Pins
US8 DCU
SPQ
Length (mm) Width (mm) Height (mm)
202.0 201.0 28.0
PCA9306DCUR
8
3000
Pack Materials-Page 2
MECHANICAL DATA
MPDS049B – MAY 1999 – REVISED OCTOBER 2002
DCT (R-PDSO-G8)
PLASTIC SMALL-OUTLINE PACKAGE
0,30
0,15
M
0,13
0,65
8
5
0,15 NOM
2,90
2,70
4,25
3,75
Gage Plane
PIN 1
INDEX AREA
0,25
1
4
0° – 8°
0,60
0,20
3,15
2,75
1,30 MAX
Seating Plane
0,10
0,10
0,00
4188781/C 09/02
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion
D. Falls within JEDEC MO-187 variation DA.
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