PCM2912APJTR [TI]

AUDIO CODEC WITH USB INTERFACE, MONO MICROPHONE INPUT AND STEREO HEADPHONE OUTPUT; 带USB接口,单声道麦克风输入和立体声耳机输出音频编解码器
PCM2912APJTR
型号: PCM2912APJTR
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

AUDIO CODEC WITH USB INTERFACE, MONO MICROPHONE INPUT AND STEREO HEADPHONE OUTPUT
带USB接口,单声道麦克风输入和立体声耳机输出音频编解码器

解码器 编解码器 消费电路 商用集成电路 输出元件 输入元件 PC
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PCM2912A  
Burr-Brown Audio  
www.ti.com.......................................................................................................................................................................................... SLES230SEPTEMBER 2008  
AUDIO CODEC WITH USB INTERFACE,  
MONO MICROPHONE INPUT AND STEREO HEADPHONE OUTPUT  
1
FEATURES  
234  
On-Chip USB Interface:  
– Oversampling Digital Filter  
With Full-Speed Transceivers  
Fully Compliant with USB 2.0 Specification  
Certified By USB-IF  
Passband Ripple: ±0.1 dB  
Stop-Band Attenuation: –43 dB  
Single-Ended Voltage Output  
Analog LPF Included  
Partially Programmable Descriptors  
Adaptive Isochronous Transfer for  
Playback  
Sidetone PGA, Output PGA, and HP  
Amplifier  
Asynchronous Isochronous Transfer for  
Record  
Multifunctions:  
Suspend, Playback, and Record Status Flag  
Bus Powered  
Microphone Amplifier, Mute, and Gain  
Control  
16-Bit Delta-Sigma ADC and DAC  
Sampling Rate:  
Pop/Click Noise-Free  
8, 11.025, 16, 22.05, 32, 44.1, 48 kHz  
On-Chip Clock Generator:  
With Single 6-MHz Clock Source  
Mono ADC with Microphone Input  
Single Power-Supply: 5 V Typ (VBUS  
Package: 32-Pin TQFP  
)
APPLICATIONS  
USB Headset  
USB Headphone  
USB Speaker  
USB Featured Consumer Audio Product  
USB Audio Interface Box  
USB Monitor  
Analog Performance at VBUS = 5 V:  
THD+N: 0.01%  
SNR: 92 dB  
Dynamic Range: 90 dB  
Decimation Digital Filter  
Passband Ripple: ±0.05 dB  
Video Conference System  
Stop-Band Attenuation: –65 dB  
DESCRIPTION  
Single-Ended Voltage Input  
Antialiasing Filter Included  
Digital HPF Included  
The PCM2912A is the Texas Instruments single-chip,  
USB stereo audio codec with a USB 2.0-compliant  
full-speed protocol controller and an analog front-end  
(AFE) function for headset applications. The USB  
protocol controller works with no software code, but  
USB descriptors can be modified on request(1). The  
PCM2912A employs SpAct™ architecture, TI’s  
unique system that recovers the audio clock from  
USB packet data. On-chip analog PLLs with SpAct  
enables independent playback and record sampling  
rates with low clock jitters.  
Microphone Bias, Microphone Amplifier,  
and Input PGA  
Stereo DAC With Headphone Output  
Analog Performance at VBUS = 5.0 V:  
THD+N: 0.01% (RL > 10 k)  
THD+N: 0.02% (RL = 32 )  
SNR: 92 dB  
Dynamic Range: 90 dB  
PO: 13 mW (RL = 32 )  
PO: 25 mW (RL = 16 )  
(1) The descriptor can be modified by changing a mask; contact  
your local representative for details.  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
2
3
4
SpAct is a trademark of Texas Instruments.  
Audio Precision, System Two are trademarks of Audio Precision, Inc..  
All other trademarks are the property of their respective owners.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2008, Texas Instruments Incorporated  
PCM2912A  
SLES230SEPTEMBER 2008.......................................................................................................................................................................................... www.ti.com  
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with  
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.  
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more  
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.  
ABSOLUTE MAXIMUM RATINGS(1)(2)  
Over operating free-air temperature range (unless otherwise noted).  
PARAMETER  
PCM2912A  
–0.3 to +6.5  
±0.1  
UNIT  
V
Supply voltage  
VBUS  
Ground voltage differences: BGND, PGND, AGND, HGND, DGND  
Input voltage : VCCP, VCCA, VCCL, VCCR, VDD  
V
–0.3 to 4  
–0.3 to 6.5  
–0.3 to 4  
–0.3 to 4  
±10  
V
PLAY, REC.  
V
Digital input voltage  
D+, D–, XTI, XTO, MMUTE, TEST0, TEST1, POWER, MAMP, SSPND  
MBIAS, VIN, VCOM1, VCOM2, VOUTL, VOUTR, FR, FL  
V
Analog input voltage  
V
Input current (any pins except supplies)  
Ambient temperature under bias  
Storage temperature  
mA  
°C  
°C  
°C  
–40 to +125  
–55 to +150  
+150  
Junction temperature  
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings  
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating  
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
(2) All voltage values are with respect to network ground terminal.  
RECOMMENDED OPERATING CONDITIONS  
Over operating free-air temperature range (unless otherwise noted).  
PARAMETER  
MIN  
NOM  
5.00  
MAX  
UNIT  
V
VBUS  
Supply voltage  
4.35  
5.25  
Analog input voltage, full scale (–0 dB)  
Digital input logic family  
0.43 VCCA  
TTL  
VPP  
Digital input clock frequency  
Analog output load resistance  
Analog output load capacitance  
Digital output load capacitance  
Operating free-air temperature  
5.997  
32  
6.000  
6.003  
MHz  
100  
10  
pF  
pF  
°C  
TA  
–25  
+70  
2
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Copyright © 2008, Texas Instruments Incorporated  
Product Folder Link(s): PCM2912A  
PCM2912A  
www.ti.com.......................................................................................................................................................................................... SLES230SEPTEMBER 2008  
ELECTRICAL CHARACTERISTICS  
All specifications at TA = +25°C, VBUS = 5 V, fS = 44.1 kHz, fIN = 1 kHz, and 16-bit data, unless otherwise noted.  
PCM2912A  
PARAMETER  
DIGITAL INPUT/OUTPUT  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
Host interface  
Apply USB revision 2.0, full-speed  
USB isochronous data format  
Audio data format  
INPUT LOGIC  
VIH  
VIL  
2
3.3  
0.8  
Input logic level  
VDC  
µA  
(1)(2)  
IIH  
VIN = 3.3 V  
VIN = 0 V  
±10  
±10  
100  
±10  
(1)(2)  
IIL  
Input logic current  
(3)  
IIH  
VIN = 3.3 V  
VIN = 0 V  
65  
µA  
(3)  
IIL  
OUTPUT LOGIC  
(1)  
VOH  
IOH = –10 mA  
IOL = 10 mA  
IOH = –2 mA  
IOL = 2 mA  
IOL = 8 mA  
VIN = 5 V  
2.9  
2.8  
(1)  
VOL  
0.3  
(4)  
VOH  
VOL  
VOL  
Output logic level  
VDC  
(4)  
(5)  
0.5  
0.5  
(5)  
IOH  
CLOCK FREQUENCY  
Input clock frequency, XTI  
MICROPHONE BIAS  
Output voltage  
Output leak current  
±10  
µA  
5.997  
6.000  
6.003  
MHz  
0.75 VCCA  
VDC  
mA  
Output current  
Output noise  
2
5
RL = 1 k  
µVRMS  
(1) Pins 3, 4: D–, D+.  
(2) Pins 8, 23, 24, 27, 28: XTI, MAMP, POWER, TEST1, TEST0  
(3) Pin 30: MMUTE  
(4) Pins 7, 29: XTO, SSPND  
(5) Pins 31, 32: REC, PLAY.  
Copyright © 2008, Texas Instruments Incorporated  
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3
Product Folder Link(s): PCM2912A  
PCM2912A  
SLES230SEPTEMBER 2008.......................................................................................................................................................................................... www.ti.com  
ELECTRICAL CHARACTERISTICS (continued)  
All specifications at TA = +25°C, VBUS = 5 V, fS = 44.1 kHz, fIN = 1 kHz, and 16-bit data, unless otherwise noted.  
PCM2912A  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
ANALOG-TO-DIGITAL CONVERTER (ADC) CHARACTERISTICS  
Resolution  
16  
1
Bits  
Channel  
kHz  
Audio data channel  
Sampling frequency  
8, 11.025, 16, 22.05, 32, 44.1, 48  
ADC Dynamic Performance(6)  
Total harmonic distortion plus  
noise  
THD+N  
SNR  
VIN = –1 dB of 0.43 VCCA  
0.01  
0.02  
%
Dynamic range  
Signal-to-noise ratio  
A-weighted  
A-weighted  
82  
84  
90  
92  
dB  
dB  
ADC DC Accuracy  
Gain error  
±2  
±0  
±10 % of FSR  
% of FSR  
Bipolar zero error  
Analog Input  
Input voltage  
0.43 VCCA  
0.5 VCCA  
150  
VPP  
V
Center voltage  
–3 dB  
kHz  
dB  
Antialiasing filter frequency  
response  
fIN = 20 kHz  
–0.08  
Microphone Amplifier  
Gain  
0
20  
30  
dB  
Input impedance  
20  
1
kΩ  
Input PGA  
Gain range  
–12  
dB  
dB  
Gain step size  
ADC Digital Filter Performance  
Passband  
0.454 fS  
±0.02  
Hz  
Hz  
dB  
dB  
s
Stop band  
0.583 fS  
–65  
Passband ripple  
Stop-band attenuation  
Delay time  
17.4/fS  
HPF frequency response  
–3 dB  
0.078 fS/1000  
Hz  
(6) fIN = 1 kHz, using Audio Precision™ System Two™, RMS mode with 20-kHz LPF, 400-Hz HPF in calculation. Mic amp = 0 dB,  
PGA = 0 dB.  
4
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Product Folder Link(s): PCM2912A  
PCM2912A  
www.ti.com.......................................................................................................................................................................................... SLES230SEPTEMBER 2008  
ELECTRICAL CHARACTERISTICS (continued)  
All specifications at TA = +25°C, VBUS = 5 V, fS = 44.1 kHz, fIN = 1 kHz, and 16-bit data, unless otherwise noted.  
PCM2912A  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
DIGITAL-TO-ANALOG CONVERTER (DAC) CHARACTERISTICS  
Resolution  
Audio data channel  
16  
Bits  
Channel  
kHz  
1, 2  
Sampling frequency  
8, 11.025, 16, 22.05, 32, 44.1, 48  
DAC Dynamic Performance(7)  
RL > 10 k, VOUT = 0 dB of 0.6 VCCA  
0.01  
0.02  
90  
0.02  
0.05  
%
%
Total harmonic distortion plus  
noise  
THD+N  
RL = 32 , VOUT = 0 dB of 0.55 VCCA  
EIAJ, A-Weighted  
Dynamic range  
82  
84  
80  
dB  
dB  
dB  
SNR  
Signal-to-noise ratio  
Channel separation  
EIAJ, A-Weighted  
92  
RL > 10 kΩ  
88  
DAC DC Accuracy  
Gain mismatch  
channel-to-channel  
Gain error  
±2  
±10 % of FSR  
±2  
±3  
±10 % of FSR  
% of FSR  
Bipolar zero error  
Analog Output  
RL > 10 kΩ  
RL = 32 Ω  
0.6 VCCA  
0.55 VCCA  
0.5 VCCA  
13  
Output voltage  
Center voltage  
Output power  
VPP  
V
RL = 32 Ω  
RL = 16 Ω  
Line  
mW  
25  
10  
16  
kΩ  
Load impedance (AC coupling)  
LPF frequency response  
Headphone  
–3 dB  
32  
140  
kHz  
dB  
f = 20 kHz  
–0.1  
Sidetone Programmable Attenuator  
Gain range  
–76  
–76  
0
0
dB  
dB  
Gain step size  
1
1
Output Programmable Attenuator  
Gain range  
dB  
dB  
Gain step size  
Analog Loopback Performance(8)  
RL > 10 k, VIN = 0 dB of 0.43 VCCA  
RL = 32 , VIN = 0 dB of 0.43 VCCA  
EIAJ, A-weighted  
0.01  
0.02  
90  
0.02  
0.05  
%
%
Total harmonic distortion plus  
THD+N  
noise  
Dynamic range  
82  
84  
dB  
dB  
SNR  
Signal-to-noise ratio  
EIAJ, A-weighted  
92  
DAC Digital Filter Performance  
Passband  
0.445 fS  
±0.1  
Hz  
Hz  
dB  
dB  
s
Stop band  
0.555 fS  
–43  
Passband ripple  
Stop-band attenuation  
Delay time  
14.3/fS  
(7) fOUT = 1 kHz, using Audio Precision System Two, RMS mode with 20-kHz LPF, 400-Hz HPF. Output attenuator = 0 dB,  
Sidetone = Mute.  
(8) MIC Amp = 0 dB, Sidetone attenuator = 0 dB, Output attenuator = 0 dB.  
Copyright © 2008, Texas Instruments Incorporated  
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Product Folder Link(s): PCM2912A  
PCM2912A  
SLES230SEPTEMBER 2008.......................................................................................................................................................................................... www.ti.com  
ELECTRICAL CHARACTERISTICS (continued)  
All specifications at TA = +25°C, VBUS = 5 V, fS = 44.1 kHz, fIN = 1 kHz, and 16-bit data, unless otherwise noted.  
PCM2912A  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
POWER-SUPPLY REQUIREMENTS  
VBUS  
Voltage range  
Bus-powered  
4.35  
5.0  
85  
5.25  
100  
300  
500  
1
VDC  
mA  
ADC, DAC operation (RL = 32 )  
Suspend mode(9)  
Supply current  
220  
425  
0.8  
µA  
ADC, DAC Operation  
mW  
mW  
Power dissipation  
(9)  
Suspend mode  
VCCP,VCCL  
VCCR,VCCA  
VDD  
,
,
Internally-generated power  
supply voltage(10)  
3
3.3  
3.6  
VDC  
TEMPERATURE RANGE  
Operation temperature  
Thermal resistance  
(9) Under USB suspend state  
(10) Pins 5, 15, 19, 21, 26: VDD, VCCA, VCCL, VCCR, VCCP  
–25  
+85  
°C  
θJA  
32-pin TQFP  
80  
°C/W  
.
6
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Product Folder Link(s): PCM2912A  
PCM2912A  
www.ti.com.......................................................................................................................................................................................... SLES230SEPTEMBER 2008  
PIN ASSIGNMENTS  
PJT PACKAGE  
TQFP-32  
(TOP VIEW)  
24 23 22 21 20 19 18 17  
16  
VIN  
25  
PGND  
15 VCCA  
26  
VCCP  
14 NC  
27  
28  
29  
30  
31  
32  
TEST1  
TEST0  
SSPND  
MMUTE  
REC  
13  
AGND  
PCM2912A  
12  
11  
10  
9
VCOM2  
VCOM1  
FR  
FL  
PLAY  
1
2
3
4
5
6
7
8
Copyright © 2008, Texas Instruments Incorporated  
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Product Folder Link(s): PCM2912A  
PCM2912A  
SLES230SEPTEMBER 2008.......................................................................................................................................................................................... www.ti.com  
TERMINAL FUNCTIONS  
TERMINAL  
NAME  
BGND  
VBUS  
D–  
PJT  
1
I/O  
DESCRIPTIONS  
Reference for internal regulator.  
Connect to USB power (VBUS  
2
)
3
I/O USB differential input/output minus(1)  
I/O USB differential input/output plus(1)  
D+  
4
VDD  
5
Digital power supply(2)  
DGND  
XTO  
XTI  
6
Digital ground  
7
O
I
Crystal oscillator output  
Crystal oscillator input(3)  
8
FL  
9
External filter pin of L-channel (optional)  
External filter pin of R-channel (optional)  
FR  
10  
Common voltage for ADC, DAC, and analog front-end (VCCA/2). Decoupling capacitor should be connected to  
AGND.  
VCOM1  
11  
VCOM2  
AGND  
NC  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
29  
30  
31  
32  
I
Common voltage for headphone (VCCA/2). Decoupling capacitor should be connected to AGND.  
Analog ground  
Not connected  
VCCA  
VIN  
Analog power supply  
ADC microphone input  
MBIAS  
O
O
O
I
Microphone bias output (0.75 VCCA  
)
VOUT  
VCC  
HGND  
VCC  
VOUT  
L
Headphone output for L-channel  
L
Analog power supply for headphone amplifier of L-channel(2)  
Analog ground for headphone amplifier  
Analog power supply for headphone amplifier of R-channel(2)  
R
R
Headphone output for R-channel  
Microphone preamplifier gain control (LOW: Preamplifier off, HIGH: Preamplifier on = +20 dB)(3)  
MAMP  
POWER  
PGND  
VCCP  
(3)  
I
Power consumption declaration select pin (LOW: 100 mA, HIGH: 500 mA)  
I
Analog ground for microphone bias, microphone amplifier, and PGA  
Analog power supply for PLL(2)  
Test pin. Must be set to HIGH(3)  
TEST1  
TEST0  
SSPND  
MMUTE  
REC  
I
Test pin. Must be set to LOW(3)  
O
I
Suspend flag (LOW: Suspend, HIGH: Operational state)  
Microphone mute control, active HIGH (LOW: Mute off, HIGH: Mute on)(4)  
Status output for record (LOW: Record, FLASH: Mute on recode, HIGH: Stop)(5)  
Status output for playback (LOW: Playback, FLASH: Mute on playback, HIGH: Stop)(5)  
O
O
PLAY  
(1) LV-TTL level  
(2) Connect decouple capacitor to corresponding ground.  
(3) 3.3-V CMOS level input.  
(4) 3.3-V CMOS level input with internal pulldown.  
(5) 5-V tolerant, open-drain.  
8
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Product Folder Link(s): PCM2912A  
PCM2912A  
www.ti.com.......................................................................................................................................................................................... SLES230SEPTEMBER 2008  
FUNCTIONAL BLOCK DIAGRAM  
V
/V  
/V L/V R/V  
CC DD  
CCA CCP CC  
BGND  
AGND/ HGND/PGND/DGND  
Power  
Manager  
SSPND  
5 V to 3.3 V  
Voltage  
Regulator  
V
REF  
V
BUS  
MIC  
BIAS  
MBIAS  
PGA + 30 dB ~ –12 dB  
in 1 dB steps  
D+  
D–  
MIC  
ISO-In  
Endpoint  
XCVR  
FIFO  
AMP  
V
ADC  
IN  
+20/0 dB  
Selector  
USB SIE  
Control  
Endpoint  
POWER  
MAMP  
Analog  
PLL  
V
COM2  
V
COM1  
MMUTE  
Analog  
PLL  
ATT 0 dB ~ –76 dB  
in 1 dB steps with Mute  
PLAY  
REC  
V
V
L
OUT  
Selector  
DAC  
ISO-Out  
Endpoint  
R
FIFO  
OUT  
HP AMP 15 mW (at 32 W)  
ATT 0 dB ~ –76 dB  
TEST0  
TEST1  
in 1 dB steps with Mute  
USB Protocol  
Controller  
FL  
FR  
Tracker  
®
96 MHz  
PLL (x16)  
(SpAct  
)
6.000 MHz  
XTI  
XTO  
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Product Folder Link(s): PCM2912A  
PCM2912A  
SLES230SEPTEMBER 2008.......................................................................................................................................................................................... www.ti.com  
TYPICAL CHARACTERISTICS: INTERNAL FILTER  
All specifications at TA = +25°C, VBUS = 5 V, fS = 44.1 kHz, fIN = 1 kHz, and 16-bit data, unless otherwise noted.  
ADC Digital Decimation Filter Frequency Response  
OVERALL CHARACTERISTIC  
STOP BAND ATTENUATION  
0
0
-40  
-80  
-20  
-40  
-60  
-120  
-160  
-80  
-100  
0
8
16  
24  
32  
0
0.2  
0.4  
0.6  
0.8  
1.0  
Normalized Frequency - x f  
Normalized Frequency - x f  
S
S
Figure 1.  
Figure 2.  
PASSBAND RIPPLE  
TRANSIENT BAND RESPONSE  
0.2  
0
0
-0.2  
-0.4  
-0.6  
-0.8  
-4  
-8  
-12  
-16  
-20  
0
0.1  
0.2  
0.3  
0.4  
0.5  
0.46  
0.48  
0.50  
0.52  
0.54  
Normalized Frequency - x f  
Normalized Frequency - x f  
S
S
Figure 3.  
Figure 4.  
10  
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Product Folder Link(s): PCM2912A  
PCM2912A  
www.ti.com.......................................................................................................................................................................................... SLES230SEPTEMBER 2008  
TYPICAL CHARACTERISTICS: INTERNAL FILTER (continued)  
All specifications at TA = +25°C, VBUS = 5 V, fS = 44.1 kHz, fIN = 1 kHz, and 16-bit data, unless otherwise noted.  
ADC Digital High-Pass Filter Frequency Response  
STOP BAND CHARACTERISTIC  
PASSBAND CHARACTERISTIC  
0
0
-0.2  
-20  
-0.4  
-0.6  
-0.8  
-1.0  
-40  
-60  
-80  
-100  
0
1
2
3
4
0
0.1  
0.2  
0.3  
0.4  
Normalized Frequency - x f /1000  
S
Normalized Frequency - x f /1000  
S
Figure 5.  
Figure 6.  
ADC Analog Antialiasing Filter Frequency Response  
STOP BAND CHARACTERISTIC  
PASSBAND CHARACTERISTIC  
0
0
-0.2  
-0.4  
-10  
-20  
-30  
-0.6  
-0.8  
-1.0  
-40  
-50  
0.01  
0.1  
1
10  
100  
1
10  
100  
1000  
10000  
f - Frequency - kHz  
f - Frequency - kHz  
Figure 7.  
Figure 8.  
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Product Folder Link(s): PCM2912A  
PCM2912A  
SLES230SEPTEMBER 2008.......................................................................................................................................................................................... www.ti.com  
TYPICAL CHARACTERISTICS: INTERNAL FILTER (continued)  
All specifications at TA = +25°C, VBUS = 5 V, fS = 44.1 kHz, fIN = 1 kHz, and 16-bit data, unless otherwise noted.  
DAC Digital Interpolation Filter Frequency Response  
STOP BAND ATTENUATION  
PASSBAND RIPPLE  
0.2  
0
0
-20  
-0.2  
-0.4  
-40  
-60  
-80  
-0.6  
-0.8  
-100  
0
0.1  
0.2  
0.3  
0.4  
0.5  
0
1
2
3
4
Normalized Frequency - x f  
Normalized Frequency - x f  
S
S
Figure 9.  
Figure 10.  
TRANSIENT BAND RESPONSE  
0
-4  
-8  
-12  
-16  
-20  
0.46  
0.48  
0.50  
0.52  
0.54  
Normalized Frequency - x f  
S
Figure 11.  
12  
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TYPICAL CHARACTERISTICS: INTERNAL FILTER (continued)  
All specifications at TA = +25°C, VBUS = 5 V, fS = 44.1 kHz, fIN = 1 kHz, and 16-bit data, unless otherwise noted.  
DAC Analog FIR Filter Frequency Response  
STOP BAND CHARACTERISTIC  
PASSBAND CHARACTERISTIC  
0
-10  
-20  
-30  
-40  
-50  
0.2  
0
-0.2  
-0.4  
-0.6  
-0.8  
0
8
16  
24  
32  
0
0.1  
0.2  
0.3  
0.4  
0.5  
Normalized Frequency - x f  
Normalized Frequency - x f  
S
S
Figure 12.  
Figure 13.  
DAC Analog Low-Pass Filter Frequency Response  
STOP BAND CHARACTERISTIC  
PASSBAND CHARACTERISTIC  
0
0
-0.2  
-10  
-0.4  
-0.6  
-20  
-30  
-40  
-50  
-0.8  
-1.0  
1
10  
100  
1000  
10000  
0.01  
0.1  
1
10  
100  
f - Frequency - kHz  
f - Frequency - kHz  
Figure 14.  
Figure 15.  
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TYPICAL CHARACTERISTICS  
All specifications at TA = +25°C, VBUS = 5 V, fS = 44.1 kHz, fIN = 1 kHz, and 16-bit data, unless otherwise noted.  
ADC  
THD+N AT –1 dB  
vs TEMPERATURE  
DYNAMIC RANGE AND SIGNAL-TO-NOISE RATIO  
vs TEMPERATURE  
0.010  
0.009  
0.008  
0.007  
0.006  
0.005  
0.004  
0.003  
96  
94  
92  
90  
88  
86  
SNR  
Dynamic Range  
-50  
-25  
0
25  
50  
75  
100  
-50  
-25  
0
25  
50  
75  
100  
T
- Free-Air Temperature - °C  
T
- Free-Air Temperature - °C  
A
A
Figure 16.  
Figure 17.  
THD+N AT –1 dB  
vs SUPPLY VOLTAGE  
DYNAMIC RANGE AND SIGNAL-TO-NOISE RATIO  
vs SUPPLY VOLTAGE  
0.010  
0.009  
0.008  
0.007  
0.006  
0.005  
0.004  
0.003  
98  
96  
94  
92  
90  
SNR  
Dynamic Range  
88  
86  
4.2  
4.4  
4.6  
4.8  
5.0  
5.2  
5.4  
4.2  
4.4  
4.6  
4.8  
5.0  
5.2  
5.4  
V
- Supply Voltage - V  
V
- Supply Voltage - V  
BUS  
BUS  
Figure 18.  
Figure 19.  
14  
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TYPICAL CHARACTERISTICS (continued)  
All specifications at TA = +25°C, VBUS = 5 V, fS = 44.1 kHz, fIN = 1 kHz, and 16-bit data, unless otherwise noted.  
THD+N AT –1 dB  
vs SAMPLING FREQUENCY  
DYNAMIC RANGE AND SIGNAL-TO-NOISE RATIO  
vs SAMPLING FREQUENCY  
98  
96  
94  
92  
90  
0.010  
0.009  
0.008  
0.007  
0.006  
0.005  
SNR  
Dynamic Range  
88  
86  
0.004  
0.003  
30  
35  
40  
45  
50  
30  
35  
40  
45  
50  
f
- Sampling Frequency - kHz  
f
- Sampling Frequency - kHz  
S
S
Figure 20.  
Figure 21.  
DAC  
THD+N AT 0 dB  
vs TEMPERATURE  
DYNAMIC RANGE AND SIGNAL-TO-NOISE RATIO  
vs TEMPERATURE  
0.010  
0.009  
0.008  
0.007  
0.006  
96  
94  
92  
90  
88  
86  
SNR  
Dynamic Range  
0.005  
0.004  
0.003  
-50  
-25  
0
25  
50  
75  
100  
-50  
-25  
0
25  
50  
75  
100  
T
- Free-Air Temperature - °C  
A
T
- Free-Air Temperature - °C  
A
Figure 22.  
Figure 23.  
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TYPICAL CHARACTERISTICS (continued)  
All specifications at TA = +25°C, VBUS = 5 V, fS = 44.1 kHz, fIN = 1 kHz, and 16-bit data, unless otherwise noted.  
THD+N AT 0 dB  
vs SUPPLY VOLTAGE  
DYNAMIC RANGE AND SIGNAL-TO-NOISE RATIO  
vs SUPPLY VOLTAGE  
98  
96  
94  
0.010  
0.009  
0.008  
0.007  
0.006  
SNR  
92  
90  
Dynamic Range  
0.005  
0.004  
0.003  
88  
86  
4.2  
4.4  
4.6  
4.8  
5.0  
5.2  
5.4  
4.2  
4.4  
4.6  
4.8  
5.0  
5.2  
5.4  
V
- Supply Voltage - V  
V
- Supply Voltage - V  
BUS  
BUS  
Figure 24.  
Figure 25.  
THD+N AT 0 dB  
vs SAMPLING FREQUENCY  
DYNAMIC RANGE AND SIGNAL-TO-NOISE RATIO  
vs SAMPLING FREQUENCY  
98  
96  
94  
92  
90  
88  
86  
0.010  
0.009  
0.008  
0.007  
0.006  
0.005  
0.004  
0.003  
SNR  
Dynamic Range  
30  
35  
40  
45  
50  
30  
35  
40  
45  
50  
f
- Sampling Frequency - kHz  
f
- Sampling Frequency - kHz  
S
S
Figure 26.  
Figure 27.  
16  
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TYPICAL CHARACTERISTICS (continued)  
All specifications at TA = +25°C, VBUS = 5 V, fS = 44.1 kHz, fIN = 1 kHz, and 16-bit data, unless otherwise noted.  
Supply Current  
SUPPLY CURRENT  
vs SUPPLY VOLTAGE  
SUPPLY CURRENT  
vs SAMPLING FREQUENCY  
100  
90  
80  
70  
60  
50  
0.5  
0.4  
0.3  
0.2  
0.1  
0
100  
90  
80  
70  
60  
50  
Operational Current  
Suspend Current  
30  
35  
40  
45  
50  
4.2  
4.4  
4.6  
4.8  
5.0  
5.2  
5.4  
f
- Sampling Frequency - kHz  
V
- Supply Voltage - V  
S
BUS  
Figure 28.  
Figure 29.  
SUPPLY CURRENT  
vs TEMPERATURE AT SUSPEND MODE  
0.40  
0.35  
0.30  
USB spec limit for device = 0.3 mA  
0.25  
0.20  
0.15  
0.10  
-40  
-20  
0
20  
40  
60  
80  
100  
T
- Free-Air Temperature - °C  
A
Figure 30.  
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GENERAL DESCRIPTION  
USB INTERFACE  
Control data and audio data are transferred to the PCM2912A via D+ (pin 4) and D– (pin 3). All data transferred  
to/from the PCM2912A are performed at full speed. Table 1 summarizes the device descriptor. The device  
descriptor can be modified on request.  
Table 1. Device Descriptor  
USB revision  
2.0 compliant  
Device class  
0x00 (device defined in interface level)  
0x00 (not specified)  
0x00 (not specified)  
8-byte  
Device sub class  
Device protocol  
Max packet size for endpoint 0  
Vendor ID  
0x08BB  
Product ID  
0x2912  
Device release number  
Number of configurations  
Vendor string  
0x0100 (1.00)  
1
String #1 (refer to Table 3)  
String #2 (refer to Table 3)  
Not supported  
Product string  
Serial number  
Table 2 lists the configuration descriptor. The configuration descriptor can be modified on request.  
Table 2. Configuration Descriptor  
Interface  
Three interfaces  
Power attribute  
Max power  
0x80 (Bus powered, no remote wakeup)  
0x32 (100 mA at POWER = Low) / 0xFA (500mA at POWER = High)  
Table 3 summarizes the string descriptor. The string descriptor can be modified on request.  
Table 3. String Descriptor  
#0  
#1  
#2  
0x0409  
Burr-Brown from TI  
USB audio CODEC  
18  
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Device Configuration  
Figure 31 illustrates the USB audio function topology. The PCM2912A has three interfaces. Each interface is  
constructed with some alternative settings.  
Endpoint #0  
Default Endpoint  
FU  
Endpoint #1  
(IF #1)  
IT  
TID3  
S
OT  
TID6  
Analog Out  
UID4  
Audio Streaming Interface  
UID5  
FU  
IT  
TID1  
UID2  
Analog In  
FU  
Endpoint #1  
(IF #1)  
OT  
TIDB  
S
IT  
TID7  
UIDA  
Audio Streaming Interface  
UID8  
Standard Audio Control Interface (IF #0)  
Figure 31. USB Audio Function Topology  
Interface #0  
Interface #0 is the control interface. Alternative setting #0 is the only possible setting for interface #0. Alternative  
setting #0 describes the standard audio control interface. The audio control interface is constructed with a series  
of terminal connections. The PCM2912A has the following 10 terminals:  
Input terminal (Terminal ID#1) for audio analog input for sidetone  
Feature unit (Unit ID#2) for sidetone PGA  
Input terminal (Terminal ID#3) for isochronous out stream  
Mixer unit (Unit ID#4) for sidetone mixing  
Feature unit (Unit ID#5) for analog output PGA  
Output terminal (Terminal ID#6) for audio analog output  
Input terminal (Terminal ID#7) for audio analog input  
Feature unit (Unit ID#8) for analog input PGA  
Mixer unit (Unit ID#A) for analog input  
Output terminal (Terminal ID#B) for isochronous in stream  
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Input terminal #3 is defined as USB stream (terminal type 0x0101). Input terminal #3 can accept two-channel  
audio streams constructed by the left and right channels. Output terminal #6 is defined as a speaker (terminal  
type 0x0301). Input terminals #1 and #7 are defined as Microphone (terminal type 0x0201). Physically, these two  
input terminals are the same input, but logically duplicated. Output terminal B is defined as a USB stream  
(terminal type 0x0101). Output terminal B is a single-channel audio stream. Mixer unit #4 multiplexes the analog  
input (sidetone) and the audio data of the digital-to-analog converter (DAC). Mixer unit A is placed in front of  
output terminal B. Mixer unit A has no impact on recording data. Mixer units #4 and A do not have programming  
capability.  
Feature unit #5 supports the following sound control features for analog outputs:  
Volume control  
Mute control  
The built-in volume controller can be manipulated by an audio-class-specific request from 0 dB to –76 dB in  
steps of 1 dB. An individual (L and R) channel can be set for different values. The built-in mute controller can be  
manipulated by an audio-class-specific request. Only the master mute control request is acceptable.  
Feature unit #2 supports the following sound control features for analog input (sidetone):  
Volume control  
Mute control  
The built-in volume controller can be manipulated by an audio-class-specific request from 0 dB to –76 dB in 1-dB  
steps. Only the master volume control is acceptable. The built-in mute controller can be manipulated by  
audio-class-specific request. Only the master mute control request is acceptable.  
Feature unit #8 supports the following sound control features for analog input (microphone record input):  
Volume control  
Mute control  
The built-in analog volume controller can be manipulated by an audio-class-specific request from +30 dB to –12  
dB in 1-dB steps. The built-in mute controller can be manipulated by an audio-class-specific request. Only the  
master mute control request is acceptable.  
Interface #1  
Interface #1 is the audio streaming interface for data output. Table 4 lists the three alternative settings for  
Interface #1. Alternative setting #0 is the zero bandwidth setting. All other alternative settings are operational  
settings.  
Table 4. Interface #1 Alternative Settings  
ALTERNATIVE  
SETTING  
DATA FORMAT  
TRANSFER MODE  
Zero Bandwidth  
SAMPLING RATE (kHz)  
00  
8, 11.025, 16, 22.05, 32, 44.1,  
48  
01  
02  
16 bit  
16 bit  
Stereo  
Mono  
2s complement (PCM)  
2s complement (PCM)  
Adaptive  
Adaptive  
8, 11.025, 16, 22.05, 32, 44.1,  
48  
Interface #2  
Interface #2 is the audio streaming interface for data output. Table 5 shows the two alternative settings for  
Interface #2. Alternative setting #0 is the Zero Band Width setting. Alternative setting #1 is an operational setting.  
Table 5. Interface #2 Alternative Settings  
ALTERNATIVE  
SETTING  
DATA FORMAT  
TRANSFER MODE  
SAMPLING RATE (kHz)  
00  
Zero Bandwidth  
8, 11.025, 16, 22.05, 32,  
44.1, 48  
01  
16 bit  
Mono  
2s complement (PCM)  
Asynchronous  
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Endpoints  
The PCM2912A has the following three endpoints:  
Control endpoint (EP #0)  
Isochronous out audio data stream endpoint (EP #1)  
Isochronous in audio data stream endpoint (EP #2)  
The control endpoint is the default endpoint. The control endpoint controls all functions of the PCM2912A by the  
standard USB request and USB audio class-specific request from the host. The isochronous out audio data  
stream endpoint is an audio sink endpoint, which receives the PCM audio data. The isochronous out audio data  
stream endpoint accepts the asynchronous transfer mode. The isochronous in audio data stream endpoint is an  
audio source endpoint, which transmits the PCM audio data. The isochronous in audio data stream endpoint  
uses synchronous transfer mode.  
Internal Regulator  
All required power sources are generated by five internal regulators.  
Each regulator generates 3.3 V (typical, without load) from VBUS (pin 2). Each regulator has an output pin and a  
ground return pin (as described in Table 6); this pair must be decoupled with an appropriate capacitor. Note that  
this capacitance affects inrush-current limitation. One band-gap reference circuit supplies reference voltage for all  
regulators. BGND (pin 1) is provided for reference ground of the band-gap reference.  
Table 6. Internal Regulator Summary  
SUPPLIED CIRCUIT  
Digital  
OUTPUT  
RETURN  
VDD (pin 5)  
DGND (pin 6)  
AGND (pin 13)  
HGND (pin 20)  
HGND (pin 20)  
PGND (pin 25)  
Analog  
VCCA (pin 15)  
VCCL (pin 19)  
VCCR (pin 21)  
VCCP (pin 26)  
Headphone (L-ch)  
Headphone (R-ch)  
PLL  
Clock and Reset  
The PCM2912A requires a 6-MHz (±500 ppm) clock for USB function and audio function, which can be  
generated from a built-in crystal oscillator with a 6-MHz crystal resonator. The 6-MHz crystal resonator must be  
connected to XTI (pin 8) and XTO (pin 7) with one high (1-M) resistor and two small capacitors, whose  
capacitance depends on the load capacitance of the crystal resonator. An external clock can be supplied through  
XTI; if an external clock is supplied, XTO must be left open. Because there is no clock disabling signal, using the  
external clock supply is not recommended. SSPND (pin 29) is unable to use clock disabling.  
The PCM2912A has an internal power-on-reset circuit, which works automatically when VBUS (pin 2) exceeds 2.5  
V, typical (2.2 V to 2.7 V), and approximately 700 µs is required until the internal reset is released.  
DAC  
The PCM2912A has a stereo delta-sigma DAC that uses a 64-fS oversampling technique with an 8-fS  
oversampling digital filter. DAC outputs are provided through the headphone amplifier; VOUTL (pin 18) and VOUT  
R
(pin 22) provide 13 mW at 32 and 0.6 VCCL/VCCR VPP at a 10-kload.  
ADC  
The PCM2912A has a mono delta-sigma ADC that uses a 64-fS oversampling technique with a 1/64-fS  
decimation digital filter. The microphone input, VIN (pin 16), is fed to the ADC through a +20-dB microphone  
amplifier and the PGA, which has +30 dB to –12 dB in 1-dB steps.  
Microphone Bias  
The PCM2912A has a microphone bias generator, which provides a low-noise, 0.75-VCCA, 2-mA source current  
output with appropriate output impedance for electret-microphone driving. This output, MBIAS (pin 17), should be  
bypassed to AGND (pin 13) through an appropriate capacitor to reduce the output noise level.  
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Microphone Amplifier  
The PCM2912A has a low-noise, single-ended, mono microphone amplifier with a mute function that is controlled  
by MUTE (pin 30). The signal gain is selectable by MAMP (pin 23). The noise level at the input node is 5 µVRMS  
and the input impedance is 20 k.  
,
Input PGA  
The PCM2912A also has a low-noise input, programmable gain amplifier (PGA) for the microphone amplifier  
output/ADC input, with a gain range of +30 dB to –12 dB in 1dB/step.  
Sidetone Programmable Attenuator  
The PCM2912A has a low-noise, sidetone programmable attenuator with a mute function for the sidetone signal  
path (microphone amplifier output to output PGA input), and a gain range of 0 dB to –76 dB in 1 dB/step.  
Output Programmable Attenuator  
The PCM2912A has a low-noise output programmable attenuator with a mute function for mixed signal, which  
affects DAC output signal and sidetone signal. The output PGA gain range is 0 dB to –76 dB in 1 dB/step.  
VCOM1 and VCCM2  
VCOM2 (pin 12) is provided for the center voltage of the headphone amplifier. VCOM1 (pin 11) is provided for the  
center voltage of all other analog circuits. Each VCOM pin must be decoupled with an appropriate capacitor.  
Because the headphone output is disconnected when entering the suspend state, determining the capacitance is  
important to prevent pop noise, especially for VCOM2 (pin 12). The equivalent resistance of VCOM2 is 500 k, and  
VCOM1 is 15 k.  
Filter Pins  
FL (pin 9) and FR (pin 10) are provided to make a low-pass filter (LPF) to decrease the DAC outband noise, as  
shown in Figure 32. This filter is optional.  
Side Tone  
20 kW  
20 kW  
10 kW  
10 kW  
DAC  
+
VCOM  
FR/FL  
CF  
Figure 32. Filter Circuit  
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INTERFACE SEQUENCE  
Power-On, Attach, and Play Back Sequence  
The PCM2912A is ready for setup when the reset sequence has finished and the USB bus is attached. After a  
connection has been established, the PCM2912A is ready to accept USB audio data. While waiting for the audio  
data (that is, in an idle state), the analog output is set to bipolar zero (BPZ).  
When receiving the audio data, the PCM2912A stores the first audio packet, which contains 1-ms audio data,  
into the internal storage buffer. The PCM2912A starts playing the audio data when the subsequent Start of  
Frame (SOF) packet is detected, as shown in Figure 33.  
5.0 V (typ)  
2.5 V (typ)  
VBUS (pin 2)  
0 V  
Bus Reset  
Set Configuration  
1st Audio Data  
2nd Audio Data  
Bus Idle  
D+ (pin 4),  
D- (pin 3)  
SOF  
SOF  
SOF  
SSPND (pin 29)  
VOUTL (pin 18),  
VOUTR (pin 22)  
700 ms  
Device Setup  
1 ms  
Internal Reset  
Ready for Setup  
Ready for Playback  
Figure 33. Initial Sequence  
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Play, Stop, and Detach Sequence  
When the host finishes or aborts the play back process, the PCM2912A stops playing after last audio data has  
played, as shown in Figure 34.  
VBUS (pin 2)  
Audio Data  
Audio Data  
Last Audio Data  
D+ (pin 4),  
D- (pin 3)  
SOF  
SOF  
SOF  
SOF  
SOF  
VOUTL (pin 18),  
VOUTR (pin 22)  
1 ms  
Detach  
Figure 34. Play, Stop, and Detach  
Record Sequence  
Figure 35 illustrates how the PCM2912A records the audio into the internal memory after receiving the  
SET_INTERFACE command.  
SET_INTERFACE  
IN token Audio data  
IN token Audio data  
IN token Audio data  
D+ (pin 4),  
D– (pin 3)  
SOF  
SOF  
SOF  
SOF  
SOF  
VIN (pin 16)  
1ms  
Figure 35. Record Sequence  
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Suspend and Resume Sequence  
The PCM2912A enters a suspend state when it sees a constant idle state on the USB bus after approximately 5  
ms. When the PCM2912A enters the suspend state, the SSPND flag (pin 29) is asserted. The PCM2912A wakes  
up immediately after detecting the non-idle state on the USB bus. Figure 36 illustrates these actions.  
Idle  
D+ (pin 4),  
D- (pin 3)  
SSPND (pin 29)  
5 ms  
Suspend  
VOUTL (pin 18),  
VOUTR (pin 22)  
Active  
2.5 ms  
Active  
Figure 36. Suspend and Resume  
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TYPICAL CIRCUIT CONNECTION  
A bus-powered (Hi-power), +20-dB microphone amplifier application example is shown in Figure 37.  
Headphone  
Microphone  
R11  
R10  
R8  
R7  
R5  
C13  
C16  
C10  
C9  
C11  
24 23 22 21 20 19 18 17  
C14  
POWER  
MBIAS  
C17  
VIN  
16  
15  
14  
13  
12  
11  
PGND  
25  
26  
27  
28  
29  
30  
31  
VCCA  
NC  
VCCP  
C8  
TEST1  
AGND  
VCOM2  
TEST0  
PCM2912A  
C7  
C6  
SSPND  
VCOM1  
MMUTE  
REC  
Mic Mute  
FR 10  
C5  
C4  
FL  
9
32 PLAY  
R13  
R12  
BGND  
1
2
3
4
5
6
7
8
C18  
L1  
C1  
R4  
REC  
PLAY  
X1  
C3  
R1  
R2 R3  
C2  
USB Connector  
VBUS D– D+ GND  
NOTE: X1: 6-MHz crystal resonator  
C1, C8, C11, C14, C17, C18: 1 µF ceramic  
C2, C3: 10 pF to 33 pF (depending on load capacitance of crystal resonator)  
C4, C5: 100 pF ceramic  
C6, C10: 3.3 µF  
C7: 0.1 µF  
C9: 0.22 µF electrolytic (depending on required frequency response for microphone input)  
C13, C16: 100 µF electrolytic (depending on required frequency response for headphone output)  
R1, R2: 22 to 33 Ω  
R3: 1.5 kΩ  
R4: 1 MΩ  
R5: 1 k(depending on microphone characteristic)  
R7, R8, R10, R11: 3.3 kΩ  
R12, R13: 820 (depending on LED drive current)  
L1: 1 µH (DC resistance < 0.6 )  
It is possible to change maximum power if total power of actual application does not require over 100 mA (set  
POWER = low to configure as low-power device).  
Figure 37. USB Headset Application  
NOTE:  
The circuit in Figure 37 is for information only. Total board design should be  
considered in order to meet the USB specification as a USB-compliant product.  
26  
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Copyright © 2008, Texas Instruments Incorporated  
Product Folder Link(s): PCM2912A  
 
PCM2912A  
www.ti.com.......................................................................................................................................................................................... SLES230SEPTEMBER 2008  
RELATED DOCUMENTATION FROM TEXAS INSTRUMENTS  
For additional information concerning the PCM2912A device, see the TI application report, Operating  
Envronments for PCM2912 Applications (SLAA387), available for download from www.ti.com.  
Copyright © 2008, Texas Instruments Incorporated  
Submit Documentation Feedback  
27  
Product Folder Link(s): PCM2912A  
PACKAGE OPTION ADDENDUM  
www.ti.com  
22-Nov-2008  
PACKAGING INFORMATION  
Orderable Device  
PCM2912APJT  
PCM2912APJTR  
Status (1)  
ACTIVE  
ACTIVE  
Package Package  
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)  
Qty  
Type  
Drawing  
TQFP  
PJT  
32  
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
TQFP  
PJT  
32  
1000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in  
a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2)  
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check  
http://www.ti.com/productcontent for the latest availability information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements  
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered  
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and  
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS  
compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame  
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)  
(3)  
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder  
temperature.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is  
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the  
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take  
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on  
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited  
information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI  
to Customer on an annual basis.  
Addendum-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
5-Dec-2008  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0 (mm)  
B0 (mm)  
K0 (mm)  
P1  
W
Pin1  
Diameter Width  
(mm) W1 (mm)  
(mm) (mm) Quadrant  
PCM2912APJTR  
TQFP  
PJT  
32  
1000  
330.0  
16.4  
9.6  
9.6  
1.5  
12.0  
16.0  
Q2  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
5-Dec-2008  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
TQFP PJT 32  
SPQ  
Length (mm) Width (mm) Height (mm)  
346.0 346.0 33.0  
PCM2912APJTR  
1000  
Pack Materials-Page 2  
MECHANICAL DATA  
MPQF112 – NOVEMBER 2001  
PJT (S-PQFP–N32)  
PLASTIC QUAD FLATPACK  
0,45  
0,30  
0,80  
M
0,20  
0,20  
0,09  
Gage Plane  
32  
0,15  
0,05  
0,25  
1
0°– 7°  
7,00  
9,00  
SQ  
SQ  
0,75  
0,45  
1,05  
0,95  
Seating Plane  
0,10  
1,20  
1,00  
4203540/A 11/01  
NOTES: A. All linear dimensions are in millimeters.  
B. This drawing is subject to change without notice.  
C. Falls within JEDEC MS-026  
1
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