PTMAG5173A1QDBVRQ1 [TI]
具有 I²C 接口的汽车类高精度、线性 3D 霍尔效应传感器 | DBV | 6 | -40 to 125;型号: | PTMAG5173A1QDBVRQ1 |
厂家: | TEXAS INSTRUMENTS |
描述: | 具有 I²C 接口的汽车类高精度、线性 3D 霍尔效应传感器 | DBV | 6 | -40 to 125 传感器 |
文件: | 总78页 (文件大小:2579K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
TMAG5173-Q1
ZHCSQY7 –SEPTEMBER 2022
TMAG5173-Q1 具有I2C 接口的高精度3D 霍尔效应传感器
1 特性
3 说明
• 符合面向汽车应用的AEC-Q100 标准:
TMAG5173-Q1 是一款低功耗线性 3D 霍尔效应传感
器,适用于各种汽车类应用。此器件在 X、Y 和 Z 轴
集成三个独立的霍尔效应传感器。精密模拟信号链和集
成的 12 位 ADC 使测量的模拟磁场值数字化。支持多
个工作VCC 范围时,I2C 接口可确保使用低电压微控制
器实现无缝的数据通信。该器件具有集成的温度传感
器,可用于多种系统功能,例如给定磁场的热预算检查
或温度补偿计算。
– 温度等级1:–40°C 至125°C
• 高精度线性3D 霍尔效应传感器,可优化位置检测
速度和精度:
– 角度测量误差:±1°(最大值)
– 单轴转换率为20kSPS
• 以功能安全合规型为目标:
– 专为功能安全应用开发
可以通过I2C 接口来配置TMAG5173-Q1,以实现磁轴
和温度测量的任意组合。此外,该器件可以配置为各种
电源选项(包括唤醒和睡眠模式),从而让设计人员能
够根据其系统级需要优化系统功耗。多个传感器转换方
案和 I2C 读取帧有助于优化吞吐量和准确性。专用的
INT 引脚可以在低功耗唤醒和睡眠模式期间充当系统中
断,也可以被微控制器用来触发新的传感器转换。
– 在发布量产版本时将会提供有助于使系统设计符
合ISO 26262 ASIL B 标准的文档
• 可配置的电源模式,包括:
– 1.5µA 唤醒和睡眠模式电流
• X、Y 或Z 轴上可选择的线性磁范围:
– TMAG5173x1-Q1:±40mT,±80mT
– TMAG5173x2-Q1:±133mT,±266mT
• 来自用户定义的磁性和温度阈值交叉的中断信号
• 具有增益和偏轴调节的集成角CORDIC 计算
• 用于降低噪声的可配置均值滤波器
集成角度计算引擎 (CORDIC) 为同轴和离轴角度测量
拓扑提供完整的 360° 角度位置信息。使用用户选择的
两个磁轴执行角度计算。该器件具有磁增益和偏轴校正
功能,可减轻系统机械误差源的影响。
TMAG5173-Q1 具有四个不同的出厂编程I2C 地址。通
过修改用户可配置的 I2C 地址寄存器,该器件还支持其
他I2C 地址。每个可订购器件可配置为选择在系统校准
期间适合磁体强度和元件放置的两个磁场范围之一。
• 具有循环冗余校验(CRC) 功能的I2C 接口:
– 最大1MHz I2C 时钟速度
• 由I2C 或专用INT 引脚触发转换
• 多种磁体类型的集成温度补偿
• 内置温度传感器
• 2.3V 至3.6V 电源电压范围
该器件在 -40°C 至 +125°C 的宽环境温度范围内能够
保持稳定一致的优异性能。
2 应用
• 转向柱控制
• 方向盘控制
• 换挡系统
• 电动自行车
• 传动器
器件信息(1)
封装尺寸(标称值)
器件型号
封装
TMAG5173-Q1
DBV (6)
2.90mm × 1.60mm
(1) 如需了解所有可用封装,请参阅数据表末尾的封装选项附录。
2.3 V to 3.6 V
2.3 V to 5.5 V
VCC
INT
TEST
SCL
SDA
GND
应用方框图
本文档旨在为方便起见,提供有关TI 产品中文版本的信息,以确认产品的概要。有关适用的官方英文版本的最新信息,请访问
www.ti.com,其内容始终优先。TI 不保证翻译的准确性和有效性。在实际设计之前,请务必参考最新版本的英文版本。
English Data Sheet: SLYS035
TMAG5173-Q1
ZHCSQY7 –SEPTEMBER 2022
www.ti.com.cn
Table of Contents
7.3 Feature Description...................................................11
7.4 Device Functional Modes..........................................16
7.5 Programming............................................................ 18
7.6 TMAG5173 Registers............................................... 27
8 Application and Implementation..................................58
8.1 Application Information............................................. 58
8.2 Typical Applications.................................................. 62
8.3 What to Do and What Not to Do............................... 66
8.4 Power Supply Recommendations.............................67
8.5 Layout....................................................................... 67
9 Device and Documentation Support............................68
9.1 Documentation Support............................................ 68
9.2 接收文档更新通知..................................................... 68
9.3 支持资源....................................................................68
9.4 Trademarks...............................................................68
9.5 Electrostatic Discharge Caution................................68
9.6 术语表....................................................................... 68
10 Mechanical, Packaging, and Orderable
1 特性................................................................................... 1
2 应用................................................................................... 1
3 说明................................................................................... 1
4 Revision History.............................................................. 2
5 Pin Configuration and Functions...................................3
6 Specifications.................................................................. 4
6.1 Absolute Maximum Ratings........................................ 4
6.2 ESD Ratings............................................................... 4
6.3 Recommended Operating Conditions.........................4
6.4 Thermal Information....................................................4
6.5 Electrical Characteristics.............................................5
6.6 Temperature Sensor................................................... 5
6.7 Magnetic Characteristics For A1.................................6
6.8 Magnetic Characteristics For A2.................................7
6.9 Magnetic Temp Compensation Characteristics...........8
6.10 I2C Interface Timing..................................................8
6.11 Power up Timing....................................................... 8
6.12 Typical Characteristics..............................................9
7 Detailed Description......................................................10
7.1 Overview...................................................................10
7.2 Functional Block Diagram.........................................10
Information.................................................................... 68
10.1 Package Option Addendum....................................69
10.2 Tape and Reel Information......................................71
4 Revision History
DATE
REVISION
NOTES
September 2022
*
Initial release.
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5 Pin Configuration and Functions
SCL
1
2
3
6
5
4
SDA
INT
GND
GND (TEST)
VCC
Not to scale
图5-1. DBV Package, 6-Pin SOT-23 (Top View)
表5-1. Pin Functions
PIN
TYPE
DESCRIPTION
NO.
1
NAME
SCL
IO
GND
I
Serial clock.
2
GND
Ground
3
GND (TEST)
VCC
TI Test Pin. Connect to ground in application.
Supply voltage
4
P
5
INT
IO
IO
Interrupt input/ output. If not used and connected to ground, set MASK_INTB = 1b.
Serial data.
6
SDA
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN
–0.3
0
MAX
UNIT
V
VCC
IOUT
VOUT
VIN
Main supply voltage
4
Output current, SDA, INT
Output voltage, SDA, INT
Input voltage, SCL, SDA, , INT
Magnetic flux density
10
mA
V
7
7
–0.3
–0.3
V
BMAX
TJ
Unlimited
150
T
Junction temperature
°C
°C
–40
–65
Tstg
Storage temperature
170
(1) Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply
functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If
used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully
functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime.
6.2 ESD Ratings
VALUE UNIT
Human body model (HBM), per AEC Q100-002(1)
±2000
±700
±500
V(ESD) Electrostatic discharge
Corner pins (1, 6, 3, and 4)
Other pins
V
Charged device model (CDM), per
AEC Q100-011
(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
over recommended VVcc range (unless otherwise noted)
MIN
2.3
0
NOM
MAX
3.6
5.5
2
UNIT
V
VVCC
VOUT
IOUT
VIH
Main supply voltage
Output voltage, SDA, INT
V
Output current, SDA, INT
mA
VVCC
VVCC
C
Input HIGH voltage, SCL, SDA, INT
Input LOW voltage, SCL, SDA, INT
Operating free air temperature
0.7
VIL
0.3
TA
125
–40
6.4 Thermal Information
THERMAL METRIC(1)
TMAG5173-Q1
DBV (6-SOT23)
6 pins
162
UNIT
RθJA
RθJC(top)
RθJB
ΨJT
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
81.6
50.1
Junction-to-top characterization parameter
Junction-to-board characterization parameter
30.7
49.8
ΨJB
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
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6.5 Electrical Characteristics
over operating free-air temperature range (unless otherwise noted)
over recommended VVcc range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
SDA, INT
VOL
Output LOW voltage, SDA, INT pin
Output leakage current, SDA, INT pin
IOUT = 2 mA
0
0.4
V
Output disabled
VOZ = 5.5V
IOZ
±100
nA
RPU = 10 kΩ
tFALL_INT
INT output fall time
6
ns
CL = 20pF
VPU = 1.7 V to 5.5 V
INT Interrupt time duration during
pulse mode
tINT (INT)
tINT (SCL)
INT_MODE = 001b or 010b
INT_MODE = 011b or 100b
10
10
µs
µs
SCL Interrupt time duration
DC POWER SECTION
VCCUV
IACTIVE
Under voltage threshold at VCC
Internal parameter (OTP option)
1.9
2.1
2.4
2.2
V
X, Y, Z, or thermal sensor active
conversion, LP_LN = 0b
Active mode current
Active mode current
mA
X, Y, Z, or thermal sensor active
conversion, LP_LN = 1b
IACTIVE
3.0
mA
Device in trigger mode, no conversion
started
ISTANDBY
ISLEEP
Stand-by mode current
Sleep mode current
0.45
8
mA
nA
AVERAGE POWER DURING DUTY-CYCLE MODE
Wake-up interval of 5000 ms
Magnetic 1-channel conversion
LP_LN = 0b
ICC_DCM_0p2_1
W&S mode current consumption
W&S mode current consumption
1.5
1.6
µA
µA
VCC = 3.3 V
Wake-up interval of 5000 ms
Magnetic 4-channel conversion
LP_LN = 0b
ICC_DCM_0p2_1
VCC = 3.3 V
Wake-up interval of 1 ms
Magnetic 1-channel conversion
LP_LN = 0b
ICC_DCM_1000_1
W&S mode current consumption
W&S mode current consumption
110
240
µA
µA
VCC = 3.3 V
Wake-up interval 1-ms, magnetic 4-ch
conversion, LP_LN =0b, VCC =3.3V
ICC_DCM_1000_4
6.6 Temperature Sensor
over operating free-air temperature range (unless otherwise noted)
over recommended VVcc range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
TSENS_RANGE
TSENS
Temperature sensing range
Temperature Output(1)
170
–40
℃
TA = 25°C
25
60.1
25
℃
LSB/℃
℃
Temperature sensing resolution (in 16-
bit format)
TSENS_RES
TSENS_T0
TADC_T0
Reference temperature for TADC_T0
Temperature result in decimal value for
TSENS_T0
17508
0.05
NRMS_T
RMS (1 Sigma) temperature noise
CONV_AVG = 101b
℃
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over operating free-air temperature range (unless otherwise noted)
over recommended VVcc range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
NRMS_T
RMS (1 Sigma) temperature noise
CONV_AVG = 000b
0.3
℃
(1) The temperature data is collected with T_CH_EN =1h and at least one magnetic channel enabled
6.7 Magnetic Characteristics For A1
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
x_y_RANGE = 0b
x_y_RANGE = 1b
z_RANGE = 0b
z_RANGE = 1b
±40 mT range
MIN
TYP
±40
MAX UNIT
mT
BIN_A1_X_Y
BIN_A1_X_Y
±80
mT
Linear magnetic range
BIN_A1_Z
±40
mT
BIN_A1_Z
±80
mT
SENS40_A1
790
LSB/mT
LSB/mT
Sensitivity, X, Y, or Z axis
SENS80_A1
±80 mT range
400
SENSER_PC_25C_A1
SENSER_PC_TEMP_A1
SENSLER_XY_A1
SENSLER_Z_A1
SENSMS_XY_A1
Sensitivity error, X, Y, Z axis
TA = 25°C
±0.5%
±1.5%
±0.10%
±0.10%
±0.75%
Sensitivity drift from 25°C, X, Y, Z axis
Sensitivity Linearity Error, X, Y-axis
Sensitivity Linearity Error, Z axis
TA = 25°C
TA = 25°C
Sensitivity mismatch among X-Y axes TA = 25°C
Sensitivity mismatch among Y-Z, or X-
Z axes
SENSMS_Z_A1
TA = 25°C
±0.55%
±1.5%
±1.5%
Sensitivity mismatch drift from 25°C
value; X-Y axes
SENSMS_DR_XY_A1
SENSMS_DR_Z_A1
Sensitivity mismatch drift from 25°C
value; Y-Z, or X-Z axes
SENSLDR_A1
Boff_A1
Sensitivity Lifetime drift, X, Y, Z axis
Offset
TA = 25°C
TA = 25°C
±1.0%
±100
±1.2
µT
µT/°C
µT
Boff_TC_A1
Boff_DR_A1
Offset drift from 25°C value
Offset Lifetime drift
TA = 25°C
±100
LP_LN = 0b
CONV_AVG = 000b
NRMS_XY_00_000_A1
NRMS_XY_01_000_A1
NRMS_XY_00_101_A1
NRMS_XY_01_101_A1
NRMS_Z_00_000_A1
NRMS_Z_01_000_A1
NRMS_Z_00_101_A1
NRMS_Z_01_101_A1
98
87
µT
µT
µT
µT
µT
µT
µT
µT
LP_LN = 1b
CONV_AVG = 000b
RMS (1 Sigma) magnetic noise (X or
Y-axis)
TA = 25°C
LP_LN = 0b
CONV_AVG = 101b
17.5
16
LP_LN = 1b
CONV_AVG = 101b
LP_LN = 0b
CONV_AVG = 000b
53
LP_LN = 1b
CONV_AVG = 000b
47
RMS (1 Sigma) magnetic noise (Z
axis)
TA = 25°C
LP_LN = 0b
CONV_AVG = 101b
10
LP_LN = 1b
CONV_AVG = 101b
9
X-Z Angle error in full 360 degree
AERR_X_Z_101_A1
rotation
TA = 25°C
CONV_AVG = 101b
CONV_AVG = 101b
±0.5
Degree
Degree
X-Y Angle error in full 360 degree
rotation
AERR_X_Y_101_A1
±0.25
TA = 25°C
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over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
X-Z Angle temp drift from 25°C in full
360 degree rotation
ADR_X_Z_101_A1
ADR_X_Y_101_A1
CONV_AVG = 101b
CONV_AVG = 101b
±0.5
Degree
X-Y Angle temp drift from 25°C in full
360 degree rotation
±0.25
Degree
6.8 Magnetic Characteristics For A2
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
±133
MAX UNIT
mT
BIN_A2_X_Y
x_y_RANGE = 0b
x_y_RANGE = 1b
z_RANGE = 0b
z_RANGE = 1b
±133 mT range
±266 mT range
TA = 25°C
BIN_A2_X_Y
±266
mT
Linear magnetic range
BIN_A2_Z
±133
mT
BIN_A2_Z
±266
mT
SENS133_A2
246
LSB/mT
LSB/mT
Sensitivity, X, Y, or Z axis
SENS266_A2
123
SENSER_PC_25C_A2
SENSER_PC_TEMP_A2
SENSLER_XY_A2
SENSLER_Z_A2
SENSMS_XY_A2
Sensitivity error, X, Y, Z axis
± 0.5%
±1.5%
±0.10%
±0.10%
±0.50%
Sensitivity drift from 25°C, X, Y, Z axis
Sensitivity Linearity Error, X, Y-axis
Sensitivity Linearity Error, Z axis
TA = 25°C
TA = 25°C
Sensitivity mismatch among X-Y axes TA = 25°C
Sensitivity mismatch among Y-Z, or X-
Z axes
SENSMS_Z_A2
TA = 25°C
±0.55%
±1.5%
±1.5%
Sensitivity mismatch drift from 25°C
value; X-Y axes
SENSMS_DR_XY_A2
SENSMS_DR_Z_A2
Sensitivity mismatch drift from 25°C
value; Y-Z, or X-Z axes
SENSLDR_A2
Boff_A2
Sensitivity Lifetime drift, X, Y, Z axis
Offset
TA = 25°C
TA = 25°C
±1.0%
±100
±1.2
µT
µT/°C
µT
Boff_TC_A2
Boff_DR_A2
Offset drift from 25°C value
Offset Lifetime drift
TA = 25°C
±100
LP_LN =0 b
CONV_AVG = 000b
NRMS_XY_00_000_A2
NRMS_XY_01_000_A2
NRMS_XY_00_010_A2
NRMS_XY_10_010_A2
NRMS_Z_00_000_A2
NRMS_Z_10_000_A2
NRMS_Z_00_101_A2
NRMS_Z_10_101_A2
127
117
22
µT
µT
µT
µT
µT
µT
µT
µT
LP_LN = 1b
CONV_AVG = 000b
RMS (1 Sigma) magnetic noise (X or
Y-axis)
LP_LN = 0b
CONV_AVG = 101b
LP_LN = 1b
CONV_AVG = 101b
21
LP_LN = 0b
CONV_AVG = 000b
93
LP_LN = 1b
CONV_AVG = 000b
88
RMS (1 Sigma) magnetic noise (Z
axis)
LP_LN = 0b
CONV_AVG = 101b
16
LP_LN = 1b
CONV_AVG = 101b
15.5
X-Z Angle error in full 360 degree
AERR_X_Z_101_A2
rotation
TA = 25°C
CONV_AVG = 101b
CONV_AVG = 101b
±0.5
Degree
Degree
X-Y Angle error in full 360 degree
rotation
AERR_X_Y_101_A2
±0.25
TA = 25°C
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over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
X-Z Angle temp drift from 25°C in full
360 degree rotation
ADR_X_Z_101_A2
ADR_X_Y_101_A2
CONV_AVG = 101b
CONV_AVG = 101b
±0.5
Degree
X-Y Angle temp drift from 25°C in full
360 degree rotation
±0.25
Degree
6.9 Magnetic Temp Compensation Characteristics
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
TEMPCO = 00b
TEMPCO = 01b
MIN
TYP
MAX UNIT
%/°C
TC_00
TC_12
TC_03
TC_20
0
0.12
0.03
0.2
%/°C
Temperature compensation (X, Y, Z-axes)
TEMPCO = 10b
TEMPCO = 11b
%/°C
%/°C
6.10 I2C Interface Timing
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP MAX UNIT
I2C Interface Fast Mode Plus
fI2C_fmp
I2C clock (SCL) frequency
LOAD = 50 pF
1000 KHz
twhigh_fmp
twlo_wfmp
tsu_cs_fmp
th_cs_fmp
ticr_fmp
High time: SCL logic high time duration
Low time: SCL logic low time duration
SDA data setup time
350
500
50
ns
ns
ns
ns
SDA data hold time
120
SDA, SCL input rise time
120
55
ns
ns
µs
µs
µs
µs
ticf_fmp
SDA, SCL input fall time
th_ST_fmp
tsu_SR_fmp
tsu_SP_fmp
tw_SP_SR_fmp
Start condition hold time
0.1
0.1
0.1
0.2
Repeated start condition setup time
Stop condition setup time
Bus free time between stop and start condition
I2C Interface Fast Mode
fI2C
I2C clock (SCL) frequency
LOAD = 50 pF
400 KHz
twhigh
twlow
tsu_cs
th_cs
High time: SCL logic high time duration
Low time: SCL logic low time duration
SDA data setup time
600
1300
100
0
ns
ns
ns
ns
SDA data hold time
ticr
SDA, SCL input rise time
300
300
ns
ns
µs
µs
µs
µs
ticf
SDA, SCL input fall time
th_ST
tsu_SR
tsu_SP
tw_SP_SR
Start condition hold time
0.3
0.3
0.3
0.6
Repeated start condition setup time
Stop condition setup time
Bus free time between stop and start condition
6.11 Power up Timing
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP MAX UNIT
270 µs
Time to go to stand-by mode after VCC supply voltage
crossing VCC_MIN
tstart_power_up
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over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP MAX UNIT
tstart_sleep
Time to go to stand-by mode from sleep mode(1)
50
70
µs
µs
Time to go into continuous measure mode from stand-by
mode
tstart_measure
CONV_AVG = 000b,
tmeasure
Conversion time
OPERATING_MODE =10b,
only one channel enabled
50
µs
CONV_AVG = 101b,
tmeasure
tgo_sleep
Conversion time
OPERATING_MODE =10b,
only one channel enabled
825
20
µs
µs
Time to go into sleep mode after SCL goes high
(1) The device will recognize the I2C communication from a primary only during stand-by or continuous measure modes. While the device
is in sleep mode, a valid secondary address will wake up the device but no acknowledge will be sent to the primary. Start up time need
to be considered before addressing the device after wake up.
6.12 Typical Characteristics
at TA = 25°C typical (unless otherwise noted)
0.6
0.5
0.4
0.3
0.2
0.1
0
3
2.5
2
1.5
1
0.5
0
Vcc = 1.8 V
Vcc = 3.3 V
Vcc = 1.8 V
Vcc = 3.3 V
-40
-20
0
20
40
60
80
100
120
-40
-20
0
20
40
60
80
100
120
Temperature (C)
Temperature (C)
图6-1. Standby Mode ICC vs Temperature
图6-2. Active Mode ICC vs Temperature
16
25
TXYZ Selected, VCC = 1.8 V
TX Selected, VCC = 1.8 V
TXYZ Selected, VCC = 3.3 V
TX Selected, VCC = 3.3 V
VCC = 1.8 V
VCC = 3.3 V
14
12
10
8
20
15
10
5
6
4
2
0
0
20
1020
2020
Sleep-time (ms)
3020
4020
5020
-40
-20
0
20
40
60
80
100 120 140
Temperature (C)
图6-4. Average ICC vs W&S Mode Sleep Time
图6-3. Sleep Mode ICC vs Temperature
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7 Detailed Description
7.1 Overview
The TMAG5173-Q1 IC is based on the Hall-effect technology and precision mixed signal circuitry from Texas
Instruments. The output signals (raw X, Y, Z magnetic data and temperature data) are accessible through the I2C
interface.
The IC consists of the following functional and building blocks:
• The Power Management & Oscillator block contains a low-power oscillator, biasing circuitry, undervoltage
detection circuitry, and a fast oscillator.
• The sensing and temperature measurement block contains the Hall biasing, Hall sensors with multiplexers,
noise filters, integrator circuit, temperature sensor, and the ADC. The Hall-effect sensor data and temperature
data are multiplexed through the same ADC.
• The Interface block contains the I2C control circuitry, ESD protection circuits, and all the I/O circuits. The
TMAG5173-Q1 supports multiple I2C read frames along with integrated cyclic redundancy check (CRC).
7.2 Functional Block Diagram
VCC
SCL
SDA
Power Management and Oscillator
Result Registers
ADC
Z
Y
X
+
Gain and
Filtering
Interface
MUX
TEST
–
Config Registers
Temperature sensor
INT
Digital Core
GND
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7.3 Feature Description
7.3.1 Magnetic Flux Direction
As shown in 图7-1, the TMAG5173-Q1 will generate positive ADC codes in response to a magnetic north pole in
the proximity. Similarly, the TMAG5173-Q1 will generate negative ADC codes if magnetic south poles approach
from the same directions.
1
2
3
图7-1. Direction of Sensitivity
7.3.2 Sensor Location
图7-2 shows the location of X, Y, Z hall elements inside the TMAG5173-Q1.
1.85-mm
Y
X
Z
0.68-mm
图7-2. Location of X, Y, Z Hall Elements
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7.3.3 Interrupt Function
The TMAG5173-Q1 supports flexible and configurable interrupt functions through either the INT or the SCL pin.
表 7-1 shows different conversion completion events where result registers and SET_COUNT bits update, and
where they do not.
表7-1. Result Register & SET_COUNT Update After Conversion Completion
I2C BUS BUSY, NOT TALKING I2C BUS BUSY & TALKING TO
I2C BUS NOT BUSY
TO DEVICE
DEVICE
MODE
DESCRIPTION
INT_MODE
RESULT
UPDATE?
SET_COUNT
UPDATE?
RESULT
UPDATE?
SET_COUNT
UPDATE?
RESULT
UPDATE?
SET_COUNT
UPDATE?
000b
001b
No interrupt
Yes
Yes
Yes
No
No
No
Yes
Yes
Yes
Yes
Interrupt
through INT
Yes
Yes
Yes
No
No
No
No
No
Interrupt
through INT
except when
I2C busy
010b
011b
100b
Yes
Yes
No
No
No
No
Yes
Yes
Yes
Yes
Yes
Yes
Interrupt
through SCL
Interrupt
through SCL
except when
I2C busy
备注
TI does not recommend sharing the same I2C bus with multiple secondary devices when using the
SCL pin for interrupt function. The SCL interrupt may corrupt transactions with other secondary
devices if present in the same I2C bus.
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7.3.3.1 Interrupt Through SCL
图7-3 shows an example for interrupt function through the SCL pin with the device programmed to wake-up and
sleep mode for threshold cross at a predefined intervals. The wake-up intervals can be set through the
SLEEPTIME bits. When the magnetic threshold cross is detected, the device asserts a fixed width interrupt
signal through the SCL pin, and goes back to standby mode.
Wake-up & Sleep
Standby Mode
Mode
Operating Mode
X Ch Threshold
X Magnetic
Field
Interrupt through
SCL
Time
图7-3. Interrupt Through SCL
7.3.3.2 Fixed Width Interrupt Through INT
图 7-4 shows an example for fixed-width interrupt function through the INT pin. The device is programmed to be
in wake-up and sleep mode to detect a magnetic threshold. The INT_STATE register bit is set 1b. When the
magnetic threshold cross is detected, the device asserts a fixed width interrupt signal through the INT pin, and
goes back to standby mode.
Wake-up & Sleep
Standby Mode
Mode
Operating Mode
X Ch Threshold
X Magnetic
Field
Interrupt through INT
(Fixed Width)
SCL Line
Time
图7-4. Fixed Width Interrupt Through INT
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7.3.3.3 Latched Interrupt Through INT
图 7-5 shows an example for latched interrupt function through the INT pin. The device is programmed to be in
wake-up and sleep mode to detect a magnetic threshold. The INT_STATE register bit is set 0b. When the
magnetic threshold cross is detected, the device asserts a latched interrupt signal through the INT pin, and goes
back to standby mode. The interrupt latch is cleared only after the device receives a valid address through the
SCL line.
Wake-up & Sleep
Standby Mode
Mode
Operating Mode
X Ch Threshold
X Magnetic
Field
Interrupt through INT
(Latched)
SCL Line
Time
图7-5. Latched Interrupt Through INT
7.3.4 Device I2C Address
表 7-2 shows the default factory programmed I2C addresses of the TMAG5173-Q1. The device needs to be
addressed with the factory default I2C address after power up. If required, a primary can assign a new I2C
address through the I2C_ADDRESS register bits after power up.
表7-2. I2C Default Address
MAGNETIC
RANGE
I2C READ ADDRESS (8-
BIT)
DEVICE VERSION
I2C ADDRESS (7 MSB BITS) I2C WRITE ADDRESS (8-BIT)
TMAG5173A1
TMAG5173B1
TMAG5173C1
TMAG5173D1
TMAG5173A2
TMAG5173B2
TMAG5173C2
TMAG5173D2
35h
22h
78h
44h
35h
22h
78h
44h
6Ah
44h
F0h
88h
6Ah
44h
F0h
88h
6Bh
45h
F1h
89h
6Bh
45h
F1h
89h
±40 mT, ±80 mT
±133 mT, ±266 mT
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7.3.5 Magnetic Range Selection
表 7-3 shows the magnetic range selection for the TMAG5173-Q1 device. The X, Y, and Z axes range can be
selected with the X_Y_RANGE and Z_RANGE register bits.
表7-3. Magnetic Range Selection
RANGE REGISTER SETTING
X_Y_RANGE = 0b
X_Y_RANGE = 1b
Z_RANGE = 0b
TMAG5173A1
TMAG5173A2
COMMENT
Better SNR performance
Better SNR performance
±40 mT
±133 mT
X, Y Axis Field
Z Axis Field
±80 mT
±266 mT
±40 mT
±133 mT
Z_RANGE = 1b
±80 mT
±266 mT
7.3.6 Update Rate Settings
The TMAG5173-Q1 offers multiple update rates to offer design flexibility to system designers. The different
update rates can be selected with the CONV_AVG register bits. 表 7-4 shows different update rate settings for
the TMAG5173-Q1.
表7-4. Update Rate Settings
UPDATE RATE
TWO AXES
13.3 kSPS
8.0 kSPS
OPERATING
MODE
REGISTER SETTING
COMMENT
SINGLE AXIS
20.0 kSPS
13.3 kSPS
8.0 kSPS
THREE AXES
10.0 kSPS
5.7 kSPS
3.1 kSPS
1.6 kSPS
0.8 kSPS
0.4 kSPS
X, Y, Z Axis
X, Y, Z Axis
X, Y, Z Axis
X, Y, Z Axis
X, Y, Z Axis
X, Y, Z Axis
CONV_AVG = 000b
CONV_AVG = 001b
CONV_AVG = 010b
CONV_AVG = 011b
CONV_AVG = 100b
CONV_AVG = 101b
Fastest update rate
4.4 kSPS
4.4 kSPS
2.4 kSPS
2.4 kSPS
1.2 kSPS
1.2 kSPS
0.6 kSPS
Best SNR case
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7.4 Device Functional Modes
The TMAG5173-Q1 supports multiple functional modes for wide array of applications as explained in 图 7-6. A
specific functional mode is selected by setting the corresponding value in the OPERATING_MODE register bits.
The device starts powering up after VCC supply crosses the minimum threshold as specified in the
Recommended Operating Conditions (ROC) table.
7.4.1 Standby (Trigger) Mode
The TMAG5173-Q1 goes to stand-by mode after first-time power up. At this mode, the digital circuitry and
oscillators are on and the device is ready to accept commands from the primary device. Based off the
commands the device can start a sensor data conversion, go to power saving mode or the start data transfer
through I2C interface. A new conversion can be triggered through I2C command or through INT pin. In this mode
the device retains the immediate past conversion result data in the corresponding result registers. The time it
takes for the device to go to standby mode from power up is denoted by Tstart_power_up
.
7.4.2 Sleep Mode
The TMAG5173-Q1 supports an ultra-low power sleep mode where it retains the critical user configuration
settings. In this mode the device doesn't retain the conversion result data. A primary can wake up the device
from sleep mode through I2C communications or the INT pin. The time it takes for the device to go to standby
mode from sleep mode is denoted by Tstart_sleep
.
7.4.3 Wake-up and Sleep (W&S) Mode
In this mode the TMAG5173-Q1 can be configured to go to sleep and wake up at a certain interval, and measure
sensor data based off the SLEEPTIME register bits setting. The device can be set to generate an interrupt
through the INT_CONFIG_1 register. Once the conversion is complete and the interrupt condition is met, the
TMAG5173-Q1 will exit the W&S mode and go to the standby mode. The last measured data will be stored in the
corresponding result registers before the device goes to the standby mode. If the interrupt condition isn't met, the
device will continue to be in the W&S mode to wake up and measure data at the specified interval. A primary can
wake up the TMAG5173-Q1 anytime during the W&S mode through I2C bus or INT pin. The time it takes for the
device to go to standby mode from W&S mode is denoted by Tstart_sleep
.
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7.4.4 Continuous Measure Mode
In this mode the TMAG5173-Q1 continuously measures the sensor data per SENSOR_CONFIG &
DEVICE_CONFIG register settings. In this mode the result registers can be accessed through the I2C lines. The
time it takes for the device to go from standby mode to continuous measure mode is denoted by Tstart_measure
.
Device Startup: (VCC crossing MIN threshold specified in the ROC
table)
Sleep Mode
Wake-up & Sleep Mode
Tstart_power_up
Tstart_sleep
Tgo_sleep
Stand-by (Trigger) Mode
Tstart_measure
Continuous Measure Mode
图7-6. TMAG5173-Q1 Power-Up Sequence
表7-5 shows different device operational modes of the TMAG5173-Q1.
表7-5. Operating Modes
ACCESS TO
USER
REGISTERS
OPERATING
MODE
RETAIN USER
CONFIGURATION
DEVICE FUNCTION
COMMENT
Continuous
Measure Mode
Continuously measuring x, y, z
axis, or temperature data
Yes
Yes
Yes
Device is ready to accept I2C
commands and start active
conversion
Standby Mode
Yes
Yes
Wakes up at a certain interval to
measure the x, y, z axis, or
temperature data
1, 5, 10, 15, 20, 30, 50, 100, 500, 1000,
2000, 5000, & 20000-ms intervals
supported.
Wake-up and
Sleep Mode
No
No
Sleep mode can be utilized by a primary
device to implement other power saving
intervals not supported by wake-up and
sleep mode.
Device retains key configuration
settings, but doesn't retain the
measurement data
Sleep Mode
Yes
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7.5 Programming
7.5.1 I2C Interface
The TMAG5173-Q1 offers I2C interface, a two-wire interface to connect low-speed devices like microcontrollers,
A/D and D/A converters, I/O interfaces and other similar peripherals in embedded systems.
7.5.1.1 SCL
The SCL is the clock line used to synchronize all data transfers over the I2C bus.
7.5.1.2 SDA
SDA is the bidirectional data line for the I2C interface.
7.5.1.3 I2C Read/Write
The TMAG5173-Q1 supports multiple I2C read and write frames targeting different applications. I2C_RD and
CRC_EN bits offers multiple read frames to optimize the read time, data resolution, and data integrity for a select
application.
7.5.1.3.1 Standard I2C Write
图 7-7 shows an example of standard I2C two byte write command supported by TMAG5173-Q1. The starting
byte contains 7-bit secondary device address and a '0' at the R/W command bit. The MSB of the second byte
contains the conversion trigger bit. Writing '1' at this trigger bit will start a new conversion after the register
address decoding is completed. The 7 LSB bits of the second byte contains the starting register address for the
write command. After the two command bytes, the primary device starts to send the data to be written at the
corresponding register address. Each successive write byte will send the data for the successive register
address in the secondary device.
Primary Data
ACK from Secondary
No ACK from Primary
Conversion Trigger
Secondary Data
Start/ Stop from Primary
ACK from Primary
0
Data[Reg_Add]
Data[Reg_Add+1]
Data[Reg_Add+n]
Register address
Secondary address
图7-7. Standard I2C Write
7.5.1.3.2 General Call Write
图7-8 shows an example of the general call I2C write command supported by the TMAG5173-Q1. This
command is useful to configure multiple I2C devices in a I2C bus simultaneously. The starting byte contains 8-bit
'0's. The MSB of the second byte contains the conversion trigger bit. Writing '1' at this trigger bit will start a new
conversion after the register address decoding is completed. The 7 LSB bits of the second byte contains the
starting register address for the write command. After the two command bytes, the primary device starts to send
the data to be written at the corresponding register address of all the secondary devices in the I2C bus. Each
successive write byte will send the data for the successive register address in the secondary devices.
Primary Data
ACK from Secondary
No ACK from Primary
Conversion Trigger
Secondary Data
Start/ Stop from Primary
ACK from Primary
0
0 0 0 0 0 0 0
Data[Reg_Add]
Data[Reg_Add+1]
Data[Reg_Add+N]
Register address
General call address
图7-8. General Call I2C Write
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7.5.1.3.3 Standard 3-Byte I2C Read
图 7-9 and 图 7-10 show examples of standard I2C three byte read command supported by the TMAG5173-Q1.
The starting byte contains 7-bit secondary device address and the R/W command bit '0'. The MSB of the second
byte contains the conversion trigger command bit. Writing '1' at this trigger bit will start a new conversion after
the register address decoding is completed. The 7 LSB bits of the second byte contains the starting register
address for the write command. After receiving ACK signal from secondary, the primary send the secondary
address once again with R/W command bit as '1'. The secondary starts to send the corresponding register data.
It will send successive register data with each successive ACK from primary. If CRC is enabled, the secondary
will send the fifth CRC byte based off the CRC calculation of immediate past 4 register bytes.
备注
In the standard 3-byte read command the TMAG5173-Q1 doesn't support CRC if the data length is
more than 4 byte. Initiate successive read commands for larger data stream requiring CRC.
Primary Data
ACK from Secondary
ACK from Primary
No ACK from Primary
Conversion Trigger
Secondary Data
Start/ Stop from Primary
0
1
Data[Reg_Add]
Data[Reg_Add+1]
Data[Reg_Add+n]
Register address
Secondary address
Secondary address
图7-9. Standard 3-Byte I2C Read With CRC Disabled, CRC_EN = 0b
Primary Data
ACK from Secondary
Conversion Trigger
No ACK from Primary
ACK from Primary
Start/ Stop from Primary
Secondary Data
0
1
Data[Reg_Add]
Data[Reg_Add+1]
Data[Reg_Add+2]
Register address
Secondary address
Secondary address
Data[Reg_Add+3]
CRC
图7-10. Standard 3-Byte I2C Read With CRC Enabled, CRC_EN = 1b
7.5.1.3.4 1-Byte I2C Read Command for 16-Bit Data
图 7-11 and 图 7-12 show examples of 1-byte I2C read command supported by the TMAG5173-Q1. Select
I2C_RD =01b to enable this mode. The command byte contains 7-bit secondary device address and a '1' at the
R/W bit. In this mode, per MAG_CH_EN and T_CH_EN bits setting, the device will send 16-bit data of the
enabled channels and the CONV_STATUS register data byte. If CRC is enabled, the device will send an
additional CRC byte based off the CRC calculation of the command byte and the data sent in the current packet.
When multiple channels are enabled, the sent data follows the T, X, Y, and Z sequence in the successive data
bytes.
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Primary Data
ACK from Secondary
ACK from Primary
No ACK from Primary
Secondary Data
Start/ Stop from Primary
1
Secondary address
Data[Axis1_MSB]
Data[Axis1_LSB]
Data[CONV_STATUS]
Data[Axis2_MSB]
Data[Y_MSB]
Single Axis Measurement Example,. X or Y or Z
1
Data[Axis1_MSB]
Data[Axis1_LSB]
Data[Axis2_LSB]
Data[CONV_STATUS]
Secondary address
Two Axes Measurement Example, XY or YZ or XZ
1
Data[X_MSB]
Data[X_LSB]
Data[Y_LSB]
Data[Z_MSB]
Data[Z_LSB]
Secondary address
Data[CONV_STATUS]
Three Axes Measurement Example, XYZ
1
Data[T_MSB]
Data[T_LSB]
Data[X_MSB]
Data[X_LSB]
Data[Y_MSB]
Data[Y_LSB]
Secondary address
Data[Z_MSB]
Data[Z_LSB]
Data[CONV_STATUS]
All Sensors Measurement Example, TXYZ
图7-11. 1-Byte I2C Read Command for 16-Bit Data With CRC Disabled, CRC_EN = 0b
Primary Data
ACK from Secondary
ACK from Primary
No ACK from Primary
Secondary Data
Start/ Stop from Primary
1
Data[Axis1_MSB]
Data[Axis1_LSB]
Data[CONV_STATUS]
Data[Axis2_MSB]
Data[Y_MSB]
CRC
Secondary address
Single Axis Measurement Example,. X or Y or Z
1
Data[Axis1_MSB]
Data[Axis1_LSB]
Data[Axis2_LSB]
Data[CONV_STATUS]
CRC
Secondary address
Two Axes Measurement Example, XY or YZ or XZ
1
Data[X_MSB]
Data[X_LSB]
Data[Y_LSB]
Data[Z_MSB]
Data[Z_LSB]
Secondary address
Data[CONV_STATUS]
CRC
Three Axes Measurement Example, XYZ
1
Data[T_MSB]
Data[T_LSB]
Data[Y_MSB]
Data[Y_LSB]
Data[Z_MSB]
Data[Z_LSB]
Secondary address
Data[CONV_STATUS]
CRC
Three Axes Measurement Example, TYZ
图7-12. 1-Byte I2C Read Command for 16-Bit Data With CRC Enabled, CRC_EN = 1b
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备注
In the 1-byte read command for 16-bit data only up to 3 channels data can be sent when CRC is
enabled. This restriction doesn't apply if CRC is disabled.
7.5.1.3.5 1-Byte I2C Read Command for 8-Bit Data
图 7-13 and 图 7-14 show examples of 1-byte I2C read command supported by the TMAG5173-Q1. Select
I2C_RD =10b to enable this mode. The command byte contains 7-bit secondary device address and a '1' at the
R/W bit. In this mode, per MAG_CH_EN and T_CH_EN bits setting, the device will send 8-bit data of the
enabled channels and the CONV_STATUS register data byte. If CRC is enabled, the device will send an
additional CRC byte based off the CRC calculation of the command byte and the data sent in the current packet.
When multiple channels are enabled, the sent data follows the T, X, Y, and Z sequence in the successive data
bytes.
Primary Data
ACK from Secondary
No ACK from Primary
Secondary Data
Start/ Stop from Primary
ACK from Primary
1
Data[Axis1_MSB]
Data[CONV_STATUS]
Secondary address
Single Axis Measurement Example,. X or Y or Z
1
Data[Axis1_MSB]
Data[Axis2_MSB]
Data[CONV_STATUS]
Secondary address
Two Axes Measurement Example, XY or YZ or XZ
1
Data[Y_MSB]
Data[X_MSB]
Data[Z_MSB]
Data[CONV_STATUS]
Secondary address
Three Axes Measurement Example, XYZ
1
Data[Y_MSB]
Data[X_MSB]
Data[Z_MSB]
Data[CONV_STATUS]
Data[T_MSB]
Secondary address
All Sensors Measurement Example, TXYZ
图7-13. 1-Byte I2C Read Command for 8-Bit Data With CRC Disabled, CRC_EN = 0b
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Primary Data
ACK from Secondary
ACK from Primary
No ACK from Primary
Secondary Data
Start/ Stop from Primary
1
Data[Axis1_MSB]
Data[CONV_STATUS]
CRC
Secondary address
Single Axis Measurement Example, X or Y or Z
1
Data[Axis1_MSB]
Data[Axis2_MSB]
Data[CONV_STATUS]
CRC
Secondary address
Two Axes Measurement Example, XY or YZ or XZ
1
Data[X_MSB]
Data[Y_MSB]
Data[Z_MSB]
Data[CONV_STATUS]
CRC
Secondary address
Three Axes Measurement Example, XYZ
1
Data[T_MSB]
Data[X_MSB]
Data[Y_MSB]
Data[Z_MSB]
Data[CONV_STATUS]
CRC
Secondary address
Three Axes & Temperature Measurement Example, TXYZ
图7-14. 1-Byte I2C Read Command for 8-Bit Data With CRC Enabled, CRC_EN = 1b
备注
In the 1-byte read command for 8-bit data any combinations of channels can be sent without
restrictions.
7.5.1.3.6 I2C Read CRC
The TMAG5173-Q1 supports optional CRC during I2C read. The CRC can be enabled through the CRC_EN
register bit. The CRC is performed on a data string that is determined by the I2C read type. The CRC information
is sent as a single byte after the data bytes. The code is generated by the polynomial x8 + x2 + x + 1. Initial CRC
bits are FFh.
The following equations can be employed to calculate CRC:
d = Data Input, c = Initial CRC (FFh)
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
newcrc[0] = d[7] ^ d[6] ^ d[0] ^ c[0] ^ c[6] ^ c[7]
newcrc[1] = d[6] ^ d[1] ^ d[0] ^ c[0] ^ c[1] ^ c[6]
newcrc[2] = d[6] ^ d[2] ^ d[1] ^ d[0] ^ c[0] ^ c[1] ^ c[2] ^ c[6]
newcrc[3] = d[7] ^ d[3] ^ d[2] ^ d[1] ^ c[1] ^ c[2] ^ c[3] ^ c[7]
newcrc[4] = d[4] ^ d[3] ^ d[2] ^ c[2] ^ c[3] ^ c[4]
newcrc[5] = d[5] ^ d[4] ^ d[3] ^ c[3] ^ c[4] ^ c[5]
newcrc[6] = d[6] ^ d[5] ^ d[4] ^ c[4] ^ c[5] ^ c[6]
newcrc[7] = d[7] ^ d[6] ^ d[5] ^ c[5] ^ c[6] ^ c[7]
The following examples show calculated CRC byte based off various input data:
I2C Data 00h : CRC = F3h
I2C Data FFh : CRC = 00h
I2C Data 80h : CRC = 7Ah
I2C Data 4Ch : CRC = 10h
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I2C Data E0h : CRC = 5Dh
I2C Data 00000000h : CRC = D1h
I2C Data FFFFFFFFh : CRC = 0Fh
7.5.2 Data Definition
7.5.2.1 Magnetic Sensor Data
The X, Y, and Z magnetic sensor data are stored in x_MSB_RESULT and x_LSB_RESULT registers. 图 7-15
shows that each sensor output stored in a 16-bit 2's complement format in two 8-bit registers. The data can be
retrieved as 16-bit format combining both MSB and LSB registers, or as 8-bit format through the MSB register.
x_MSB_RESULT
x_LSB_RESULT
图7-15. Magnetic Sensor Data Definition
The measured magnetic field can be calculated using 方程式 10 for 16-bit data, and using 方程式 11 for 8-bit
data.
14
i = 0
15
− D × 2
i
+ ∑
D × 2
i
15
B =
× 2 B
(10)
R
16
2
where
• B is magnetic field in mT.
• Di is the data bit shown in 图7-15.
• BR is the magnetic range in mT for the corresponding channel.
6
7
i
− D × 2 + ∑
15
D
× 2
i = 0 i + 8
B =
× 2 B
(11)
R
8
2
7.5.2.2 Temperature Sensor Data
The TMAG5173-Q1 will measure temperature from –40°C to 170°C. The temperature sensor data are stored in
T_MSB_RESULT and T_LSB_RESULT registers. 图 7-16 shows the sensor output stored in a 16-bit 2's
complement format in two 8-bit registers. The data can be retrieved as 16-bit format combining both MSB and
LSB registers, or as 8-bit format through the MSB register.
T_MSB_RESULT
T_LSB_RESULT
图7-16. Temperature Sensor Data Definition
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Use 方程式 12 to calculate the measured temperature in degree Celsius for 16-bit data, and use 方程式 13 to
calculate the measured temperature for 8-bit data.
T
− T
ADC_T0
ADC_T
T = T
+
+
(12)
(13)
SENS_T0
SENS_T0
T
ADC_RES
T
ADC_T0
256 ×
T
−
ADC_T
256
T = T
T
ADC_RES
where
• T is the measured temperature in degree Celsius.
• TSENS_T0 as listed in the Electrical Characteristics table.
• TADC_RES is the change in ADC code per degree Celsius.
• TADC_T0 as listed in the Electrical Characteristics table.
• TADC_T is the measured ADC code for temperature T.
7.5.2.3 Angle and Magnitude Data Definition
The TMAG5173-Q1 calculates the angle from a pair of magnetic axes based off the ANGLE_EN register bits
setting. 图 7-17 shows the angle information stored in the ANGLE_RESULT_MSB and ANGLE_RESULT_LSB
registers. Bits D04-D12 store angle integer value from 0 to 360 degree. Bits D00-D03 store fractional angle
value. The 3-MSB bits are always populated as b000. Use 方程式14 to calculate the angle value.
3
i
∑
D × 2
i
12
i = 4
i − 4
i = 0
16
A = ∑
D × 2
+
(14)
i
where
• A is the angle measured in degree.
• Di is the data bit as shown in 图7-17.
For example: a 354.50 degree is populated as 0001 0110 0010 1000b and a 17.25 degree is populated as 000
0001 0001 0100b.
Reserved bits
9-bit Angle integer value
4-bit Angle fraction value
0
0 0
图7-17. Angle Data Definition
During the angle calculation, use 方程式15 to calculate the resultant vector magnitude.
2
Cℎ1
2
Cℎ2
M = MADC
+ MADC
(15)
where
• MADCCh1, MADCCh2 are the ADC codes of the two magnetic channels selected for the angle calculation.
图 7-18 shows the magnitude value stored in the MAGNITUDE_RESULT register. For on-axis angular
measurement the magnitude value should remain constant across the full 360° measurement.
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MAGNITUDE_RESULT
图7-18. Magnitude Result Data Definition
7.5.2.4 Magnetic Sensor Offset Correction
The TMAG5173-Q1 enables offset correction for a pair of magnetic axes (see 图 7-19). The
MAG_OFFSET_CONFIG_1 and MAG_OFFSET_CONFIG_2 registers store the offset values to be corrected in
2's complement data format. As an example, if the uncorrected waveform for a particular axis has a value that is
+2 mT too high, the offset correction value of –2 mT should be entered in the corresponding offset correction
register. The selection and order of the sensors are defined in the ANGLE_EN register bits setting. The default
value of these offset correction registers are set as zero.
ΔOffset
0-mT Reference Axis
图7-19. Magnetic Sensor Data Offset Correction
Use 方程式 16 to calculate the amount of offset for each axis. As an example, with a ±40 mT range,
MAG_OFFSET_CONFIG_1 set at 1000 0000b, and MAG_OFFSET_CONFIG_2 set at 0001 0000b, the offset
correction for the first axis is −2.5 mT and second axis is 0.312 mT.
6
i = 0
7
i
− D × 2 + ∑
D × 2
i
7
∆
=
× 2 B
(16)
Offset
R
12
2
where
• ΔOffset is the amount of offset correction to be applied in mT.
• Di is the data bit in the MAG_OFFSET_CONFIG_1 or MAG_OFFSET_CONFIG_2 register.
• BR is the magnetic range in mT for the corresponding channel.
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Alternately, you can use 方程式 17 to calculate the values for MAG_OFFSET_CONFIG_1 or
MAG_OFFSET_CONFIG_2 for a target offset correction.
12
2
× ∆
2 B
Offset
R
MAG_OFFSET =
(17)
where
• MAG_OFFSET is the decimal value to be entered in the MAG_OFFSET_CONFIG_1 or
MAG_OFFSET_CONFIG_2 register.
• ΔOffset is the amount of offset correction to be applied in mT.
• BR is the magnetic range in mT for the corresponding channel.
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7.6 TMAG5173 Registers
表 7-6 lists the memory-mapped registers for the TMAG5173 registers. All register offset addresses not listed in
表7-6 should be considered as reserved locations and the register contents should not be modified.
表7-6. TMAG5173 Registers
Offset Acronym
Register Name
Section
节7.6.1
0h
1h
DEVICE_CONFIG_1
Configure Device Operation Modes
Configure Device Operation Modes
Sensor Device Operation Modes
Sensor Device Operation Modes
X Threshold Configuration
Y Threshold Configuration
Z Threshold Configuration
Temp Sensor Configuration
Configure Device Operation Modes
Configure Device Operation Modes
Configure Device Operation Modes
Configure Device Operation Modes
I2C Address Register
DEVICE_CONFIG_2
SENSOR_CONFIG_1
SENSOR_CONFIG_2
X_THR_CONFIG
节7.6.2
2h
节7.6.3
3h
节7.6.4
4h
节7.6.5
5h
Y_THR_CONFIG
节7.6.6
6h
Z_THR_CONFIG
节7.6.7
7h
T_CONFIG
节7.6.8
8h
INT_CONFIG_1
节7.6.9
9h
MAG_GAIN_CONFIG
MAG_OFFSET_CONFIG_1
MAG_OFFSET_CONFIG_2
I2C_ADDRESS
节7.6.10
节7.6.11
节7.6.12
节7.6.13
节7.6.14
节7.6.15
节7.6.16
节7.6.17
节7.6.18
节7.6.19
节7.6.20
节7.6.21
节7.6.22
节7.6.23
节7.6.24
节7.6.25
节7.6.26
节7.6.27
节7.6.28
节7.6.29
Ah
Bh
Ch
Dh
DEVICE_ID
ID for the device die
Eh
MANUFACTURER_ID_LSB
MANUFACTURER_ID_MSB
T_MSB_RESULT
Manufacturer ID lower byte
Manufacturer ID upper byte
Conversion Result Register
Conversion Result Register
Conversion Result Register
Conversion Result Register
Conversion Result Register
Conversion Result Register
Conversion Result Register
Conversion Result Register
Conversion Status Register
Conversion Result Register
Conversion Result Register
Conversion Result Register
Device_Diag Status Register
Fh
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
1Bh
1Ch
T_LSB_RESULT
X_MSB_RESULT
X_LSB_RESULT
Y_MSB_RESULT
Y_LSB_RESULT
Z_MSB_RESULT
Z_LSB_RESULT
CONV_STATUS
ANGLE_RESULT_MSB
ANGLE_RESULT_LSB
MAGNITUDE_RESULT
DEVICE_STATUS
Complex bit access types are encoded to fit into small table cells. 表 7-7 shows the codes that are used for
access types in this section.
表7-7. TMAG5173 Access Type Codes
Access Type
Read Type
R
Code
Description
R
Read
Write Type
W
W
Write
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表7-7. TMAG5173 Access Type Codes (continued)
Access Type
Code
Description
W1CP
W
1C
P
Write
1 to clear
Requires privileged access
Reset or Default Value
-n
Value after reset or the default
value
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7.6.1 DEVICE_CONFIG_1 Register (Offset = 0h) [Reset = 00h]
DEVICE_CONFIG_1 is shown in 表7-8.
Return to the 表7-6.
表7-8. DEVICE_CONFIG_1 Register Field Descriptions
Bit
Field
Type
Reset
Description
7
CRC_EN
R/W
0h
Enables I2C CRC byte to be sent
0h = CRC disabled
1h = CRC enabled
6-5
4-2
MAG_TEMPCO
CONV_AVG
R/W
R/W
0h
0h
Temperature coefficient of the magnet
0h = 0% (No temperature compensation)
1h = 0.12%/ deg C (NdBFe)
2h = 0.03%/ deg C (SmCo)
3h = 0.2%/deg C (Ceramic)
Enables additional sampling of the sensor data to reduce the noise
effect (or to increase resolution)
0h = 1x average, 10.0-kSPS (3-axes) or 20-kSPS (1 axis)
1h = 2x average, 5.7-kSPS (3-axes) or 13.3-kSPS (1 axis)
2h = 4x average, 3.1-kSPS (3-axes) or 8.0-kSPS (1 axis)
3h = 8x average, 1.6-kSPS (3-axes) or 4.4-kSPS (1 axis)
4h = 16x average, 0.8-kSPS (3-axes) or 2.4-kSPS (1 axis)
5h = 32x average, 0.4-kSPS (3-axes) or 1.2-kSPS (1 axis)
1-0
I2C_RD
R/W
0h
Defines the I2C read mode
0h = Standard I2C 3-byte read command
1h = 1-byte I2C read command for 16bit sensor data and conversion
status
2h = 1-byte I2C read command for 8 bit sensor MSB data and
conversion status
3h = Reserved
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7.6.2 DEVICE_CONFIG_2 Register (Offset = 1h) [Reset = 00h]
DEVICE_CONFIG_2 is shown in 表7-9.
Return to the 表7-6.
表7-9. DEVICE_CONFIG_2 Register Field Descriptions
Bit
Field
Type
Reset
Description
7-5
THR_HYST
R/W
0h
Select thresholds for the interrupt function. Example, for 40-mT
range with THR_HYST = 010b, the hysteresis value = ((40/(211))*8
=0.156mT
0h = Takes the 2's complement value of each x_THR_CONFIG
register to create a magnetic threshold of the corresponding axis
1h = Takes the 7 LSB bits of the x_THR_CONFIG register to create
two opposite magnetic thresholds (one north, and another south) of
equal magnitude.
2h = 8 LSB of threshold based off full scale magnetic range at 12 bit
resolution
3h = 16 LSB of threshold based off full scale magnetic range at 12 bit
resolution
4h = 32 LSB of threshold based off full scale magnetic range at 12 bit
resolution
5h = 64 LSB of threshold based off full scale magnetic range at 12 bit
resolution
6h = 128 LSB of threshold based off full scale magnetic range at 12
bit resolution
7h = 256 LSB of threshold based off full scale magnetic range at 12
bit resolution
4
3
2
LP_LN
R/W
R/W
R/W
0h
0h
0h
Selects the modes between low active current or low-noise modes
0h = Low active current mode
1h = Low noise mode
I2C_GLITCH_FILTER
TRIGGER_MODE
I2C glitch filter
0h = Glitch filter on
1h = Glitch filter off
Selects a condition which initiates a single conversion based off
already configured registers. A running conversion completes before
executing a trigger. Redundant triggers are ignored.
TRIGGER_MODE is available only during the mode explicitly
mentioned in OPERATING_MODE.
0h = Conversion Start at I2C Command Bits, DEFAULT
1h = Conversion starts through trigger signal at INT pin
1-0
OPERATING_MODE
R/W
0h
Selects Operating Mode and updates value based on operating
mode if device transitions from Wake-up and sleep mode to Standby
mode.
0h = Stand-by mode (starts new conversion at trigger event)
1h = Sleep mode
2h = Continuous measure mode
3h = Wake-up and sleep mode (W&S mode)
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7.6.3 SENSOR_CONFIG_1 Register (Offset = 2h) [Reset = 00h]
SENSOR_CONFIG_1 is shown in 表7-10.
Return to the 表7-6.
表7-10. SENSOR_CONFIG_1 Register Field Descriptions
Bit
Field
Type
Reset
Description
7-4
MAG_CH_EN
R/W
0h
Enables data acquisition of the magnetic axis channel(s)
0h = All magnetic channels of off, DEFAULT
1h = X channel enabled
2h = Y channel enabled
3h = X, Y channel enabled
4h = Z channel enabled
5h = Z, X channel enabled
6h = Y, Z channel enabled
7h = X, Y, Z channel enabled
8h = XYX channel enabled
9h = YXY channel enabled
Ah = YZY channel enabled
Bh = XZX channel enabled
Ch = X,Y,Z with positive diagnostic offset
Dh = X,Y,Z with negative diagnostic offset
Eh = Hall resistance check + ADC check
Fh = Hall offset check +ADC check
3-0
SLEEPTIME
R/W
0h
Selects the time spent in low power mode between conversions
when OPERATING_MODE =11b
0h = 1ms
1h = 5ms
2h = 10ms
3h = 15ms
4h = 20ms
5h = 30ms
6h = 50ms
7h = 100ms
8h = 500ms
9h = 1000ms
Ah = 2000ms
Bh = 5000ms
Ch = 20000ms
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7.6.4 SENSOR_CONFIG_2 Register (Offset = 3h) [Reset = 00h]
SENSOR_CONFIG_2 is shown in 表7-11.
Return to the 表7-6.
表7-11. SENSOR_CONFIG_2 Register Field Descriptions
Bit
7
Field
Type
Reset
Description
RESERVED
THRX_COUNT
R
0h
Reserved
6
R/W
0h
0h
Number of threshold crossings before the interrupt is asserted
0h = 1 threshold crossing
1h = 4 threshold crossing
5
4
MAG_THR_DIR
MAG_GAIN_CH
ANGLE_EN
R/W
Selects the direction of threshold check. This bit is ignored when
THR_HYST > 001b
0h = sets interrupt for field above the threshold
1h = sets interrupt for field below the threshold
R/W
R/W
0h
0h
Selects the axis for magnitude gain correction value entered in
MAG_GAIN_CONFIG register
0h = 1st channel is selected for gain adjustment
1h = 2nd channel is selected for gain adjustment
3-2
Enables angle calculation, magnetic gain, and offset corrections
between two selected magnetic channels
0h = No angle calculation, magnitude gain, and offset correction
enabled
1h = X 1st, Y 2nd
2h = Y 1st, Z 2nd
3h = X 1st, Z 2nd
1
0
X_Y_RANGE
Z_RANGE
R/W
R/W
0h
0h
Select the X and Y axes magnetic range from 2 different options.
0h = ±40mT (TMAG5173A1) or ±133mT (TMAG5173A2), DEFAULT
1h = ±80mT (TMAG5173A1) or ±266mT (TMAG5173A2)
Select the Z axis magnetic range from 2 different options.
0h = ±40mT (TMAG5173A1) or ±133mT (TMAG5173A2), DEFAULT
1h = ±80mT (TMAG5173A1) or ±266mT (TMAG5173A2)
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7.6.5 X_THR_CONFIG Register (Offset = 4h) [Reset = 00h]
X_THR_CONFIG is shown in 表7-12.
Return to the 表7-6.
表7-12. X_THR_CONFIG Register Field Descriptions
Bit
Field
Type
Reset
Description
7-0
X_THR_CONFIG
R/W
0h
8-bit, 2's complement X axis threshold code for limit check. The
range of possible threshold entrees can be +/-128. The threshold
value in mT is calculated for A1 as (40(1+X_Y_RANGE)/
128)*X_THR_CONFIG, for A2 as (133(1+X_Y_RANGE)/
128)*X_THR_CONFIG. Default 0h means no threshold comparison.
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7.6.6 Y_THR_CONFIG Register (Offset = 5h) [Reset = 00h]
Y_THR_CONFIG is shown in 表7-13.
Return to the 表7-6.
表7-13. Y_THR_CONFIG Register Field Descriptions
Bit
Field
Type
Reset
Description
7-0
Y_THR_CONFIG
R/W
0h
8-bit, 2's complement Y axis threshold code for limit check. The
range of possible threshold entrees can be +/-128. The threshold
value in mT is calculated for A1 as (40(1+X_Y_RANGE)/
128)*X_THR_CONFIG, for A2 as (133(1+X_Y_RANGE)/
128)*X_THR_CONFIG. Default 0h means no threshold comparison.
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7.6.7 Z_THR_CONFIG Register (Offset = 6h) [Reset = 00h]
Z_THR_CONFIG is shown in 表7-14.
Return to the 表7-6.
表7-14. Z_THR_CONFIG Register Field Descriptions
Bit
Field
Type
Reset
Description
7-0
Z_THR_CONFIG
R/W
0h
8-bit, 2's complement Z axis threshold code for limit check. The
range of possible threshold entrees can be +/-128. The threshold
value in mT is calculated for A1 as (40(1+Z_RANGE)/
128)*Z_THR_CONFIG, for A2 as (133(1+Z_RANGE)/
128)*Z_THR_CONFIG. Default 0h means no threshold comparison.
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7.6.8 T_CONFIG Register (Offset = 7h) [Reset = 00h]
T_CONFIG is shown in 表7-15.
Return to the 表7-6.
表7-15. T_CONFIG Register Field Descriptions
Bit
Field
Type
Reset
Description
7-1
T_THR_CONFIG
R/W
0h
Temperature threshold code entered by user. The valid temperature
threshold ranges are -41C to 170C with the threshold codes for -41C
= 1Ah, and 170C = 34h. Resolution is 8 degree C/ LSB. Default 0h
means no threshold comparison.
0
T_CH_EN
R/W
0h
Enables data acquisition of the temperature channel
0h = Temp channel disabled. The T_MSB_RESULT and
T_LSB_RESULT data are invalid
1h = Temp channel enabled
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7.6.9 INT_CONFIG_1 Register (Offset = 8h) [Reset = 00h]
INT_CONFIG_1 is shown in 表7-16.
Return to the 表7-6.
表7-16. INT_CONFIG_1 Register Field Descriptions
Bit
Field
Type
Reset
Description
7
RSLT_INT
R/W
0h
Enable interrupt response on conversion complete.
0h = Interrupt is not asserted when the configured set of conversions
are complete
1h = Interrupt is asserted when the configured set of conversions are
complete
6
5
THRSLD_INT
INT_STATE
R/W
R/W
0h
0h
Enable interrupt response on a predefined threshold cross.
0h = Interrupt is not asserted when a threshold is crossed
1h = Interrupt is asserted when a threshold is crossed
INT interrupt latched or pulsed.
0h = INT interrupt latched until clear by a primary addressing the
device
1h = INT interrupt pulse for 10us
4-2
INT_MODE
R/W
0h
Interrupt mode select.
0h = No interrupt
1h = Interrupt through INT
2h = Interrupt through INT except when I2C bus is busy.
3h = Interrupt through SCL
4h = Interrupt through SCL except when I2C bus is busy.
5h = Unipolar Switch Mode (Only one B-Field Conversion Support,
Selects the first Magnetic field in X, Y, Z order if multiple thresholds
are enabled). This mode overrides any interrupt function (INT trigger
is also disabled), and only implements a Hall switch function based
off the x_THRX_CONFIG and THR_HYST settings. Select
THR_HYST >001b for this mode.
6h = Omnipolar Switch Mode (Only one B-Field Conversion Support,
Selects the first Magnetic field in X, Y, Z order if multiple thresholds
are enabled). This mode overrides any interrupt function (INT trigger
is also disabled), and only implements a Hall switch function based
off the x_THRX_CONFIG and THR_HYST settings. Select
THR_HYST >001b for this mode.
7h = Not valid- defaults to 000b mode
1
0
RESERVED
MASK_INTB
R
0h
0h
Reserved
R/W
Mask INT pin when INT connected to GND
0h = INT pin is enabled
1h = INT pin is disabled (for wake-up and trigger functions)
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7.6.10 MAG_GAIN_CONFIG Register (Offset = 9h) [Reset = 00h]
MAG_GAIN_CONFIG is shown in 表7-17.
Return to the 表7-6.
表7-17. MAG_GAIN_CONFIG Register Field Descriptions
Bit
Field
Type
Reset
Description
7-0
GAIN_VALUE
R/W
0h
8-bit gain value determined by a primary to adjust a Hall axis gain.
The particular axis is selected based off the settings of
MAG_GAIN_CH and ANGLE_EN register bits. The binary 8-bit input
is interpreted as a fractional value in between 0 and 1 based off the
formula, 'user entered value in decimal/256'. Gain value of 0 is
interpreted by the device as 1.
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7.6.11 MAG_OFFSET_CONFIG_1 Register (Offset = Ah) [Reset = 00h]
MAG_OFFSET_CONFIG_1 is shown in 表7-18.
Return to the 表7-6.
表7-18. MAG_OFFSET_CONFIG_1 Register Field Descriptions
Bit
Field
Type
Reset
Description
7-0
OFFSET_VALUE_1ST
R/W
0h
8-bit, 2's complement offset value determined by a primary to adjust
first axis offset value. The range of possible offset valid entrees can
be +/-128. The offset value is calculated by multiplying bit resolution
with the entered value.
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7.6.12 MAG_OFFSET_CONFIG_2 Register (Offset = Bh) [Reset = 00h]
MAG_OFFSET_CONFIG_2 is shown in 表7-19.
Return to the 表7-6.
表7-19. MAG_OFFSET_CONFIG_2 Register Field Descriptions
Bit
Field
Type
Reset
Description
7-0
OFFSET_VALUE_2ND
R/W
0h
8-bit, 2's complement offset value determined by a primary to adjust
second axis offset value. The range of possible offset valid entrees
can be +/-128. The offset value is calculated by multiplying bit
resolution with the entered value.
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7.6.13 I2C_ADDRESS Register (Offset = Ch) [Reset = 6Ah]
I2C_ADDRESS is shown in 表7-20.
Return to the 表7-6.
表7-20. I2C_ADDRESS Register Field Descriptions
Bit
Field
Type
Reset
Description
7-1
I2C_ADDRESS
R/W
35h
7-bit default factory I2C address is loaded from OTP during first
power up. Change these bits to a new setting if a new I2C address is
required (at each power cycle these bits need to be written again to
avoid going back to default factory address).
0
I2C_ADDRESS_UPDATE R/W
_EN
0h
Enable a new user defined I2C address.
0h = Disable update of I2C address
1h = Enable update of I2C address with bits (7:1)
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7.6.14 DEVICE_ID Register (Offset = Dh) [Reset = 05h]
DEVICE_ID is shown in 表7-21.
Return to the 表7-6.
表7-21. DEVICE_ID Register Field Descriptions
Bit
7-2
1-0
Field
Type
Reset
Description
RESERVED
VER
R
1h
Reserved
R
1h
Device version indicator. Reset value of DEVICE_ID depends on the
orderable part number.
0h = ±40-mT and ±80-mT range
1h = ±40-mT and ±80-mT range
2h = ±133-mT and ±266-mT range
3h = Reserved
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7.6.15 MANUFACTURER_ID_LSB Register (Offset = Eh) [Reset = 49h]
MANUFACTURER_ID_LSB is shown in 表7-22.
Return to the 表7-6.
表7-22. MANUFACTURER_ID_LSB Register Field Descriptions
Bit
Field
Type
Reset
Description
7-0
MANUFACTURER_ID_[7:
0]
R
49h
8-bit unique manufacturer ID
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7.6.16 MANUFACTURER_ID_MSB Register (Offset = Fh) [Reset = 54h]
MANUFACTURER_ID_MSB is shown in 表7-23.
Return to the 表7-6.
表7-23. MANUFACTURER_ID_MSB Register Field Descriptions
Bit
Field
Type
Reset
Description
7-0
MANUFACTURER_ID_[15 R
:8]
54h
8-bit unique manufacturer ID
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7.6.17 T_MSB_RESULT Register (Offset = 10h) [Reset = 00h]
T_MSB_RESULT is shown in 表7-24.
Return to the 表7-6.
表7-24. T_MSB_RESULT Register Field Descriptions
Bit
Field
Type
Reset
Description
7-0
T_CH_RESULT [15:8]
R
0h
T-channel data conversion results, MSB 8 bits.
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7.6.18 T_LSB_RESULT Register (Offset = 11h) [Reset = 00h]
T_LSB_RESULT is shown in 表7-25.
Return to the 表7-6.
表7-25. T_LSB_RESULT Register Field Descriptions
Bit
Field
Type
Reset
Description
7-0
T_CH_RESULT [7:0]
R
0h
T-channel data conversion results, LSB 8 bits.
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7.6.19 X_MSB_RESULT Register (Offset = 12h) [Reset = 00h]
X_MSB_RESULT is shown in 表7-26.
Return to the 表7-6.
表7-26. X_MSB_RESULT Register Field Descriptions
Bit
Field
Type
Reset
Description
7-0
X_CH_RESULT [15:8]
R
0h
X-channel data conversion results, MSB 8 bits.
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7.6.20 X_LSB_RESULT Register (Offset = 13h) [Reset = 00h]
X_LSB_RESULT is shown in 表7-27.
Return to the 表7-6.
表7-27. X_LSB_RESULT Register Field Descriptions
Bit
Field
Type
Reset
Description
7-0
X_CH_RESULT [7:0]
R
0h
X-channel data conversion results, LSB 8 bits.
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7.6.21 Y_MSB_RESULT Register (Offset = 14h) [Reset = 00h]
Y_MSB_RESULT is shown in 表7-28.
Return to the 表7-6.
表7-28. Y_MSB_RESULT Register Field Descriptions
Bit
Field
Type
Reset
Description
7-0
Y_CH_RESULT [15:8]
R
0h
Y-channel data conversion results, MSB 8 bits.
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7.6.22 Y_LSB_RESULT Register (Offset = 15h) [Reset = 00h]
Y_LSB_RESULT is shown in 表7-29.
Return to the 表7-6.
表7-29. Y_LSB_RESULT Register Field Descriptions
Bit
Field
Type
Reset
Description
7-0
Y_CH_RESULT [7:0]
R
0h
Y-channel data conversion results, LSB 8 bits.
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7.6.23 Z_MSB_RESULT Register (Offset = 16h) [Reset = 00h]
Z_MSB_RESULT is shown in 表7-30.
Return to the 表7-6.
表7-30. Z_MSB_RESULT Register Field Descriptions
Bit
Field
Type
Reset
Description
7-0
Z_CH_RESULT [15:8]
R
0h
Z-channel data conversion results, MSB 8 bits.
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7.6.24 Z_LSB_RESULT Register (Offset = 17h) [Reset = 00h]
Z_LSB_RESULT is shown in 表7-31.
Return to the 表7-6.
表7-31. Z_LSB_RESULT Register Field Descriptions
Bit
Field
Type
Reset
Description
7-0
Z_CH_RESULT [7:0]
R
0h
Z-channel data conversion results, LSB 8 bits.
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7.6.25 CONV_STATUS Register (Offset = 18h) [Reset = 10h]
CONV_STATUS is shown in 表7-32.
Return to the 表7-6.
表7-32. CONV_STATUS Register Field Descriptions
Bit
7-5
4
Field
Type
Reset
Description
SET_COUNT
POR
R
0h
Rolling Count of Conversion Data Sets
R/W1CP
1h
Device powered up, or experienced power-on-reset. Bit is clear when
host writes back '1'.
0h = No POR
1h = POR occurred
3-2
1
RESERVED
R
R
0h
0h
Reserved
DIAG_STATUS
Detect any internal diagnostics fail which include VCC UV, internal
memory CRC error, INT pin error and internal clock error. Ignore this
bit status if VCC < 2.3V.
0h = No diag fail
1h = Diag fail detected
0
RESULT_STATUS
R
0h
Conversion data buffer is ready to be read.
0h = Conversion data not complete
1h = Conversion data complete
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7.6.26 ANGLE_RESULT_MSB Register (Offset = 19h) [Reset = 00h]
ANGLE_RESULT_MSB is shown in 表7-33.
Return to the 表7-6.
表7-33. ANGLE_RESULT_MSB Register Field Descriptions
Bit
Field
Type
Reset
Description
7-0
ANGLE_RESULT_MSB
R
0h
Angle measurement result in degree. The data is displayed from 0 to
360 degree in 13 LSB bits after combining the
ANGLE_RESULT_MSB and _LSB bits. The 4 LSB bits allocated for
fraction of an angle in the format (xxxx/16).
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7.6.27 ANGLE_RESULT_LSB Register (Offset = 1Ah) [Reset = 00h]
ANGLE_RESULT_LSB is shown in 表7-34.
Return to the 表7-6.
表7-34. ANGLE_RESULT_LSB Register Field Descriptions
Bit
Field
Type
Reset
Description
7-0
ANGLE_RESULT_LSB
R
0h
Angle measurement result in degree. The data is displayed from 0 to
360 degree in 13 LSB bits after combining the
ANGLE_RESULT_MSB and _LSB bits. The 4 LSB bits allocated for
fraction of an angle in the format (xxxx/16).
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7.6.28 MAGNITUDE_RESULT Register (Offset = 1Bh) [Reset = 00h]
MAGNITUDE_RESULT is shown in 表7-35.
Return to the 表7-6.
表7-35. MAGNITUDE_RESULT Register Field Descriptions
Bit
Field
Type
Reset
Description
7-0
MAGNITUDE_RESULT
R
0h
Resultant vector magnitude (during angle measurement) result. This
value should be constant during 360 degree measurements
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7.6.29 DEVICE_STATUS Register (Offset = 1Ch) [Reset = 10h]
DEVICE_STATUS is shown in 表7-36.
Return to the 表7-6.
表7-36. DEVICE_STATUS Register Field Descriptions
Bit
7-5
4
Field
Type
Reset
Description
RESERVED
INTB_RB
R
0h
Reserved
R
1h
Indicates the level that the device is reading back from INT pin. The
reset value of DEVICE_STATUS depends on the status of the INT
pin at power-up.
0h = INT pin driven low
1h = INT pin status high
3
2
1
0
OSC_ER
R/W1CP
R/W1CP
R/W1CP
R/W1CP
0h
0h
0h
0h
Indicates if Oscillator error is detected. Bit is clear when host writes
back '1'.
0h = No Oscillator error detected
1h = Oscillator error detected
INT_ER
Indicates if INT pin error is detected. Bit is clear when host writes
back '1'.
0h = No INT error detected
1h = INT error detected
OTP_CRC_ER
VCC_UV_ER
Indicates if OTP CRC error is detected. Bit is clear when host writes
back '1'.
0h = No OTP CRC error detected
1h = OTP CRC error detected
Indicates if VCC undervoltage was detected. Bit is clear when host
writes back '1'. Ignore this bit status if VCC < 2.3V.
0h = No VCC UV detected
1h = VCC UV detected
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8 Application and Implementation
备注
以下应用部分中的信息不属于TI 器件规格的范围,TI 不担保其准确性和完整性。TI 的客 户应负责确定
器件是否适用于其应用。客户应验证并测试其设计,以确保系统功能。
8.1 Application Information
8.1.1 Select the Sensitivity Option
Select the highest TMAG5173-Q1 sensitivity option that can measure the required range of magnetic flux density
so that the ADC input range is maximized.
Larger-sized magnets and farther sensing distances can generally enable better positional accuracy than very
small magnets at close distances, because magnetic flux density increases exponentially with the proximity to a
magnet. TI created an online tool to help with simple magnet calculations under the TMAG5173-Q1 product
folder on ti.com.
8.1.2 Temperature Compensation for Magnets
The TMAG5173-Q1 temperature compensation is designed to directly compensate the average temperature drift
of several magnets as specified in the MAG_TEMPCO register bits. The residual induction (Br) of a magnet
typically reduces by 0.12%/°C for NdFeB, and 0.20%/°C for ferrite magnets as the temperature increases. Set
the MAG_TEMPCO bit to default 00b if the device temperature compensation is not needed.
8.1.3 Sensor Conversion
Multiple conversion schemes can be adopted based off the MAG_CH_EN and CONV_AVG register bits settings.
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8.1.3.1 Continuous Conversion
The TMAG5173-Q1 can be set in continuous conversion mode when OPERATING_MODE is set to 10b. 图 8-1
shows a few examples of continuous conversion. The input magnetic field is processed in two steps. In the first
step, the device spins the Hall sensor elements and integrates the sampled data. In the second step, the ADC
block converts the analog signal into digital bits and stores in the corresponding result register. While the ADC
starts processing the first magnetic sample, the spin block can start processing another magnetic sample. In this
mode, the temperature data is taken at the beginning of each new conversion. This temperature data is used to
compensate for the magnetic thermal drift.
tstart_measur
e
HALL Spin &
Integra on
X-Axis
Temp
X-Axis
Temp
X-Axis
X-Axis
ADC
Start
Conv me
Start next
Ini ate
Time
OPERATING_MODE = 10b, MAG_CH_EN = 0001b, CONV_AVG = 000b
tstart_measur
e
HALL Spin &
Integra on
X-Axis
Temp
X-Axis
X-Axis
X-Axis
Temp
X-Axis
X-Axis
X-Axis
X-Axis
ADC
Start next
Start
Conv me
Ini ate
Time
OPERATING_MODE = 10b, MAG_CH_EN = 0001b, CONV_AVG = 001b
tstart_measur
e
HALL Spin &
Integra on
X-Axis
Temp
Y-Axis
X-Axis
X-Axis
Temp
Y-Axis
Z-Axis
Y-Axis
Z-Axis
Y-Axis
X-Axis
Z-Axis
Z-Axis
ADC
Start next
Start
Conversion me
Ini ate
Time
OPERATING_MODE = 10b, MAG_CH_EN = 0111b, CONV_AVG = 000b
图8-1. Continuous Conversion Examples
8.1.3.2 Trigger Conversion
The TMAG5173-Q1 supports trigger conversion with OPERATING_MODE set to 00b. The trigger event can be
initiated through I2C command or INT signal. 图8-2 shows an example of trigger conversion with temperature, X,
Y, and Z sensors activated.
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tstart_measur
e
HALL Spin &
Integra on
X-Axis
Y-Axis
Z-Axis
Temp
X-Axis
Y-Axis
Z-Axis
ADC
Start
Conversion me
Trigger
Time
图8-2. Trigger Conversion for Temperature, X, Y, & Z Sensors
8.1.3.3 Pseudo-Simultaneous Sampling
In absolute angle measurement, application sensor data from multiple axes are required to calculate an accurate
angle. The magnetic field data collected at different times through the same signal chain introduces error in
angle calculation. The TMAG5173-Q1 offers pseudo-simultaneous sampling data collection modes to eliminate
this error. 图 8-3 shows an example where MAG_CH_EN is set at 1011b to collect XZX data. 方程式 18 shows
that the time stamps for the X and Z sensor data are the same.
P:1 + P:2
P< =
(18)
where
• tX1, tZ, tX2 are time stamps for X, Z, X sensor data completion as defined in 图8-3.
HALL Spin &
Integra on
X-Axis
Temp
Z-Axis
X-Axis
Z-Axis
X-Axis
X-Axis
ADC
tX1
tZ
tX2
Time
图8-3. XZX Magnetic Field Conversion
The vertical X, Y sensors of the TMAG5173-Q1 exhibit more noise than the horizontal Z sensor. The pseudo-
simultaneous sampling can be used to equalize the noise floor when two set of vertical sensor data are collected
against one set of horizontal sensor data, as in examples of XZX or YZY modes.
8.1.4 Magnetic Limit Check
The TMAG5173-Q1 enables magnetic limit checks for single or multiple axes at the same time. 图 8-4 to 图 8-7
show examples of magnetic limit cross detection events while the field going above, below, exiting a magnetic
band, and entering a magnetic band. The device will keep generating interrupt with each new conversion if the
magnetic fields remain in the shaded regions in the figures. The MAG_THR_DIR and THR_HYST register bits
help select different limit cross modes.
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X Ch Threshold
X Ch Threshold
0 mT
0 mT
X Magne c Field
X Magne c Field
Interrupt
Interrupt
Time
Time
图8-5. Magnetic Lower Limit Cross Check With
图8-4. Magnetic Upper Limit Cross Check With
MAG_THR_DIR =1b, THR_HYST = 000b
MAG_THR_DIR =0b, THR_HYST = 000b
X Ch Threshold
X Ch Threshold
0 mT
0 mT
X Magne c Field
- X Ch Threshold
X Magne c Field
- X Ch Threshold
Interrupt
Interrupt
Time
图8-6. Magnetic Field Going Out of Band Check
With MAG_THR_DIR =0b, THR_HYST = 001b
Time
图8-7. Magnetic Field Entering a Band Check With
MAG_THR_DIR =1b, THR_HYST = 001b
8.1.5 Error Calculation During Linear Measurement
The TMAG5173-Q1 offers independent configurations to perform linear position measurements in X, Y, and Z
axes. To calculate the expected error during linear measurement, the contributions from each of the individual
error sources must be understood. The relevant error sources include sensitivity error, offset, noise, cross axis
sensitivity, hysteresis, nonlinearity, drift across temperature, drift across life time, and so forth. For a 3-axis Hall
solution like the TMAG5173-Q1, the cross-axis sensitivity and hysteresis error sources are insignificant. Use 方
程式19 to estimate the linear measurement error calculation at room temperature.
2
2
off
2
B × SENS
ER
+ B
+ N
RMS_25
Error
=
× 100%
(19)
LM_25C
B
where
• ErrorLM_25C is total error in % during linear measurement at 25°C.
• B is input magnetic field.
• SENSER is sensitivity error in decimal number at 25°C. As an example, enter 0.05 for sensitivity error of 5%.
• Boff is offset error at 25°C.
• NRMS_25 is RMS noise at 25°C.
In many applications, system level calibration at room temperature can nullify the offset and sensitivity errors at
25°C. The noise errors can be reduced by internally averaging by up to 32x on the device in addition to the
averaging that could be done in the microcontroller. Use 方程式 20 to estimate the linear measurement error
across temperature after calibration at room temperature.
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2
2
2
B × SENS
DR
+ B
+ N
RMS_Temp
off_DR
Error
=
× 100%
(20)
LM_Temp
B
where
• ErrorLM_Temp is total error in % during linear measurement across temperature after room temperature
calibration.
• B is input magnetic field.
• SENSDR is sensitivity drift in decimal number from value at 25°C. As an example, enter 0.05 for sensitivity
drift of 5%.
• Boff_DR is offset drift from value at 25°C.
• NRMS_Temp is RMS noise across temperature.
If room temperature calibration is not performed, sensitivity and offset errors at room temperature must also
account for total error calculation across temperature (see 方程式21).
2
2
2
2
2
B × SENS
ER
+ B × SENS
DR
+ B
off
+ B
off_DR
+ N
RMS_Temp
Error
=
× 100%
(21)
LM_Temp_NCal
B
where
• ErrorLM_Temp_NCal is total error in % during linear measurement across temperature without room temperature
calibration.
备注
In this section, error sources such as system mechanical vibration, magnet temperature gradient,
earth magnetic field, nonlinearity, lifetime drift, and so forth, are not considered. The user must take
these additional error sources into account while calculating overall system error budgets.
8.1.6 Error Calculation During Angular Measurement
The TMAG5173-Q1 offers on-chip CORDIC to measure angle data from any of the two magnetic axes. The
linear magnetic axis data can be used to calculate the angle using an external CORDIC as well. To calculate the
expected error during angular measurement, the contributions from each individual error source must be
understood. The relevant error sources include sensitivity error, offset, noise, axis-axis mismatch, nonlinearity,
drift across temperature, drift across life time, and so forth. Use the Angle Error Calculation Tool to estimate the
total error during angular measurement.
8.2 Typical Applications
Magnetic 3D sensors are very popular due to contactless and reliable measurements, especially in applications
requiring long-term measurements in rugged environments. The TMAG5173-Q1 offers design flexibility in wide
range of industrial and personal electronics applications. In this section three common application examples are
discussed in details.
8.2.1 I2C Address Expansion
The TMAG5173-Q1 is offered in four different factory-programmed I2C addresses. The device also supports
additional I2C addresses through the configuration of the I2C_ADDRESS register. There are 7 bits to select 128
different addresses. Take system limitations like bus loading, maximum clock frequency, available GPIOs from a
microcontroller, and so forth, in account before selecting maximum number of sensors in a single I2C bus.
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VCC
INT
SCL
SDA
TEST
GND
VCC
INT
SCL
SDA
TEST
GND
VCC
INT
SCL
SDA
TEST
GND
3.3V
Supply
VCC
INT
SCL
SDA
TEST
µController
GND
图8-8. TMAG5173-Q1 Application Diagram for I2C Address Expansion
8.2.1.1 Design Requirements
Use the parameters listed in 表8-2 for this design example.
表8-1. Design Parameters
PARAMETERS
Device orderable
VCC
DESIGN TARGET
TMAG5173A1-Q1
3.3 V
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表8-1. Design Parameters (continued)
PARAMETERS
DESIGN TARGET
4 (same method can be used to expand the number of sensors in the
I2C bus)
# of Devices in same bus
Design objective
Optimize the # GPIO and component count
5-mA, supplied by a microcontroller GPIO
Current supply per sensor
8.2.1.2 Detailed Design Procedure
Select GPIO with current supply capability of 5 mA. 图 8-8 shows that the SCL, SDA lines and INT pin can be
shared. However, the function of the INT pin must be analyzed when shared by multiple sensors. As an
example, if the sensors are configured to generate interrupt through the INT pin, the microcontroller needs to
read all the sensors to determine which specific one sending the interrupt. Take the following steps sequentially
to assign new I2C addresses to the four TMAG5173-Q1 shown in 图8-9:
• Turn on the GPIO#1 and wait until tstart_power_up time is elapsed.
• Address the device#1 with factory programmed address. Write to the I2C_ADDRESS register to assign a
new address.
• Turn on the GPIO#2 and wait until tstart_power_up time is elapsed.
• Address the device#2 with factory programmed address. Write to the I2C_ADDRESS register to assign a
new unique address.
• Turn on the GPIO#3 and wait until tstart_power_up time is elapsed.
• Address the device#3 with factory programmed address. Write to the I2C_ADDRESS register to assign a
new unique address.
• Turn on the GPIO#4 and wait until tstart_power_up time is elapsed.
• Address the device#4 with factory programmed address. Write to the I2C_ADDRESS register to assign a
new unique address.
Repeat the above steps if there is a power outage or power-up reset condition.
tstart_power_up
GPIO1
GPIO2
GPIO3
GPIO4
Write I2C
Address #1
Write I2C
Address #2
Write I2C
Address #3
Write I2C
Address #4
I2C Line
Time
图8-9. Power-Up Timing and I2C Address Allocation for the Four Sensors
8.2.2 Angle Measurement
Magnetic angle sensors are very popular due to contactless and reliable measurements, especially in
applications requiring long-term measurements in rugged environments. The TMAG5173-Q1 offers an on-chip
angle calculator providing angular measurement based off any two of the magnetic axes. The two axes of
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interest can be selected in the ANGLE_EN register bits. The device offers angle output in complete 360 degree
scale. Take several error sources into account for angle calculation, including sensitivity error, offset error,
linearity error, noise, mechanical vibration, temperature drift, and so forth.
2.3V to 3.6V
2.3V to 5.5V
VCC
INT
TEST
SCL
SDA
GND
图8-10. TMAG5173-Q1 Application Diagram for Angle Measurement
8.2.2.1 Design Requirements
Use the parameters listed in 表8-2 for this design example.
表8-2. Design Parameters
DESIGN PARAMETERS
ON-AXIS MEASUREMENT
TMAG5173A1-Q1
3.3 V
OFF-AXIS MEASUREMENT
TMAG5173A1-Q1
Device
VCC
3.3 V
Device Position
Directly under the magnet
At the adjacent side of the magnet
Cylinder: 4.7625-mm diameter, 12.7-mm
thick, neodymium N52, Br = 1480
Cylinder: 4.7625-mm diameter, 12.7-mm
thick, neodymium N52, Br = 1480
Magnet
Select the same range for both axes based
off the highest possible magnetic field seen
by the sensor
Select the same range for both axes based
off the highest possible magnetic field seen
by the sensor
Magnetic Range Selection
RPM
<600
<600
Desired Accuracy
<2° for 360° rotation
<2° for 360° rotation
8.2.2.2 Detailed Design Procedure
For accurate angle measurement, the two axes amplitudes must be normalized by selecting the proper gain
adjustment value in the MAG_GAIN_CONFIG register. The gain adjustment value is a fractional decimal number
between 0 and 1. The following steps must be followed to calculate this fractional value:
• Set the device at 32x average mode and rotate the shaft full 360 degree.
• Record the two axes sensor ADC codes for the full 360 degree rotation.
• A normalized plot for the full 360 degree rotations are represented in 图8-12 or 图8-13.
• Measure the maximum peak-peak ADC code delta for each axis, AX and AY.
#
;
): =
#
:
• If AX>AY, set the MAG_GAIN_CH register bit to 0b. Calculate the gain adjustment value for X axis:
• If AX<AY, set the MAG_GAIN_CH register bit to 1b. Calculate the gain adjustment value for Y axis:
1
); =
)
:
• The target binary gain setting at the GAIN VALUE register bits are calculated from the equation, GX or GY =
GAIN_VALUEdecimal/ 256.
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Example 1: If AX = AY = 60,000, the GAIN_VALUE register bits are set at default 0000 0000b.
Example 2: If AX= 60,000, AY = 45,000, the GX = 45,000/60,000 =0.75. Set MAG_GAIN_CH to 0b and
GAIN_VALUE to 1100 0000b.
Example 3: If AX= 45,000, AY = 60,000, the GX = (60,000/45,000) =1.33. Since GX >1, the gain adjustment
needs to be applied to Y axis with GY =1/GX. Set MAG_GAIN_CH to 1b and GAIN_VALUE to 1100 0000b.
8.2.2.2.1 Gain Adjustment for Angle Measurement
Common measurement topology include angular position measurements in on-axis or off-axis angular
measurements shown in 图 8-11. Select the on-axis measurement topology whenever possible as this offers the
best optimization of magnetic field and the device measurement ranges. The TMAG5173-Q1 offers on-chip gain
adjustment option to account for mechanical position misalignments.
On-axis
Off-axis
S
S
N
N
图8-11. On-Axis vs Off-Axis Angle Measurements
8.2.2.3 Application Curves
图8-12. X and Y Sensor Data for Full 360 Degree
图8-13. X and Y Sensor Data for Full 360 Degree
Rotation for On-Axis Measurement
Rotation for Off-Axis Measurement
8.3 What to Do and What Not to Do
The TMAG5173-Q1 updates the result registers at the end of a conversion. I2C read of the result register must
be synchronized with the conversion update time to avoid reading a result data while the result register is being
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updated. For applications with a tight timing budget, use the INT signal to notify the primary when a conversion is
complete.
8.4 Power Supply Recommendations
A decoupling capacitor close to the device must be used to provide local energy with minimal inductance. TI
recommends using a ceramic capacitor with a value of at least 0.01 µF. Connect the TEST pin to ground.
8.5 Layout
8.5.1 Layout Guidelines
Magnetic fields pass through most nonferromagnetic materials with no significant disturbance. Embedding Hall
effect sensors within plastic or aluminum enclosures and sensing magnets on the outside is common practice.
Magnetic fields also easily pass through most printed circuit boards (PCBs), which makes placing the magnet on
the opposite side of the PCB possible.
8.5.2 Layout Example
SCL
SDA
GND
INT
GND (TEST)
VCC
图8-14. Layout Example With TMAG5173-Q1
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9 Device and Documentation Support
9.1 Documentation Support
9.1.1 Related Documentation
For related documentation see the following:
• Texas Instruments, HALL-ADAPTER-EVM User's Guide (SLYU043)
• Texas Instruments, TMAG5173 Evaluation Manual user's guide (SLYU058)
• Texas Instruments, Angle Measurement With Multi-Axis Linear Hall-Effect Sensors application report
(SBAA463)
• Texas Instruments, Absolute Angle Measurements for Rotational Motion Using Hall-Effect Sensors
application brief (SBAA503)
• Texas Instruments, Limit Detection for Tamper and End-of-Travel Detection Using Hall-Effect Sensors
application brief (SBOA514)
9.2 接收文档更新通知
要接收文档更新通知,请导航至 ti.com 上的器件产品文件夹。点击订阅更新 进行注册,即可每周接收产品信息更
改摘要。有关更改的详细信息,请查看任何已修订文档中包含的修订历史记录。
9.3 支持资源
TI E2E™ 支持论坛是工程师的重要参考资料,可直接从专家获得快速、经过验证的解答和设计帮助。搜索现有解
答或提出自己的问题可获得所需的快速设计帮助。
链接的内容由各个贡献者“按原样”提供。这些内容并不构成 TI 技术规范,并且不一定反映 TI 的观点;请参阅
TI 的《使用条款》。
9.4 Trademarks
TI E2E™ is a trademark of Texas Instruments.
所有商标均为其各自所有者的财产。
9.5 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
9.6 术语表
TI 术语表
本术语表列出并解释了术语、首字母缩略词和定义。
10 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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10.1 Package Option Addendum
Packaging Information
Orderable
Device
Package
Drawing
Lead/Ball
Finish(6)
MSL Peak
Temp(3)
Device
Status(1)
Package Type
Pins
Package Qty
Eco Plan(2)
Op Temp (°C)
Marking(4) (5)
PTMAG5173A1 ACTIVE
QDBVRQ1
SOT-23
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
6
3000
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-40 to 125
-40 to 125
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PTMAG5173A2 ACTIVE
QDBVRQ1
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
6
6
6
6
6
6
6
3000
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PTMAG5173B1 PREVIEW
QDBVRQ1
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PTMAG5173B2 PREVIEW
QDBVRQ1
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PTMAG5173C1 PREVIEW
QDBVRQ1
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PTMAG5173C2 PREVIEW
QDBVRQ1
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PTMAG5173D1 PREVIEW
QDBVRQ1
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PTMAG5173D2 PREVIEW
QDBVRQ1
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(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PRE_PROD Unannounced device, not in production, not available for mass market, nor on the web, samples not available.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check www.ti.com/productcontent for the latest
availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the
requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified
lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used
between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by
weight in homogeneous material).
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a
continuation of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the
finish value exceeds the maximum column width.
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Important Information and Disclaimer: The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on
information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI
has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming
materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
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10.2 Tape and Reel Information
REEL DIMENSIONS
TAPE DIMENSIONS
K0
P1
W
B0
Reel
Diameter
Cavity
A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
Overall width of the carrier tape
W
P1 Pitch between successive cavity centers
Reel Width (W1)
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2
Q3 Q4
Q1 Q2
Q3 Q4
User Direction of Feed
Pocket Quadrants
Reel
Diameter
(mm)
Reel
Width W1
(mm)
Package
Type
Package
Drawing
A0
(mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
(mm)
Pin1
Quadrant
Device
Pins
SPQ
PTMAG5173A1QDBVR
Q1
SOT-23
SOT-23
DBV
DBV
6
6
3000
3000
178
178
9
9
3.3
3.3
3.2
3.2
1.4
1.4
4
4
8
8
Q3
Q3
PTMAG5173A2QDBVR
Q1
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TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W
L
Device
Package Type
SOT-23
Package Drawing Pins
SPQ
3000
3000
Length (mm) Width (mm)
Height (mm)
PTMAG5173A1QDBVRQ1
PTMAG5173A2QDBVRQ1
DBV
DBV
6
6
190
190
190
190
30
30
SOT-23
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PACKAGE OPTION ADDENDUM
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PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
PTMAG5173A1QDBVRQ1
PTMAG5173A2QDBVRQ1
ACTIVE
ACTIVE
SOT-23
SOT-23
DBV
DBV
6
6
3000
3000
TBD
TBD
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-40 to 125
-40 to 125
Samples
Samples
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(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
23-Sep-2022
Addendum-Page 2
PACKAGE OUTLINE
DBV0006A
SOT-23 - 1.45 mm max height
S
C
A
L
E
4
.
0
0
0
SMALL OUTLINE TRANSISTOR
C
3.0
2.6
0.1 C
1.75
1.45
B
1.45 MAX
A
PIN 1
INDEX AREA
1
2
6
5
2X 0.95
1.9
3.05
2.75
4
3
0.50
6X
0.25
C A B
0.15
0.00
0.2
(1.1)
TYP
0.25
GAGE PLANE
0.22
0.08
TYP
8
TYP
0
0.6
0.3
TYP
SEATING PLANE
4214840/C 06/2021
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Body dimensions do not include mold flash or protrusion. Mold flash and protrusion shall not exceed 0.25 per side.
4. Leads 1,2,3 may be wider than leads 4,5,6 for package orientation.
5. Refernce JEDEC MO-178.
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EXAMPLE BOARD LAYOUT
DBV0006A
SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
PKG
6X (1.1)
1
6X (0.6)
6
SYMM
5
2
3
2X (0.95)
4
(R0.05) TYP
(2.6)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:15X
SOLDER MASK
OPENING
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
EXPOSED METAL
EXPOSED METAL
0.07 MIN
ARROUND
0.07 MAX
ARROUND
NON SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4214840/C 06/2021
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
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EXAMPLE STENCIL DESIGN
DBV0006A
SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
PKG
6X (1.1)
1
6X (0.6)
6
SYMM
5
2
3
2X(0.95)
4
(R0.05) TYP
(2.6)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:15X
4214840/C 06/2021
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
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