SBAU202 [TI]

Performance Demonstration Kit for the ADS130E08; 性能演示套件的ADS130E08


型号：	SBAU202
厂家：	TEXAS INSTRUMENTS
描述：	Performance Demonstration Kit for the ADS130E08 性能演示套件的ADS130E08
文件：	总47页 (文件大小：2368K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

User's Guide

SBAU202–June 2012

Performance Demonstration Kit for the ADS130E08

Figure 1. ADS130E08EVM-PDK

This user's guide describes the characteristics, operation, and use of the ADS130E08EVM-PDK. This

performance demonstration kit is an evaluation module for the ADS130E08, an eight-channel, 16-bit, low-

power, integrated analog front-end (AFE) designed for power protection circuits. The ADS130E08EVM-

PDK is intended for prototyping and evaluation. This user's guide includes a complete circuit description,

schematic diagram, and bill of materials.

Throughout this document, the terms ADS130E08EVM-PDK, demonstration kit, evaluation board,

evaluation module, and EVM are synonymous with the ADS130E08EVM.

The following related documents are available through the Texas Instruments web site at www.ti.com.

Related Documentation

Device

Literature Number

ADS130E08

SBAS574

Pentium III, Celeron are registered trademarks of Intel Corporation.

Windows is a registered trademark of Microsoft.

SPI is a trademark of Motorola, Inc..

All other trademarks are the property of their respective owners.

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Contents

ADS130E08EVM OVERVIEW ............................................................................................ 4

SOFTWARE INSTALLATION ............................................................................................. 6

ADS130E08EVM Daughter-Card Hardware Overview ............................................................... 11

USING THE SOFTWARE ................................................................................................ 15

ADS130E08 ANALYSIS TOOLS ........................................................................................ 24

BILL OF MATERIALS (BOM), LAYOUT, AND SCHEMATIC ........................................................ 30

List of Figures

ADS130E08EVM-PDK .....................................................................................................

ADS130E08EVM-PDK Kit .................................................................................................

Initialization of ADS130E08EVM GUI ....................................................................................

License 1.....................................................................................................................

License 2.....................................................................................................................

New Hardware Wizard Screen 1..........................................................................................

New Hardware Wizard Screen 2..........................................................................................

New Hardware Wizard Screen 3..........................................................................................

Completion of the First USB Driver.......................................................................................

Second New Hardware Wizard Screen................................................................................. 10

Installing the USBStyx Driver ............................................................................................ 10

File Save Option Under Save Tab ...................................................................................... 15

Channel Registers GUI for the Configuration Registers.............................................................. 16

Channel Control Register GUI Panel: Single Channel Enabled..................................................... 17

Channel Control Registers GUI Panel: All Channels Enabled ...................................................... 17

Example of Internal Test Signals Viewed on the Scope Display Tab .............................................. 18

Internal Temperature Sensor ............................................................................................ 19

Eight-Channel Read of Internal Temperature Data ................................................................... 20

GPIO Control Register GUI Panel....................................................................................... 21

Fault Status Indicator ..................................................................................................... 22

Device Register Settings ................................................................................................. 23

Scope Tool Features...................................................................................................... 24

Scope Analysis Tab (Noise Levels for Each Channel Shown) ...................................................... 25

Zoom Option on the Waveform Examination Tool .................................................................... 25

Histogram Bins............................................................................................................. 26

Statistics for the Signal Amplitude of Eight Channels ................................................................ 26

Analysis→FFT Graph of Normal Electrode Configuration ........................................................... 27

Analysis→FFT→AC Analysis Parameters: Windowing Options .................................................... 28

Analysis→FFT→FFT Analysis: Input Short Condition................................................................ 28

Changing the User-Defined Dynamic Range for Channel 1 ......................................................... 29

FFT Plot Using Waveform Zoom Function............................................................................. 29

List of Tables

Power-Supply Test Points................................................................................................ 11

Analog Supply Configurations ........................................................................................... 12

Digital Supply Configurations (DVDD and DGND).................................................................... 12

CLK Jumper Options...................................................................................................... 13

External Reference Jumper Options.................................................................................... 13

Auxiliary Connector Test Signals and Test Points .................................................................... 13

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Serial Interface Pinout .................................................................................................... 14

GPIO: General-Purpose I/O Register................................................................................... 20

ADS130E08 Bill of Materials ............................................................................................ 31

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ADS130E08EVM OVERVIEW

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ADS130E08EVM OVERVIEW

1.1 Information about Cautions

This document contains caution statements. The information in a caution statement is provided for your

protection. Be sure to read each caution carefully.

CAUTION

This is an example of a caution statement. A caution statement describes a

situation that could potentially damage your software or equipment.

1.2 Introduction

The ADS130E08EVM-PDK is intended for evaluating the ADS130E08 low-power, 16-bit, simultaneously-

sampling, eight-channel analog-to-digital converter (ADC). The digital SPI™ control interface is provided

by the MMB0 modular EVM motherboard that connects to the ADS130E08 evaluation board. The

ADS130E08EVM-PDK is designed to expedite evaluation and system development.

The MMB0 motherboard allows the ADS130E08EVM to be connected to the computer thorugh an

available USB port. This manual shows how to use the MMB0 as part of the ADS130E08EVM-PDK, but

does not provide technical details about the MMB0.

1.3 Supported Features

Hardware Features:

•

Configurable for bipolar or unipolar supply operation

Configurable for internal and external clock through jumper settings

Analog test signals can be applied easily using screw terminals

Software Features:

•

Analysis tools, including a virtual oscilloscope, histogram, and fast Fourier transform (FFT)

Access to a variety of register contents, including PGA options and more.

Set ADS130E08 register settings with easy-to-use, graphical user interface (GUI) software

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ADS130E08EVM OVERVIEW

1.4 ADS130E08EVM Hardware

Figure 2 shows the hardware included in the ADS130E08EVM kit. Contact the factory at http://e2e.ti.com

if any component is missing. Also, it is highly recommended that you check the TI website at

http://www.ti.com to verify that you have the latest software.

Figure 2. ADS130E08EVM-PDK Kit

The complete kit includes the following items:

•

ADS130E08EVM printed circuit board (PCB)

MMB0 (modular EVM motherboard)

6 V at 3 A wall wart

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SOFTWARE INSTALLATION

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SOFTWARE INSTALLATION

2.1 Minimum Requirements

Before installing the software that is intended for use with the EVM kit, please verify that your PC-

compatible computer meets the following minimum requirements:

•

Pentium III or Celeron processor, 866 MHz or equivalent

Minimum 256 MB of RAM (512 MB or greater recommended)

USB 1.1-compatible input

Hard disk drive with at least 200 MB free space

Windows XP operating system with SP2

Mouse or other pointing device

1280 × 960 minimum display resolution

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SOFTWARE INSTALLATION

2.2 Installing the Software

CAUTION

Do not connect the ADS130E08EVM hardware before installing the software on

a suitable PC. Failure to observe this caution may cause Microsoft Windows to

not recognize the ADS130E08EVM.

Download the latest software from the TI website at www.ti.com/tool/ADS130E08EVM-PDK. To install the

ADS130E08 software, unzip and run setup.exe. Figure 3 shows the initialization screen.

Figure 3. Initialization of ADS130E08EVM GUI

You must accept the two license agreements shown in Figure 4 and Figure 5 before the installation can

proceed.

Figure 4. License 1

Figure 5. License 2

2.3 Installing the ADS130E08EVM-PDK Hardware Drivers

2.3.1

Installing the First USB Driver

Apply power to the MMB0 using the supplied wall-mount power supply and connect the MMB0 to your PC

through any available USB port. The Found New Hardware Wizard window appears, as shown in

Figure 6. Note that this is the first of two USB drivers that are installed. Click Next to continue driver

installation.

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Figure 6. New Hardware Wizard Screen 1

Click Next when the screen in Figure 7 appears.

Figure 7. New Hardware Wizard Screen 2

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SOFTWARE INSTALLATION

Navigate to C:\Program Files\ADS130E08EVM\USB Driver, as shown in Figure 8.

Figure 8. New Hardware Wizard Screen 3

Click Next to find and install the driver. When the wizard is complete, the screen in Figure 9 appears.

Figure 9. Completion of the First USB Driver

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SOFTWARE INSTALLATION

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2.3.2

Installing the Second USB Driver

Launch the ADS130E08EVM-PDK software from the program menu. The software loads and begins

downloading firmware to the processor on the MMB0. After the firmware is loaded and running, the Found

New Hardware Wizard starts again, as shown in Figure 10.

Figure 10. Second New Hardware Wizard Screen

Click Next and the screen in Figure 11 appears.

Figure 11. Installing the USBStyx Driver

Click Next to complete the installation. If the computer is unable to find the USBStyx driver, point to the

installation directory of C:\Program Files\ADS130E08EVM\USB Drivers.

At this time, you may receive an error message because the ADS130E08EVM-PDK software has timed

out. If so, click OK, close the GUI program, power cycle the ADS130E08EVM, and restart the newly

installed ADS130E08 evaluation program. This process may need to be repeated if you plug the

ADS130E08EVM-PDK into a different USB port on your computer.

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ADS130E08EVM Daughter-Card Hardware Overview

CAUTION

Many of the components on the ADS130E08EVM are susceptible to damage

by electrostatic discharge (ESD). Customers are advised to observe proper

ESD handling procedures when unpacking and handling the EVM, including the

use of a grounded wrist strap, bootstraps, or mats at an approved ESD

workstation. An electrostatic smock and safety glasses should also be worn.

The ADS130E08EVM-PDK board is a four-layer circuit board. The board layout and schematics are

appended to the end of this document.

The ADS130E08EVM-PDK is configured to be used with the TI MMB0 data converter evaluation platform.

The key features of the ADS130E08 system on a chip (SOC) are:

•

Eight integrated instrumentation amplifiers (INAs) and eight, 16-bit, high-resolution ADCs

Low power consumption

3-V to 5-V unipolar or bipolar analog supply, and 1.8-V to 3.3-V digital supply

SPI data interface

The following sections explain some of the hardware settings possible with the EVM for evaluating the

ADS130E08 under various test conditions.

3.1 Power Supply

The ADS130E08EVM mounts on the MMB0 board with connectors J1, J2, and J3. The main power

supplies (+5 V, +3.3 V, and +1.8 V) for the front-end board are supplied by the host MMB0 board through

connector J3. All other power supplies required for the front-end board are generated onboard by power

management devices.

The ADS130E08 operates in unipolar mode using a +3.0-V to +5.0-V analog supply (AVDD/AVSS) and a

+1.8-V to +3.3-V digital supply (DVDD), or in bipolar mode using the onboard analog supply (±1.5 V to

±2.5 V). The power consumption of the front-end board is measured by using the JP3 jumper. Power

down the ADS130E08 by shorting jumper JP4.

Test points TP4, TP5, TP6, TP7, TP8, TP9, TP10, and TP13 are provided to verify that the host power

supplies are correct. The corresponding voltages are shown in Table 1.

Table 1. Power-Supply Test Points

Test Point

TP7

Voltage

+5.0 V

–4.96 V

+1.8 V

+3.3 V

+3.0 V

+2.5 V

–2.5 V

GND

TP4

TP9

TP10

TP5

TP13

TP6

TP8

The front-end board must be properly configured in order to achieve the various power-supply schemes.

The default power-supply setting for the ADS130E08EVM is a bipolar analog supply of ±2.5 V, and there

are onboard options to switch to a unipolar analog supply of +3 V. The digital supply (DVDD) is selectable

to either +3.3 V or +1.8 V. Table 2 shows the board and component configurations for each analog power-

supply scheme. Table 3 shows the board configurations for the digital supply. Note that the EVM is

shipped with the analog supply set to ±2.5 V and digital supplies set to 3.3 V.

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Table 2. Analog Supply Configurations

Unipolar Analog Supply

Bipolar Analog Supply

±1.5 V ±2.5 V

AVDD and AVSS

3 V

5 V

JP7

1-2

2-3

1-2

2-3

JP1

2-3

1-2

TPS73230

Don't care

Not installed

TPS73250

Don't care

Not installed

Don't care

TPS73201

TPS72301

21 kΩ

Don't care

TPS73201

TPS72301

47.5 kΩ

R61

R62

78.7 kΩ

23.3 kΩ

95.3 kΩ

Not installed

43.2 kΩ

R59

49.9 kΩ

R60

46.4 kΩ

C48, C54, C59

Not installed

Table 3. Digital Supply Configurations (DVDD and DGND)

DVDD

3.3 V

1-2

+1.8 V

JP7

JP1

1-2

2-3

TPS73230

Don't care

TPS73250

Don't care

Not installed

R61

R62

R59

R60

C48, C54, C59

Not installed

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ADS130E08EVM Daughter-Card Hardware Overview

3.2 Clock

The ADS130E08 has an on-chip oscillator circuit that generates a 2.048-MHz clock (nominal). This clock

can vary by ±5% over temperature. For applications that require higher accuracy, the ADS130E08 can

also accept an external clock signal. The ADS130E08 provides an option to test both internal and external

clock configurations. It also provides an option to generate the external clock from either the onboard

oscillator or from an external clock source.

The onboard oscillator is powered by the DVDD supply of the ADS130E08. Care must be taken to ensure

that the external oscillator can operate either with +1.8 V or +3.3 V, depending on the DVDD supply

configuration. Table 4 shows the jumper settings for the three options for the ADS130E08 clocks.

Table 4. CLK Jumper Options

ADS130E08 Clock

Internal Clock

Not installed

Don't care

External OSC Clock

2-3

External Clock

1-2

JP5

JP6

1-2 (disable)

Don't care

Clock source

J4 - pin 10

Don't care

A 2.048-MHz oscillator available for the +3.3-V DVDD supply is the FXO-HC735-2.048MHz. For a +1.8-V

DVDD supply, use the SiT8002AC-34-18E-2.048. The EVM is shipped with the external oscillator enabled.

3.3 Reference

The ADS130E08 has an on-chip internal reference circuit that provides reference voltages to the device.

Alternatively, the internal reference can be powered down and VREFP can be applied externally. This

configuration is achieved with the external reference generators (U2 and U3) and driver buffer. These

components (U2, U3, and U4) must be installed by the user; they are not installed at the factory. The

external reference voltage can be set to either 4.096 V or 2.5 V, depending on the analog supply voltage.

Measure TP3 to make sure the external reference is correct and stable. The settings for the external

reference is described in Table 5. This table assumes REF5025 is installed at U2 and REF5040 at U3. A

low-noise amplifier like the OPA350 can be installed at U4.

Table 5. External Reference Jumper Options

Internal Reference

VREF = 2.5 V

Don't care

External Reference

VREF = 4.096 V

ADS130E08 Reference

VREF = 2.5 V

1-2

JP12

JP2

2-3

Not installed

Installed

3.3.1

Accessing ADS130E08 Analog Supplies

Some ADS130E08 output signals are provided as test points for probing purposes using J4 (not installed

on the board). Table 6 lists the various test signals with the corresponding test points.

Table 6. Auxiliary Connector Test Signals and Test Points

Signal

Not connected

PWDN

J4 Pin Number

Signal

GPIO1

GPIO2

GPIO3

Dasiy in

GPIO4

AGND

Not connected

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3.3.2

Accessing ADS130E08 Digital Supplies

The ADS130E08 digital signals (including SPI signals, some GPIO signals, and some control signals) are

available at connector J1. These signals are used to interface to the MMB0 board DSP. The pinout for this

connector is shown in Table 7.

Table 7. Serial Interface Pinout

Signal

START/CS

CLK

J1 Pin Number

Signal

CLKSEL

GND

GPIO1

RESET

GND

DIN

GPIO2

NC/START

SCL

DOUT

DRDY

EXT_CLK

GND

SDA

3.4 Analog Inputs

The ADS130E08 provides users the option to feed in signals from any arbitrary signal source directly.

Analog signals can be applied at terminal blocks J5 through J12.

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USING THE SOFTWARE

The software GUI contains a Save to File feature (located in the Save tab) that allows all data from any

combination of channels, along with notes to describe the data, to be saved to a specified directory. This

data can then be read back using a text editor. Saving the data in this format can be completed by clicking

the Save to File button, as shown in Figure 12.

An additional option in the evaluation software allows register configurations to be saved to a file that can

be reloaded to the GUI. To create a configuration file with all of the stored register settings, use the Save

Configuration Settings option, found in the File menu at the top left-hand corner of the GUI. This

configuration file can be reloaded to the GUI using the Load Configuration Settings option found in the

same File menu.

Figure 12 shows the options available in the Save tab.

Figure 12. File Save Option Under Save Tab

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4.1 Software Overview

This section provides a quick overview of the various features and functions of the ADS130E08EVM

software package.

There are four tabs across the left side of the GUI; from top to bottom, they are:

•

About: Provides information about the EVM and software version revisions.

ADC Register: Includes all of the control registers for the ADS130E08 in a series of related subtabs:

–

Channel Registers

GPIO

•

Analysis: Provides different ways to analyze captured data, in the time or frequency domain, using the

following subtabs:

–

Scope

Histogram

FFT

Save: Provides options for saving acquired data

4.2 Global Channel Registers

The Channel Registers tab provides access to the ADS130E08 configuration and fault threshold registers.

The Global Channel Registers tab has the following options:

•

Configuration Register 1: Controls the CLKOUT option.

Configuration Register 2: Controls the internal test source, along with the test-signal amplitude and

frequency.

•

Configuration Register 3: Controls the reference buffer power-down control, the reference voltage,

and the op amp buffer control.

•

Fault Control Register: Sets the comparator threshold level for fault.

Figure 13 shows the GUI panel to manipulate these registers and the respective settings for each.

Figure 13. Channel Registers GUI for the Configuration Registers

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USING THE SOFTWARE

4.3 Channel Control Registers

The second section under the Channel Registers tab is the Channel Control Registers box. This panel

allows the user to uniquely configure the front-end multiplexer (mux) for each channel. Additionally, at the

top of the Channel Control Registers box is the option to globally set all channels to the same setting.

Table 8 lists the register map. The channel-specific mux is illustrated in Figure 14, and the all-channel-

specific mux is shown in Figure 15.

Table 8. Register Assignments: Channel-Specific Settings

Reset

Address

Value

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Channel-Specific Settings

CH1SET

CH2SET

CH3SET

CH4SET

CH5SET

CH6SET

CH7SET

CH8SET

PD1

PD2

PD3

PD4

PD5

PD6

PD7

PD8

GAIN12

GAIN22

GAIN32

GAIN42

GAIN52

GAIN62

GAIN72

GAIN82

GAIN11

GAIN21

GAIN31

GAIN41

GAIN51

GAIN61

GAIN71

GAIN81

GAIN10

GAIN20

GAIN30

GAIN40

GAIN50

GAIN60

GAIN70

GAIN80

MUX12

MUX22

MUX32

MUX42

MUX52

MUX62

MUX72

MUX82

MUX11

MUX21

MUX31

MUX41

MUX51

MUX61

MUX71

MUX81

MUX10

MUX20

MUX30

MUX40

MUX50

MUX60

MUX70

MUX80

Figure 14. Channel Control Register GUI Panel: Single Channel Enabled

Figure 15. Channel Control Registers GUI Panel: All Channels Enabled

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4.4 Internal Test Signals Input and the Scope Display Tab

Configuration Register 2 controls the signal amplitude and frequency of an internally-generated square

wave test signal. The primary purpose of this test signal is to verify the functionality of the front-end mux,

the programmable gain amplifier (PGA), and the ADC. The test signals may be viewed on the

Analysis→Scope Display tab, as Figure 16 shows.

Figure 16. Example of Internal Test Signals Viewed on the Scope Display Tab

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4.5 Temperature Sensor and the Scope Display Tab

The internal temperature sensor on the ADS130E08 is shown in Figure 22.

Temperature Sensor Monitor

AVDD

AVSS

Figure 17. Internal Temperature Sensor

When the internal mux is routed to the temperature sensor input, the output voltage of the ADC may be

converted to a temperature value using Equation 1:

Temperature Readnig (mV) - 145,300 mV

Temperature (°C) =

+ 25°C

490 mV/°C

(1)

The output voltage corresponding to a given temperature can be read by running a data acquisition after

the Temperature Sensor mux option is selected, as shown in the Channel Control Registers section.

Figure 18 demonstrates an example of temperature sensor readings read back using the GUI.

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Figure 18. Eight-Channel Read of Internal Temperature Data

The number 0.1447 V (on the y-axis) can be calculated as a temperature using Equation 2:

0.1447 - 0.145300

Temperature (°C) =

+ 25 = 23.78°C

0.00049

(2)

4.5.1

MV_DDInput and the Scope Tab

The MV_DDinput option allows the measurement of the supply voltage V_S= (AVDD + AVSS) / 2 for

channels 1, 2, 5, 6, 7, and 8; however, the supply voltage for channel 3 is DVDD / 2.

4.6 General-Purpose I/O Register (GPIO)

The GPIO registers control four general-purpose input and output (I/O) pins. Table 9 shows the respective

Table 9. GPIO: General-Purpose I/O Register

Reset

Address

Value

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

14h

GPIO

0Fh

GPIOD4

GPIOD3

GPIOD2

GPIOD1

GPIOC4

GPIOC3

GPIOC2

GPIOC1

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Figure 19. GPIO Control Register GUI Panel

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4.7 Fault Status Registers (FAULT_STATP and FAULT_STAIN)

The Fault Status registers store the status of whether the positive and/or negative input on each channel

has a fault. This is a convenient feature to help pinpoint if any of the inputs are out of range. The GUI for

this feature is enabled by clicking in the upper right-hand corner of the EVM software on the Show/Poll

Fault Status button, as shown in Figure 20.

Figure 20. Fault Status Indicator

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4.8 Register Map

The Register→Device Register tab is a helpful debug feature that allows the user to view the state of all

the internal registers. This tab is shown in Figure 21.

Figure 21. Device Register Settings

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ADS130E08 ANALYSIS TOOLS

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ADS130E08 ANALYSIS TOOLS

Under the Analysis tab in the ADS130E08 GUI software, there are three different analysis tools available

that enable a detailed examination of the signals selected by the front-end mux:

•

Scope

Histogram

FFT

5.1 Scope Tool

The Scope tool, available under the Analysis tab, is a very useful means of examining the data results in

the time domain. Users can decide if they would like their data displayed as input-referred or not, as well

as review the details of the converted data to ensure that the data meets expectations. Figure 22 shows

the scope tool features.

Figure 22. Scope Tool Features

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ADS130E08 ANALYSIS TOOLS

5.1.1

Scope Analysis Button

The Scope Analysis button opens a pop-up window that displays the mean voltage, root mean square

(RMS) voltage, and peak-to-peak voltage for noise analysis. Figure 23 shows an example of this window.

Figure 23. Scope Analysis Tab (Noise Levels for Each Channel Shown)

Waveform Examination Tool

5.1.2

The waveform examination tool allows the user to either zoom in on all channels simultaneously, or on just

a single channel. Figure 24 shows an example of the waveform examination tool.

Signal-Zoom

Analysis Options

Figure 24. Zoom Option on the Waveform Examination Tool

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5.2 Histogram Tool

The Histogram subtab displays the data in a histogram format for the eight channels. The data set is

arranged in the total number of histogram bins set within the tab following acquisition. The screen shot

shown in Figure 25 illustrates the histogram output for an input shorted signal. The same signal-zoom

analysis shown in the previous section may be used on the histogram plots for a more detailed

examination of the amplitude bins.

Signal-Zoom

Analysis Options

Figure 25. Histogram Bins

The Histogram Analysis button can be used to view the mean voltage, standard deviation used for the

RMS voltage, and peak-to-peak voltage for analysis, as shown in Figure 26.

Figure 26. Statistics for the Signal Amplitude of Eight Channels

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ADS130E08 ANALYSIS TOOLS

5.3 FFT Tool

The FFT subtab displays the data in the frequency domain by performing an FFT on the eight channels.

Details of the FFT, including SNR, THD, and more, can be viewed using the FFT Analysis button located

at the bottom of the display. Figure 27 shows the FFT display.

Figure 27. Analysis→FFT Graph of Normal Electrode Configuration

5.3.1

Coherent Frequency Calculator

The red box labeled 1 in Figure 27 shows the Coherent Frequency Calculator. Coherent sampling in an

FFT is defined in Equation 3:

f_AIN

N_WINDOW

f_SAMPLE

N_TOTAL

where:

•

f_AIN= input frequency

f_SAMPLE= ADS130E08 sampling frequency

N_WINDOW= number of odd integer cycles during a given sampling period

N_TOTAL= number of data points (in power of 2) that is used to create the FFT.

(3)

If the conditions for coherent sampling can be met, the FFT results for a periodic signal are optimized. The

ideal A_INfrequency is a value that is calculated based on the sampling rate so that the coherent sampling

criteria can be met.

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5.3.2

AC Analysis Parameters

The AC Analysis Parameters portion of the FFT tool (red box 2 in Figure 27) is used to dictate the number

of harmonics, dc leakage bins, harmonic leakage bins, and fundamental leakage bins that are used in the

creation of various histograms. Press the Windowing button, shown in in Figure 28, to evaluate the FFT

graph under a variety of different windowing options. Pressing the Reference button toggles between

dBFS (decibels, full-scale) and dBc (decibels to carrier).

Figure 28. Analysis→FFT→AC Analysis Parameters: Windowing Options

5.3.3

FFT Analysis

The FFT Analysis button (red box 3, Figure 27) pulls up the window shown in Figure 29. This window

displays the ac details of the data set after it is viewed in the frequency domain. The SNR, THD, and

harmonic information is listed in a table format.

Figure 29. Analysis→FFT→FFT Analysis: Input Short Condition

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ADS130E08 ANALYSIS TOOLS

5.3.4

User-Defined Dynamic Range

This portion of the FFT tool (red box 4, Figure 27) is used to examine the SNR of a specific channel within

a given frequency band defined by the Low Frequency and High Frequency fields. The SNR displayed in

this window also appears under the Dynamic Range heading, as shown in Figure 30.

Figure 30. Changing the User-Defined Dynamic Range for Channel 1

Input Amplitude (V_PP)

5.3.5

5.3.6

The Input Amplitude field (red box 5, Figure 27) is a user input that is important for accurately calculating

the CMRR of each channel.

Waveform Zoom

This zoom function allows a closer examination of the FFT at frequencies of interest, as shown in

Figure 31.

Figure 31. FFT Plot Using Waveform Zoom Function

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BILL OF MATERIALS (BOM), LAYOUT, AND SCHEMATIC

This section contains the complete BOM, printed circuit board (PCB) layouts, and schematic diagrams for

the ADS130E08.

NOTE: Board layouts are not to scale. These figures are intended to show how the board is laid out;

they are not intended to be used for manufacturing ADS130E08 PCBs.

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BILL OF MATERIALS (BOM), LAYOUT, AND SCHEMATIC

6.1 Bill of Materials

Table 10 lists the bill of materials for the ADS130E08.

Table 10. ADS130E08 Bill of Materials

Item

Qty

Ref Des

Description

Manufacturer

Part Number

6527354

N/A

Printed Circuit Board

C1, C2, C3, C4, C5, C6, C11, C17, C39,

C40, C41, C44, C50, C68, C69

CAP CER 1UF 25V 10% X5R 0603

Murata

GRM188R61E105KA12D

C7, C8, C15, C19, C26, C28, C30, C32,

C33, C34, C35, C36, C48, C54, C59

Not Installed

CAP CER 22UF 6.3V 10% X5R 0805

Taiyo Yuden

Murata

JMK212BJ226KG-T

C10, C37, C38, C42, C43, C46, C47, C52, CAP CER 10UF 10V 10% X5R 0805

C53, C57, C58

GRM219R61A106KE44D

C12, C13, C14, C16, C18, C49, C61, C62, CAP CER 0.1UF 50V 10% X7R 0603

C75, C76

Murata

TDK

GRM188R71H104KA93D

C1608C0G1H471J

C20, C21, C22, C23, C24, C64, C65, C66, CAP CER 470PF 50V C0G 5% 0603

C67, C70, C71, C72, C73, C74, C77, C78

C25, C27, C29

C31

Not Installed

C45, C51, C55, C56

C60, C63

CAP CER 2.2UF 6.3V 10% X5R 0603

CAP CER 100UF 10V 20% X5R 1210

Not Installed

Murata

GRM185R60J225KE26D

LMK325BJ107MM-T

Taiyo Yuden

D1–D16

J1 (Top side)

J1, J2 (Bottom side)

J3 (Bottom side)

10 Pin, Dual Row, SM Header (20 Pos.)

5 Pin, Dual Row, SM Header (10 Pos.)

Not Installed

Samtec

TSM-110-01-T-DV-P

SSW-110-22-F-D-VS-K

SSW-105-22-F-D-VS-K

J5–J12

TERMINAL BLOCK 3.5MM 2POS PCB

3 Position Jumper _ .1" spacing

Not Installed

On Shore

Samtec

ED555/2DS

JP1, JP5–JP11

JP2

TSW-103-07-T-S

JP3, JP4

2 Position Jumper _ .1" spacing

Not Installed

Samtec

TSW-102-07-T-S

JP12

L1–L5

FERRITE BEAD 470 OHM 0805

RES 0.0 OHM 1/10W 5% 0603 SMD

Taiyo Yuden

Yageo

BK2125HM471-T

RC0603JR-070RL

RC0603FR-0710KL

R1, R67, R68, R69, R70

R2, R3, R4, R7, R10, R13, R16, R19, R22, RES 10.0K OHM 1/10W 1% 0603 SMD

R25, R28, R31, R34, R37, R40, R43, R46,

Yageo

R49, R63, R71

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Table 10. ADS130E08 Bill of Materials (continued)

Item

Qty

Ref Des

Description

Manufacturer

Part Number

R5, R6, R8, R9, R11, R12, R14, R15, R17, Not Installed

R18, R20, R21, R23, R24, R26, R27, R29,

R30, R32, R33, R35, R36, R38, R39, R41,

R42, R44, R45, R47, R48, R50, R51, R52,

R53, R54, R55, R56, R57, R58, R64, R65,

R66

R59

RES 49.9K OHM 1/10W 1% 0603 SMD

RES 46.4K OHM 1/10W 1% 0603 SMD

RES 47.5K OHM 1/10W 1% 0603 SMD

RES 43.2K OHM 1/10W 1% 0603 SMD

TEST POINT PC MINI .040"D BLACK

TEST POINT PC MINI .040"D RED

Yageo

RC0603FR-0749K9L

RC0603FR-0746K4L

RC0603FR-0747K5L

RC0603FR-0743K2L

5001

R60

R61

R62

Yageo

TP1, TP2, TP8, TP11, TP12

Keystone

TP3, TP4, TP5, TP6, TP7, TP9, TP10,

TP13, TP14, TP15, TP16

5000

Low-Cost, 8-Channel, 16-Bit Analog Front-End for Power

Control

ADS130E08IPAG

U2,U3, U4

Not Installed

IC UNREG CHRG PUMP V INV SOT23-5

IC LDO REG 250MA 3.0V SOT23-5

IC LDO REG NEG 200MA ADJ SOT23-5

IC LDO REG 250MA ADJ-V SOT23-5

IC EEPROM 256KBIT 400KHZ 8TSSOP

OSC 2.0480 MHZ 3.3V HCMOS SMT

0.100 Shunt - Black Shunts

TPS60403DBVT

TPS73230DBVT

TPS72301DBVT

TPS73201DBVT

24AA256-I/ST

Microchip

Fox

OSC1

N/A

FXO-HC735-2.048

969102-0000-DA

6462011 (MMB0)

N/A

Printed Circuit Board

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BILL OF MATERIALS (BOM), LAYOUT, AND SCHEMATIC

6.2 PCB Layout

The ADS130E08 PCB layout is appended to this document.

6.3 Front-End Board Schematic

The ADS130E08 schematic is appended to this document.

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Top Assembly

Top Layer

Internal Layer 1

Internal Layer 2

Bottom Layer

Bottom Assembly

AVDD

AVSS

AVDD

AVSS

AVDD

AVSS

AVDD

R17

R11

IN1N

PG2

R16

10k

IN3N

R10

10k

PG2

IN2N

C64

PG2

470pF

C20

R18

C22

470pF

R12

470pF

AVSS

AVDD

AVSS

AVDD

AVSS

AVDD

AVSS

AVDD

AVSS

AVDD

CH2

CH1

D10

R20

R14

CH3

IN1P

PG2

R19

10k

IN3P

10k

PG2

R13

10k

C65

470pF

IN2P

PG2

C70

470pF

R21

C23

470pF

R15

AVSS

AVDD

AVSS

AVDD

AVSS

AVDD

AVSS

AVDD

R29

R23

D11

R35

R28

10k

IN5N

R22

R34

10k

PG2

IN4N

IN6N

PG2

10k

C24

470pF

R30

C21

470pF

C71

470pF

R24

R36

AVSS

AVDD

AVSS

AVDD

J10

AVSS

AVDD

AVSS

AVDD

AVSS

AVDD

AVSS

AVDD

CH6

R26

CH5

CH4

R32

D14

R38

R25

10k

IN4P

PG2

R31

10k

R37

10k

IN5P

IN6P

PG2

C66

470pF

R27

C67

470pF

C73

470pF

R33

R39

AVSS

AVDD

AVSS

AVDD

AVSS

AVDD

D12

R41

D13

R47

R40

IN7N

R42

PG2

10k

C72

470pF

R46

IN8N

PG2

10k

C77

R48

AVSS

470pF

AVSS

AVDD

J11

AVSS

J12

AVDD

AVSS

CH7

AVDD

AVSS

AVDD

D15

R44

CH8

D16

R50

R43

10k

IN7P

PG2

C74

470pF

R45

R49

10k

IN8P

PG2

C78

470pF

R51

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AVSS

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TP15

TP14

TP16

GPIO1

GPIO2

GPIO3

GPIO4

1uF

C13

AVSS

/PWDN

DAISY_IN

VCAP3

AVDD

0.1uF

AGND

AVSS

C68

1uF

C69

1uF

DVDD

AVDD

ADS13xE08

AGND

C16

C19

C15

CLKSEL

1uF

0.1uF

PG1

CLKSEL

DGND

DVDD

AVSS

DGND

DVDD

DRDY

GPIO4

DOUT

GPIO2

GPIO3

SCLK

CLKSEL

IN8N

IN8P

IN7N

IN7P

IN6N

IN6P

IN5N

IN5P

IN4N

IN4P

IN3N

IN3P

IN2N

IN2P

IN1N

IN1P

IN8N

IN8P

IN7N

IN7P

IN6N

IN6P

IN5N

IN5P

IN4N

IN4P

IN3N

IN3P

IN2N

IN2P

IN1N

IN1P

RESV1

AVSS

AGND

SPI_DRDY

GPIO4

SPI_OUT

GPIO2

GPIO3

SPI_CLK

SPI_CS

DVDD

SPI_DRDY

GPIO4

SPI_OUT

GPIO2

GPIO3

SPI_CLK

AVDD

DVDD

R71

10K

C14

C17

1uF

C18

0.1uF

C12

SPI_CS

1uF

0.1uF

1uF

CLK

START

DIN

SPI_START

SPI_IN

DVDD

SPI_START

SPI_IN

AVSS

DGND

AGND

OSC1

VDD

AGND

C11

AGND

JP6

E/D

1uF

AGND

DVDD

TP1

TP2

TP11

TP12

Output GND

10K

CLK

JP5

HC735-2.048MHZ

AGND

VREFP

C76

0.1uF

/RESET

GPIO1

VREFP

/RESET

GPIO1

EXT_CLK

C10

/PWDN

DAISY_IN

TP3

/PWDN

DAISY_IN

10uF

AVSS

JP4

1uF

AVSS

C25

1uF

AVSS

AGND

22uF

ADC Frontend

AVSS

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External Reference

External Reference Drivers

AVDD

N/C

R55

C32

AVDD

VIN

OUT

C27

TEMP

GND

C26

TRIM

C35

AVSS

C33 NI

AGND

AVSS

JP2

R56

VREFP

R54

JP12

R52

R53

AVDD

N/C

C30

C31

C34 NI

VIN

OUT

C29

TEMP

GND

AGND

C28

TRIM

C36

AVSS

NOT INSTALLED

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C40

1uF

TP4

VCC_5v

OUT

VCC_-5v

470uH

C37

C38

C39

1uF

C41

1uF

C42

C43

10uF

AGND

TPS60403

AGND

TP5

+3.0V

C47

OUT

JP1

470uH

C44

1uF

C45

C46

AVDD

2.2uF

10uF

R57

GND

AGND

NR/FB

C49

C48

TPS73230

R58

0.1uF

AGND

TP13

+2.5V

OUT

470uH

C50

1uF

C51

C52

C53

2.2uF

10uF

R59

AGND

49.9K

AGND

GND

NR/FB

C54

TPS73201

AGND

R60

46.4K

AGND

TP6

VCC_-5v

C55

-2.5V

OUT

470uH

C56

C57

C58

JP7

AVSS

2.2uF

AGND

2.2uF

10uF

R61

AGND

47.5K

AGND

GND

NR/FB

Power Supplies

TPS72301

C59

AGND

R62

43.2K

AGND

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DVDD

C63

C62

100uF

0.1uF

R63

10K

AGND

JP10

CLKSEL

VCC_5v

TP9

VCC_1.8V

TP7

JP11

JP8

SPI_CLK

JP3

TP10

VCC_3.3V

SPI_CS

GPIO1

/RESET

TP8

C60

100uF

C61

0.1uF

SPI_IN

GPIO2

SPI_OUT

SPI_DRDY

EXT_CLK

VCC_3.3V

C75

0.1uF

VCC_3.3V

R64

R65

R66

Dummy Connector

JP9

VCC

SCL

SDA

SPI_START

SCL

AGND

SDA

GND

R70

24AA256-I/ST

R67 R68 R69

AGND

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This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION PURPOSES

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the date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY SELLER TO BUYER

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TI assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or

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Please read the User’s Guide and, specifically, the Warnings and Restrictions notice in the User’s Guide prior to handling the product. This

notice contains important safety information about temperatures and voltages. For additional information on TI’s environmental and/or

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frequency energy and has not been tested for compliance with the limits of computing devices pursuant to part 15 of FCC rules, which are

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Should this evaluation board/kit not meet the specifications indicated in the User’s Guide, the board/kit may be returned within 30 days from

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Please read the User's Guide and, specifically, the Warnings and Restrictions notice in the User's Guide prior to handling the product. This

notice contains important safety information about temperatures and voltages. For additional information on TI's environmental and/or safety

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No license is granted under any patent right or other intellectual property right of TI covering or relating to any machine, process, or

combination in which such TI products or services might be or are used. TI currently deals with a variety of customers for products, and

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•

Reorient or relocate the receiving antenna.

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Consult the dealer or an experienced radio/TV technician for help.

For EVMs annotated as IC – INDUSTRY CANADA Compliant

This Class A or B digital apparatus complies with Canadian ICES-003.

Changes or modifications not expressly approved by the party responsible for compliance could void the user’s authority to operate the

equipment.

Concerning EVMs including radio transmitters

This device complies with Industry Canada licence-exempt RSS standard(s). Operation is subject to the following two conditions: (1) this

device may not cause interference, and (2) this device must accept any interference, including interference that may cause undesired

operation of the device.

Concerning EVMs including detachable antennas

Under Industry Canada regulations, this radio transmitter may only operate using an antenna of a type and maximum (or lesser) gain

approved for the transmitter by Industry Canada. To reduce potential radio interference to other users, the antenna type and its gain should

be so chosen that the equivalent isotropically radiated power (e.i.r.p.) is not more than that necessary for successful communication.

This radio transmitter has been approved by Industry Canada to operate with the antenna types listed in the user guide with the maximum

permissible gain and required antenna impedance for each antenna type indicated. Antenna types not included in this list, having a gain

greater than the maximum gain indicated for that type, are strictly prohibited for use with this device.

Cet appareil numérique de la classe A ou B est conforme à la norme NMB-003 du Canada.

Les changements ou les modifications pas expressément approuvés par la partie responsable de la conformité ont pu vider l’autorité de

l'utilisateur pour actionner l'équipement.

Concernant les EVMs avec appareils radio

Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. L'exploitation est

autorisée aux deux conditions suivantes : (1) l'appareil ne doit pas produire de brouillage, et (2) l'utilisateur de l'appareil doit accepter tout

brouillage radioélectrique subi, même si le brouillage est susceptible d'en compromettre le fonctionnement.

Concernant les EVMs avec antennes détachables

Conformément à la réglementation d'Industrie Canada, le présent émetteur radio peut fonctionner avec une antenne d'un type et d'un gain

maximal (ou inférieur) approuvé pour l'émetteur par Industrie Canada. Dans le but de réduire les risques de brouillage radioélectrique à

l'intention des autres utilisateurs, il faut choisir le type d'antenne et son gain de sorte que la puissance isotrope rayonnée équivalente

(p.i.r.e.) ne dépasse pas l'intensité nécessaire à l'établissement d'une communication satisfaisante.

Le présent émetteur radio a été approuvé par Industrie Canada pour fonctionner avec les types d'antenne énumérés dans le manuel

d’usage et ayant un gain admissible maximal et l'impédance requise pour chaque type d'antenne. Les types d'antenne non inclus dans

cette liste, ou dont le gain est supérieur au gain maximal indiqué, sont strictement interdits pour l'exploitation de l'émetteur.

SPACER

【Important Notice for Users of this Product in Japan】

This development kit is NOT certified as Confirming to Technical Regulations of Radio Law of Japan

If you use this product in Japan, you are required by Radio Law of Japan to follow the instructions below with respect to this product:

1. Use this product in a shielded room or any other test facility as defined in the notification #173 issued by Ministry of Internal Affairs and

Communications on March 28, 2006, based on Sub-section 1.1 of Article 6 of the Ministry’s Rule for Enforcement of Radio Law of

Japan,

2. Use this product only after you obtained the license of Test Radio Station as provided in Radio Law of Japan with respect to this

product, or

3. Use of this product only after you obtained the Technical Regulations Conformity Certification as provided in Radio Law of Japan with

respect to this product. Also, please do not transfer this product, unless you give the same notice above to the transferee. Please note

that if you could not follow the instructions above, you will be subject to penalties of Radio Law of Japan.

Texas Instruments Japan Limited

(address) 24-1, Nishi-Shinjuku 6 chome, Shinjuku-ku, Tokyo, Japan

http://www.tij.co.jp

【ご使用にあたっての注】

本開発キットは技術基準適合証明を受けておりません。

本製品のご使用に際しては、電波法遵守のため、以下のいずれかの措置を取っていただく必要がありますのでご注意ください。

1. 電波法施行規則第6条第1項第1号に基づく平成18年3月28日総務省告示第173号で定められた電波暗室等の試験設備でご使用いただく。

2. 実験局の免許を取得後ご使用いただく。

3. 技術基準適合証明を取得後ご使用いただく。

なお、本製品は、上記の「ご使用にあたっての注意」を譲渡先、移転先に通知しない限り、譲渡、移転できないものとします。

ꢀꢀꢀ上記を遵守頂けない場合は、電波法の罰則が適用される可能性があることをご留意ください。

日本テキサス・インスツルメンツ株式会社

東京都新宿区西新宿６丁目２４番１号

西新宿三井ビル

http://www.tij.co.jp

SPACER

EVALUATION BOARD/KIT/MODULE (EVM)

WARNINGS, RESTRICTIONS AND DISCLAIMERS

For Feasibility Evaluation Only, in Laboratory/Development Environments. Unless otherwise indicated, this EVM is not a finished

electrical equipment and not intended for consumer use. It is intended solely for use for preliminary feasibility evaluation in

laboratory/development environments by technically qualified electronics experts who are familiar with the dangers and application risks

associated with handling electrical mechanical components, systems and subsystems. It should not be used as all or part of a finished end

product.

Your Sole Responsibility and Risk. You acknowledge, represent and agree that:

1. You have unique knowledge concerning Federal, State and local regulatory requirements (including but not limited to Food and Drug

Administration regulations, if applicable) which relate to your products and which relate to your use (and/or that of your employees,

affiliates, contractors or designees) of the EVM for evaluation, testing and other purposes.

2. You have full and exclusive responsibility to assure the safety and compliance of your products with all such laws and other applicable

regulatory requirements, and also to assure the safety of any activities to be conducted by you and/or your employees, affiliates,

contractors or designees, using the EVM. Further, you are responsible to assure that any interfaces (electronic and/or mechanical)

between the EVM and any human body are designed with suitable isolation and means to safely limit accessible leakage currents to

minimize the risk of electrical shock hazard.

3. You will employ reasonable safeguards to ensure that your use of the EVM will not result in any property damage, injury or death, even

if the EVM should fail to perform as described or expected.

4. You will take care of proper disposal and recycling of the EVM’s electronic components and packing materials.

Certain Instructions. It is important to operate this EVM within TI’s recommended specifications and environmental considerations per the

user guidelines. Exceeding the specified EVM ratings (including but not limited to input and output voltage, current, power, and

environmental ranges) may cause property damage, personal injury or death. If there are questions concerning these ratings please contact

a TI field representative prior to connecting interface electronics including input power and intended loads. Any loads applied outside of the

specified output range may result in unintended and/or inaccurate operation and/or possible permanent damage to the EVM and/or

interface electronics. Please consult the EVM User's Guide prior to connecting any load to the EVM output. If there is uncertainty as to the

load specification, please contact a TI field representative. During normal operation, some circuit components may have case temperatures

greater than 60°C as long as the input and output are maintained at a normal ambient operating temperature. These components include

but are not limited to linear regulators, switching transistors, pass transistors, and current sense resistors which can be identified using the

EVM schematic located in the EVM User's Guide. When placing measurement probes near these devices during normal operation, please

be aware that these devices may be very warm to the touch. As with all electronic evaluation tools, only qualified personnel knowledgeable

in electronic measurement and diagnostics normally found in development environments should use these EVMs.

Agreement to Defend, Indemnify and Hold Harmless. You agree to defend, indemnify and hold TI, its licensors and their representatives

harmless from and against any and all claims, damages, losses, expenses, costs and liabilities (collectively, "Claims") arising out of or in

connection with any use of the EVM that is not in accordance with the terms of the agreement. This obligation shall apply whether Claims

arise under law of tort or contract or any other legal theory, and even if the EVM fails to perform as described or expected.

Safety-Critical or Life-Critical Applications. If you intend to evaluate the components for possible use in safety critical applications (such

as life support) where a failure of the TI product would reasonably be expected to cause severe personal injury or death, such as devices

which are classified as FDA Class III or similar classification, then you must specifically notify TI of such intent and enter into a separate

Assurance and Indemnity Agreement.

Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265

IMPORTANT NOTICE

Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other

changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest

issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and

complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale

supplied at the time of order acknowledgment.

TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms

and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary

to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily

performed.

TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and

applications using TI components. To minimize the risks associated with Buyers’ products and applications, Buyers should provide

adequate design and operating safeguards.

TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or

other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information

published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or

endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the

third party, or a license from TI under the patents or other intellectual property of TI.

Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration

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Products

Applications

Audio

www.ti.com/audio

amplifier.ti.com

dataconverter.ti.com

www.dlp.com

Automotive and Transportation www.ti.com/automotive

Communications and Telecom www.ti.com/communications

Amplifiers

Data Converters

DLP® Products

DSP

Computers and Peripherals

Consumer Electronics

Energy and Lighting

Industrial

www.ti.com/computers

www.ti.com/consumer-apps

www.ti.com/energy

dsp.ti.com

Clocks and Timers

Interface

www.ti.com/clocks

interface.ti.com

logic.ti.com

www.ti.com/industrial

www.ti.com/medical

Medical

Logic

Security

www.ti.com/security

Power Mgmt

Microcontrollers

RFID

power.ti.com

Space, Avionics and Defense

Video and Imaging

www.ti.com/space-avionics-defense

www.ti.com/video

microcontroller.ti.com

www.ti-rfid.com

www.ti.com/omap

OMAP Applications Processors

Wireless Connectivity

TI E2E Community

e2e.ti.com

www.ti.com/wirelessconnectivity

Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265

SBAU202 [TI]

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