SN65HVD08P [TI]
WIDE SUPPLY RANGE RS-485 TRANSCEIVER; 宽电源范围RS- 485收发器
| 型号： | SN65HVD08P |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | WIDE SUPPLY RANGE RS-485 TRANSCEIVER |
| 文件： | 总14页 (文件大小：283K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN75HVD08, SN65HVD08
www.ti.com
SLLS550A–NOVEMBER 2002–REVISED MAY 2003
WIDE SUPPLY RANGE RS-485 TRANSCEIVER
The wide supply voltage range and low quiescent
current requirements allow the SN65HVD08s to
operate from a 5-V power bus in the cable with as
much as a 2-V line voltage drop. Busing power in the
cable can alleviate the need for isolated power to be
generated at each connection of a ground-isolated
bus.
FEATURES
•
Operates With a 3-V to 5.5-V Supply
•
Consumes Less Than 90 mW Quiescent
Power
•
Open-Circuit, Short Circuit, and Idle-Bus
Failsafe Receiver
•
•
•
1/8th Unit-Load (up to 256 nodes on the bus)
The driver differential outputs and receiver differential
inputs connect internally to form a differential in-
put/output (I/O) bus port that is designed to offer
minimum loading to the bus whenever the driver is
disabled or not powered. The drivers and receivers
have active-high and active-low enables respectively,
which can be externally connected together to func-
tion as a direction control.
Bus-Pin ESD Protection Exceeds 16 kV HBM
Driver Output Voltage Slew-Rate Limited for
Optimum Signal Quality at 10 Mbps
•
Electrically Compatible With ANSI TIA/EIA-485
Standard
APPLICATIONS
D or P PACKAGE
(TOP VIEW)
•
Data Transmission With Remote Stations
Powered From the Host
R
RE
DE
D
V
B
A
1
2
3
4
8
7
6
5
CC
•
•
•
•
Isolated Multipoint Data Buses
Industrial Process Control Networks
Point-of-Sale Networks
GND
Electric Utility Metering
LOGIC DIAGRAM (Positive Logic)
DESCRIPTION
The SN65HVD08 combines a 3-state differential line
driver and differential line receiver designed for bal-
anced data transmission and interoperation with ANSI
TIA/EIA-485-A and ISO-8482E standard-compliant
devices.
A
B
D
DE
RE
R
Remote
(One of n Shown)
Host
5 V Power
Isolation
Barrier
Direct
Connection
to Host
SN65HVD08
5 V Return
Power Bus and Return Resistance
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2002–2003, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
SN75HVD08, SN65HVD08
www.ti.com
SLLS550A–NOVEMBER 2002–REVISED MAY 2003
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION
SPECIFIED TEMPERATURE
PART NUMBER
PACKAGE
PACKAGE MARKING
RANGE
SN65HVD08D
SN65HVD08P
SN75HVD08D
SN75HVD08P
–40°C to 85°C
–40°C to 85°C
0°C to 70°C
0°C to 70°C
SOIC
PDIP
SOIC
PDIP
VP08
65HVD08
VN08
75HVD08
PACKAGE DISSIPATION RATINGS
PACKAGE
SOIC (D)
PDIP (P)
TA≤ 25°C POWER RATING
710 mW
DERATING FACTOR ABOVE TA = 25°C
TA = 85°C POWER RATING
369 mW
5.7 mW/°C
8 mW/°C
1000 mW
520 mW
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range unless otherwise noted(1)(2)
UNIT
-0.3 V to 6 V
-9 V to 14 V
Supply voltage, VCC
Voltage range at A or B
Input voltage range at D, DE, R or RE
Voltage input range, transient pulse, A and B, through 100 Ω
-0.5 V to VCC + 0.5 V
-25 V to 25 V
16 kV
A, B, and GND
All pins
(3)
Human Body Model
Electrostatic discharge
4 kV
(4)
Charged-Device Model
All pins
1 kV
Continuous total power dissipation
Storage temperature, Tstg
See Dissipation Rating Table
-65°C to 150°C
(1) Stresses beyond those listed under "absolute maximum ratings” may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values, except differential I/O bus voltages, are with respect to network ground terminal.
(3) Tested in accordance with JEDEC Standard 22, Test Method A114-A.
(4) Tested in accordance with JEDEC Standard 22, Test Method C101.
RECOMMENDED OPERATING CONDITIONS
MIN NOM
MAX UNIT
Supply voltage, VCC
Input voltage at any bus terminal (separately or common mode), VI(1)
3
–7
5.5
12
V
V
High-level input voltage, VIH
2.25
0
VCC
0.8
12
Driver, driver enable, and receiver enable inputs
V
Low-level input voltage, VIL
Differential input voltage, VID
–12
–60
–8
Driver
High-level output current, IOH
Low-level output current, IOL
Operating free-air temperature, TA
mA
mA
°C
Receiver
Driver
60
8
Receiver
SN75HVD08
SN65HVD08
0
70
85
–40
(1) The algebraic convention, in which the least positive (most negative) limit is designated as minimum is used in this data sheet.
2
SN75HVD08, SN65HVD08
www.ti.com
SLLS550A–NOVEMBER 2002–REVISED MAY 2003
ELECTRICAL CHARACTERISTICS
over recommended operating conditions unless otherwise noted
PARAMETER
|VOD
∆|VOD
VOC(PP)
VIT+
TEST CONDITIONS
MIN
TYP
MAX
UNIT
RL= 60 Ω, 375 Ω on each output to
-7 V to 12 V, See Figure 1
|
Driver differential output voltage magnitude
1.5
VCC
V
Change in magnitude of driver differential
output voltage
|
RL= 54 Ω
–0.2
0.2
V
Peak-to-peak driver common-mode output
voltage
Center of two 27-Ω load
resistors, See Figure 2
0.5
V
Positive-going receiver differential input volt-
age threshold
–10
mV
mV
mV
Negative-going receiver differential input volt-
age threshold
VIT-
–200
Receiver differential input voltage threshold
hysteresis(VIT+ - VIT-
Vhys
35
)
VOH
VOL
Receiver high-level output voltage
Receiver low-level output voltage
IOH = -8 mA
IOL = 8 mA
2.4
V
V
0.4
Driver input, driver enable, and receiver en-
able high-level input current
IIH
–100
100
µA
Driver input, driver enable, and receiver en-
able low-level input current
IIL
–100
–265
100
µA
IOS
Driver short-circuit output current
7 V < VO < 12 V
VI = 12 V
265
130
mA
VI = -7 V
–100
–100
II
Bus input current (disabled driver)
µA
VI = 12 V, VCC = 0 V
VI = -7 V. VCC = 0 V
130
Receiver enabled, driver
disabled, no load
10
16
mA
Driver enabled, receiver
disabled, no load
ICC
Supply current
Both disabled
5
µA
Both enabled, no load
16
mA
DRIVER SWITCHING CHARACTERISTICS
over recommended operating conditions unless otherwise noted
PARAMETER
TEST CONDITIONS
MIN
18
TYP
MAX UNIT
tPHL
tPLH
tr
Driver high-to-low propagation delay time
40
40
Driver low-to-high propagation delay time
Driver 10%-to-90% differential output rise time
Driver 90%-to-10% differential output fall time
Driver differential output pulse skew, |tPHL - tPLH
18
RL = 54 Ω, CL = 50 pF,See Figure 3
10
55
55
2.5
55
6
ns
tf
10
tSK(P)
|
Receiver enabled, See Figures 4 and 5
Receiver disabled, See Figures 4 and 5
Receiver enabled, See Figures 4 and 5
ns
µs
ns
ten
Driver enable time
Driver disable time
tdis
90
3
SN75HVD08, SN65HVD08
www.ti.com
SLLS550A–NOVEMBER 2002–REVISED MAY 2003
RECEIVER SWITCHING CHARACTERISTICS
over recommended operating conditions unless otherwise noted
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
tPHL
tPLH
tr
Receiver high-to-low propagation delay time
Receiver low-to-high propagation delay time
Receiver 10%-to-90% differential output rise time
Receiver 90%-to-10% differential output fall time
Receiver differential output pulse skew, |tPHL - tPLH
70
70
CL = 15 pF, See Figure 6
5
5
ns
tf
tSK(P)
|
4.5
15
6
Driver enabled, See Figure 7
Driver disabled, See Figure 8
Driver enabled, See Figure 7
ns
µs
ns
ten
Receiver enable time
Receiver disable time
tdis
20
PARAMETER MEASUREMENT INFORMATION
375 Ω ±1%
V
CC
DE
A
B
D
V
OD
60 Ω ±1%
0 or 3 V
+
–7 V < V
< 12 V
(test)
_
375 Ω ±1%
Figure 1. Driver VOD With Common-Mode Loading Test Circuit
V
A
A
V
CC
27 Ω ± 1%
V
B
DE
B
A
B
D
V
OC(PP)
∆V
OC(SS)
Input
27 Ω ± 1%
V
OC
V
C
L
= 50 pF ±20%
OC
C
L
Includes Fixture and
Instrumentation Capacitance
Input: PRR = 500 kHz, 50% Duty Cycle,t <6ns, t <6ns, Z = 50 Ω
r
f
O
Figure 2. Test Circuit and Definitions for the Driver Common-Mode Output Voltage
3 V
V
CC
1.5 V
1.5 V
V
I
DE
C
C
= 50 pF ±20%
L
A
B
V
OD
D
t
t
PHL
Includes Fixture
and Instrumentation
Capacitance
PLH
L
≈ 2 V
Input
Generator
R
± 1%
= 54 Ω
90%
90%
L
V
I
50 Ω
0 V
10%
0 V
10%
V
OD
≈ –2 V
t
r
t
f
Generator: PRR = 500 kHz, 50% Duty Cycle, t <6 ns, t <6 ns, Z = 50 Ω
r
f
o
Figure 3. Driver Switching Test Circuit and Voltage Waveforms
4
SN75HVD08, SN65HVD08
www.ti.com
SLLS550A–NOVEMBER 2002–REVISED MAY 2003
Parameter Measurement Information (continued)
3 V
A
S1
D
V
O
V
I
1.5 V
1.5 V
3 V
B
C
0 V
DE
0.5 V
R
± 1%
= 110 Ω
= 50 pF ±20%
t
L
L
PZH
Input
Generator
V
OH
V
I
C
L
Includes Fixture
and Instrumentation
Capacitance
50 Ω
V
2.3 V
O
≈ 0 V
t
PHZ
Generator: PRR = 500 kHz, 50% Duty Cycle, t <6 ns, t <6 ns, Z = 50 Ω
r
f
o
Figure 4. Driver High-Level Enable and Disable Time Test Circuit and Voltage Waveforms
3 V
R
± 1%
= 110 Ω
L
≈ 3 V
A
V
I
1.5 V
1.5 V
S1
D
V
O
3 V
0 V
B
C
t
t
PLZ
PZL
DE
50 Ω
≈ 3 V
= 50 pF ±20%
Input
Generator
L
V
I
0.5 V
C
Includes Fixture
L
V
O
2.3 V
and Instrumentation
Capacitance
V
OL
Generator: PRR = 500 kHz, 50% Duty Cycle, t <6 ns, t <6 ns, Z = 50 Ω
r
f
o
Figure 5. Driver Low-Level Output Enable and Disable Time Test Circuit and Voltage Waveforms
A
V
O
R
Input
Generator
V
I
50 Ω
B
1.5 V
0 V
C
C
= 15 pF ±20%
L
RE
Includes Fixture
and Instrumentation
Capacitance
L
Generator: PRR = 500 kHz, 50% Duty Cycle, t <6 ns, t <6 ns, Z = 50 Ω
r
f
o
3 V
1.5 V
1.5 V
V
I
0 V
t
t
PHL
PLH
V
V
OH
90% 90%
V
O
1.5 V
10%
1.5 V
10%
OL
t
r
t
f
Figure 6. Receiver Switching Test Circuit and Voltage Waveforms
5
SN75HVD08, SN65HVD08
www.ti.com
SLLS550A–NOVEMBER 2002–REVISED MAY 2003
Parameter Measurement Information (continued)
3 V
V
CC
A
A
DE
1 kΩ ± 1%
= 15 pF ±20%
R
V
O
D
0 V or 3 V
B
S1
B
C
C
L
RE
Includes Fixture
and Instrumentation
Capacitance
L
Input
Generator
V
I
50 Ω
Generator: PRR = 500 kHz, 50% Duty Cycle, t <6 ns, t <6 ns, Z = 50 Ω
r
f
o
3 V
V
I
1.5 V
PZH
1.5 V
PHZ
0 V
V
t
t
OH
D at 3 V
S1 to B
V
OH
–0.5 V
1.5 V
V
O
≈ 0 V
t
t
PLZ
PZL
≈ V
CC
D at 0 V
S1 to A
1.5 V
V
O
V
OL
+0.5 V
V
OL
Figure 7. Receiver Enable and Disable Time Test Circuit and Voltage Waveforms With Drivers Enabled
6
SN75HVD08, SN65HVD08
www.ti.com
SLLS550A–NOVEMBER 2002–REVISED MAY 2003
Parameter Measurement Information (continued)
V
CC
A
A
1 kΩ ± 1%
= 15 pF ±20%
0 V or 1.5 V
1.5 V or 0 V
R
V
O
S1
B
B
C
C
L
RE
Includes Fixture
and Instrumentation
Capacitance
L
Input
Generator
V
I
50 Ω
Generator: PRR = 100 kHz, 50% Duty Cycle, t <6 ns, t <6 ns, Z = 50 Ω
r
f
o
3 V
1.5 V
PZH
V
I
0 V
V
t
OH
A at 1.5 V
B at 0 V
S1 to B
1.5 V
V
O
GND
t
PZL
≈ V
CC
A at 0 V
B at 1.5 V
S1 to A
1.5 V
V
O
V
OL
Figure 8. Receiver Enable Time From Standby (Driver Disabled)
DEVICE INFORMATION
Function Tables
DRIVER
INPUT ENABLE
OUTPUTS
D
DE
A
B
H
L
X
H
H
L
H
L
Z
H
L
H
Z
L
Open
H
RECEIVER
DIFFERENTIAL INPUTS
VID = VA - VB
ENABLE(1)
OUTPUT(1)
R
RE
V
ID≤ -0.2 V
L
L
L
H
L
L
L
?
H
Z
H
H
-0.2 V < VID < -0.01 V
-0.01 V ≤ VID
X
Open Circuit
Short Circuit
(1) H = high level; L = low level; Z = high impedance; X = irrelevant;
? = indeterminate
7
SN75HVD08, SN65HVD08
www.ti.com
SLLS550A–NOVEMBER 2002–REVISED MAY 2003
EQUIVALENT INPUT AND OUTPUT SCHEMATIC DIAGRAMS
D and RE Inputs
DE Input
V
CC
V
CC
100 kΩ
1 kΩ
1 kΩ
Input
Input
100 kΩ
9 V
9 V
A Input
B Input
V
CC
V
CC
16 V
100 kΩ
16 V
36 kΩ
36 kΩ
180 kΩ
36 kΩ
180 kΩ
36 kΩ
Input
Input
100 kΩ
16 V
16 V
A and B Outputs
R Output
V
CC
V
CC
16 V
5 Ω
Output
9 V
Output
16 V
8
SN75HVD08, SN65HVD08
www.ti.com
SLLS550A–NOVEMBER 2002–REVISED MAY 2003
TYPICAL CHARACTERISTICS
DIFFERENTIAL OUTPUT VOLTAGE
DRIVER OUTPUT CURRENT
vs
vs
SUPPLY VOLTAGE
SUPPLY VOLTAGE
4
3.5
3
70
60
D and DE at V
CC
T
= 25°C
A
T
A
= –40°C
R
L
= 54 Ω
DE at V
D at V
R
CC
CC
= 54 Ω
T
A
= 25°C
L
50
40
T
= 85°C
A
2.5
2
30
20
1.5
10
0
1
2.5
3
3.5
4
4.5
5
5.5
6
0
0.6 1.2 1.8 2.4
3
3.6 4.2 4.8 5.4
V
CC
– Supply Voltage – V
V
CC
– Supply Voltage – V
Figure 9.
Figure 10.
RMS SUPPLY CURRENT
vs
LOGIC INPUT THRESHOLD VOLTAGE
vs
SIGNALING RATE
SUPPLY VOLTAGE
2.5
2
120
T
A
RE at V
DE at V
= 25°C
R = 54 Ω
T
= 25°C
L
A
C
L
= 50 pF
D, DE or RE input
CC
CC
V
CC
= 5 V
Positive Going
100
80
1.5
1
Negative Going
60
40
0.5
0
0
2.5
5
7.5
10
2.5
3.5
4.5
5.5
6.5
V
CC
– Supply Voltage – V
Signaling Rate – Mbps
Figure 11.
Figure 12.
9
SN75HVD08, SN65HVD08
www.ti.com
SLLS550A–NOVEMBER 2002–REVISED MAY 2003
APPLICATION INFORMATION
As electrical loads are physically distanced from their
power source, the effects of supply and return line
impedance and the resultant voltage drop must be
accounted. If the supply regulation at the load cannot
be maintained to the circuit requirements, it forces the
use of remote sensing, additional regulation at the
load, bigger or shorter cables, or a combination of
these. The SN65HVD08 eases this problem by re-
laxing the supply requirements to allow for more
variation in the supply voltage over typical RS-485
transceivers.
Under dynamic load requirements, the distributed
inductance and capacitance of the power lines may
not be ignored and decoupling capacitance at the
load is required. The amount depends upon the
magnitude and frequency of the load current change
but, if only powering the SN65HVD08, a 0.1 µF
ceramic capacitor is usually sufficient.
OPTO-ISOLATED DATA BUSES
Long RS-485 circuits can create large ground loops
and pick up common-mode noise voltages in excess
of the range tolerated by standard RS-485 circuits. A
common remedy is to provide galvanic isolation of the
data circuit from earth or local grounds.
SUPPLY SOURCE IMPEDANCE
In the steady state, the voltage drop from the source
to the load is simply the wire resistance times the
load current as modeled in Figure 13.
Transformers, capacitors, or phototransistors most
often provide isolation of the bus and the local node.
Transformers and capacitors require changing signals
to transfer the information over the isolation barrier
and phototransistors (opto-isolators) can pass
steady-state signals. Each of these methods incurs
additional costs and complexity, the former in clock
encoding and decoding of the data stream and the
latter in requiring an isolated power supply.
I
L
R
S
+
+
–
R
L
V
L
= V – 2R I
S L
S
V
S
R
S
–
Quite often, the cost of isolated power is repeated at
each node connected to the bus as shown in Fig-
ure 14. The possibly lower-cost solution is to gener-
ate this supply once within the system and then
distribute it along with the data line(s) as shown in
Figure 15.
Figure 13. Steady-State Circuit Model
For example, if you were to provide 5-V ±5% supply
power to a remote circuit with a maximum load
requirement of 0.1 A (one SN65HVD08), the voltage
at the load would fall below the 4.5-V minimum of
most 5-V circuits with as little as 5.8 m of 28-GA
conductors. Table 1 summarizes wire resistance and
the length for 4.5 V and 3 V at the load with 0.1 A of
load current. The maximum lengths would scale
linearly for higher or lower load currents.
DC-to-DC
Converter
Local Power
Source
Opto
Isolators
Rest of
Board
Table 1. Maximum Cable Lengths for Minimum
Load Voltages at 0.1 A Load
WIRE
SIZE
RESISTANCE 4.5 V LENGTH
AT 0.1 A
3-v LENGTH
AT 0.1 A
28 Gage
24 Gage
22 Gage
20 Gage
18 Gage
0.213 Ω/m
0.079 Ω/m
0.054 Ω/m
0.034 Ω/m
0.021 Ω/m
5.8 m
15.8 m
23.1 m
36.8 m
59.5 m
41.1 m
110.7 m
162.0 m
257.3 m
416.7 m
DC-to-DC
Converter
Local Power
Source
Rest of
Board
Opto
Isolators
Figure 14. Isolated Power at Each Node
10
SN75HVD08, SN65HVD08
www.ti.com
SLLS550A–NOVEMBER 2002–REVISED MAY 2003
AN OPTO ALTERNATIVE
The ISO150 is a two-channel, galvanically isolated
data coupler capable of data rates of 80 Mbps. Each
channel can be individually programmed to transmit
data in either direction.
Local Power
Source
Opto
Isolators
Rest of
Board
Data is transmitted across the isolation barrier by
coupling complementary pulses through high-voltage
0.4-pF capacitors. Receiver circuitry restores the
pulses to standard logic levels. Differential signal
transmission rejects isolation-mode voltage transients
up to 1.6 kV/ms.
SN65HVD08
ISO150 avoids the problems commonly associated
with opto-couplers. Optically-isolated couplers require
high current pulses and allowance must be made for
LED aging. The ISO150's Bi-CMOS circuitry operates
at 25 mW per channel with supply voltage range
matching that of the SN65HVD08 of 3 V to 5.5 V.
Local Power
Source
Opto
Isolators
Rest of
Board
Figure 16 shows a typical circuit.
Figure 15. Distribution of Isolated Power
The features of the SN65HVD08 are particularly good
for the application of Figure 15. Due to added supply
source impedance, the low quiescent current require-
ments and wide supply voltage tolerance allow for the
poorer load regulation.
–5 V
+5 V
SN65HVD08
A
B
D
Data
(I/O)
Bus
D
2A
G
A
ISO150
V
D
2B
R/T
R/T
2B
SB
DE
2A
Channel 1
RE
R
Side A
Side B
Channel 2
D
1A
R/T
V
G
A
R/T
D
1B
1A
SA
1B
DE/RE
+5 V
“1”
+5 V
Figure 16. Isolated RS-485 Interface
11
MECHANICAL DATA
MPDI001A – JANUARY 1995 – REVISED JUNE 1999
P (R-PDIP-T8)
PLASTIC DUAL-IN-LINE
0.400 (10,60)
0.355 (9,02)
8
5
0.260 (6,60)
0.240 (6,10)
1
4
0.070 (1,78) MAX
0.325 (8,26)
0.300 (7,62)
0.020 (0,51) MIN
0.015 (0,38)
Gage Plane
0.200 (5,08) MAX
Seating Plane
0.010 (0,25) NOM
0.125 (3,18) MIN
0.100 (2,54)
0.021 (0,53)
0.430 (10,92)
MAX
0.010 (0,25)
M
0.015 (0,38)
4040082/D 05/98
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001
For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm
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Following are URLs where you can obtain information on other Texas Instruments products and application
solutions:
Products
Applications
Audio
Amplifiers
amplifier.ti.com
www.ti.com/audio
Data Converters
dataconverter.ti.com
Automotive
www.ti.com/automotive
DSP
dsp.ti.com
Broadband
Digital Control
Military
www.ti.com/broadband
www.ti.com/digitalcontrol
www.ti.com/military
Interface
Logic
interface.ti.com
logic.ti.com
Power Mgmt
Microcontrollers
power.ti.com
Optical Networking
Security
www.ti.com/opticalnetwork
www.ti.com/security
www.ti.com/telephony
www.ti.com/video
microcontroller.ti.com
Telephony
Video & Imaging
Wireless
www.ti.com/wireless
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