SN65LBC180-Q1 [TI]
LOW-POWER DIFFERENTIAL LINE DRIVER AND RECEIVER PAIR; 低功耗差动线路驱动器和接收器对
| 型号： | SN65LBC180-Q1 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | LOW-POWER DIFFERENTIAL LINE DRIVER AND RECEIVER PAIR |
| 文件： | 总17页 (文件大小：276K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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ꢄꢌ ꢍꢊꢎ ꢌꢍ ꢏꢐ ꢑꢒ ꢓꢓ ꢏꢐ ꢏꢁꢔ ꢒꢕ ꢄ ꢄ ꢒꢁꢏ ꢑꢐꢒ ꢖꢏ ꢐ ꢕꢁꢑ ꢐꢏꢆ ꢏꢒꢖ ꢏ ꢐ ꢎꢕ ꢒꢐ
SGLS251A − JULY 2004 − REVISED JUNE 2008
D PACKAGE
(TOP VIEW)
D
D
D
Qualified for Automotive Applications
Designed for High-Speed Multipoint Data
Transmission Over Long Cables
NC
V
V
A
B
Z
Y
1
2
3
4
5
6
7
14
13
12
11
10
9
CC
CC
Operate With Pulse Durations as Low
as 30 ns
R
RE
DE
D
D
Low Supply Current . . . 5 mA Max
D
Meet or Exceed the Requirements of ANSI
Standard RS-485 and ISO 8482:1987(E)
GND
GND
8
NC
D
D
3-State Outputs for Party-Line Buses
Common-Mode Voltage Range of
−7 V to 12 V
NC−No internal connection
Function Tables
D
D
D
Thermal Shutdown Protection Prevents
Driver Damage From Bus Contention
DRIVER
Positive and Negative Output Current
Limiting
INPUT
ENABLE
OUTPUTS
D
H
L
DE
H
H
Y
H
L
Z
L
H
Z
Pin Compatible With the SN75ALS180
X
L
Z
description
RECEIVER
The SN65LBC180 differential driver and receiver
pair is a monolithic integrated circuit designed for
bidirectional data communication over long
cables that take on the characteristics of
transmission lines. It is a balanced, or differential,
voltage mode device that meets or exceeds the
requirements of industry standards ANSI RS-485
and ISO 8482:1987(E). The device is designed
using TI’s proprietary LinBiCMOS with the low
power consumption of CMOS and the precision
and robustness of bipolar transistors in the same
circuit.
DIFFERENTIAL INPUTS
A−B
ENABLE
OUTPUT
RE
L
L
L
H
L
R
H
?
L
Z
H
V
≥ 0.2 V
ID
≤ − 0.2 V
X
ID
−0.2 V < V < 0.2 V
V
ID
Open circuit
H = high level, L = low level, ? = indeterminate, X = irrelevant,
Z = high impedance (off)
logic diagram (positive logic)
4
DE
The SN65LBC180 combines a differential line
driver and receiver with 3-state outputs and
operates from a single 5-V supply. The driver and
receiver have active-high and active-low enables,
respectively, which can be externally connected to
function as a direction control. The driver
differential outputs and the receiver differential
inputs are connected to separate terminals for
full-duplex operation and are designed to present
minimum loading to the bus whether disabled or
9
5
Y
Z
D
10
3
2
RE
12
11
A
B
R
powered off (V
= 0). This part features a wide
CC
common-mode voltage range making it suitable
for point-to-point or multipoint data-bus
applications.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
LinBiCMOS is a trademark of Texas Instruments Incorporated.
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ꢎꢜ ꢛ ꢧꢢꢡ ꢟ ꢠ ꢡ ꢛꢙ ꢚꢛ ꢜ ꢝ ꢟ ꢛ ꢠ ꢤꢣ ꢡ ꢘꢚ ꢘꢡꢞ ꢟꢘ ꢛꢙꢠ ꢤꢣ ꢜ ꢟꢩ ꢣ ꢟꢣ ꢜ ꢝꢠ ꢛꢚ ꢔꢣꢪ ꢞꢠ ꢒꢙꢠ ꢟꢜ ꢢꢝ ꢣꢙꢟ ꢠ
ꢠ ꢟ ꢞ ꢙꢧ ꢞ ꢜꢧ ꢫ ꢞ ꢜꢜ ꢞ ꢙ ꢟꢬꢨ ꢎꢜ ꢛ ꢧꢢꢡ ꢟꢘꢛꢙ ꢤꢜ ꢛꢡ ꢣꢠ ꢠꢘ ꢙꢭ ꢧꢛꢣ ꢠ ꢙꢛꢟ ꢙꢣ ꢡꢣ ꢠꢠ ꢞꢜ ꢘꢦ ꢬ ꢘꢙꢡ ꢦꢢꢧ ꢣ
ꢟ ꢣ ꢠ ꢟꢘ ꢙꢭ ꢛꢚ ꢞ ꢦꢦ ꢤꢞ ꢜ ꢞ ꢝ ꢣ ꢟ ꢣ ꢜ ꢠ ꢨ
Copyright 2008 Texas Instruments Incorporated
1
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SGLS251A − JULY 2004 − REVISED JUNE 2008
description/ordering information (continued)
{
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
}
T
A
PACKAGE
−40°C to 85°C
SOIC − D
Tape and reel
SN65LBC180IDRQ1
LBC180Q1
†
‡
For the most current package and ordering information, see the Package Option Addendum at the end of
this document, or see the TI web site at http://www.ti.com.
Package drawings, thermal data, and symbolization are available at http://www.ti.com/packaging.
The devices also provide positive and negative output-current limiting and thermal shutdown for protection from
line fault conditions. The line driver shuts down at a junction temperature of approximately 172°C.
2
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SGLS251A − JULY 2004 − REVISED JUNE 2008
schematics of inputs and outputs
EQUIVALENT OF D, DE, AND RE INPUTS
RECEIVER A INPUT
V
CC
V
CC
100 kΩ
NOM
18 kΩ
3 kΩ
NOM
22 kΩ
NOM
Input
Input
12 kΩ
1.1 kΩ
NOM
DRIVER OUTPUT
TYPICAL OF RECEIVER OUTPUT
V
RECEIVER B INPUT
V
CC
CC
V
CC
3 kΩ
NOM
18 kΩ
NOM
Input
A Output
Output
100 kΩ
NOM
12 kΩ
1.1 kΩ
NOM
3
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SGLS251A − JULY 2004 − REVISED JUNE 2008
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 7 V
CC
Input voltage range, V (A, B)(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −10 V to 15 V
I
Voltage range at D, R, DE, RE (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to V
+ 0.5 V
CC
Continuous total power dissipation (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Internally limited
Total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Operating free-air temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 85°C
A
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
stg
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values are with respect to GND.
2. The maximum operating junction temperature is internally limited. Use the dissipation rating table to operate below this temperature.
DISSIPATION RATING TABLE
T
≤ 25°C
DERATING FACTOR
T
= 70°C
T = 85°C
A
A
A
PACKAGE
POWER RATING
ABOVE T = 25°C
POWER RATING POWER RATING
A
D
950 mW
7.6 mW/°C
608 mW 494 mW
recommended operating conditions
MIN NOM
MAX
UNIT
Supply voltage, V
CC
4.75
2
5
5.25
V
V
V
V
V
High-level input voltage, V
IH
D, DE, and RE
Low-level input voltage, V
IL
D, DE, and RE
0.8
6
‡
‡
Differential input voltage, V
ID
−6
Voltage at any bus terminal (separately or common mode), V , V , or V
IC
A, B, Y, or Z
−7
12
−60
−8
60
8
O
I
Y or Z
R
High-level output current, I
mA
OH
Y or Z
R
Low-level output current, I
mA
OL
Operating free-air temperature, T
−40
85
°C
A
‡
The algebraic convention where the least positive (more negative) limit is designated minimum, is used in this data sheet for the differential input
voltage, voltage at any bus terminal, operating temperature, input threshold voltage, and common-mode output voltage.
4
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SGLS251A − JULY 2004 − REVISED JUNE 2008
DRIVER SECTION
electrical characteristics over recommended operating conditions (unless otherwise noted)
†
PARAMETER
Input clamp voltage
TEST CONDITIONS
MIN TYP
MAX
−1.5
5
UNIT
V
IK
I = −18 mA
V
I
R
= 54 Ω,
= 60 Ω,
See Figure 1
See Figure 2
1.1
1.1
2.5
2
Differential output voltage magnitude
(see Note 3)
L
L
| V
OD
|
V
R
5
Change in magnitude of differential output
voltage (see Note 4)
∆| V
|
|
See Figures 1 and 2
0.2
3
V
V
V
OD
V
OC
Common-mode output voltage
1
2.5
R
= 54 Ω,
See Figure 1
Change in magnitude of common-mode output
voltage (see Note 4)
L
∆| V
0.2
OC
I
I
I
I
I
Output current with power off
High-impedance-state output current
High-level input current
V
V
= 0,
V = −7 V to 12 V
O
100
100
−100
−100
250
5
µA
µA
µA
µA
mA
O
CC
= −7 V to 12 V
O
OZ
IH
IL
V = 2.4 V
I
Low-level input current
V = 0.4 V
I
Short-circuit output current
−7 V ≤ V ≤ 12 V
OS
O
Outputs enabled
Outputs disabled
I
Supply current
Receiver disabled
mA
CC
3
†
All typical values are at V
= 5 V and T = 25°C.
A
OD
CC
NOTES: 3. The minimum V
specification of the SN65LBC180 may not fully comply with ANSI RS-485 at operating temperatures below 0°C.
System designers should take the possibly lower output signal into account in determining the maximum signal-transmission
distance.
4. ∆|V
OD
| and ∆|V
OC
| are the changes in the steady-state magnitude of V
changed from a high level to a low level.
and V
, respectively, that occur when the input is
OC
OD
switching characteristics, V
= 5 V, T = 25°C
A
CC
PARAMETER
TEST CONDITIONS
= 54 Ω, See Figure 3
MIN
7
TYP
12
MAX
18
UNIT
ns
t
t
t
t
t
t
Differential output delay time
d(OD)
t(OD)
PZH
PZL
R
L
Differential output transition time
Output enable time to high level
Output enable time to low level
Output disable time from high level
Output disable time from low level
5
10
20
ns
R
R
R
R
= 110 Ω,
= 110 Ω,
= 110 Ω,
= 110 Ω,
See Figure 4
See Figure 5
See Figure 4
See Figure 5
35
ns
L
L
L
L
35
ns
50
ns
PHZ
PLZ
35
ns
5
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SGLS251A − JULY 2004 − REVISED JUNE 2008
RECEIVER SECTION
electrical characteristics over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
= −8 mA
MIN
TYP
MAX
UNIT
V
V
V
V
V
V
V
Positive-going input threshold voltage
Negative-going input threshold voltage
I
I
0.2
IT+
IT−
hys
IK
O
= 8 mA
−0.2
V
O
Hysteresis voltage (V
IT+
− V
)
45
mV
V
IT−
Enable-input clamp voltage
High-level output voltage
Low-level output voltage
I = −18 mA
−1.5
I
V
V
V
V
V
= 200 mV,
I
I
= −8 mA
= 8 mA
3.5
4.5
0.3
V
OH
OL
ID
ID
O
OH
= −200 mV,
0.5
20
V
OL
I
I
I
High-impedance-state output current
High-level enable-input current
Low-level enable-input current
= 0 V to V
= 2.4 V
µA
µA
µA
OZ
CC
−50
−100
IH
IL
IH
IL
= 0.4 V
V = 12 V,
Other input at 0 V
V
CC
V
CC
V
CC
V
CC
= 5 V,
= 0 V,
= 5 V,
= 0 V,
I
0.7
0.8
1
1
V = 12 V,
I
Other input at 0 V
I
Bus input current
Supply current
mA
mA
I
V = −7 V,
I
Other input at 0 V
−0.5
−0.5
−0.8
−0.8
V = −7 V,
I
Other input at 0 V
Outputs enabled
Outputs disabled
5
3
I
Driver disabled
CC
switching characteristics, V
= 5 V, T = 25°C
A
CC
PARAMETER
TEST CONDITIONS
MIN
11
TYP
22
22
3
MAX
33
UNIT
ns
t
t
t
Propagation delay time, high- to low-level output
Propagation delay time, low- to high-level output
PHL
PLH
sk(p)
11
33
ns
V
ID
= −1.5 V to 1.5 V,
See Figure 6
Pulse skew ( t
− t
)
6
ns
PHL PLH
t
t
t
t
t
Transition time
5
8
35
30
35
30
ns
ns
ns
ns
ns
t
Output enable time to high level
Output enable time to low level
Output disable time from high level
Output disable time from low level
PZH
PZL
PHZ
PLZ
See Figure 7
6
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SGLS251A − JULY 2004 − REVISED JUNE 2008
PARAMETER MEASUREMENT INFORMATION
Y
R
2
L
L
D
V
OD
0 V or 3 V
R
2
V
OC
DE at 3 V
Z
Figure 1. Differential and Common-Mode Output Voltages
V
test
−7 V < V
test
< 12 V
R1
375 Ω
Y
D
R
= 60 Ω
V
OD
L
0 V or 3 V
Z
DE at 3 V
R2
375 Ω
V
test
Figure 2. Driver V
Test Circuit
OD
3 V
Input
1.5 V
1.5 V
Y
0 V
C
= 50 pF
L
t
t
d(OD)
d(OD)
(see Note B)
≈ 2.5 V
90%
50%
10%
90%
Generator
(see Note A)
R
= 54 Ω
Output
L
50%
10%
Output
50 Ω
≈ − 2.5 V
Z
DE at 3 V
t
t
t(OD)
t(OD)
VOLTAGE WAVEFORMS
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR > 1 MHz, 50% duty cycle, t ≤ 6 ns, t ≤ 6 ns,
TEST CIRCUIT
r
f
Z
C
= 50 Ω.
O
L
B.
includes probe and jig capacitance.
Figure 3. Driver Test Circuit and Differential Output Delay and Transition Time Voltage Waveforms
7
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SGLS251A − JULY 2004 − REVISED JUNE 2008
PARAMETER MEASUREMENT INFORMATION
3 V
0 V
V
Y
S1
1.5 V
1.5 V
D
Input
Output
0 V or 3 V
Z
0.5 V
t
PZH
DE
R
= 110 Ω
C
= 50 pF
L
OH
L
Input
Generator
(see Note A)
(see Note B)
Output
50 Ω
2.3 V
V
off
≈ 0
t
PHZ
VOLTAGE WAVEFORMS
TEST CIRCUIT
Figure 4. Driver Test Circuit and Enable and Disable Time Waveforms
5 V
3 V
0 V
1.5 V
1.5 V
Input
Y
Z
R
= 110 Ω
L
S1
D
Output
0 V or 3 V
t
PZL
C
= 50 pF
L
DE
t
PLZ
(see Note B)
Input
Generator
(see Note A)
5 V
50 Ω
0.5 V
2.3 V
Output
V
OL
TEST CIRCUIT
VOLTAGE WAVEFORMS
Figure 5. Driver Test Circuit and Enable and Disable Time Voltage Waveforms
3 V
0 V
Input
t
1.5 V
1.5 V
Input
A
B
R
Generator
(see Note A)
t
Output
PLH
PHL
50 Ω
V
V
RE
1.5 V
OH
90%
1.3 V
10%
90%
C
= 15 pF
(see Note B)
L
1.3 V
10%
Output
0 V
OL
t
t
t
t
TEST CIRCUIT
VOLTAGE WAVEFORMS
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, t ≤ 6 ns, t ≤ 6 ns,
r
f
Z
C
= 50 Ω.
O
L
B.
includes probe and jig capacitance.
Figure 6. Receiver Test Circuit and Propagation Delay Time Voltage Waveforms
8
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SGLS251A − JULY 2004 − REVISED JUNE 2008
PARAMETER MEASUREMENT INFORMATION
Output
S1
1.5 V
A
S2
R
2 kΩ
− 1.5 V
5 V
B
IN916 or Equivalent
(4 places)
RE
C = 15 pF
L
(see Note B)
5 kΩ
Input
Generator
(see Note A)
50 Ω
S3
TEST CIRCUIT
3 V
0 V
S1 to − 1.5 V
S2 Closed
S3 Open
3 V
S1 to 1.5 V
S2 Open
S3 Closed
Input
Input
1.5 V
1.5 V
0 V
t
PZH
t
PZL
V
OH
≈ 4.5 V
Output
Output
1.5 V
0 V
1.5 V
V
OL
3 V
3 V
0 V
S1 to − 1.5 V
S2 Closed
S3 Closed
S1 to 1.5 V
S2 Closed
S3 Closed
Input
Input
1.5 V
1.5 V
0 V
t
PHZ
t
PLZ
V
OH
≈ 1.3 V
Output
Output
0.5 V
≈ 1.3 V
V
OL
0.5 V
VOLTAGE WAVEFORMS
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, t ≤ 6 ns, t ≤ 6 ns,
r
f
Z
C
= 50 Ω.
O
L
B.
includes probe and jig capacitance.
Figure 7. Receiver Output Enable and Disable Times
9
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SGLS251A − JULY 2004 − REVISED JUNE 2008
TYPICAL CHARACTERISTICS
DRIVER
DRIVER
HIGH-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
LOW-LEVEL OUTPUT CURRENT
5
4.5
4
5
4.5
4
V
T
= 5 V
= 25°C
V
T
= 5 V
= 25°C
CC
A
CC
A
3.5
3.5
3
3
2.5
2.5
2
2
1.5
1.5
1
1
0.5
0
0.5
0
0
10 20 30 40 50 60 70 80 90 100
0
20
40
60
80
100
120
I
− High-Level Output Current − mA
I
− Low-Level Output Current − mA
OH
OL
Figure 8
Figure 9
DRIVER
DRIVER
DIFFERENTIAL OUTPUT VOLTAGE
DIFFERENTIAL OUTPUT VOLTAGE
vs
vs
OUTPUT CURRENT
FREE-AIR TEMPERATURE
4
3
V
T
A
= 5 V
= 25°C
CC
V
= 5 V
CC
3.5
3
Load = 54 Ω
V
IH
= 2 V
2.5
2
1.5
1
2.5
2
1.5
1
0.5
0
0.5
0
0
10 20 30 40 50 60 70 80 90 100
− 50
− 25
0
25
50
75
100
125
I
O
− Output Current − mA
T
A
− Free-Air Temperature − °C
Figure 10
Figure 11
10
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ꢄ
SGLS251A − JULY 2004 − REVISED JUNE 2008
TYPICAL CHARACTERISTICS
DRIVER
DRIVER
OUTPUT CURRENT
vs
DIFFERENTIAL DELAY TIMES
vs
FREE-AIR TEMPERATURE
SUPPLY VOLTAGE
80
60
20
15
10
R = 54 Ω
L
V
= 5 V
CC
Load = 54 Ω
t
d(ODL)
I
OL
40
20
t
d(ODH)
0
−20
−40
−60
−80
5
0
I
OH
− 50
− 25
0
25
50
75
100
125
0
1
2
3
4
5
6
T
A
− Free-Air Temperature − °C
V
CC
− Supply Voltage − V
Figure 12
Figure 13
RECEIVER
RECEIVER
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
6
5
4
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
V
ID
= 200 mV
V
= 5 V
= 25°C
= − 200 mV
CC
T
A
V
ID
3
2
1
0
0
5
10
15
20
25
30
35
40
0
−10
− 20
− 30
− 40
− 50
I
− Low-Level Output Current − mA
OL
I
− High-Level Output Current − mA
OH
Figure 14
Figure 15
11
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SGLS251A − JULY 2004 − REVISED JUNE 2008
TYPICAL CHARACTERISTICS
RECEIVER
AVERAGE SUPPLY CURRENT
OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE
vs
FREQUENCY
60
55
50
45
40
35
30
25
6
5
T
V
= 25°C
A
= 5 V
CC
DRVR and RCVR Enabled
Driver Load = Receiver Inputs
Receiver Load = 50 pF
V
= 12 V
IC
4
3
2
V
IC
= 0 V
20
15
10
5
V
= −7 V
IC
1
0
0
10 k
− 80 − 60 − 40 − 20
0
20
40
60
80
100 k
1 M
10 M
100 M
f − Frequency − Hz
V
ID
− Differential Input Voltage − mV
Figure 16
Figure 17
RECEIVER
BUS INPUT CURRENT
vs
RECEIVER
PROPAGATION DELAY TIME
vs
INPUT VOLTAGE
FREE-AIR TEMPERATURE
(COMPLEMENTARY INPUT AT 0 V)
1
0.8
24.5
24
T
V
= 25°C
V
C
= 5 V
= 15 pF
= 1.5 V
A
CC
L
= 5 V
CC
V
IO
0.6
0.4
t
PHL
0.2
23.5
23
0
− 0.2
− 0.4
− 0.6
− 0.8
− 1
t
PLH
22.5
22
The shaded region of this graph represents
more than 1 unit load per RS-485.
− 40 − 20
0
20
40
60
80
100
− 8 − 6 − 4 − 2
0
2
4
6
8
10 12
T
A
− Free-Air Temperature − °C
V − Input Voltage − V
I
Figure 18
Figure 19
12
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SGLS251A − JULY 2004 − REVISED JUNE 2008
APPLICATION INFORMATION
SN65LBC180
SN65LBC180
R
R
T
T
Up to 32
Unit Loads
• • •
NOTE A: The line should be terminated at both ends in its characteristic impedance (R = Z ). Stub lengths off the main line should be kept
T
O
as short as possible. One SN65LBC180 typically represents less than one unit load.
Figure 20. Typical Application Circuit
13
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
27-Apr-2012
PACKAGING INFORMATION
Status (1)
Eco Plan (2)
MSL Peak Temp (3)
Samples
Orderable Device
Package Type Package
Drawing
Pins
Package Qty
Lead/
Ball Finish
(Requires Login)
SN65LBC180IDRG4Q1
SN65LBC180IDRQ1
ACTIVE
ACTIVE
SOIC
SOIC
D
D
14
14
2500
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN65LBC180-Q1 :
Catalog: SN65LBC180
•
NOTE: Qualified Version Definitions:
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
27-Apr-2012
Catalog - TI's standard catalog product
•
Addendum-Page 2
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