SN65LVDS051-Q1 [TI]

汽车类高速差动线路收发器;
SN65LVDS051-Q1
型号: SN65LVDS051-Q1
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

汽车类高速差动线路收发器

驱动 线路驱动器或接收器 驱动程序和接口
文件: 总27页 (文件大小:600K)
中文:  中文翻译
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SN65LVDS179-Q1, SN65LVDS180-Q1  
SN65LVDS050-Q1, SN65LVDS051-Q1  
www.ti.com  
SGLS204B SEPTEMBER 2003REVISED NOVEMBER 2011  
HIGH-SPEED DIFFERENTIAL LINE DRIVERS AND RECEIVERS  
Check for Samples: SN65LVDS179-Q1, SN65LVDS180-Q1, SN65LVDS050-Q1, SN65LVDS051-Q1  
1
FEATURES  
Qualified for Automotive Applications  
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
Meets or Exceeds the Requirements of ANSI  
TIA/EIA-644-1995 Standard  
Signaling Rates up to 400 Mbps  
Bus-Terminal ESD Exceeds 12 kV  
Operates From a Single 3.3-V Supply  
Low-Voltage Differential Signaling With Typical  
Output Voltages of 350 mV and a 100-Load  
Propagation Delay Times  
Driver: 1.7 ns Typ  
Receiver: 3.7 ns Typ  
Power Dissipation at 200 MHz  
Driver: 25 mW Typical  
Receiver: 60 mW Typical  
LVTTL Input Levels Are 5-V Tolerant  
Receiver Maintains High Input Impedance With  
VCC < 1.5 V  
Receiver Has Open-Circuit Fail Safe  
DESCRIPTION  
The SN65LVDS179, SN65LVDS180, SN65LVDS050,  
and SN65LVDS051 are differential line drivers and  
receivers that use low-voltage differential signaling  
(LVDS) to achieve signaling rates as high as 400  
Mbps. The TIA/EIA-644 standard compliant electrical  
interface provides a minimum differential output  
voltage magnitude of 247 mV into a 100-Ω load and  
receipt of 50-mV signals with up to 1 V of ground  
potential difference between  
receiver.  
a
transmitter and  
The intended application of this device and signaling  
technique is for point-to-point baseband data  
transmission over controlled impedance media of  
approximately 100-Ω characteristic impedance. The  
transmission media may be printed-circuit board  
traces, backplanes, or cables. (Note: The ultimate  
rate and distance of data transfer is dependent upon  
the attenuation characteristics of the media, the noise  
coupling to the environment, and other application  
specific characteristics).  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 20032011, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
SN65LVDS179-Q1, SN65LVDS180-Q1  
SN65LVDS050-Q1, SN65LVDS051-Q1  
SGLS204B SEPTEMBER 2003REVISED NOVEMBER 2011  
www.ti.com  
DESCRIPTION (CONTINUED)  
The devices offer various driver, receiver, and enabling combinations in industry standard footprints. Since these  
devices are intended for use in simplex or distributed simplex bus structures, the driver enable function does not  
put the differential outputs into a high-impedance state but rather disconnects the input and reduces the  
quiescent power used by the device. (For these functions with a high-impedance driver output, see the  
SN65LVDM series of devices.) All devices are characterized for operation from 40°C to 85°C.  
ORDERING INFORMATION(1)  
TA  
PACKAGE(2)  
ORDERABLE PART NUMBER  
SN65LVDS179DRQ1(3)  
SN65LVDS179PWRQ1(3)  
SN65LVDS180DRQ1  
TOP-SIDE MARKING  
VDS179Q  
SOIC (D)  
Tape and reel  
TSSOP (PW)  
SOIC (D)  
Tape and reel  
Tape and reel  
Tape and reel  
Tape and reel  
Tape and reel  
Tape and reel  
Tape and reel  
VDS179Q  
VDS180Q  
VDS180Q  
VDS050Q  
VDS050Q  
VDS051Q  
VDS051Q  
TSSOP (PW)  
SOIC (D)  
SN65LVDS180PWRQ1  
SN65LVDS050DRQ1(3)  
SN65LVDS050IPWRQ1  
SN65LVDS051DRQ1  
-40°C to 85°C  
TSSOP (PW)  
SOIC (D)  
TSSOP (PW)  
SN65LVDS051PWRQ1  
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI  
web site at www.ti.com.  
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.  
(3) Product Preview  
2
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Product Folder Link(s): SN65LVDS179-Q1 SN65LVDS180-Q1 SN65LVDS050-Q1 SN65LVDS051-Q1  
SN65LVDS179-Q1, SN65LVDS180-Q1  
SN65LVDS050-Q1, SN65LVDS051-Q1  
www.ti.com  
SGLS204B SEPTEMBER 2003REVISED NOVEMBER 2011  
FUNCTION TABLES  
SN65LVDS179 RECEIVER  
INPUTS  
OUTPUT(1)  
VID = VA - VB  
R
H
?
VID 50 mV  
-50 mV < VID < 50 mV  
VID -50 mV  
L
Open  
H
(1) H = high level, L = low level, ? = indeterminate  
SN65LVDS179 DRIVER(1)  
INPUT  
OUTPUTS  
D
L
Y
L
Z
H
L
H
H
L
Open  
H
(1) H = high level, L = low level  
SN65LVDS180, SN65LVDS050, and  
SN65LVDS051 RECEIVER(1)  
INPUTS  
OUTPUT  
VID = VA - VB  
ID50 mV  
-50 mV < VID < 50 mV  
RE  
L
R
H
?
V
L
V
ID-50 mV  
Open  
X
L
L
L
H
Z
H
(1) H = high level, L = low level, Z = high impedance, X = don't care,  
? = indeterminate  
SN65LVDS180, SN65LVDS050, and  
SN65LVDS051 DRIVER(1)  
INPUTS  
OUTPUTS  
D
L
DE  
H
Y
L
Z
H
H
H
H
L
Open  
X
H
L
H
L
OFF  
OFF  
(1) H = high level, L = low level, Z = high impedance, X = don't care,  
OFF = no output  
Copyright © 20032011, Texas Instruments Incorporated  
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Product Folder Link(s): SN65LVDS179-Q1 SN65LVDS180-Q1 SN65LVDS050-Q1 SN65LVDS051-Q1  
SN65LVDS179-Q1, SN65LVDS180-Q1  
SN65LVDS050-Q1, SN65LVDS051-Q1  
SGLS204B SEPTEMBER 2003REVISED NOVEMBER 2011  
www.ti.com  
EQUIVALENT INPUT AND OUTPUT SCHEMATIC DIAGRAMS  
4
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Product Folder Link(s): SN65LVDS179-Q1 SN65LVDS180-Q1 SN65LVDS050-Q1 SN65LVDS051-Q1  
SN65LVDS179-Q1, SN65LVDS180-Q1  
SN65LVDS050-Q1, SN65LVDS051-Q1  
www.ti.com  
SGLS204B SEPTEMBER 2003REVISED NOVEMBER 2011  
ABSOLUTE MAXIMUM RATINGS(1)  
over operating free-air temperature range (unless otherwise noted)  
UNIT  
VCC  
Supply voltage range(2)  
Voltage range  
0.5 V to 4 V  
0.5 V to 6 V  
0.5 V to 4 V  
D, R, DE, RE  
Y, Z, A, and B  
|VOD  
|
Differential output voltage  
Electrostatic discharge  
1 V  
(3)  
Y, Z, A, B , and GND (see  
All  
)
Class 3, A:12 kV, B:600 V  
Class 3, A:7 kV, B:500 V  
See Dissipation Rating Table  
65°C to 150°C  
Continuous power dissipation  
Storage temperature range  
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds  
250°C  
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings  
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating  
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
(2) All voltage values, except differential I/O bus voltages are with respect to network ground terminal.  
(3) Tested in accordance with MIL-STD-883C Method 3015.7.  
DISSIPATION RATING TABLE  
TA25°C  
POWER RATING  
DERATING FACTOR  
TA = 85°C  
POWER RATING  
PACKAGE  
ABOVE TA = 25°C(1)  
PW(14)  
PW(16)  
D(8)  
736 mW  
839 mW  
635 mW  
987 mW  
1110 mW  
5.9 mW/°C  
6.7 mW/°C  
5.1 mW/°C  
7.9 mW/°C  
8.9 mW/°C  
383 mW  
437 mW  
330 mW/°C  
513 mW/°C  
577 mW/°C  
D(14)  
D(16)  
(1) This is the inverse of the junction-to-ambient thermal resistance when board-mounted and with no airflow.  
RECOMMENDED OPERATING CONDITIONS  
MIN  
3
NOM  
3.3  
MAX UNIT  
VCC  
VIH  
VIL  
Supply voltage  
3.6  
V
V
High-level input voltage  
2
Low-level input voltage  
0.8  
0.6  
V
|VID  
|
Magnitude of differential input voltage  
Magnitude of differential output voltage with disabled driver  
Driver output voltage  
0.1  
0
V
|VOD(dis)|  
VOY or VOZ  
520  
2.4  
mV  
V
ŤVIDŤ  
2
ŤVIDŤ  
VIC  
Common-mode input voltage (see Figure 5)  
Operating free-air temperature  
V
2.4 *  
2
VCC- 0.8  
85  
TA  
40  
°C  
Copyright © 20032011, Texas Instruments Incorporated  
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Product Folder Link(s): SN65LVDS179-Q1 SN65LVDS180-Q1 SN65LVDS050-Q1 SN65LVDS051-Q1  
SN65LVDS179-Q1, SN65LVDS180-Q1  
SN65LVDS050-Q1, SN65LVDS051-Q1  
SGLS204B SEPTEMBER 2003REVISED NOVEMBER 2011  
www.ti.com  
DEVICE ELECTRICAL CHARACTERISTICS  
over recommended operating conditions (unless otherwise noted)  
PARAMETER  
SN65LVDS179 No receiver load, driver RL = 100 Ω  
Driver and receiver enabled, no receiver load, driver RL = 100 Ω  
TEST CONDITIONS  
MIN TYP(1)  
MAX UNIT  
9
9
12  
12  
7
mA  
Driver enabled, receiver disabled, RL = 100 Ω  
Driver disabled, receiver enabled, no load  
Disabled  
5
SN65LVDS180  
mA  
1.5  
0.5  
12  
10  
3
2
1
Supply  
current  
ICC  
Drivers and receivers enabled, no receiver loads, driver RL = 100 Ω  
Drivers enabled, receivers disabled, RL = 100 Ω  
Drivers disabled, receivers enabled, no loads  
Disabled  
20  
16  
6
SN65LVDS050  
SN65LVDS051  
mA  
mA  
0.5  
12  
3
1
Drivers enabled, No receiver loads, driver RL = 100 Ω  
Drivers disabled, no loads  
20  
6
(1) All typical values are at 25°C and with a 3.3-V supply.  
DRIVER ELECTRICAL CHARACTERISTICS  
over recommended operating conditions (unless otherwise noted)  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX UNIT  
|VOD  
|
Differential output voltage magnitude  
247  
340  
454  
RL = 100 , See  
Figure 3 and Figure 2  
mV  
50  
Change in differential output voltage magnitude between logic  
states  
Δ|VOD  
|
-50  
1.125  
50  
VOC(SS)  
ΔVOC(SS)  
VOC(PP)  
Steady-state common-mode output voltage  
1.2 1.375  
V
Change in steady-state common-mode output voltage between  
logic states  
See Figure 3  
50  
mV  
mV  
Peak-to-peak common-mode output voltage  
50  
0.5  
2
150  
20  
20  
DE  
IIH  
High-level input current  
D
VIH = 5 V  
μA  
μA  
DE  
0.5  
2
10  
10  
IIL  
Low-level input current  
D
VIL = 0.8 V  
VOY or VOZ = 0 V  
VOD = 0 V  
3
10  
IOS  
Short-circuit output current  
mA  
3
10  
DE = OV  
VOY = VOZ = OV  
IO(OFF)  
Off-state output current  
Input capacitance  
1  
1
μA  
DE = VCC  
VOY = VOZ = OV,  
VCC < 1.5 V  
CIN  
3
pF  
6
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Product Folder Link(s): SN65LVDS179-Q1 SN65LVDS180-Q1 SN65LVDS050-Q1 SN65LVDS051-Q1  
SN65LVDS179-Q1, SN65LVDS180-Q1  
SN65LVDS050-Q1, SN65LVDS051-Q1  
www.ti.com  
SGLS204B SEPTEMBER 2003REVISED NOVEMBER 2011  
RECEIVER ELECTRICAL CHARACTERISTICS  
over recommended operating conditions (unless otherwise noted)  
PARAMETER  
TEST CONDITIONS  
MIN TYP(1)  
MAX UNIT  
VIT+  
VIT-  
Positive-going differential input voltage threshold  
Negative-going differential input voltage threshold  
50  
See Figure 5 and  
mV  
50  
2.4  
2.8  
IOH = -8 mA  
IOH = -4 mA  
IOL = 8 mA  
VI = 0  
VOH  
VOL  
II  
High-level output voltage  
Low-level output voltage  
Input current (A or B inputs)  
V
0.4  
V
2  
11  
3  
20  
μA  
VI = 2.4 V  
VCC = 0  
1.2  
II(OFF)  
IIH  
Power-off input current (A or B inputs)  
High-level input current (enables)  
Low-level input current (enables)  
High-impedance output current  
Input capacitance  
±20  
±10  
±10  
±10  
μA  
μA  
μA  
μA  
pF  
VIH = 5 V  
IIL  
VIL = 0.8 V  
VO = 0 or 5 V  
IOZ  
CI  
5
(1) All typical values are at 25°C and with a 3.3-V supply.  
DRIVER SWITCHING CHARACTERISTICS  
over recommended operating conditions (unless otherwise noted)  
PARAMETER  
TEST CONDITIONS  
MIN TYP(1)  
MAX UNIT  
tPLH  
tPHL  
tr  
Propagation delay time, low-to-high-level output  
Propagation delay time, high-to-low-level output  
Differential output signal rise time  
Differential output signal fall time  
Pulse skew (|tpHL - tpLH|)(2)  
1.7  
1.7  
0.8  
0.8  
300  
150  
4.3  
3.1  
2.7  
2.7  
1
ns  
ns  
ns  
ns  
ps  
ps  
ns  
ns  
RL = 100 ,  
CL = 10 pF,  
See Figure 2  
tf  
1
tsk(p)  
tsk(o)  
ten  
Channel-to-channel output skew(3)  
Enable time  
10  
10  
See Figure 4  
tdis  
Disable time  
(1) All typical values are at 25°C and with a 3.3-V supply.  
(2) tsk(p) is the magnitude of the time difference between the high-to-low and low-to-high propagation delay times at an output.  
(3) tsk(o) is the magnitude of the time difference between the outputs of a single device with all of their inputs connected together.  
RECEIVER SWITCHING CHARACTERISTICS  
over recommended operating conditions (unless otherwise noted)  
PARAMETER  
TEST CONDITIONS  
MIN TYP(1)  
MAX UNIT  
tPLH  
tPHL  
tsk(p)  
tr  
Propagation delay time, low-to-high-level output  
Propagation delay time, high-to-low-level output  
Pulse skew (|tpHL - tpLH|)(2)  
3.7  
3.7  
0.3  
0.7  
0.9  
2.5  
2.5  
7
4.5  
4.5  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
CL = 10 pF,  
See Figure 6  
Output signal rise time  
1.5  
1.5  
tf  
Output signal fall time  
tPZH  
tPZL  
tPHZ  
tPLZ  
Propagation delay time, high-impedance-to-high-level output  
Propagation delay time, high-impedance-to-low-level output  
Propagation delay time, high-level-to-high-impedance output  
Propagation delay time, low-level-to-high-impedance output  
See Figure 7  
4
(1) All typical values are at 25°C and with a 3.3-V supply.  
(2) tsk(p) is the magnitude of the time difference between the high-to-low and low-to-high propagation delay times at an output.  
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Product Folder Link(s): SN65LVDS179-Q1 SN65LVDS180-Q1 SN65LVDS050-Q1 SN65LVDS051-Q1  
SN65LVDS179-Q1, SN65LVDS180-Q1  
SN65LVDS050-Q1, SN65LVDS051-Q1  
SGLS204B SEPTEMBER 2003REVISED NOVEMBER 2011  
www.ti.com  
PARAMETER MEASUREMENT INFORMATION  
DRIVER  
I
OY  
Driver Enable  
Y
Z
I
I
A
V
OD  
V
) V  
OY  
OZ  
I
OZ  
V
OY  
2
V
I
V
OC  
V
OZ  
Figure 1. Driver Voltage and Current Definitions  
Driver Enable  
Y
Z
100  
±1%  
V
OD  
Input  
C
L
= 10 pF  
(2 Places)  
2 V  
Input  
1.4 V  
0.8 V  
t
PHL  
t
PLH  
100%  
80%  
V
OD(H)  
Output  
0 V  
V
OD(L)  
20%  
0%  
t
f
t
r
A. All input pulses are supplied by a generator having the following characteristics: tr or tf 1 ns, pulse repetition rate  
(PRR) = 50 Mpps, pulse width = 10 ± 0.2 ns. CL includes instrumentation and fixture capacitance within 0,06 mm of  
the D.U.T.  
Figure 2. Test Circuit, Timing, and Voltage Definitions for the Differential Output Signal  
8
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Product Folder Link(s): SN65LVDS179-Q1 SN65LVDS180-Q1 SN65LVDS050-Q1 SN65LVDS051-Q1  
SN65LVDS179-Q1, SN65LVDS180-Q1  
SN65LVDS050-Q1, SN65LVDS051-Q1  
www.ti.com  
SGLS204B SEPTEMBER 2003REVISED NOVEMBER 2011  
PARAMETER MEASUREMENT INFORMATION (continued)  
A. All input pulses are supplied by a generator having the following characteristics: tr or tf 1 ns, pulse repetition rate  
(PRR) = 50 Mpps, pulse width = 10 ± 0.2 ns. CL includes instrumentation and fixture capacitance within 0,06 mm of  
the D.U.T. The measurement of VOC(PP) is made on test equipment with a 3-dB bandwidth of at least 300 MHz.  
Figure 3. Test Circuit and Definitions for the Driver Common-Mode Output Voltage  
A. All input pulses are supplied by a generator having the following characteristics: tr or tf 1 ns, pulse repetition rate  
(PRR) = 0.5 Mpps, pulse width = 500 ± 10 ns. CL includes instrumentation and fixture capacitance within 0,06 mm of  
the D.U.T.  
Figure 4. Enable and Disable Time Circuit and Definitions  
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Product Folder Link(s): SN65LVDS179-Q1 SN65LVDS180-Q1 SN65LVDS050-Q1 SN65LVDS051-Q1  
SN65LVDS179-Q1, SN65LVDS180-Q1  
SN65LVDS050-Q1, SN65LVDS051-Q1  
SGLS204B SEPTEMBER 2003REVISED NOVEMBER 2011  
www.ti.com  
PARAMETER MEASUREMENT INFORMATION (continued)  
RECEIVER  
A
V
) V  
R
IA  
IB  
V
ID  
2
V
IA  
B
V
O
V
IC  
V
IB  
Figure 5. Receiver Voltage Definitions  
Receiver Minimum and Maximum Input Threshold Test Voltages  
APPLIED VOLTAGES  
(V)  
RESULTING DIFFERENTIAL  
INPUT VOLTAGE (mV)  
RESULTING COMMON-  
MODE INPUT VOLTAGE (V)  
VIA  
1.25  
1.15  
2.4  
2.3  
0.1  
0
VIB  
1.15  
1.25  
2.3  
2.4  
0
VID  
100  
VIC  
1.2  
100  
100  
1.2  
2.35  
2.35  
0.05  
0.05  
1.2  
100  
100  
0.1  
0.9  
1.5  
1.8  
2.4  
0
100  
600  
1.5  
0.9  
2.4  
1.8  
0.6  
0
600  
600  
1.2  
2.1  
600  
600  
2.1  
0.3  
0.6  
600  
0.3  
10  
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Product Folder Link(s): SN65LVDS179-Q1 SN65LVDS180-Q1 SN65LVDS050-Q1 SN65LVDS051-Q1  
SN65LVDS179-Q1, SN65LVDS180-Q1  
SN65LVDS050-Q1, SN65LVDS051-Q1  
www.ti.com  
SGLS204B SEPTEMBER 2003REVISED NOVEMBER 2011  
A. All input pulses are supplied by a generator having the following characteristics: tr or tf 1 ns, pulse repetition rate  
(PRR) = 50 Mpps, pulse width = 10 ± 0.2 ns. CL includes instrumentation and fixture capacitance within 0,06 m of the  
D.U.T.  
Figure 6. Timing Test Circuit and Waveforms  
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Product Folder Link(s): SN65LVDS179-Q1 SN65LVDS180-Q1 SN65LVDS050-Q1 SN65LVDS051-Q1  
SN65LVDS179-Q1, SN65LVDS180-Q1  
SN65LVDS050-Q1, SN65LVDS051-Q1  
SGLS204B SEPTEMBER 2003REVISED NOVEMBER 2011  
www.ti.com  
Figure 7. Enable/Disable Time Test Circuit and Waveforms  
12  
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Product Folder Link(s): SN65LVDS179-Q1 SN65LVDS180-Q1 SN65LVDS050-Q1 SN65LVDS051-Q1  
SN65LVDS179-Q1, SN65LVDS180-Q1  
SN65LVDS050-Q1, SN65LVDS051-Q1  
www.ti.com  
SGLS204B SEPTEMBER 2003REVISED NOVEMBER 2011  
TYPICAL CHARACTERISTICS  
DISABLED DRIVER OUTPUT CURRENT  
vs  
OUTPUT VOLTAGE  
40  
30  
V
= 3.3 V  
= 25°C  
CC  
Other output at 0 V  
Other output at 1.2 V  
T
A
DE = 0 V  
20  
10  
V
OZ  
= V  
OY  
0
−10  
−20  
−30  
Other output at 2.4 V  
0
0.5  
1
1.5  
2
2.5  
3
V
− Output Voltage − V  
O
Figure 8.  
DRIVER  
DRIVER  
LOW-LEVEL OUTPUT VOLTAGE  
vs  
HIGH-LEVEL OUTPUT VOLTAGE  
vs  
LOW-LEVEL OUTPUT CURRENT  
HIGH-LEVEL OUTPUT CURRENT  
3.5  
3
4
V
T
A
= 3.3 V  
= 25°C  
CC  
V
T
A
= 3.3 V  
= 25°C  
CC  
3
2.5  
2
2
1
1.5  
1
0.5  
0
0
−1  
−4  
−3  
−2  
0
0
2
4
6
I
− High-Level Output Current − mA  
I
− Low-Level Output Current − mA  
OH  
OL  
Figure 9.  
Figure 10.  
Copyright © 20032011, Texas Instruments Incorporated  
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13  
Product Folder Link(s): SN65LVDS179-Q1 SN65LVDS180-Q1 SN65LVDS050-Q1 SN65LVDS051-Q1  
SN65LVDS179-Q1, SN65LVDS180-Q1  
SN65LVDS050-Q1, SN65LVDS051-Q1  
SGLS204B SEPTEMBER 2003REVISED NOVEMBER 2011  
www.ti.com  
TYPICAL CHARACTERISTICS (continued)  
RECEIVER  
LOW-LEVEL OUTPUT VOLTAGE  
vs  
RECEIVER  
HIGH-LEVEL OUTPUT VOLTAGE  
vs  
LOW-LEVEL OUTPUT CURRENT  
HIGH-LEVEL OUTPUT CURRENT  
5
4
3
2
1
0
4
V
T
A
= 3.3 V  
= 25°C  
CC  
V
T
A
= 3.3 V  
= 25°C  
CC  
3
2
1
0
0
10  
60  
−80  
−60  
− High-Level Output Current − mA  
0
20  
30  
40  
50  
−40  
−20  
I
− Low-Level Output Current − mA  
I
OH  
OL  
Figure 11.  
Figure 12.  
DRIVER  
DRIVER  
HIGH-TO-LOW LEVEL PROPAGATION DELAY TIME  
LOW-TO-HIGH LEVEL PROPAGATION DELAY TIME  
vs  
vs  
FREE-AIR TEMPERATURE  
FREE-AIR TEMPERATURE  
2.5  
2.5  
2
2
V
CC  
= 3.3 V  
V
CC  
= 3.3 V  
V
CC  
= 3 V  
V
CC  
= 3 V  
V
= 3.6 V  
30  
V
= 3.6 V  
30  
CC  
CC  
1.5  
−50  
1.5  
−50  
−30 −10  
10  
50  
90  
−30 −10  
10  
50  
90  
70  
70  
T
A
− Free-Air Temperature − °C  
T
A
− Free-Air Temperature − °C  
Figure 13.  
Figure 14.  
14  
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Copyright © 20032011, Texas Instruments Incorporated  
Product Folder Link(s): SN65LVDS179-Q1 SN65LVDS180-Q1 SN65LVDS050-Q1 SN65LVDS051-Q1  
 
SN65LVDS179-Q1, SN65LVDS180-Q1  
SN65LVDS050-Q1, SN65LVDS051-Q1  
www.ti.com  
SGLS204B SEPTEMBER 2003REVISED NOVEMBER 2011  
TYPICAL CHARACTERISTICS (continued)  
RECEIVER  
HIGH-TO-LOW LEVEL PROPAGATION DELAY TIME  
vs  
FREE-AIR TEMPERATURE  
4.5  
V
CC  
= 3.3 V  
4
V
CC  
= 3 V  
3.5  
V
CC  
= 3.6 V  
3
2.5  
−50  
−30 −10  
10  
50  
90  
30  
70  
T
A
− Free−Air Temperature − °C  
Figure 15.  
RECEIVER  
LOW-TO-HIGH LEVEL PROPAGATION DELAY TIME  
vs  
FREE-AIR TEMPERATURE  
4.5  
V
CC  
= 3 V  
4
V
CC  
= 3.3 V  
3.5  
V
CC  
= 3.6 V  
3
2.5  
−50  
−30 −10  
10  
50  
90  
30  
70  
T
A
− Free-Air Temperature − °C  
Figure 16.  
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15  
Product Folder Link(s): SN65LVDS179-Q1 SN65LVDS180-Q1 SN65LVDS050-Q1 SN65LVDS051-Q1  
SN65LVDS179-Q1, SN65LVDS180-Q1  
SN65LVDS050-Q1, SN65LVDS051-Q1  
SGLS204B SEPTEMBER 2003REVISED NOVEMBER 2011  
www.ti.com  
APPLICATION INFORMATION  
The devices are generally used as building blocks for high-speed point-to-point data transmission. Ground  
differences are less than 1 V with a low common-mode output and balanced interface for low noise emissions.  
Devices can interoperate with RS-422, PECL, and IEEE-P1596. Drivers/receivers maintain ECL speeds without  
the power and dual supply requirements.  
1000  
30% Jitter  
100  
5% Jitter  
10  
1
24 AWG UTP 96 (PVC Dielectric)  
0.1  
100k  
1M  
10M  
100M  
Data Rate – Hz  
Figure 17. Data Transmission Distance Versus Rate  
FAIL SAFE  
One of the most common problems with differential signaling applications is how the system responds when no  
differential voltage is present on the signal pair. The LVDS receiver is like most differential line receivers, in that  
its output logic state can be indeterminate when the differential input voltage is between -100 mV and 100 mV  
and within its recommended input common-mode voltage range. TI's LVDS receiver is different in how it handles  
the open-input circuit situation, however.  
Open-circuit means that there is little or no input current to the receiver from the data line itself. This could be  
when the driver is in a high-impedance state or the cable is disconnected. When this occurs, the LVDS receiver  
pulls each line of the signal pair to near VCC through 300-kresistors as shown in Figure 11. The fail-safe  
feature uses an AND gate with input voltage thresholds at about 2.3 V to VCC - 0.4 V to detect this condition and  
force the output to a high-level regardless of the differential input voltage.  
V
CC  
300 kΩ  
300 kΩ  
A
R
t
100 Typ  
Y
B
V
IT  
2.3 V  
Figure 18. Open-Circuit Fail Safe of the LVDS Receiver  
16  
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Product Folder Link(s): SN65LVDS179-Q1 SN65LVDS180-Q1 SN65LVDS050-Q1 SN65LVDS051-Q1  
SN65LVDS179-Q1, SN65LVDS180-Q1  
SN65LVDS050-Q1, SN65LVDS051-Q1  
www.ti.com  
SGLS204B SEPTEMBER 2003REVISED NOVEMBER 2011  
It is only under these conditions that the output of the receiver will be valid with less than a 100-mV differential  
input voltage magnitude. The presence of the termination resistor, Rt, does not affect the fail-safe function as  
long as it is connected as shown in the figure. Other termination circuits may allow a dc current to ground that  
could defeat the pullup currents from the receiver and the fail-safe feature.  
Copyright © 20032011, Texas Instruments Incorporated  
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17  
Product Folder Link(s): SN65LVDS179-Q1 SN65LVDS180-Q1 SN65LVDS050-Q1 SN65LVDS051-Q1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
17-Aug-2012  
PACKAGING INFORMATION  
Status (1)  
Eco Plan (2)  
MSL Peak Temp (3)  
Samples  
Orderable Device  
Package Type Package  
Drawing  
Pins  
Package Qty  
Lead/  
Ball Finish  
(Requires Login)  
SN65LVDS050IPWRQ1  
SN65LVDS051DRG4Q1  
ACTIVE  
ACTIVE  
TSSOP  
SOIC  
PW  
D
16  
16  
2000  
2500  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU Level-1-260C-UNLIM  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU Level-1-260C-UNLIM  
SN65LVDS051DRQ1  
ACTIVE  
ACTIVE  
SOIC  
D
16  
16  
TBD  
Call TI  
Call TI  
SN65LVDS051PWRG4Q1  
TSSOP  
PW  
2000  
2000  
2500  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
SN65LVDS051PWRQ1  
SN65LVDS180DRG4Q1  
ACTIVE  
ACTIVE  
TSSOP  
SOIC  
PW  
D
16  
14  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
SN65LVDS180DRQ1  
ACTIVE  
ACTIVE  
SOIC  
D
14  
14  
TBD  
Call TI  
Call TI  
SN65LVDS180PWRG4Q1  
TSSOP  
PW  
2000  
2000  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU Level-1-260C-UNLIM  
SN65LVDS180PWRQ1  
ACTIVE  
TSSOP  
PW  
14  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU Level-1-260C-UNLIM  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability  
information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that  
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between  
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight  
in homogeneous material)  
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
17-Aug-2012  
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In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
OTHER QUALIFIED VERSIONS OF SN65LVDS050-Q1, SN65LVDS051-Q1, SN65LVDS180-Q1 :  
Catalog: SN65LVDS050, SN65LVDS051, SN65LVDS180  
NOTE: Qualified Version Definitions:  
Catalog - TI's standard catalog product  
Addendum-Page 2  
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