SN65LVDS20DRFTG4 [TI]
4Gbps PECL 至 LVDS 转换器 | DRF | 8 | -40 to 85;
| 型号： | SN65LVDS20DRFTG4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 4Gbps PECL 至 LVDS 转换器 | DRF | 8 | -40 to 85 驱动 光电二极管 接口集成电路 锁存器 转换器 电平转换器 驱动程序和接口 |
| 文件： | 总15页 (文件大小：401K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN65LVDS20
SN65LVP20
www.ti.com
SLLS620A–JUNE 2004–REVISED SEPTEMBER 2005
LVPECL AND LVDS REPEATER/TRANSLATOR WITH ENABLE
FEATURES
•
•
2.5-V or 3.3-V Supply Operation
•
Low-Voltage PECL Input and Low-Voltage
PECL or LVDS Outputs
2-mm x 2-mm Small-Outline
No-Lead Package
•
Signaling Rates to 4 Gbps or Clock Rates
to 2 GHz
APPLICATIONS
•
•
PECL-to-LVDS Translation
Data or Clock Signal Amplification
– 120-ps Output Transition Times
– Less than 45 ps Total Jitter
– Less than 630 ps Propagation Delay Times
DESCRIPTION
The SN65LVDS20 and SN65LVP20 are a high-speed differential receiver and driver connected as a repeater.
The receiver accepts low-voltage positive-emitter-coupled logic (PECL) at signaling rates up to 4 Gbps and
repeats it as either an LVDS or PECL output signal. The signal path through the device is differential for low
radiated emissions and minimal added jitter.
The outputs of the SN65LVDS20 are LVDS levels as defined by TIA/EIA-644-A. The outputs of the
SN65LVDP20 are compatible with low-voltage PECL levels. A low-level input to EN enables the outputs. A
high-level input puts the output into a high-impedance state. Both outputs are designed to drive differential
transmission lines with nominally 100-Ω characteristic impedance.
Both devices provide a voltage reference (VBB) of typically 1.35 V below VCC for use in receiving single-ended
PECL input signals. When not used, VBB should be unconnected or open.
All devices are characterized for operation from -40°C to 85°C.
FUNCTION DIAGRAM
EN
7
A
B
Y
Z
6
4
V
CC
V
IN
OUT
BB
GND
9
Scale = 50 ps/div
Figure 1. SN65LVDS20 Output Eye Pattern With
4-Gbps PRBS Input
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2004–2005, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
SN65LVDS20
SN65LVP20
www.ti.com
SLLS620A–JUNE 2004–REVISED SEPTEMBER 2005
These devices have limited built-in ESD protection. The leads should be shorted together or the device
placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
AVAILABLE OPTIONS(1)
INPUT
OUTPUT
LVDS
PART NUMBER
SN65LVDS20
SN65LVP20
PART MARKING
Differential
Differential
E8
E7
LVPECL
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)
(1)
UNIT
(2)
VCC
VI
Supply voltage
-0.5 V to 4 V
-0.5 V to VCC + 0.5 V
-0.5 V to VCC + 0.5 V
±0.5 mA
Input voltage
VO
IO
Output voltage
VBB output current
HBM electrostatic discharge(3)
CDM electrostatic discharge(4)
Continuous power dissipation
±3 kV
±1500 V
See Power Dissipation Ratings Table
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values, except differential voltages, are with respect to network ground (see Figure 2).
(3) Tested in accordance with JEDEC Standard 22, Test Method A114-A-7
(4) Tested in accordance with JEDEC Standard 22, Test Method C101
DISSIPATION RATINGS
TA < 25°C
POWER RATING
OPERATING FACTOR
ABOVE TA = 25°C
TA = 85°C
POWER RATING
PACKAGE
DRF
403 mW
4.0 mW/°C
161 mW
RECOMMENDED OPERATING CONDITIONS
MIN
NOM
MAX
UNIT
V
VCC
VIC
Supply Voltage
2.375 2.5 or 3.3
3.6
Common-mode input voltage (VIA + VIB)/2
Differential input voltage magnitude, |VIA - VIB
High-level input voltage, EN
Low-level input voltage, EN
Output current to VBB
1.2
0.08
2
VCC - (VID/2)
V
|VID
VIH
VIL
IO
|
|
1
VCC
0.8
V
V
0
V
-400(1)
400
132
85
µA
Ω
RL
Differential load resistance
90
TA
Operating free-air temperature
-40
°C
(1) The algebraic convention, where the least positive (more negative) value is designated minimum, is used in this data sheet.
2
SN65LVDS20
SN65LVP20
www.ti.com
SLLS620A–JUNE 2004–REVISED SEPTEMBER 2005
ELECTRICAL CHARACTERISTICS
over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP(1)
MAX UNIT
RL = 100 Ω, EN at 0 V,
Other inputs open
35
45
ICC
Supply current
mA
24
Outputs unloaded,
EN at 0 V,
19
Other inputs open
Device power dissipation,
SN65LVDS20
RL = 100 Ω, EN at 0 V, 2-GHz
50%-duty-cycle square-wave input
116
160
50 Ω from Y and Z to
VCC - 2 V, EN at 0 V,
2-GHz 50%-duty-cycle
square-wave input
PD
mW
86
Device power dissipation,
SN65LVP20
63
VBB
Reference voltage
IBB = ±400 µA
VI = 2 V
VCC - 1.44
-20
VCC - 1.35
VCC - 1.25
V
IIH
High-level input current, EN
High-level input current, A or B
Low-level input current, EN
Low-level input current, A or B
20
20
20
20
IIAH or IIBH
IIL
VI = VCC
-20
µA
VI = 0.8 V
VI = GND
-20
IIAL or IIBL
-20
SN65LVDS20 OUTPUT CHARACTERISTICS (see Figure 2)
Differential output voltage magnitude,
|VOD
|
247
340
454
50
|VOY - VOZ
|
mV
V
Change in differential output voltage
magnitude between logic states
∆|VOD
|
See Figure 2
See Figure 3
Steady-state common-mode output
voltage (see Figure 3)
VOC(SS)
∆VOC(SS)
VOC(PP)
1.125
-50
1.375
Change in steady-state com-
mon-mode output voltage between
logic states
50
mV
Peak-to-peak common-mode output
voltage
50
100
IOYZ or IOZZ High-impedance output current
IOYS or IOZS Short-circuit output current
EN at VCC, VO = 0 V or VCC
EN at 0 V, VOY or VOZ = 0 V
-1
1
µA
-62
62
mA
Differential short-circuit output cur-
IOS(D)
EN at 0 V,
VOY = VOZ
-12
12
rent, |IOY - IOZ
|
SN65LVP20 OUTPUT CHARACTERISTICS (see Figure 2)
VOYH or
VOZH
High-level output voltage
VCC - 1.05
VCC - 1.83
VCC - 1.88
VCC - 0.82
VCC - 1.57
VCC - 1.57
3.3 V; 50 Ω from Y and Z
to VCC - 2 V
VOYL or
VOZL
Low-level output voltage
V
VOYL or
VOZL
2.5 V; 50 Ω from Y and Z
to VCC - 2 V
Low-level output voltage
Differential output voltage magnitude,
|VOD
|
0.6
-1
0.8
1
1
|VOH - VOL
|
IOYZ or IOZZ High-impedance output current
EN at VCC, VO = 0 V or VCC
µA
(1) Typical values are at room temperature and with a VCC of 3.3 V.
3
SN65LVDS20
SN65LVP20
www.ti.com
SLLS620A–JUNE 2004–REVISED SEPTEMBER 2005
SWITCHING CHARACTERISTICS
over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN TYP(1)
MAX UNIT
Differential propagation delay time,
low-to-high-level output
tPLH
300
300
450
450
630
Differential propagation delay time,
high-level-to-low-level output
See Figure 2 and Figure 4
ps
tPHL
630
tSK(P)
Pulse skew, |tPLH - tPHL
|
20
VCC = 3.3 V
80
ps
(2)
tSK(PP)
Part-to-part skew
VCC = 2.5 V
130
LVDS, See Figure 2 and Figure 4
LVPECL, See Figure 2 and Figure 4
LVDS, See Figure 2 and Figure 4
LVPECL, See Figure 2 and Figure 4
85
92
85
92
2
115
ps
tr
tf
20%-to-80% differential signal rise time
120
115
ps
20%-to-80% differential signal fall time
RMS period jitter(3)
120
tjit(per)
tjit(cc)
3
ps
16
2-GHz 50%-duty-cycle square-wave input,
See Figure 5
(4)
Peak cycle-to-cycle jitter
13
LVDS; 4 Gbps PRBS, 223- 1 run length,
See Figure 5
tjit(p-p)
tjit(ph)
Peak-to-peak jitter
Intrinsic phase jitter
37
45
ps
ps
155.52 MHz
622.08 MHz
0.62
0.14
Propagation delay time,
high-level-to-high-impedance output
tPHZ
tPLZ
tPZH
tPZL
30
30
30
30
Propagation delay time,
low-level-to-high-impedance output
See Figure 2 and Figure 6
ns
Propagation delay time,
high-impedance-to-high-level output
Propagation delay time,
high-impedance-to-low-level output
(1) Typical values are at room temperature and with a VCC of 3.3 V.
(2) Part-to-part skew is the magnitude of the difference in propagation delay times between any specified terminals of two devices when
both devices operate with the same supply voltages, at the same temperature, and have identical packages and test circuits.
(3) Period jitter is the deviation in cycle time of a signal with respect to the ideal period over a random sample of 100,000 cycles.
(4) Cycle-to-cycle jitter is the variation in cycle time of a signal between adjacent cycles, over a random sample of 1,000 adjacent cycle
pairs.
PARAMETER MEASUREMENT INFORMATION
V
CC
I
CC
I
I
8
BB
1
2
3
5
4
6
7
NC VCC
V
50
50
BB
Z
I
IA
OZ
A
D.U.T.
I
IB
B
Y
S1
I
EN
GND
9
OY
I
+
+
+
+
I
V
V
V
V
− 2 V
CC
C
V
V
V
V
IA
IB
I
L
OY
−
OZ
−
BB
−
OC
−
(1) CL is the instrumentation and test fixture capacitance.
(2) S1 is open for the SN65LVDS20 and closed for the SN65LVP20.
Figure 2. Output Voltage Test Circuit and Voltage and Current Definitions
4
SN65LVDS20
SN65LVP20
www.ti.com
SLLS620A–JUNE 2004–REVISED SEPTEMBER 2005
PARAMETER MEASUREMENT INFORMATION (continued)
INPUT
V
dV
OC(SS) OC(PP)
V
OC
Figure 3. VOC Definitions
V
CC
1.2 V
1.125 V
1.5 V
V
V
IA
IB
t
t
PHL
PLH
V
− V
OZ
OY
100%
80%
50%
t
f
t
r
20%
Figure 4. Propagation Delay and Transition Time Test Waveforms
50 W Cable, X + Y cm, SMA Coax
Connectors, 4 Places
TDS Oscilloscope with
TJIT3 Analysis Pack
Device Under Test
HP3104 Pattern
Generator
Note A
50 W
50 W
DC
Figure 5. Jitter Measurement Setup
5
SN65LVDS20
SN65LVP20
www.ti.com
SLLS620A–JUNE 2004–REVISED SEPTEMBER 2005
PARAMETER MEASUREMENT INFORMATION (continued)
V
CC
1.2 V
V
IA
1.5 V
V
IB
V to EN
I
2 V
1.4 V
t
t
0.8 V
PZH
PZL
t
t
0 V
PHZ
PLZ
V
− V
OZ
100%
80%
OY
50%
20%
Figure 6. Enable and Disable Time Test Waveforms
DEVICE INFORMATION
FUNCTION TABLE(1)
A
H
L
B
H
H
L
EN
Y
?
L
H
?
Z
?
?
Z
?
H
L
?
Z
?
?
L
L
H
L
L
L
L
X
X
H
Open Open
L
X
X
Open
(1) H = high, L = low, Z = high
impedance, ? = indeterminate
6
SN65LVDS20
SN65LVP20
www.ti.com
SLLS620A–JUNE 2004–REVISED SEPTEMBER 2005
TOP VIEW
1
8
4
5
9
BOTTOM VIEW
Package Pin Assignments - Numerical Listing
PIN
1
SIGNAL
PIN
6
SIGNAL
Z
NC
A
2
7
Y
3
B
8
VCC
GND
4
VBB
EN
9
5
Package Pin Assignments - Alphabetical Listing
SIGNAL
A
PIN
2
SIGNAL
PIN
4
VBB
VCC
Y
B
3
8
EN
5
7
GND
NC
9
Z
6
1
7
SN65LVDS20
SN65LVP20
www.ti.com
SLLS620A–JUNE 2004–REVISED SEPTEMBER 2005
TYPICAL CHARACTERISTICS
SUPPLY CURRENT
vs
SUPPLY CURRENT
vs
FREE-AIR TEMPERATURE
FREQUENCY
60
50
40
30
20
10
60
50
LVP20 = Loaded
LVDS20
LVP20 = Loaded
40
LVDS20
30
20
10
−40 −20
0
20
40
60
80 100
0
400
800
1200
1600
2000
T
A
− Free−Air Temperature − C
f − Frequency − MHz
Figure 7.
Figure 8.
DIFFERENTIAL OUTPUT VOLTAGE
LVDS20 RISE/FALL TIME
vs
FREE-AIR TEMPERATURE
vs
FREQUENCY
105
97
89
81
73
65
900
800
700
LVP20
600
500
400
t
r
LVDS20
t
f
300
200
100
0
0
500 1000 1500 2000 2500 3000 3500 4000
−40 −20
0
20
40
60
80 100
f − Frequency − MHz
T
A
− Free−Air Temperature − C
Figure 9.
Figure 10.
LVP20 RISE/FALL TIME
vs
FREE-AIR TEMPERATURE
LVDS20 PROPAGATION DELAY TIME
vs
FREE-AIR TEMPERATURE
105
97
89
81
73
65
500
476
452
428
404
380
t
f
t
PHL
t
r
t
PLH
−40 −20
0
20
40
60
80 100
−40 −20
0
20
40
60
80 100
T
A
− Free−Air Temperature − C
T
A
− Free−Air Temperature − C
Figure 11.
Figure 12.
8
SN65LVDS20
SN65LVP20
www.ti.com
SLLS620A–JUNE 2004–REVISED SEPTEMBER 2005
TYPICAL CHARACTERISTICS (continued)
LVP20 PROPAGATION DELAY TIME
PERIOD JITTER
vs
FREQUENCY
vs
FREE-AIR TEMPERATURE
500
476
5
4
3
2
1
0
t
PHL
452
428
404
380
t
PLH
LVDS20
LVP20
0
400
800
1200
1600
2000
−40 −20
0
20
40
60
80 100
f − Frequency − MHz
T
A
− Free−Air Temperature − C
Figure 13.
Figure 14.
PEAK-TO-PEAK JITTER
PEAK-TO-PEAK JITTER
vs
vs
FREQUENCY
DATA RATE
25
20
15
10
5
50
40
30
20
10
0
LVDS20
LVP20
LVP20
LVDS20
0
0
800
1600
2400
3200
4000
0
400
800
1200
1600 2000
f − Frequency − MHz
Data Rate − Mbps
Figure 15.
Figure 16.
Scale = 50 ps/div
Scale = 50 ps/div
Figure 17. LVDS20 4-Gbps, 223 - 1 PRBS
Figure 18. LVP20 4-Gbps, 223 - 1 PRBS
9
SN65LVDS20
SN65LVP20
www.ti.com
SLLS620A–JUNE 2004–REVISED SEPTEMBER 2005
TYPICAL CHARACTERISTICS (continued)
PHASE NOISE OF SN65LVP20
PHASE NOISE OF SN65LVP20
−40
−50
−40
−50
−60
−70
−80
Blue = Device
Green = Source
Blue = Device
Green = Source
−60
−70
−80
−90
−100
−110
−120
−130
−140
−150
−160
−90
−100
−110
−120
−130
−140
−150
−160
10 M
10 M
100 k
1 M
100 M
100 k
1 M
100 M
1k
10 k
1k
10 k
100
100
Figure 19. Frequency Offset From 155.52 MHz Carrier
Figure 20. Frequency Offset From 622.08 MHz Carrier
10
SN65LVDS20
SN65LVP20
www.ti.com
SLLS620A–JUNE 2004–REVISED SEPTEMBER 2005
EQUIVALENT INPUT AND OUTPUT SCHEMATIC DIAGRAMS
OUTPUT LVP20
OUTPUT LVDS20
V
CC
V
CC
V
CC
V
CC
V
CC
R
R
Y
V
CC
Y
Z
7 V
Z
7 V
7 V
7 V
V
CC
ENABLE
400 Ω
300 kΩ
7 V
INPUT
V
CC
OUTPUT
V
BB
V
CC
V
CC
V
CC
A
B
V
BB
V
BB
11
PACKAGE OPTION ADDENDUM
www.ti.com
18-Jul-2006
PACKAGING INFORMATION
Orderable Device
SN65LVDS20DRFR
SN65LVDS20DRFRG4
SN65LVDS20DRFT
SN65LVDS20DRFTG4
SN65LVP20DRFR
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SON
DRF
8
8
8
8
8
8
8
8
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SON
SON
SON
SON
SON
SON
SON
DRF
DRF
DRF
DRF
DRF
DRF
DRF
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN65LVP20DRFRG4
SN65LVP20DRFT
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN65LVP20DRFTG4
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,
enhancements, improvements, and other changes to its products and services at any time and to discontinue
any product or service without notice. Customers should obtain the latest relevant information before placing
orders and should verify that such information is current and complete. All products are sold subject to TI’s terms
and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI
deems necessary to support this warranty. Except where mandated by government requirements, testing of all
parameters of each product is not necessarily performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible for
their products and applications using TI components. To minimize the risks associated with customer products
and applications, customers should provide adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right,
copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process
in which TI products or services are used. Information published by TI regarding third-party products or services
does not constitute a license from TI to use such products or services or a warranty or endorsement thereof.
Use of such information may require a license from a third party under the patents or other intellectual property
of the third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of information in TI data books or data sheets is permissible only if reproduction is without
alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction
of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for
such altered documentation.
Resale of TI products or services with statements different from or beyond the parameters stated by TI for that
product or service voids all express and any implied warranties for the associated TI product or service and
is an unfair and deceptive business practice. TI is not responsible or liable for any such statements.
Following are URLs where you can obtain information on other Texas Instruments products and application
solutions:
Products
Applications
Audio
Amplifiers
amplifier.ti.com
www.ti.com/audio
Data Converters
dataconverter.ti.com
Automotive
www.ti.com/automotive
DSP
dsp.ti.com
Broadband
Digital Control
Military
www.ti.com/broadband
www.ti.com/digitalcontrol
www.ti.com/military
Interface
Logic
interface.ti.com
logic.ti.com
Power Mgmt
Microcontrollers
power.ti.com
Optical Networking
Security
www.ti.com/opticalnetwork
www.ti.com/security
www.ti.com/telephony
www.ti.com/video
microcontroller.ti.com
Low Power Wireless www.ti.com/lpw
Telephony
Video & Imaging
Wireless
www.ti.com/wireless
Mailing Address:
Texas Instruments
Post Office Box 655303 Dallas, Texas 75265
Copyright 2006, Texas Instruments Incorporated
相关型号：
©2020 ICPDF网 联系我们和版权申明