SN74ABT573APWE4 [TI]

OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUT; 八路透明D类锁存器具有三态输出
SN74ABT573APWE4
型号: SN74ABT573APWE4
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUT
八路透明D类锁存器具有三态输出

锁存器 输出元件
文件: 总24页 (文件大小:1148K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
ꢀꢁꢂ ꢃ ꢄꢅ ꢆꢂ ꢇ ꢈ ꢉ ꢀꢁꢇ ꢃ ꢄ ꢅꢆ ꢂꢇ ꢈꢄ  
ꢊ ꢋꢆꢄꢌ ꢆ ꢍꢄꢁꢀ ꢎꢄꢍꢏ ꢁꢆ ꢐꢑꢆ ꢒꢎ ꢏ ꢌꢄꢆꢋ ꢓ ꢏꢀ  
ꢔ ꢕꢆ ꢓ ꢈ ꢑꢀꢆꢄꢆ ꢏ ꢊ ꢖꢆ ꢎ ꢖꢆꢀ  
SCBS190F − JANUARY 1991 − REVISED SEPTEMBER 2003  
D
Typical V  
(Output Ground Bounce)  
D
Latch-Up Performance Exceeds 500 mA Per  
JEDEC Standard JESD 17  
OLP  
<1 V at V  
= 5 V, T = 25°C  
CC  
A
D
High-Drive Outputs (−32-mA I , 64-mA I  
)
D
ESD Protection Exceeds JESD 22  
− 2000-V Human-Body Model (A114-A)  
− 200-V Machine Model (A115-A)  
OH  
OL  
D
I
Supports Partial-Power-Down Mode  
off  
Operation  
SN54ABT573 . . . J OR W PACKAGE  
SN74ABT573A . . . DB, DW, N, NS,  
OR PW PACKAGE  
SN74ABT573A . . . RGY PACKAGE  
(TOP VIEW)  
SN54ABT573 . . . FK PACKAGE  
(TOP VIEW)  
(TOP VIEW)  
1
20  
OE  
1D  
2D  
3D  
4D  
5D  
6D  
7D  
8D  
V
CC  
1Q  
1
2
3
4
5
6
7
8
9
10  
20  
19  
3
2
1
20 19  
18  
19  
18  
17  
16  
15  
14  
13  
12  
2
3
4
5
6
7
8
9
1D  
2D  
3D  
4D  
5D  
6D  
7D  
8D  
1Q  
2Q  
3Q  
4Q  
5Q  
6Q  
7Q  
8Q  
2Q  
3Q  
4Q  
5Q  
6Q  
3D  
4D  
5D  
6D  
7D  
4
5
6
7
8
18 2Q  
17  
16  
15  
14  
17  
16  
15  
14  
13  
12  
11  
3Q  
4Q  
5Q  
6Q  
7Q  
8Q  
LE  
9 10 11 12 13  
10  
11  
GND  
description/ordering information  
These 8-bit latches feature 3-state outputs designed specifically for driving highly capacitive or relatively  
low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional  
bus drivers, and working registers.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
PDIP − N  
Tube  
SN74ABT573AN  
SN74ABT573AN  
AB573A  
QFN − RGY  
Tape and reel SN74ABT573ARGYR  
Tube SN74ABT573ADW  
SOIC − DW  
ABT573A  
Tape and reel SN74ABT573ADWR  
Tape and reel SN74ABT573ANSR  
Tape and reel SN74ABT573ADBR  
SOP − NS  
ABT573A  
AB573A  
−40°C to 85°C  
SSOP − DB  
Tube  
SN74ABT573APW  
TSSOP − PW  
AB573A  
AB573A  
Tape and reel SN74ABT573APWR  
SN74ABT573AGQNR  
VFBGA − GQN  
VFBGA − ZQN (Pb-free)  
CDIP − J  
Tape and reel  
SN74ABT573AZQNR  
Tube  
Tube  
Tube  
SNJ54ABT573J  
SNJ54ABT573W  
SNJ54ABT573FK  
SNJ54ABT573J  
SNJ54ABT573W  
SNJ54ABT573FK  
CFP − W  
−55°C to 125°C  
LCCC − FK  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines  
are available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2003, Texas Instruments Incorporated  
ꢊ ꢘ ꢣ ꢛ ꢚꢦ ꢡꢠ ꢞꢟ ꢠꢚ ꢜꢣ ꢥꢗ ꢝꢘ ꢞ ꢞꢚ ꢭꢕ ꢌꢑ ꢎꢍ ꢮ ꢑꢈꢯꢂ ꢈꢂꢉ ꢝꢥꢥ ꢣꢝ ꢛ ꢝ ꢜꢢ ꢞꢢꢛ ꢟ ꢝ ꢛ ꢢ ꢞꢢ ꢟꢞꢢ ꢦ  
ꢡ ꢘꢥ ꢢꢟꢟ ꢚ ꢞꢨꢢ ꢛ ꢪꢗ ꢟꢢ ꢘ ꢚꢞꢢ ꢦꢧ ꢊ ꢘ ꢝꢥ ꢥ ꢚ ꢞꢨꢢ ꢛ ꢣꢛ ꢚ ꢦꢡꢠ ꢞꢟ ꢉ ꢣꢛ ꢚ ꢦꢡꢠ ꢞꢗꢚ ꢘ  
ꢣ ꢛ ꢚꢠꢢ ꢟꢟꢗ ꢘꢬ ꢦ ꢚꢢꢟ ꢘ ꢚꢞ ꢘ ꢢꢠꢢꢟ ꢟꢝꢛ ꢗ ꢥꢫ ꢗ ꢘꢠꢥ ꢡ ꢦꢢ ꢞꢢꢟ ꢞꢗꢘ ꢬ ꢚꢙ ꢝ ꢥꢥ ꢣꢝ ꢛ ꢝ ꢜꢢ ꢞꢢꢛ ꢟ ꢧ  
ꢎꢛ ꢚ ꢦꢡꢠ ꢞ ꢟ ꢠ ꢚꢘ ꢙꢚ ꢛ ꢜ ꢞ ꢚ ꢟ ꢣꢢ ꢠ ꢗꢙ ꢗꢠꢝ ꢞꢗ ꢚꢘꢟ ꢣꢢ ꢛ ꢞꢨ ꢢ ꢞꢢ ꢛ ꢜꢟ ꢚꢙ ꢆꢢꢩ ꢝꢟ ꢕꢘꢟ ꢞꢛ ꢡꢜ ꢢꢘꢞ ꢟ  
ꢟ ꢞ ꢝ ꢘꢦ ꢝ ꢛꢦ ꢪ ꢝ ꢛꢛ ꢝ ꢘ ꢞꢫꢧ ꢎꢛ ꢚ ꢦꢡꢠ ꢞꢗꢚꢘ ꢣꢛ ꢚꢠ ꢢꢟ ꢟꢗ ꢘꢬ ꢦꢚꢢ ꢟ ꢘꢚꢞ ꢘꢢ ꢠꢢ ꢟꢟ ꢝꢛ ꢗꢥ ꢫ ꢗꢘꢠ ꢥꢡꢦ ꢢ  
ꢞ ꢢ ꢟ ꢞꢗ ꢘꢬ ꢚꢙ ꢝ ꢥꢥ ꢣꢝ ꢛ ꢝ ꢜ ꢢ ꢞ ꢢ ꢛ ꢟ ꢧ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀ ꢁꢂ ꢃꢄ ꢅ ꢆ ꢂꢇ ꢈꢉ ꢀꢁꢇ ꢃ ꢄꢅ ꢆꢂ ꢇ ꢈ ꢄ  
ꢊꢋ ꢆꢄ ꢌ ꢆ ꢍ ꢄꢁ ꢀꢎꢄꢍ ꢏꢁ ꢆ ꢐꢑꢆ ꢒꢎ ꢏ ꢌꢄꢆꢋ ꢓ ꢏꢀ  
ꢔꢕ ꢆ ꢓ ꢈ ꢑꢀꢆꢄꢆ ꢏ ꢊꢖꢆ ꢎꢖ ꢆꢀ  
SCBS190F − JANUARY 1991 − REVISED SEPTEMBER 2003  
description/ordering information (continued)  
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high  
or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive  
the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus  
lines without need for interface or pullup components.  
OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered  
while the outputs are in the high-impedance state.  
To ensure the high-impedance state during power up or power down, OE should be tied to V  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
through a pullup  
CC  
This device is fully specified for partial-power-down applications using I . The I circuitry disables the outputs,  
off  
off  
preventing damaging current backflow through the device when it is powered down.  
SN74ABT573A . . . GQN OR ZQN PACKAGE  
(TOP VIEW)  
terminal assignments  
1
2
3
4
1
1D  
2
3
4
A
B
C
D
E
A
B
C
D
E
OE  
3Q  
4D  
7Q  
8D  
V
1Q  
2Q  
4Q  
6Q  
8Q  
CC  
3D  
2D  
5Q  
6D  
LE  
5D  
7D  
GND  
FUNCTION TABLE  
(each latch)  
INPUTS  
OUTPUT  
Q
OE  
L
LE  
H
H
L
D
H
L
H
L
L
L
X
X
Q
0
H
X
Z
logic diagram (positive logic)  
1
OE  
11  
LE  
C1  
1D  
19  
1Q  
2
1D  
To Seven Other Channels  
Pin numbers shown are for the DB, DW, FK, J, N, NS, PW, RGY, and W packages.  
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀꢁꢂ ꢃ ꢄꢅ ꢆꢂ ꢇ ꢈ ꢉ ꢀꢁ ꢇꢃ ꢄꢅ ꢆꢂ ꢇꢈ ꢄ  
ꢊ ꢋꢆꢄꢌ ꢆ ꢍꢄꢁꢀ ꢎꢄꢍꢏ ꢁꢆ ꢐꢑꢆ ꢒꢎ ꢏ ꢌꢄꢆꢋ ꢓ ꢏꢀ  
ꢔ ꢕꢆ ꢓ ꢈ ꢑꢀꢆꢄꢆ ꢏ ꢊ ꢖꢆ ꢎꢖ ꢆꢀ  
SCBS190F − JANUARY 1991 − REVISED SEPTEMBER 2003  
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)  
Supply voltage range, V  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V  
CC  
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V  
I
Voltage range applied to any output in the high or power-off state, V  
. . . . . . . . . . . . . . . . . . . −0.5 V to 5.5 V  
O
Current into any output in the low state, I : SN54ABT573 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 mA  
O
SN74ABT573A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA  
Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −18 mA  
IK  
OK  
I
Output clamp current, I  
(V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA  
O
Package thermal impedance, θ (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W  
JA  
(see Note 2): DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W  
(see Note 2): GQN/ZQN package . . . . . . . . . . . . . . . . . . . . . . . . . . . 78°C/W  
(see Note 2): N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69°C/W  
(see Note 2): NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60°C/W  
(see Note 2): PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83°C/W  
(see Note 3): RGY package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37°C/W  
Storage temperature range, T  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C  
stg  
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.  
2. The package thermal impedance is calculated in accordance with JESD 51-7.  
3. The package thermal impedance is calculated in accordance with JESD 51-5.  
recommended operating conditions (see Note 4)  
SN54ABT573 SN74ABT573A  
UNIT  
MIN  
4.5  
2
MAX  
MIN  
4.5  
2
MAX  
V
V
V
V
Supply voltage  
5.5  
5.5  
V
V
CC  
High-level input voltage  
Low-level input voltage  
Input voltage  
IH  
0.8  
0.8  
V
IL  
0
V
0
V
CC  
V
I
CC  
I
I
High-level output current  
Low-level output current  
Input transition rise or fall rate  
Operating free-air temperature  
−24  
48  
−32  
64  
5
mA  
mA  
ns/V  
°C  
OH  
OL  
t/v  
Outputs enabled  
5
T
−55  
125  
−40  
85  
A
NOTE 4: All unused inputs of the device must be held at V  
or GND to ensure proper device operation. Refer to the TI application report,  
CC  
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.  
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀ ꢁꢂ ꢃꢄ ꢅ ꢆ ꢂꢇ ꢈꢉ ꢀꢁꢇ ꢃ ꢄꢅ ꢆꢂ ꢇ ꢈ ꢄ  
ꢊꢋ ꢆꢄ ꢌ ꢆ ꢍ ꢄꢁ ꢀꢎꢄꢍ ꢏꢁ ꢆ ꢐꢑꢆ ꢒꢎ ꢏ ꢌꢄꢆꢋ ꢓ ꢏꢀ  
ꢔꢕ ꢆ ꢓ ꢈ ꢑꢀꢆꢄꢆ ꢏ ꢊꢖꢆ ꢎꢖ ꢆꢀ  
SCBS190F − JANUARY 1991 − REVISED SEPTEMBER 2003  
electrical characteristics over recommended operating free-air temperature range (unless  
otherwise noted)  
T
= 25°C  
SN54ABT573 SN74ABT573A  
A
PARAMETER  
TEST CONDITIONS  
I = −18 mA  
UNIT  
MIN TYP  
MAX  
MIN  
MAX  
MIN  
MAX  
V
IK  
V
V
V
= 4.5 V,  
= 4.5 V,  
= 5 V,  
−1.2  
−1.2  
−1.2  
V
CC  
CC  
CC  
I
I
I
I
I
I
I
= −3 mA  
= −3 mA  
= −24 mA  
= −32 mA  
= 48 mA  
= 64 mA  
2.5  
3
2.5  
3
2.5  
3
OH  
OH  
OH  
OH  
OL  
OL  
V
OH  
V
2
2
V
= 4.5 V  
= 4.5 V  
CC  
CC  
2*  
2
0.55  
0.55  
1
V
V
V
V
OL  
0.55*  
0.55  
1
100  
mV  
µA  
µA  
µA  
µA  
µA  
mA  
µA  
mA  
µA  
hys  
I
I
I
I
I
I
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
= 5.5 V,  
= 5.5 V,  
= 5.5 V,  
= 0,  
V = V  
I CC  
or GND  
1
I
10  
10  
10  
V
O
V
O
= 2.7 V  
= 0.5 V  
OZH  
OZL  
off  
−10  
−10  
−10  
V or V 4.5 V  
100  
50  
100  
50  
I
O
= 5.5 V,  
= 5.5 V,  
V
= 5.5 V  
Outputs high  
50  
CEX  
O
O
§
V
= 2.5 V  
−50 −100 −180  
−50 −180  
−50  
−180  
250  
30  
O
Outputs high  
Outputs low  
1
24  
250  
30  
250  
30  
V
= 5.5 V, I = 0,  
O
CC  
I
CC  
V = V  
I
or GND  
CC  
Outputs disabled  
0.5  
250  
250  
250  
V
= 5.5 V, One input at 3.4 V,  
CC  
Other inputs at V  
1.5  
1.5  
1.5  
mA  
I  
CC  
or GND  
CC  
V = 2.5 V or 0.5 V  
C
C
3.5  
6.5  
pF  
pF  
i
I
V
O
= 2.5 V or 0.5 V  
o
* On products compliant to MIL-PRF-38535, this parameter does not apply.  
§
All typical values are at V  
= 5 V.  
CC  
This data sheet limit may vary among suppliers.  
Not more than one output should be tested at a time, and the duration of the test should not exceed one second.  
This is the increase in supply current for each input that is at the specified TTL voltage level, rather than V or GND.  
CC  
timing requirements over recommended ranges of supply voltage and operating free-air  
temperature (unless otherwise noted) (see Figure 1)  
SN54ABT573  
V
T
= 5 V,  
= 25°C  
CC  
A
UNIT  
MIN  
MAX  
MIN  
3.3  
1.9  
1.5  
MAX  
t
w
t
su  
t
h
Pulse duration, LE high  
Setup time, data before LE↓  
Hold time, data after LE↓  
3.3  
2.5  
2.5  
2.5  
ns  
ns  
ns  
High  
Low  
1
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀꢁꢂ ꢃ ꢄꢅ ꢆꢂ ꢇ ꢈ ꢉ ꢀꢁ ꢇꢃ ꢄꢅ ꢆꢂ ꢇꢈ ꢄ  
ꢊ ꢋꢆꢄꢌ ꢆ ꢍꢄꢁꢀ ꢎꢄꢍꢏ ꢁꢆ ꢐꢑꢆ ꢒꢎ ꢏ ꢌꢄꢆꢋ ꢓ ꢏꢀ  
ꢔ ꢕꢆ ꢓ ꢈ ꢑꢀꢆꢄꢆ ꢏ ꢊ ꢖꢆ ꢎꢖ ꢆꢀ  
SCBS190F − JANUARY 1991 − REVISED SEPTEMBER 2003  
timing requirements over recommended ranges of supply voltage and operating free-air  
temperature (unless otherwise noted) (see Figure 1)  
SN74ABT573A  
V
T
= 5 V,  
= 25°C  
CC  
A
UNIT  
MIN  
MAX  
MIN  
3.3  
1.9  
1.5  
MAX  
t
Pulse duration, LE high  
3.3  
1.9  
1.5  
ns  
w
High  
Low  
Setup time, data before LE↓  
Hold time, data after LE↓  
t
ns  
ns  
su  
h
1.8  
1.8  
t
This data-sheet limit may vary among suppliers.  
switching characteristics over recommended ranges of supply voltage and operating free-air  
temperature, C = 50 pF (unless otherwise noted) (see Figure 1)  
L
SN54ABT573  
V
T
= 5 V,  
FROM  
(INPUT)  
TO  
(OUTPUT)  
CC  
A
PARAMETER  
UNIT  
= 25°C  
TYP  
3.2  
MIN  
MAX  
MIN  
1.9  
2.2  
2.2  
3.2  
1.2  
2.7  
2.5  
2
MAX  
5.4  
5.7  
6.1  
6.7  
4.7  
6.2  
6.4  
6
t
t
t
t
t
t
t
t
1.4  
1.6  
2
6.4  
6.7  
7.1  
7.5  
6.2  
7.2  
7.7  
7
PLH  
PHL  
PLH  
PHL  
PZH  
PZL  
PHZ  
PLZ  
D
Q
Q
Q
Q
ns  
ns  
ns  
ns  
4.2  
4
LE  
OE  
OE  
5.2  
2.8  
0.8  
2
3.2  
4.7  
4.9  
2.2  
1.4  
4.2  
switching characteristics over recommended ranges of supply voltage and operating free-air  
temperature, C = 50 pF (unless otherwise noted) (see Figure 1)  
L
SN74ABT573A  
= 5 V,  
V
T
FROM  
(INPUT)  
TO  
(OUTPUT)  
CC  
A
PARAMETER  
UNIT  
= 25°C  
TYP  
3.2  
MIN  
MAX  
MIN  
MAX  
5.4  
5.7  
6.1  
6.7  
4.7  
6.2  
6.4  
6
t
t
t
t
t
t
t
t
1.9  
2.2  
2.2  
3.2  
1.2  
1.9  
2.2  
2.2  
3.2  
1.2  
5.9  
6.2  
6.6  
7.2  
5.2  
6.7  
PLH  
PHL  
PLH  
PHL  
PZH  
PZL  
PHZ  
PLZ  
D
Q
Q
Q
Q
ns  
ns  
ns  
ns  
4.2  
4
LE  
OE  
OE  
5.2  
3.2  
2.5  
2.5  
4.7  
2.5  
2
4.9  
2.5  
2
7.1  
6.5  
4.2  
This data-sheet limit may vary among suppliers.  
5
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀ ꢁꢂ ꢃꢄ ꢅ ꢆ ꢂꢇ ꢈꢉ ꢀꢁꢇ ꢃ ꢄꢅ ꢆꢂ ꢇ ꢈ ꢄ  
ꢊꢋ ꢆꢄ ꢌ ꢆ ꢍ ꢄꢁ ꢀꢎꢄꢍ ꢏꢁ ꢆ ꢐꢑꢆ ꢒꢎ ꢏ ꢌꢄꢆꢋ ꢓ ꢏꢀ  
ꢔꢕ ꢆ ꢓ ꢈ ꢑꢀꢆꢄꢆ ꢏ ꢊꢖꢆ ꢎꢖ ꢆꢀ  
SCBS190F − JANUARY 1991 − REVISED SEPTEMBER 2003  
PARAMETER MEASUREMENT INFORMATION  
7 V  
TEST  
S1  
Open  
S1  
500 Ω  
From Output  
Under Test  
t
/t  
PLH PHL  
Open  
7 V  
GND  
t
/t  
PLZ PZL  
C
= 50 pF  
t
/t  
Open  
L
PHZ PZH  
500 Ω  
(see Note A)  
3 V  
0 V  
LOAD CIRCUIT  
Timing Input  
Data Input  
1.5 V  
t
w
t
t
h
su  
3 V  
0 V  
3 V  
0 V  
Input  
1.5 V  
1.5 V  
1.5 V  
1.5 V  
VOLTAGE WAVEFORMS  
PULSE DURATION  
VOLTAGE WAVEFORMS  
SETUP AND HOLD TIMES  
3 V  
0 V  
3 V  
0 V  
Output  
Control  
1.5 V  
1.5 V  
1.5 V  
1.5 V  
Input  
t
t
t
t
t
PZL  
PLZ  
PLH  
PHL  
PHL  
Output  
Waveform 1  
S1 at 7 V  
3.5 V  
V
V
OH  
1.5 V  
1.5 V  
1.5 V  
1.5 V  
t
Output  
V
V
+ 0.3 V  
OL  
V
OL  
OL  
(see Note B)  
t
t
PZH  
PHZ  
− 0.3 V  
PLH  
Output  
Waveform 2  
S1 at Open  
(see Note B)  
V
OH  
V
V
OH  
OH  
1.5 V  
1.5 V  
Output  
0 V  
OL  
VOLTAGE WAVEFORMS  
PROPAGATION DELAY TIMES  
INVERTING AND NONINVERTING OUTPUTS  
VOLTAGE WAVEFORMS  
ENABLE AND DISABLE TIMES  
LOW- AND HIGH-LEVEL ENABLING  
NOTES: A. includes probe and jig capacitance.  
C
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.  
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.  
C. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, Z = 50 , t 2.5 ns, t 2.5 ns.  
O
r
f
D. The outputs are measured one at a time with one transition per measurement.  
E. All parameters and waveforms are not applicable to all devices.  
Figure 1. Load Circuit and Voltage Waveforms  
6
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
PACKAGE OPTION ADDENDUM  
www.ti.com  
23-Apr-2008  
PACKAGING INFORMATION  
Orderable Device  
Status (1)  
Package Package  
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)  
Qty  
Type  
LCCC  
CDIP  
CFP  
Drawing  
5962-9321901Q2A  
5962-9321901QRA  
5962-9321901QSA  
SN74ABT573ADBLE  
SN74ABT573ADBR  
ACTIVE  
ACTIVE  
FK  
J
20  
20  
20  
20  
20  
1
1
1
TBD  
TBD  
TBD  
TBD  
POST-PLATE N / A for Pkg Type  
A42 SNPB  
Call TI  
N / A for Pkg Type  
N / A for Pkg Type  
Call TI  
ACTIVE  
W
OBSOLETE  
ACTIVE  
SSOP  
SSOP  
DB  
DB  
Call TI  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SN74ABT573ADBRE4  
SN74ABT573ADBRG4  
SN74ABT573ADW  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
NRND  
SSOP  
SSOP  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
DB  
DB  
20  
20  
20  
20  
20  
20  
20  
20  
20  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
DW  
DW  
DW  
DW  
DW  
DW  
GQN  
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SN74ABT573ADWE4  
SN74ABT573ADWG4  
SN74ABT573ADWR  
SN74ABT573ADWRE4  
SN74ABT573ADWRG4  
SN74ABT573AGQNR  
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
BGA MI  
CROSTA  
R JUNI  
OR  
1000  
TBD  
SNPB  
Level-1-240C-UNLIM  
SN74ABT573AN  
SN74ABT573ANE4  
SN74ABT573ANSR  
SN74ABT573ANSRE4  
SN74ABT573ANSRG4  
SN74ABT573APW  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
PDIP  
PDIP  
SO  
N
20  
20  
20  
20  
20  
20  
20  
20  
20  
20  
Pb-Free  
(RoHS)  
CU NIPDAU N / A for Pkg Type  
CU NIPDAU N / A for Pkg Type  
N
Pb-Free  
(RoHS)  
NS  
NS  
NS  
PW  
PW  
PW  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SO  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SO  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
TSSOP  
TSSOP  
TSSOP  
70 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SN74ABT573APWE4  
SN74ABT573APWG4  
70 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
70 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SN74ABT573APWLE  
SN74ABT573APWR  
OBSOLETE TSSOP  
PW  
PW  
20  
20  
TBD  
Call TI  
Call TI  
ACTIVE  
ACTIVE  
ACTIVE  
TSSOP  
TSSOP  
TSSOP  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SN74ABT573APWRE4  
SN74ABT573APWRG4  
PW  
PW  
20  
20  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
23-Apr-2008  
Orderable Device  
SN74ABT573ARGYR  
SN74ABT573ARGYRG4  
SN74ABT573AZQNR  
Status (1)  
ACTIVE  
ACTIVE  
ACTIVE  
Package Package  
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)  
Qty  
Type  
Drawing  
QFN  
RGY  
20  
20  
20  
1000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
QFN  
RGY  
ZQN  
1000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
BGA MI  
CROSTA  
R JUNI  
OR  
1000 Green (RoHS &  
no Sb/Br)  
SNAGCU  
Level-1-260C-UNLIM  
SNJ54ABT573FK  
SNJ54ABT573J  
SNJ54ABT573W  
ACTIVE  
ACTIVE  
ACTIVE  
LCCC  
CDIP  
CFP  
FK  
J
20  
20  
20  
1
1
1
TBD  
TBD  
TBD  
POST-PLATE N / A for Pkg Type  
A42 SNPB  
Call TI  
N / A for Pkg Type  
N / A for Pkg Type  
W
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in  
a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2)  
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check  
http://www.ti.com/productcontent for the latest availability information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements  
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered  
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and  
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS  
compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame  
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)  
(3)  
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder  
temperature.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is  
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the  
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take  
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on  
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited  
information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI  
to Customer on an annual basis.  
Addendum-Page 2  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
11-Mar-2008  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0 (mm)  
B0 (mm)  
K0 (mm)  
P1  
W
Pin1  
Diameter Width  
(mm) W1 (mm)  
(mm) (mm) Quadrant  
SN74ABT573ADBR  
SN74ABT573ADWR  
SN74ABT573AGQNR  
SSOP  
SOIC  
DB  
DW  
20  
20  
20  
2000  
2000  
1000  
330.0  
330.0  
330.0  
16.4  
24.4  
12.4  
8.2  
10.8  
3.3  
7.5  
13.0  
4.3  
2.5  
2.7  
1.5  
12.0  
12.0  
8.0  
16.0  
24.0  
12.0  
Q1  
Q1  
Q1  
BGA MI  
CROSTA  
R JUNI  
OR  
GQN  
SN74ABT573APWR  
SN74ABT573ARGYR  
SN74ABT573AZQNR  
TSSOP  
QFN  
PW  
RGY  
ZQN  
20  
20  
20  
2000  
1000  
1000  
330.0  
180.0  
330.0  
16.4  
12.4  
12.4  
6.95  
3.8  
7.1  
4.8  
4.3  
1.6  
1.6  
1.5  
8.0  
8.0  
8.0  
16.0  
12.0  
12.0  
Q1  
Q1  
Q1  
BGA MI  
CROSTA  
R JUNI  
OR  
3.3  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
11-Mar-2008  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SPQ  
Length (mm) Width (mm) Height (mm)  
SN74ABT573ADBR  
SN74ABT573ADWR  
SN74ABT573AGQNR  
SSOP  
SOIC  
DB  
DW  
20  
20  
20  
2000  
2000  
1000  
346.0  
346.0  
346.0  
346.0  
346.0  
346.0  
33.0  
41.0  
29.0  
BGA MICROSTAR  
JUNIOR  
GQN  
SN74ABT573APWR  
SN74ABT573ARGYR  
SN74ABT573AZQNR  
TSSOP  
QFN  
PW  
RGY  
ZQN  
20  
20  
20  
2000  
1000  
1000  
346.0  
190.5  
346.0  
346.0  
212.7  
346.0  
33.0  
31.8  
29.0  
BGA MICROSTAR  
JUNIOR  
Pack Materials-Page 2  
MECHANICAL DATA  
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001  
DB (R-PDSO-G**)  
PLASTIC SMALL-OUTLINE  
28 PINS SHOWN  
0,38  
0,22  
0,65  
28  
M
0,15  
15  
0,25  
0,09  
5,60  
5,00  
8,20  
7,40  
Gage Plane  
1
14  
0,25  
A
0°ā8°  
0,95  
0,55  
Seating Plane  
0,10  
2,00 MAX  
0,05 MIN  
PINS **  
14  
16  
20  
24  
28  
30  
38  
DIM  
6,50  
5,90  
6,50  
5,90  
7,50  
8,50  
7,90  
10,50  
9,90  
10,50 12,90  
A MAX  
A MIN  
6,90  
9,90  
12,30  
4040065 /E 12/01  
NOTES: A. All linear dimensions are in millimeters.  
B. This drawing is subject to change without notice.  
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.  
D. Falls within JEDEC MO-150  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
MECHANICAL DATA  
MLCC006B – OCTOBER 1996  
FK (S-CQCC-N**)  
LEADLESS CERAMIC CHIP CARRIER  
28 TERMINAL SHOWN  
A
B
NO. OF  
TERMINALS  
**  
18 17 16 15 14 13 12  
MIN  
MAX  
MIN  
MAX  
0.342  
(8,69)  
0.358  
(9,09)  
0.307  
(7,80)  
0.358  
(9,09)  
19  
20  
11  
10  
9
20  
28  
44  
52  
68  
84  
0.442  
(11,23)  
0.458  
(11,63)  
0.406  
(10,31)  
0.458  
(11,63)  
21  
B SQ  
22  
0.640  
(16,26)  
0.660  
(16,76)  
0.495  
(12,58)  
0.560  
(14,22)  
8
A SQ  
23  
0.739  
(18,78)  
0.761  
(19,32)  
0.495  
(12,58)  
0.560  
(14,22)  
7
24  
25  
6
0.938  
(23,83)  
0.962  
(24,43)  
0.850  
(21,6)  
0.858  
(21,8)  
5
1.141  
(28,99)  
1.165  
(29,59)  
1.047  
(26,6)  
1.063  
(27,0)  
26 27 28  
1
2
3
4
0.080 (2,03)  
0.064 (1,63)  
0.020 (0,51)  
0.010 (0,25)  
0.020 (0,51)  
0.010 (0,25)  
0.055 (1,40)  
0.045 (1,14)  
0.045 (1,14)  
0.035 (0,89)  
0.045 (1,14)  
0.035 (0,89)  
0.028 (0,71)  
0.022 (0,54)  
0.050 (1,27)  
4040140/D 10/96  
NOTES: A. All linear dimensions are in inches (millimeters).  
B. This drawing is subject to change without notice.  
C. This package can be hermetically sealed with a metal lid.  
D. The terminals are gold plated.  
E. Falls within JEDEC MS-004  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
MECHANICAL DATA  
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999  
PW (R-PDSO-G**)  
PLASTIC SMALL-OUTLINE PACKAGE  
14 PINS SHOWN  
0,30  
0,19  
M
0,10  
0,65  
14  
8
0,15 NOM  
4,50  
4,30  
6,60  
6,20  
Gage Plane  
0,25  
1
7
0°8°  
A
0,75  
0,50  
Seating Plane  
0,10  
0,15  
0,05  
1,20 MAX  
PINS **  
8
14  
16  
20  
24  
28  
DIM  
3,10  
2,90  
5,10  
4,90  
5,10  
4,90  
6,60  
6,40  
7,90  
9,80  
9,60  
A MAX  
A MIN  
7,70  
4040064/F 01/97  
NOTES: A. All linear dimensions are in millimeters.  
B. This drawing is subject to change without notice.  
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.  
D. Falls within JEDEC MO-153  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
IMPORTANT NOTICE  
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相关型号:

SN74ABT573APWG4

OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUT

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TI

SN74ABT573APWLE

OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

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TI

SN74ABT573APWR

OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

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TI

SN74ABT573APWRE4

OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUT

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SN74ABT573APWRG4

OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUT

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SN74ABT573ARGYR

OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

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TI

SN74ABT573ARGYRG4

OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUT

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SN74ABT573AZQNR

OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

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SN74ABT573DB

ABT SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20

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TI

SN74ABT573DB

Bus Driver, ABT Series, 1-Func, 8-Bit, True Output, BICMOS, PDSO20, DSO-20

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ROCHESTER

SN74ABT573DBLE

Bus Driver, ABT Series, 1-Func, 8-Bit, True Output, BICMOS, PDSO20, PLASTIC, SSOP-20

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ROCHESTER

SN74ABT573DBR

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TI