SN74ABT863DWG4 [TI]

9-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS; 具有三态输出的9位总线收发器
SN74ABT863DWG4
型号: SN74ABT863DWG4
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

9-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
具有三态输出的9位总线收发器

总线收发器 输出元件
文件: 总13页 (文件大小:270K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
SN54ABT863, SN74ABT863  
9-BIT BUS TRANSCEIVERS  
WITH 3-STATE OUTPUTS  
SCBS201E – FEBRUARY 1991 – REVISED JULY 1998  
SN54ABT863 . . . JT PACKAGE  
SN74ABT863 . . . DB, DW, NT, OR PW PACKAGE  
(TOP VIEW)  
State-of-the-Art EPIC-ΙΙB BiCMOS Design  
Significantly Reduces Power Dissipation  
Typical V  
(Output Ground Bounce) < 1 V  
OLP  
at V  
= 5 V, T = 25°C  
OEBA1  
A1  
V
CC  
1
2
3
4
5
6
7
8
9
24  
23  
22  
21  
CC  
A
B1  
B2  
B3  
High-Impedance State During Power Up  
and Power Down  
A2  
A3  
A4  
A5  
High-Drive Outputs (–32-mA I , 64-mA I  
)
OH  
OL  
20 B4  
Latch-Up Performance Exceeds 500 mA Per  
JESD 17  
19 B5  
A6  
18 B6  
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
A7  
A8  
17 B7  
16 B8  
A9 10  
OEBA2 11  
GND 12  
15 B9  
Package Options Include Plastic  
Small-Outline (DW), Shrink Small-Outline  
(DB) Packages, and Thin Shrink  
14 OEAB2  
13 OEAB1  
Small-Outline (PW), Ceramic Chip Carriers  
(FK), Plastic (NT), and Ceramic (JT) DIPs  
SN54ABT863 . . . FK PACKAGE  
(TOP VIEW)  
description  
The ’ABT863 devices are 9-bit transceivers  
designed for asynchronous communication  
between data buses. The control-function  
implementation allows for maximum flexibility in  
timing.  
4
3
2
1
28 27 26  
25  
5
A3  
A4  
A5  
NC  
A6  
A7  
A8  
B3  
B4  
B5  
6
24  
21  
7
8
These devices allow noninverted data  
transmission from the A bus to the B bus or from  
the B bus to the A bus, depending on the logic  
levels at the output-enable (OEAB and OEBA)  
inputs.  
22 NC  
B6  
9
21  
10  
11  
20 B7  
19 B8  
12 13 14 15 16 17 18  
The outputs are in the high-impedance state  
during power up and power down. The outputs  
remain in the high-impedance state while the  
device is powered down.  
NC – No internal connection  
When V  
is between 0 and 2.1 V, the device is  
CC  
in the high-impedance state during power up or  
power down. However, to ensure the  
high-impedance state above 2.1 V, OE should be  
tied to V through a pullup resistor; the minimum  
CC  
value of the resistor is determined by the  
current-sinking capability of the driver.  
The SN54ABT863 is characterized for operation over the full military temperature range of –55°C to 125°C.  
The SN74ABT863 is characterized for operation from –40°C to 85°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC-ΙΙB is a trademark of Texas Instruments Incorporated.  
Copyright 1998, Texas Instruments Incorporated  
UNLESS OTHERWISE NOTED this document contains PRODUCTION  
DATA information current as of publication date. Products conform to  
specifications per the terms of Texas Instruments standard warranty.  
Production processing does not necessarily include testing of all  
parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54ABT863, SN74ABT863  
9-BIT BUS TRANSCEIVERS  
WITH 3-STATE OUTPUTS  
SCBS201E – FEBRUARY 1991 – REVISED JULY 1998  
FUNCTION TABLE  
INPUTS  
OEAB1 OEAB2 OEBA1 OEBA2  
OPERATION  
Latch A and B  
A to B  
L
L
L
L
L
H
X
L
L
X
H
L
L
L
H
X
H
H
X
X
X
H
X
X
H
H
B to A  
L
L
H
X
X
H
X
H
H
X
Isolation  
logic symbol  
1
&
OEBA1  
OEBA2  
OEAB1  
OEAB2  
EN1  
EN2  
11  
13  
14  
&
2
23  
1
1
1
A1  
B1  
2
3
4
5
6
7
22  
21  
20  
19  
18  
A2  
A3  
A4  
A5  
A6  
B2  
B3  
B4  
B5  
B6  
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54ABT863, SN74ABT863  
9-BIT BUS TRANSCEIVERS  
WITH 3-STATE OUTPUTS  
SCBS201E – FEBRUARY 1991 – REVISED JULY 1998  
logic diagram (positive logic)  
1
OEBA1  
11  
OEBA2  
13  
14  
OEAB1  
OEAB2  
2
23  
A1  
B1  
To Eight Other Channels  
Pin numbers shown are for the DB, DW, JT, NT, and PW packages.  
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)  
Supply voltage range, V  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V  
CC  
Input voltage range, V (except I/O ports) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V  
I
Voltage range applied to any output in the high or power-off state, V  
. . . . . . . . . . . . . . . . . . . –0.5 V to 5.5 V  
O
Current into any output in the low state, I : SN54ABT863 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 mA  
O
SN74ABT863 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA  
Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –18 mA  
IK  
OK  
I
Output clamp current, I  
(V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA  
O
Package thermal impedance, θ (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104°C/W  
JA  
DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81°C/W  
NT package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W  
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120°C/W  
Storage temperature range, T  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C  
stg  
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.  
2. The package thermal impedance is calculated in accordance with JESD 51, except for through-hole packages, which use a trace  
length of zero.  
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54ABT863, SN74ABT863  
9-BIT BUS TRANSCEIVERS  
WITH 3-STATE OUTPUTS  
SCBS201E – FEBRUARY 1991 – REVISED JULY 1998  
recommended operating conditions (see Note 3)  
SN54ABT863 SN74ABT863  
UNIT  
MIN  
4.5  
2
MAX  
MIN  
4.5  
2
MAX  
V
V
V
V
Supply voltage  
5.5  
5.5  
V
V
CC  
High-level input voltage  
Low-level input voltage  
Input voltage  
IH  
0.8  
0.8  
V
IL  
0
V
0
V
CC  
V
I
CC  
I
I
High-level output current  
Low-level output current  
Input transition rise or fall rate  
Power-up ramp rate  
–24  
48  
5
–32  
64  
5
mA  
mA  
ns/V  
µs/V  
°C  
OH  
OL  
t/v  
t/V  
Outputs enabled  
200  
–55  
200  
–40  
CC  
T
Operating free-air temperature  
125  
85  
A
NOTE 3: All unused inputs of the device must be held at V  
or GND to ensure proper device operation. Refer to the TI application report,  
CC  
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.  
PRODUCT PREVIEW information concerns products in the formative or  
design phase of development. Characteristic data and other  
specifications are design goals. Texas Instruments reserves the right to  
change or discontinue these products without notice.  
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54ABT863, SN74ABT863  
9-BIT BUS TRANSCEIVERS  
WITH 3-STATE OUTPUTS  
SCBS201E – FEBRUARY 1991 – REVISED JULY 1998  
electrical characteristics over recommended operating free-air temperature range (unless  
otherwise noted)  
T
= 25°C  
SN54ABT863  
SN74ABT863  
A
PARAMETER  
TEST CONDITIONS  
UNIT  
MIN TYP  
MAX  
MIN  
MAX  
MIN  
MAX  
V
V
V
V
V
= 4.5 V,  
I = –18 mA  
–1.2  
–1.2  
–1.2  
V
IK  
CC  
CC  
CC  
I
= 4.5 V,  
= 5 V,  
I
I
I
I
I
I
= –3 mA  
= –3 mA  
= –24 mA  
= –32 mA  
= 48 mA  
= 64 mA  
2.5  
3
2.5  
3
2.5  
3
OH  
OH  
OH  
OH  
OL  
OL  
V
OH  
2
2
V
= 4.5 V  
= 4.5 V  
CC  
CC  
2*  
2
0.55  
0.55  
V
V
V
V
OL  
0.55*  
0.55  
100  
mV  
µA  
hys  
Control inputs  
A or B ports  
V
CC  
V
CC  
V
CC  
= 0 to 5.5 V,  
V = V  
or GND  
or GND  
±1  
±1  
±1  
I
CC  
CC  
I
I
= 2.1 V to 5.5 V, V = V  
±20  
±20  
±20  
I
= 0 to 2.1 V, V = 0.5 V to 2.7 V,  
O
±50  
±50  
10  
±50**  
±50**  
10  
±50  
±50  
10  
µA  
µA  
µA  
I
I
I
OZPU  
OE = * don’t care  
V
= 2.1 V to 0, V = 0.5 V to 2.7 V,  
CC  
OE = * don’t care  
O
OZPD  
V
= 2.1 V to 5.5 V, V = 2.7 V,  
O
CC  
OE 2 V  
OZH  
V
= 2.1 V to 5.5 V, V = 0.5 V,  
O
CC  
OE 2 V  
I
I
I
I
–10  
±100*  
50  
–10  
–10  
±100  
50  
µA  
µA  
µA  
OZL  
V
CC  
= 0,  
V or V 4.5 V  
I O  
off  
V
V
= 5.5 V,  
= 5.5 V  
CC  
O
Outputs high  
= 2.5 V  
50  
CEX  
§
V
CC  
= 5.5 V,  
V
O
–50  
–100  
1
–225  
250  
30  
–50  
–225  
250  
38  
–50  
–225  
250  
38  
mA  
µA  
O
Outputs high  
Outputs low  
V
I
= 5.5 V,  
= 0,  
CC  
O
I
A or B ports  
24  
mA  
µA  
CC  
V = V  
I
or GND  
CC  
Outputs disabled  
0.5  
250  
250  
250  
V
= 5.5 V,  
CC  
Outputs enabled  
Outputs disabled  
1.5  
0.05  
1.5  
1.5  
0.05  
1.5  
1.5  
0.05  
1.5  
One input at 3.4 V,  
Other inputs at  
Data inputs  
mA  
I  
CC  
V
CC  
or GND  
V
CC  
= 5.5 V, One input at 3.4 V,  
or GND  
Control inputs  
Other inputs at V  
CC  
C
C
Control inputs V = 2.5 V or 0.5 V  
4
7
pF  
pF  
i
I
A or B ports  
V
O
= 2.5 V or 0.5 V  
io  
* On products compliant to MIL-PRF-38535, this parameter does not apply.  
** On products compliant to MIL-PRF-38535, this parameter is not production tested.  
§
All typical values are at V  
= 5 V.  
CC  
and I  
The parameters I  
include the input leakage current.  
OZH  
OZL  
Not more than one output should be tested at a time, and the duration of the test should not exceed one second.  
This is the increase in supply current for each input that is at the specified TTL voltage level rather than V or GND.  
CC  
PRODUCT PREVIEW information concerns products in the formative or  
design phase of development. Characteristic data and other  
specifications are design goals. Texas Instruments reserves the right to  
change or discontinue these products without notice.  
5
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54ABT863, SN74ABT863  
9-BIT BUS TRANSCEIVERS  
WITH 3-STATE OUTPUTS  
SCBS201E – FEBRUARY 1991 – REVISED JULY 1998  
switching characteristics over recommended ranges of supply voltage and operating free-air  
temperature, C = 50 pF (unless otherwise noted) (see Figure 1)  
L
V
T
= 5 V,  
= 25°C  
CC  
A
SN54ABT863 SN74ABT863  
FROM  
(INPUT)  
TO  
(OUTPUT)  
PARAMETER  
UNIT  
MIN  
1
TYP  
2.6  
2.3  
3.2  
3.3  
4.8  
4.4  
MAX  
4.1  
3.3  
4.3  
4.4  
6
MIN  
1
MAX  
7
MIN  
1
MAX  
5.7  
3.9  
5.5  
5.4  
6.7  
6.9  
t
t
t
t
t
t
PLH  
PHL  
PZH  
PZL  
PHZ  
PLZ  
A or B  
B or A  
B or A  
B or A  
ns  
ns  
ns  
1
1
3.9  
5.4  
5.5  
6.8  
7.8  
1
1
1
1
OEAB or OEBA  
OEAB or OEBA  
1
1
1
2.5  
1.5  
2.5  
1.5  
2.5  
1.5  
5.9  
PRODUCT PREVIEW information concerns products in the formative or  
design phase of development. Characteristic data and other  
specifications are design goals. Texas Instruments reserves the right to  
change or discontinue these products without notice.  
6
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54ABT863, SN74ABT863  
9-BIT BUS TRANSCEIVERS  
WITH 3-STATE OUTPUTS  
SCBS201E – FEBRUARY 1991 – REVISED JULY 1998  
PARAMETER MEASUREMENT INFORMATION  
7 V  
S1  
500 Ω  
Open  
GND  
From Output  
Under Test  
TEST  
S1  
t
t
/t  
Open  
7 V  
PLH PHL  
/t  
C
= 50 pF  
L
t
500 Ω  
PLZ PZL  
/t  
(see Note A)  
Open  
PHZ PZH  
LOAD CIRCUIT  
3 V  
0 V  
Timing Input  
Data Input  
1.5 V  
t
w
t
t
h
su  
3 V  
3 V  
Input  
1.5 V  
1.5 V  
1.5 V  
1.5 V  
Figure 1. Load Circuit and Voltage Waveforms  
7
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
PACKAGE OPTION ADDENDUM  
www.ti.com  
28-May-2007  
PACKAGING INFORMATION  
Orderable Device  
Status (1)  
Package Package  
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)  
Qty  
Type  
SSOP  
SSOP  
Drawing  
SN74ABT863DBLE  
SN74ABT863DBR  
OBSOLETE  
ACTIVE  
DB  
24  
24  
TBD  
Call TI  
Call TI  
DB  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SN74ABT863DBRE4  
SN74ABT863DBRG4  
SN74ABT863DW  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
SSOP  
SSOP  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
PDIP  
PDIP  
DB  
DB  
24  
24  
24  
24  
24  
24  
24  
24  
24  
24  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
DW  
DW  
DW  
DW  
DW  
DW  
NT  
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SN74ABT863DWE4  
SN74ABT863DWG4  
SN74ABT863DWR  
SN74ABT863DWRE4  
SN74ABT863DWRG4  
SN74ABT863NT  
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
15  
Pb-Free  
(RoHS)  
CU NIPDAU N / A for Pkg Type  
SN74ABT863NTE4  
NT  
15  
Pb-Free  
(RoHS)  
CU NIPDAU N / A for Pkg Type  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in  
a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2)  
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check  
http://www.ti.com/productcontent for the latest availability information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements  
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered  
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and  
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS  
compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame  
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)  
(3)  
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder  
temperature.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is  
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the  
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take  
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on  
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited  
information may not be available for release.  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
28-May-2007  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI  
to Customer on an annual basis.  
Addendum-Page 2  
MECHANICAL DATA  
MPDI004 – OCTOBER 1994  
NT (R-PDIP-T**)  
PLASTIC DUAL-IN-LINE PACKAGE  
24 PINS SHOWN  
A
PINS **  
24  
28  
DIM  
24  
13  
1.260  
(32,04) (36,20)  
1.425  
A MAX  
1.230  
(31,24) (35,18)  
1.385  
A MIN  
B MAX  
B MIN  
0.280 (7,11)  
0.250 (6,35)  
0.310  
(7,87)  
0.315  
(8,00)  
1
12  
0.290  
(7,37)  
0.295  
(7,49)  
0.070 (1,78) MAX  
B
0.020 (0,51) MIN  
0.200 (5,08) MAX  
Seating Plane  
0.125 (3,18) MIN  
0.100 (2,54)  
0.010 (0,25)  
0°15°  
0.021 (0,53)  
0.015 (0,38)  
M
0.010 (0,25) NOM  
4040050/B 04/95  
NOTES: A. All linear dimensions are in inches (millimeters).  
B. This drawing is subject to change without notice.  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
MECHANICAL DATA  
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001  
DB (R-PDSO-G**)  
PLASTIC SMALL-OUTLINE  
28 PINS SHOWN  
0,38  
0,22  
0,65  
28  
M
0,15  
15  
0,25  
0,09  
5,60  
5,00  
8,20  
7,40  
Gage Plane  
1
14  
0,25  
A
0°ā8°  
0,95  
0,55  
Seating Plane  
0,10  
2,00 MAX  
0,05 MIN  
PINS **  
14  
16  
20  
24  
28  
30  
38  
DIM  
6,50  
5,90  
6,50  
5,90  
7,50  
8,50  
7,90  
10,50  
9,90  
10,50 12,90  
A MAX  
A MIN  
6,90  
9,90  
12,30  
4040065 /E 12/01  
NOTES: A. All linear dimensions are in millimeters.  
B. This drawing is subject to change without notice.  
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.  
D. Falls within JEDEC MO-150  
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