SN74AXC2T45-Q1 [TI]
SN74AXC2T45-Q1 2-Bit Translating Transceiver with Configurable Level-Shifting;型号: | SN74AXC2T45-Q1 |
厂家: | TEXAS INSTRUMENTS |
描述: | SN74AXC2T45-Q1 2-Bit Translating Transceiver with Configurable Level-Shifting |
文件: | 总30页 (文件大小:1471K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
SN74AXC2T45-Q1
SCES928A – APRIL 2021 – REVISED SEPTEMBER 2021
SN74AXC2T45-Q1 2-Bit Translating Transceiver with Configurable Level-Shifting
The SN74AXC2T45-Q1 device is designed for
asynchronous communication between data buses.
1 Features
•
•
AEC-Q100 automotive qualified
Fully configurable dual-rail design allows each port
to operate with a power supply range from 0.65 V
to 3.6 V
The device transmits data from the A bus to the B
bus or from the B bus to the A bus, depending on
the logic level of the direction-control input (DIR). The
SN74AXC2T45-Q1 device is designed so the control
•
•
•
Operating temperature from –40°C to +125°C
Glitch-free power supply sequencing
Up to 380 Mbps support when translating from 1.8
V to 3.3 V
pin (DIR) is referenced to VCCA.
This device is fully specified for partial-power-down
applications using the Ioff current. The Ioff protection
circuitry ensures that no excessive current is drawn
from or to an input, output, or combined I/O that
is biased to a specific voltage while the device is
powered down.
•
VCC isolation feature
– If either VCC input is below 100 mV, all
I/Os outputs are disabled and become high-
impedance
The VCC isolation feature ensures that if either VCCA
or VCCB is less than 100 mV, both I/O ports enter a
high-impedance state by disabling their outputs.
•
•
•
Ioff supports partial-power-down mode operation
Compatible with AVC family level shifters
Latch-up performance exceeds 100 mA per JESD
78, Class II
ESD protection exceeds JESD 22
– 8000-V human-body model
Glitch-free power supply sequencing allows either
supply rail to be powered on or off in any order while
providing robust power sequencing performance.
•
– 1000-V charged-device model
Device Information(1)
2 Applications
PART NUMBER
PACKAGE
BODY SIZE (NOM)
SN74AXC2T45DCU
VSSOP (8)
2.30 mm × 2.00 mm
•
•
•
•
•
•
Enterprise and communications
Industrial
Personal electronics
Wireless infrastructure
Building automation
Point-of-sale
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
VCCA
VCCB
DIR
A1
3 Description
The SN74AXC2T45-Q1 is a two-bit noninverting bus
transceiver that uses two individually configurable
power-supply rails. The device is operational with both
VCCA and VCCB supplies as low as 0.65 V. The A port
is designed to track VCCA, which accepts any supply
voltage from 0.65 V to 3.6 V. The B port is designed
to track VCCB, which also accepts any supply voltage
from 0.65 V to 3.6 V. Additionally the SN74AXC2T45-
Q1 is compatible with a single-supply system.
B1
B2
A2
Functional Block Diagram
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
SN74AXC2T45-Q1
SCES928A – APRIL 2021 – REVISED SEPTEMBER 2021
www.ti.com
Table of Contents
1 Features............................................................................1
2 Applications.....................................................................1
3 Description.......................................................................1
4 Revision History.............................................................. 2
5 Pin Configuration and Functions...................................3
6 Specifications.................................................................. 4
6.1 Absolute Maximum Ratings........................................ 4
6.2 ESD Ratings............................................................... 4
6.3 Recommended Operating Conditions.........................5
6.4 Thermal Information....................................................5
6.5 Electrical Characteristics.............................................6
6.6 Switching Characteristics, VCCA = 0.7 ± 0.05 V.......... 7
6.7 Switching Characteristics, VCCA = 0.8 ± 0.04 V.......... 8
6.8 Switching Characteristics, VCCA = 0.9 ± 0.045 V........ 9
6.9 Switching Characteristics, VCCA = 1.2 ± 0.1 V.......... 10
6.10 Switching Characteristics, VCCA = 1.5 ± 0.1 V........ 11
6.11 Switching Characteristics, VCCA = 1.8 ± 0.15 V...... 12
6.12 Switching Characteristics, VCCA = 2.5 ± 0.2 V........ 13
6.13 Switching Characteristics, VCCA = 3.3 ± 0.3 V........ 14
6.14 Operating Characteristics: TA = 25°C..................... 15
6.15 Typical Characteristics............................................16
7 Parameter Measurement Information..........................17
7.1 Load Circuit and Voltage Waveforms........................17
8 Detailed Description......................................................19
8.1 Overview...................................................................19
8.2 Functional Block Diagram.........................................19
8.3 Feature Description...................................................19
8.4 Device Functional Modes..........................................20
9 Application and Implementation..................................21
9.1 Application Information............................................. 21
9.2 Typical Application.................................................... 21
10 Power Supply Recommendations..............................23
11 Layout...........................................................................23
11.1 Layout Guidelines................................................... 23
11.2 Layout Example...................................................... 23
12 Device and Documentation Support..........................24
12.1 Documentation Support.......................................... 24
12.2 Receiving Notification of Documentation Updates..24
12.3 Support Resources................................................. 24
12.4 Trademarks.............................................................24
12.5 Electrostatic Discharge Caution..............................24
12.6 Glossary..................................................................24
13 Mechanical, Packaging, and Orderable
Information.................................................................... 24
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision * (April 2021) to Revision A (September 2021)
Page
•
Changed the status of the data sheet from: Advance Information to: Production Data .....................................1
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5 Pin Configuration and Functions
VCCA
A1
1
2
3
4
VCCB
B1
8
7
6
5
A2
B2
DIR
GND
Figure 5-1. DCU Package 8-Pin VSSOP Top View
Table 5-1. Pin Functions
PIN
NAME
NO.
DESCRIPTION
DTM, DCU, DCT
A1
2
3
7
6
5
4
1
8
Input/output A1. Referenced to VCCA
Input/output A2. Referenced to VCCA
Input/output B1. Referenced to VCCB
Input/output B2. Referenced to VCCB
.
.
.
.
A2
B1
B2
DIR
GND
VCCA
VCCB
Direction-control in for both ports. Referenced to VCCA
Ground
A-port power supply voltage. 0.65 V ≤ VCCA ≤ 3.6 V
B-port power supply voltage. 0.65 V ≤ VCCB ≤ 3.6 V
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN
–0.5
–0.5
–0.5
–0.5
–0.5
–0.5
–0.5
MAX UNITS
VCCA Supply voltage A
VCCB Supply voltage B
4.2
4.2
4.2
4.2
4.2
4.2
4.2
V
V
I/O Ports (A Port)
I/O Ports (B Port)
Control Inputs
A Port
VI
Input Voltage(2)
V
VO
VO
Voltage applied to any output in the high-impedance or power-off state(2)
Voltage applied to any output in the high or low state(2) (3)
V
V
B Port
A Port
–0.5 VCCA + 0.2
–0.5 VCCB + 0.2
–50
B Port
IIK
IOK
IO
Input clamp current
VI < 0
mA
mA
Output clamp current
VO < 0
–50
Continuous output current
Continuous current through VCC or GND
Junction Temperature
–50
50 mA
100 mA
150 °C
150 °C
–100
Tj
Tstg
Storage temperature
–65
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress
ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under
Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device
reliability.
(2) The input voltage and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
(3) The output positive-voltage rating may be exceeded up to 4.2 V maximum if the output current rating is observed.
6.2 ESD Ratings
VALUE
±8000
±1000
UNIT
Human body model (HBM), per AEC Q100-002(1)
Charged device model (CDM), per AEC Q100-011
V(ESD)
Electrostatic discharge
V
(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001
specification.
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6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)(1) (2)
MIN
0.65
MAX UNIT
VCCA
VCCB
Supply voltage A
Supply voltage B
3.6
3.6
V
V
0.65
VCCI = 0.65 V – 0.75 V
VCCI = 0.76 V – 1 V
VCCI = 1.1 V – 1.95 V
VCCI = 2.3 V – 2.7 V
VCCI = 3 V – 3.6 V
VCCI × 0.70
VCCI × 0.70
VCCI × 0.65
1.6
Data Inputs
2
VIH
High-level input voltage
VCCA = 0.65 V – 0.75 V
VCCA = 0.76 V – 1 V
VCCA = 1.1 V – 1.95 V
VCCA = 2.3 V – 2.7 V
VCCA = 3 V – 3.6 V
VCCI = 0.65 V – 0.75 V
VCCI = 0.76 V – 1 V
VCCI = 1.1 V – 1.95 V
VCCI = 2.3 V – 2.7 V
VCCI = 3 V – 3.6 V
VCCA × 0.70
VCCA × 0.70
VCCA × 0.65
1.6
Control Input (DIR), Referenced
to VCCA
2
VCCI x 0.30
VCCI x 0.30
VCCI x 0.35
0.7
Data Inputs
0.8
VIL
Low-level input voltage
V
VCCA = 0.65 V – 0.75 V
VCCA = 0.76 V – 1 V
VCCA = 1.1 V – 1.95 V
VCCA = 2.3 V – 2.7 V
VCCA = 3 V – 3.6 V
VCCA × 0.30
VCCA × 0.30
VCCA × 0.35
0.7
Control Input (DIR), Referenced
to VCCA
0.8
VI
Input voltage
0
0
0
3.6
V
V
Active State
Tri-State
VCCO
VO
Output voltage
3.6
Δt/Δv(2) Input transition rise and fall time
10 ns/V
100 ns/V
125 °C
Δt/Δv(3) Single channel input transition rise and fall time
TA
Operating free-air temperature
–40
(1) VCCI is the VCC associated with the input port. VCCO is the VCC associated with the output port.
(2) All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, SCBA004.
(3) Input transition rate of a single channel while the other channels are at a valid logic state and not switching.
6.4 Thermal Information
SN74AXC2T45-Q1
THERMAL METRIC (1)
UNIT
DCT (SM8)
223.5
DCU (VSSOP) DTM (X2SON)
RθJA
RθJC(top)
RθJB
YJT
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
242.9
96.2
225.9
131.6
141.3
12.7
°C/W
°C/W
°C/W
°C/W
°C/W
120.7
138.0
153.3
38.2
Junction-to-top characterization parameter
Junction-to-board characterization parameter
47.5
YJB
136.7
152.5
140.9
(1) For more information about thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.
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6.5 Electrical Characteristics
over operating free-air temperature range (unless otherwise noted) (1) (2) (3)
Operating free-air temperature (TA)
-40°C to 85°C -40°C to 125°C
PARAMETER
TEST CONDITIONS
VCCA
VCCB
UNIT
MIN
TYP MAX
MIN
TYP MAX
VCCO
-0.1
VCCO
-0.1
IOH = -100 µA
0.7 V – 3.6 V 0.7 V – 3.6 V
IOH = -50 µA
IOH = -200 µA
IOH = -500 µA
0.65 V
0.76 V
0.85 V
1.1 V
1.4 V
1.65 V
2.3 V
3 V
0.65 V
0.76 V
0.85 V
1.1 V
1.4 V
1.65 V
2.3 V
3 V
0.55
0.58
0.65
0.85
1.05
1.2
0.55
0.58
0.65
0.85
1.05
1.2
High-level
output voltage
VOH
VI = VIH
V
IOH = -3 mA
IOH = -6 mA
IOH = -8 mA
IOH = -9 mA
1.75
2.3
1.75
2.3
IOH = -12 mA
IOL = 100 µA
IOL = 50 µA
0.7 V – 3.6 V 0.7 V – 3.6 V
0.1
0.1
0.1
0.1
0.65 V
0.76 V
0.85 V
1.1 V
1.4 V
1.65 V
2.3 V
3 V
0.65 V
0.76 V
0.85 V
1.1 V
1.4 V
1.65 V
2.3 V
3 V
IOL = 200 µA
IOL = 500 µA
VI = VIL IOL = 3 mA
IOL = 6 mA
0.18
0.2
0.18
0.2
0.25
0.35
0.45
0.55
0.7
Low-level
output voltage
VOL
0.25
0.35
0.45
0.55
0.7
V
IOL = 8 mA
IOL = 9 mA
IOL = 12 mA
Control input (DIR):VI =
VCCA or GND
0.65 V – 3.6 V 0.65 V – 3.6 V
0.65 V – 3.6 V 0.65 V – 3.6 V
-0.5
-4
0.5
4
-1
-8
-8
-8
1
8
8
µA
µA
Input leakage
current
II
Data Inputs (Ax, Bx),VI =
VCCI or GND
A Port: VI or VO = 0 V –
3.6 V
0 V
0 V – 3.6 V
0 V
-4
4
Partial power
down current
Ioff
µA
B Port: VI or VO = 0 V –
3.6 V
0 V – 3.6 V
-4
4
8
8
0.65 V – 3.6 V 0.65 V – 3.6 V
14
VI =
VCCA supply
current
ICCA
VCCI or IO = 0
GND
0 V
3.6 V
0 V
-2
-2
-12
-12
µA
µA
3.6 V
4
8
4
8
14
8
0.65 V – 3.6 V 0.65 V – 3.6 V
VI =
VCCB supply
current
ICCB
VCCI or IO = 0
GND
0 V
3.6 V
0 V
3.6 V
VI =
ICCA
ICCB
+
Combined
supply current
VCCI or IO = 0
GND
0.65 V – 3.6 V 0.65 V – 3.6 V
16
23 µA
Control Input
(DIR)
Capacitance
Ci
VI = 3.3 V or GND
3.3 V
3.3 V
3.3 V
3.3 V
3.3
5.4
3.3
5.4
pF
pF
Data I/O
Capacitance
VO = 1.65 V DC +1 MHz
-16 dBm sine wave
Cio
(1) VCCI is the VCC associated with the input port.
(2) VCCO is the VCC associated with the output port.
(3) All typical data is taken at 25°C.
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6.6 Switching Characteristics, VCCA = 0.7 ± 0.05 V
See Figure 5 and Table 1 for test circuit and loading. See Figure 6, Figure 7, and Figure 8 for measurement waveforms.
B-Port Supply Voltage (VCCB
)
PARAMETER
FROM
TO
Test Conditions 0.7 ± 0.05 V 0.8 ± 0.04 V 0.9 ± 0.045 V 1.2 ± 0.1 V
MIN MAX MIN MAX MIN MAX MIN MAX
1.5 ± 0.1 V
MIN MAX
1.8 ± 0.15 V
MIN MAX
2.5 ± 0.2 V
MIN MAX
3.3 ± 0.3 V
MIN MAX
UNIT
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
170
170
170
170
140
140
143
143
311
311
306
306
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
115
115
149
149
140
140
105
105
311
311
247
247
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
84
84
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
50
50
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
50
50
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
56
56
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
71
71
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
106
106
76
A
B
B
A
A
B
A
B
Propagation
delay
tpd
ns
122
122
140
140
84
83
79
78
77
83
79
78
77
76
140
140
41
140
140
39
140
140
42
140
140
56
140
140
107
107
311
311
228
228
DIR
DIR
DIR
DIR
tdis Disable time
ns
ns
84
41
39
42
56
311
311
216
216
311
311
186
186
311
311
182
182
311
311
183
183
311
311
194
194
ten Enable time
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6.7 Switching Characteristics, VCCA = 0.8 ± 0.04 V
See Figure 5 and Table 1 for test circuit and loading. See Figure 6, Figure 7, and Figure 8 for measurement waveforms.
B-Port Supply Voltage (VCCB
)
PARAMETER
FROM
TO
Test Conditions 0.7 ± 0.05 V 0.8 ± 0.04 V 0.9 ± 0.045 V 1.2 ± 0.1 V
MIN MAX MIN MAX MIN MAX MIN MAX
1.5 ± 0.1 V
MIN MAX
1.8 ± 0.15 V
MIN MAX
2.5 ± 0.2 V
MIN MAX
3.3 ± 0.3 V
MIN MAX
UNIT
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
150
150
115
115
96
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
94
94
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
63
63
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
33
33
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
28
28
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
27
27
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
28
28
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
34
34
A
B
B
A
A
B
A
B
Propagation
delay
tpd
ns
94
76
50
41
40
38
38
94
76
50
41
40
38
38
96
96
96
96
96
96
96
DIR
DIR
DIR
DIR
96
96
96
96
96
96
96
96
tdis Disable time
ns
ns
136
136
246
246
243
243
97
76
33
27
26
28
35
97
76
33
27
26
28
35
246
246
188
188
246
246
157
157
246
246
128
128
246
246
123
123
246
246
122
122
246
246
123
123
246
246
125
125
ten
Enable time
(1)
(1) The enable time is a calculated value, derived using the formula shown in the Enable Times section.
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6.8 Switching Characteristics, VCCA = 0.9 ± 0.045 V
See Figure 5 and Table 1 for test circuit and loading. See Figure 6, Figure 7, and Figure 8 for measurement waveforms.
B-Port Supply Voltage (VCCB
)
PARAMETER
FROM
TO
Test Conditions 0.7 ± 0.05 V 0.8 ± 0.04 V 0.9 ± 0.045 V 1.2 ± 0.1 V
MIN MAX MIN MAX MIN MAX MIN MAX
1.5 ± 0.1 V
MIN MAX
1.8 ± 0.15 V
MIN MAX
2.5 ± 0.2 V
MIN MAX
3.3 ± 0.3 V
MIN MAX
UNIT
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
122
122
84
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
76
76
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
51
51
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
23
23
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
18
18
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
16
16
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
15
15
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
17
17
A
B
B
A
A
B
A
B
Propagation
delay
tpd
ns
63
51
39
28
24
21
21
84
63
51
39
28
24
21
21
74
74
74
74
74
74
74
74
DIR
DIR
DIR
DIR
74
74
74
74
74
74
74
74
tdis Disable time
ns
ns
133
133
211
211
192
192
94
73
30
23
22
20
22
94
73
31
24
22
20
23
211
211
146
146
211
211
120
120
211
211
93
211
211
88
211
211
86
211
211
85
211
211
87
ten
Enable time
(1)
93
88
86
85
87
(1) The enable time is a calculated value, derived using the formula shown in the Enable Times section.
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6.9 Switching Characteristics, VCCA = 1.2 ± 0.1 V
See Figure 5 and Table 1 for test circuit and loading. See Figure 6, Figure 7, and Figure 8 for measurement waveforms.
B-Port Supply Voltage (VCCB
)
PARAMETER
FROM
TO
Test Conditions 0.7 ± 0.05 V 0.8 ± 0.04 V 0.9 ± 0.045 V 1.2 ± 0.1 V
MIN MAX MIN MAX MIN MAX MIN MAX
1.5 ± 0.1 V
MIN MAX
1.8 ± 0.15 V
MIN MAX
2.5 ± 0.2 V
MIN MAX
3.3 ± 0.3 V
MIN MAX
UNIT
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
84
84
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
51
51
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
38
38
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
15
15
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
10
11
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
9
9
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
7
8
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
8
8
A
B
B
A
A
B
A
B
Propagation
delay
tpd
ns
50
33
23
15
12
10
10
26
27
18
19
177
177
35
36
8
7
50
33
23
15
12
8
7
26
26
26
26
26
26
27
15
16
177
177
33
34
26
27
15
16
177
177
34
35
DIR
DIR
DIR
DIR
27
27
27
27
27
tdis Disable time
ns
ns
129
129
177
177
105
105
90
70
27
20
90
71
28
21
177
177
71
177
177
59
177
177
40
177
177
36
ten
Enable time
(1)
71
59
41
37
(1) The enable time is a calculated value, derived using the formula shown in the Enable Times section.
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6.10 Switching Characteristics, VCCA = 1.5 ± 0.1 V
See Figure 5 and Table 1 for test circuit and loading. See Figure 6, Figure 7, and Figure 8 for measurement waveforms.
B-Port Supply Voltage (VCCB
)
PARAMETER
FROM
TO
Test Conditions 0.7 ± 0.05 V 0.8 ± 0.04 V 0.9 ± 0.045 V 1.2 ± 0.1 V
MIN MAX MIN MAX MIN MAX MIN MAX
1.5 ± 0.1 V
MIN MAX
1.8 ± 0.15 V
MIN MAX
2.5 ± 0.2 V
MIN MAX
3.3 ± 0.3 V
MIN MAX
UNIT
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
79
79
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
41
41
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
28
28
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
12
12
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
9
9
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
7
8
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
6
6
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
6
6
A
B
B
A
A
B
A
B
Propagation
delay
tpd
ns
50
28
18
10
9
8
6
5
50
28
18
11
9
8
6
5
18
18
18
18
18
19
19
20
172
172
27
28
18
19
17
18
172
172
25
26
18
19
13
14
172
172
24
25
18
19
13
14
172
172
24
25
DIR
DIR
DIR
DIR
19
19
19
19
tdis Disable time
ns
ns
128
128
172
172
92
89
69
26
89
70
27
172
172
54
172
172
42
172
172
31
ten
Enable time
(1)
92
54
42
31
(1) The enable time is a calculated value, derived using the formula shown in the Enable Times section.
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6.11 Switching Characteristics, VCCA = 1.8 ± 0.15 V
See Figure 5 and Table 1 for test circuit and loading. See Figure 6, Figure 7, and Figure 8 for measurement waveforms.
B-Port Supply Voltage (VCCB
)
PARAMETER
FROM
TO
Test Conditions 0.7 ± 0.05 V 0.8 ± 0.04 V 0.9 ± 0.045 V 1.2 ± 0.1 V
MIN MAX MIN MAX MIN MAX MIN MAX
1.5 ± 0.1 V
MIN MAX
1.8 ± 0.15 V
MIN MAX
2.5 ± 0.2 V
MIN MAX
3.3 ± 0.3 V
MIN MAX
UNIT
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
78
78
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
40
40
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
24
24
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
10
10
9
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
8
8
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
7
7
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
5
6
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
5
5
A
B
B
A
A
B
A
B
Propagation
delay
tpd
ns
56
27
16
7
7
5
4
56
27
16
9
8
7
5
5
16
16
16
16
17
25
26
171
171
26
27
16
17
18
19
171
171
23
24
16
17
16
17
171
171
22
23
16
17
12
13
171
171
21
22
16
17
12
13
171
171
20
21
DIR
DIR
DIR
DIR
17
17
17
tdis Disable time
ns
ns
127
127
171
171
89
88
69
88
70
171
171
50
171
171
36
ten
Enable time
(1)
89
50
36
(1) The enable time is a calculated value, derived using the formula shown in the Enable Times section.
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6.12 Switching Characteristics, VCCA = 2.5 ± 0.2 V
See Figure 5 and Table 1 for test circuit and loading. See Figure 6, Figure 7, and Figure 8 for measurement waveforms.
B-Port Supply Voltage (VCCB
)
PARAMETER
FROM
TO
Test Conditions 0.7 ± 0.05 V 0.8 ± 0.04 V 0.9 ± 0.045 V 1.2 ± 0.1 V
MIN MAX MIN MAX MIN MAX MIN MAX
1.5 ± 0.1 V
MIN MAX
1.8 ± 0.15 V
MIN MAX
2.5 ± 0.2 V
MIN MAX
3.3 ± 0.3 V
MIN MAX
UNIT
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
77
77
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
38
38
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
21
21
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
8
8
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
6
6
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
5
5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
5
5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
4
5
A
B
B
A
A
B
A
B
Propagation
delay
tpd
ns
71
28
15
7
6
5
5
4
71
28
15
8
6
6
5
4
11
11
11
11
12
25
26
182
182
18
19
11
12
18
19
182
182
17
18
11
12
15
16
182
182
16
17
11
12
12
12
182
182
15
16
11
12
11
12
182
182
15
16
DIR
DIR
DIR
DIR
12
12
12
tdis Disable time
ns
ns
127
127
182
182
84
88
68
88
69
182
182
46
182
182
29
ten
Enable time
(1)
84
46
29
(1) The enable time is a calculated value, derived using the formula shown in the Enable Times section.
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6.13 Switching Characteristics, VCCA = 3.3 ± 0.3 V
See Figure 5 and Table 1 for test circuit and loading. See Figure 6, Figure 7, and Figure 8 for measurement waveforms.
B-Port Supply Voltage (VCCB
)
PARAMETER
FROM
TO
Test Condtions 0.7 ± 0.05 V 0.8 ± 0.04 V 0.9 ± 0.045 V 1.2 ± 0.1 V
MIN MAX MIN MAX MIN MAX MIN MAX
1.5 ± 0.1 V
MIN MAX
1.8 ± 0.15 V
MIN MAX
2.5 ± 0.2 V
MIN MAX
3.3 ± 0.3 V
MIN MAX
UNIT
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
76
76
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
38
38
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
21
21
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
7
7
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
5
5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
4
5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
4
4
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
4
4
A
B
B
A
A
B
A
B
Propagation
delay
tpd
ns
105
105
10
34
17
8
6
5
4
4
34
17
8
6
5
5
4
10
10
10
11
24
26
218
218
17
18
10
11
17
19
218
218
15
16
10
11
15
16
218
218
14
15
10
11
11
12
218
218
14
15
10
11
11
11
218
218
14
15
DIR
DIR
DIR
DIR
11
11
11
tdis Disable time
ns
ns
128
128
218
218
83
88
68
88
69
218
218
45
218
218
28
ten
Enable time
(1)
83
45
28
(1) The enable time is a calculated value, derived using the formula shown in the Enable Times section.
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6.14 Operating Characteristics: TA = 25°C
PARAMETER
TEST CONDITIONS
VCCA
0.7 V
VCCB
0.7 V
MIN
TYP
2.2
MAX UNIT
0.8 V
0.9 V
1.2 V
1.5 V
1.8 V
2.5 V
3.3 V
0.7 V
0.8 V
0.9 V
1.2 V
1.5 V
1.8 V
2.5 V
3.3 V
0.7 V
0.8 V
0.9 V
1.2 V
1.5 V
1.8 V
2.5 V
3.3 V
0.7 V
0.8 V
0.9 V
1.2 V
1.5 V
1.8 V
2.5 V
3.3 V
0.8 V
0.9 V
1.2 V
1.5 V
1.8 V
2.5 V
3.3 V
0.7 V
0.8 V
0.9 V
1.2 V
1.5 V
1.8 V
2.5 V
3.3 V
0.7 V
0.8 V
0.9 V
1.2 V
1.5 V
1.8 V
2.5 V
3.3 V
0.7 V
0.8 V
0.9 V
1.2 V
1.5 V
1.8 V
2.5 V
3.3 V
2.0
2.0
2.0
Power Dissipation Capacitance CL = 0, RL = Open f = 1
pF
per transceiver (A to B)
MHz, tr = tf = 1 ns
2.0
2.1
2.5
3.0
CpdA
10.6
10.7
10.6
10.8
11.1
12.2
15.9
19.6
10.6
10.7
10.6
10.8
11.1
12.2
15.8
19.3
2.2
Power Dissipation Capacitance CL = 0, RL = Open f = 1
per transceiver (B to A) MHz, tr = tf = 1 ns
pF
pF
pF
Power Dissipation Capacitance CL = 0, RL = Open f = 1
per transceiver (A to B) MHz, tr = tf = 1 ns
CpdB
2.0
2.0
2.0
Power Dissipation Capacitance CL = 0, RL = Open f = 1
per transceiver (B to A) MHz, tr = tf = 1 ns
2.0
2.1
2.5
3.0
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6.15 Typical Characteristics
3.4
3.2
3
1.25
1.2
VCC = 1.8V
VCC = 2.5V
VCC = 3.3V
1.15
1.1
1.05
1
2.8
2.6
2.4
2.2
2
0.95
0.9
0.85
0.8
0.75
0.7
1.8
1.6
1.4
0.65
0.6
VCC = 0.7V
VCC = 1.2V
0.55
0
0.5
1
1.5
2
2.5
IOH (mA)
3
3.5
4
4.5
5
0
2
4
6
8
10
IOH (mA)
12
14
16
18
20
D001
D001
Figure 6-2. Typical (TA=25°C) Output High Voltage (VOH) vs
Source Current (IOH
Figure 6-1. Typical (TA=25°C) Output High Voltage (VOH) vs
Source Current (IOH
)
)
700
650
600
550
500
450
400
350
300
250
200
150
100
50
220
200
180
160
140
120
100
80
60
40
VCC = 1.8V
VCC = 2.5V
VCC = 3.3V
VCC = 0.7V
VCC = 1.2V
20
0
-50
0
0
2
4
6
8
10
IOL (mA)
12
14
16
18
20
0
0.5
1
1.5
2
2.5
IOL (mA)
3
3.5
4
4.5
5
D001
D001
Figure 6-3. Typical (TA=25°C) Output High Voltage (VOL) vs Sink Figure 6-4. Typical (TA=25°C) Output High Voltage (VOL) vs Sink
Current (IOL Current (IOL
)
)
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7 Parameter Measurement Information
7.1 Load Circuit and Voltage Waveforms
Unless otherwise noted, all input pulses are supplied by generators having the following characteristics:
•
•
•
f = 1 MHz
ZO = 50 Ω
dv/dt ≤ 1 ns/V
Measurement Point
2 x VCCO
Open
S1
RL
Output Pin
Under Test
GND
(1)
CL
RL
A. CL includes probe and jig capacitance.
Figure 7-1. Load Circuit
Table 7-1. Load Circuit Conditions
Parameter
VCCO
RL
CL
S1
VTP
N/A
N/A
Δt/Δv Input transition rise or fall rate
0.65 V – 3.6 V
1.1 V – 3.6 V
1 MΩ
2 kΩ
15 pF
15 pF
Open
Open
tpd
Propagation (delay) time
0.65 V – 0.95
V
20 kΩ
15 pF
Open
N/A
3 V – 3.6 V
1.65 V – 2.7 V
1.1 V – 1.6 V
2 kΩ
2 kΩ
2 kΩ
15 pF
15 pF
15 pF
2 × VCCO
2 × VCCO
2 × VCCO
0.3 V
0.15 V
0.1 V
ten, tdis Enable time, disable time
0.65 V – 0.95
V
20 kΩ
15 pF
2 × VCCO
0.1 V
3 V – 3.6 V
1.65 V – 2.7 V
1.1 V – 1.6 V
2 kΩ
2 kΩ
2 kΩ
15 pF
15 pF
15 pF
GND
GND
GND
0.3 V
0.15 V
0.1 V
ten, tdis Enable time, disable time
0.65 V – 0.95
V
20 kΩ
15 pF
GND
0.1 V
(1)
VCCI
(1)
VCCI
Input A, B
100 kHz
VCCI / 2
VCCI / 2
Input A, B
500 ps/V œ 10 ns/V
0 V
VOH
0 V
VOH
(2)
tpd
tpd
(2)
Output B, A
Ensure Monotonic
Rising and Falling Edge
(2)
VOL
Output B, A
VCCI / 2
VCCI / 2
(2)
VOL
1. VCCI is the supply pin associated with the input port.
2. VOH and VOL are typical output voltage levels that occur
with specified RL, CL, and S1
1. VCCI is the supply pin associated with the input port.
2. VOH and VOL are typical output voltage levels that occur
with specified RL, CL, and S1
Figure 7-3. Input Transition Rise or Fall Rate
Figure 7-2. Propagation Delay
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VCCA
VCCA / 2
DIR
VCCA / 2
GND
(1)
ten
(5)
VCCO
Output A(2)
Output A(3)
VCCO / 2
VOL + VTP
(6)
VOL
tdis
(6)
VOH
VOH - VTP
VCCO / 2
GND
(1)
ten
(5)
VCCO
Output B(2)
Output B(3)
VCCO / 2
VOL + VTP
(6)
VOL
tdis
(6)
VOH
VOH - VTP
VCCO / 2
GND
A. Illustrative purposes only. Enable Time is a calculation as described in the Application Information section.
B. Output waveform on the condition that input is driven to a valid Logic Low.
C. Output waveform on the condition that input is driven to a valid Logic High.
D. VCCI is the supply pin associated with the input port.
E. VCCO is the supply pin associated with the output port.
F. VOH and VOL are typical output voltage levels with specified RL, CL, and S1.
Figure 7-4. Enable Time And Disable Time
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8 Detailed Description
8.1 Overview
The SN74AXC2T45-Q1 is a 2-bit, dual-supply non-inverting bidirectional voltage level translation device. Ax pins
and the DIR pin are referenced to VCCA logic levels, and Bx pins are referenced to VCCB logic levels. The A port
is able to accept I/O voltages ranging from 0.65 V to 3.6 V, while the B port can accept I/O voltages from 0.65 V
to 3.6 V. A high on DIR enables data transmission from A to B and a low on DIR enables data transmission from
B to A. See Section 8.4 for a summary of the operation of the control logic.
8.2 Functional Block Diagram
VCCA
VCCB
DIR
A1
B1
B2
A2
8.3 Feature Description
8.3.1 Standard CMOS Inputs
Standard CMOS inputs are high impedance and are typically modeled as a resistor in parallel with the input
capacitance given in Section 6.5. The worst case resistance is calculated with the maximum input voltage, given
in Section 6.1, and the maximum input leakage current, given in the Section 6.5, using Ohm's law (R = V ÷ I).
Signals applied to the inputs need to have fast edge rates, as defined by Δt/Δv in Section 6.3 to avoid excessive
current consumption and oscillations. If a slow or noisy input signal is required, a device with a Schmitt-trigger
input should be used to condition the input signal prior to the standard CMOS input.
8.3.2 Balanced High-Drive CMOS Push-Pull Outputs
A balanced output allows the device to sink and source similar currents. The high drive capability of this device
creates fast edges into light loads so routing and load conditions should be considered to prevent ringing.
Additionally, the outputs of this device are capable of driving larger currents than the device can sustain without
being damaged. The electrical and thermal limits defined in Section 6.1 must be followed at all times.
8.3.3 Partial Power Down (Ioff)
The inputs and outputs for this device enter a high-impedance state when the device is powered down, inhibiting
current backflow into the device. The maximum leakage into or out of any input or output pin on the device is
specified by Ioff in Section 6.5.
8.3.4 VCC Isolation
The inputs and outputs for this device enter a high-impedance state when either supply is <100 mV.
8.3.5 Over-voltage Tolerant Inputs
Input signals to this device can be driven above the supply voltage so long as they remain below the maximum
input voltage value specified in Section 6.3.
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8.3.6 Glitch-Free Power Supply Sequencing
Either supply rail may be powered on or off in any order without producing a glitch on the I/Os (that is,
where the output erroneously transitions to VCC when it should be held low). Glitches of this nature can be
misinterpreted by a peripheral as a valid data bit, which could trigger a false device reset of the peripheral,
a false device configuration of the peripheral, or even a false data initialization by the peripheral. For more
information regarding the power up glitch performance of the AXC family of level translators, see the Glitch Free
Power Sequencing With AXC Level Translators application report.
8.3.7 Negative Clamping Diodes
The inputs and outputs to this device have negative clamping diodes as depicted in Figure 8-1.
CAUTION
Voltages beyond the values specified in the Absolute Maximum Ratings table can cause damage to
the device. The input negative voltage and output voltage ratings may be exceeded if the input and
output clamp-current ratings are observed.
VCCA VCCB
Device
Input or I/O
configured
as input
Level
Shifter
I/O configured
as output
-IIK
-IOK
GND
Figure 8-1. Electrical Placement of Clamping Diodes for Each Input and Output
8.3.8 Fully Configurable Dual-Rail Design
Both the VCCA and VCCB pins can be supplied at any voltage from 0.65 V to 3.6 V, making the device suitable for
translating between any of the voltage nodes (0.7 V, 0.8 V, 0.9 V, 1.2 V, 1.8 V, 2.5 V, and 3.3 V).
8.3.9 Supports High-Speed Translation
The SN74AXC2T45-Q1 device can support high data-rate applications. The translated signal data rate can be
up to 380 Mbps when the signal is translated from 1.8 V to 3.3 V.
8.4 Device Functional Modes
Table 8-1. Function Table(1)
CONTROL INPUT Port Status
OPERATION
DIR
A PORT
Output (Enabled)
Input (Hi-Z)
B PORT
Input (Hi-Z)
Output (Enabled)
L
B data to A bus
A data to B bus
H
(1) Input circuits of the data I/O's are always active.
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9 Application and Implementation
Note
Information in the following applications sections is not part of the TI component specification, and
TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining
suitability of components for their purposes. Customers should validate and test their design
implementation to confirm system functionality.
9.1 Application Information
The SN74AXC2T45-Q1 device can be used in level-translation applications for interfacing devices or systems
operating at different interface voltages with one another. The SN74AXC2T45-Q1 device is ideal for use in
applications where a push-pull driver is connected to the data I/Os. The maximum data rate can be up to 380
Mbps when device translates a signal from 1.8 V to 3.3 V.
Figure 9-1 shows one example application where the SN74AXC2T45-Q1 device is used to translate low voltage
error signals from a CPU to a higher voltage signal to properly drive the inputs of a system controller, thus
alerting the system of any CPU errors such as overheating or other catastrophic processor errors.
9.1.1 Enable Times
Calculate the enable times for the SN74AXC2T45-Q1 using the following formulas:
tA_en (DIR to A) = tdis (DIR to B) + tpd (B to A)
tB_en (DIR to A) = tdis (DIR to A) + tpd (A to B)
(1)
(2)
In a bidirectional application, these enable times provide the maximum delay time from the time the DIR bit is
switched until an output is expected. For example, if the SN74AXC2T45-Q1 initially is transmitting from A to B,
then the DIR bit is switched; the B port of the device must be disabled (tdis) before presenting it with an input.
After the B port has been disabled, an input signal applied to it appears on the corresponding A port after the
specified propagation delay (tpd). To avoid bus contention care should be taken to not apply an input signal prior
to the output port being disabled (tdis maximum).
9.2 Typical Application
2.5 V
0.7 V
0.1 µF
0.1 µF
System
Controller
CPU
VCCB
VCCA
CAT ERR
PROC HOT
GPIO1
B1
A1
A2
SN74AXC2T45
GND
GPIO2
B2
DIR
Figure 9-1. Processor Error Application
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9.2.1 Design Requirements
For this design example, use the parameters listed in Table 9-1.
Table 9-1. Design Parameters
DESIGN PARAMETERS
Input voltage range
EXAMPLE VALUES
0.65 V to 3.6 V
Output voltage range
0.65 V to 3.6 V
9.2.2 Detailed Design Procedure
To begin the design process, determine the following:
•
Input voltage range
– Use the supply voltage of the device that is driving the SN74AXC2T45-Q1 device to determine the input
voltage range. For a valid logic-high, the value must exceed the high-level input voltage (VIH) of the input
port. For a valid logic low the value must be less than the low-level input voltage (VIL) of the input port.
Output voltage range
•
– Use the supply voltage of the device that the SN74AXC2T45-Q1 device is driving to determine the output
voltage range.
9.2.3 Application Curve
Figure 9-2. Up Translation at 2.5 MHz (0.7 V to 3.3 V)
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10 Power Supply Recommendations
Always apply a ground reference to the GND pins first. This device is designed for glitch free power sequencing
without any supply sequencing requirements such as ramp order or ramp rate.
This device is designed with various power supply sequencing methods in mind to help prevent unintended
triggering of downstream devices. For more information regarding the power up glitch performance of the AXC
family of level translators, see the Glitch Free Power Sequencing With AXC Level Translators application report.
11 Layout
11.1 Layout Guidelines
To ensure reliability of the device, following common printed-circuit board layout guidelines are recommended:
•
Use bypass capacitors on the power supply pins and place them as close to the device as possible. A 0.1
µF capacitor is recommended, but transient performance can be improved by having both 1 µF and 0.1 µF
capacitors in parallel as bypass capacitors.
•
Use short trace lengths to avoid excessive loading.
11.2 Layout Example
Legend
Via to VCCA
Via to VCCB
A
B
G
Via to GND
Copper Traces
SN74AXC2T45DCU
0402
0.1µF
0402
0.1µF
G
G
A
B
VCCA
1
2
3
4
VCCB
8
7
6
5
PROC HOT
to Co ntroller
PROC HOT
fro m CPU
A1
A2
B1
CATERR
to Co ntroller
CATERR
fro m CPU
B2
GND
DIR
G
G
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12 Device and Documentation Support
12.1 Documentation Support
12.1.1 Related Documentation
For related documentation, see the following:
•
•
Texas Instruments, Implications of Slow or Floating CMOS Inputs application report
Texas Instruments, Power Sequencing for AXC Family of Devices application report
12.2 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on
Subscribe to updates to register and receive a weekly digest of any product information that has changed. For
change details, review the revision history included in any revised document.
12.3 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
12.4 Trademarks
TI E2E™ is a trademark of Texas Instruments.
All trademarks are the property of their respective owners.
12.5 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
12.6 Glossary
TI Glossary
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
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7-Oct-2021
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
PCAXC2T45QDCURQ1
ACTIVE
ACTIVE
VSSOP
VSSOP
DCU
DCU
8
8
3000
TBD
Call TI
Call TI
-40 to 125
-40 to 125
SN74AXC2T45QDCURQ1
3000 RoHS & Green
NIPDAU
Level-1-260C-UNLIM
2FZT
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
7-Oct-2021
OTHER QUALIFIED VERSIONS OF SN74AXC2T45-Q1 :
Catalog : SN74AXC2T45
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
26-Sep-2021
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
SN74AXC2T45QDCURQ1 VSSOP
DCU
8
3000
178.0
9.0
2.25
3.35
1.05
4.0
8.0
Q3
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
26-Sep-2021
*All dimensions are nominal
Device
Package Type Package Drawing Pins
VSSOP DCU
SPQ
Length (mm) Width (mm) Height (mm)
180.0 180.0 18.0
SN74AXC2T45QDCURQ1
8
3000
Pack Materials-Page 2
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IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD
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TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable
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Copyright © 2021, Texas Instruments Incorporated
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