SN74AXCH4T245 [TI]
4 位双电源总线收发器;型号: | SN74AXCH4T245 |
厂家: | TEXAS INSTRUMENTS |
描述: | 4 位双电源总线收发器 总线收发器 |
文件: | 总39页 (文件大小:988K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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SN74AXCH4T245
ZHCSJI7 –MARCH 2019
具有可配置电压转换、三态输出和总线保持输入的
SN74AXCH4T245 四位总线收发器
1 特性
有源总线保持电路会将未使用或未驱动的输入保持在有
效逻辑状态。不建议在总线保持电路上使用上拉或下拉
电阻器。如果 VCCA 或 VCCB 连上电源,则总线保持电
路分别在 A 或 B 输入端口上始终保持工作状态,与方
向控制或输出使能引脚的状态无关。
1
•
完全可配置的双电源轨设计可允许各个端口在
0.65V 至 3.6V 的电源电压范围内运行
•
总线保持数据输入消除了对外部上拉或下拉电阻器
的需求
•
•
•
•
工作温度范围 -40°C 至 +125°C
多向控制引脚,支持同步升降转换
无干扰电源定序
为了确保电平转换器 I/O 在加电或断电期间的高阻抗状
态,xOE 引脚应通过一个上拉电阻器连接至 VCCA
。
从 1.8V 转换到 3.3V 时,支持高达 380Mbps 的转
换速率
该器件完全 适用于 使用 Ioff 电流的局部掉电应用。当
器件掉电时,Ioff 保护电路可确保不从输入/输出或偏置
到特定电压的组合 I/O 获取或向其提供多余电流。
•
•
•
•
•
VCC 隔离特性
Ioff 支持局部断电模式运行
VCC 隔离特性可确保当 VCCA 或 VCCB 低于 100mV
兼容 AVC 系列电平转换器
时,所有 I/O 端口均禁用其输出并进入高阻抗状态。
闩锁性能超过 100mA,符合 JESD 78 II 类规范
静电放电 (ESD) 保护性能超过 JESD 22 规范要求
无干扰电源定序使电源轨能以任何顺序打开或关断,从
而提供强大的电源定序性能。
–
–
8000V 人体放电模型
1000V 充电器件模型
器件信息(1)
器件型号
封装
封装尺寸(标称值)
5.00mm x 4.40mm
2.60mm x 1.80mm
2 应用
SN74AXCH4T245PW TSSOP (16)
SN74AXCH4T245RSV UQFN (16)
•
•
•
•
•
企业与通信
工业
(1) 如需了解所有可用封装,请参阅产品说明书末尾的可订购产品
附录。
个人电子产品
无线基础设施
楼宇自动化
功能方框图
One of Two Transceiver Pairs
3 说明
VCCA
VCCB
SN74AXCH4T245 是一款使用两个独立可配置电源轨
的四位同相总线收发器。VCCA 和 VCCB 电源电压低至
0.65V 时,该器件可正常工作。A 端口用于跟踪
xDIR
xOE
V
CCA,该端口可支持 0.65V 至 3.6V 范围内的任何电
Bus-Hold
源电压。B 端口用于跟踪 VCCB,该端口可支持 0.65V
至 3.6V 范围内的任何电源电压。SN74AXCH4T245
器件与单电源系统兼容。
xB1
xB2
xA1
xA2
Bus-Hold
SN74AXCH4T245 器件旨在实现数据总线间的异步通
信,根据方向控制输入(1DIR 和 2DIR)的逻辑电
平,将数据从 A 总线传输至 B 总线,或将数据从 B 总
线传输至 A 总线。输出使能输入(1OE 和 2OE)可用
于禁用输出,从而有效隔离总线。所有控制引脚
(xDIR 和 xOE)以 VCCA 为基准。
Bus-Hold
Bus-Hold
Note: Bus-hold circuits are only present for data inputs, not control inputs
1
本文档旨在为方便起见,提供有关 TI 产品中文版本的信息,以确认产品的概要。 有关适用的官方英文版本的最新信息,请访问 www.ti.com,其内容始终优先。 TI 不保证翻译的准确
性和有效性。 在实际设计之前,请务必参考最新版本的英文版本。
English Data Sheet: SCES878
SN74AXCH4T245
ZHCSJI7 –MARCH 2019
www.ti.com.cn
目录
7.1 Load Circuit and Voltage Waveforms ..................... 19
Detailed Description ............................................ 21
8.1 Overview ................................................................. 21
8.2 Functional Block Diagram ....................................... 21
8.3 Feature Description................................................. 21
8.4 Device Functional Modes........................................ 23
Application and Implementation ........................ 24
9.1 Application Information............................................ 24
9.2 Typical Application ................................................. 24
1
2
3
4
5
6
特性.......................................................................... 1
8
9
应用.......................................................................... 1
说明.......................................................................... 1
修订历史记录 ........................................................... 2
Pin Configuration and Functions......................... 3
Specifications......................................................... 4
6.1 Absolute Maximum Ratings ...................................... 4
6.2 ESD Ratings.............................................................. 4
6.3 Recommended Operating Conditions....................... 5
6.4 Thermal Information.................................................. 5
6.5 Electrical Characteristics........................................... 6
6.6 Switching Characteristics, VCCA = 0.7 ± 0.05 V........ 8
6.7 Switching Characteristics, VCCA = 0.8 ± 0.04 V........ 9
6.8 Switching Characteristics, VCCA = 0.9 ± 0.045 V.... 10
6.9 Switching Characteristics, VCCA = 1.2 ± 0.1 V........ 11
6.10 Switching Characteristics, VCCA = 1.5 ± 0.1 V...... 12
6.11 Switching Characteristics, VCCA = 1.8 ± 0.15 V.... 13
6.12 Switching Characteristics, VCCA = 2.5 ± 0.2 V...... 14
6.13 Switching Characteristics, VCCA = 3.3 ± 0.3 V...... 15
6.14 Operating Characteristics: TA = 25°C ................... 16
6.15 Typical Characteristics.......................................... 18
Parameter Measurement Information ................ 19
10 Power Supply Recommendations ..................... 26
11 Layout................................................................... 26
11.1 Layout Guidelines ................................................. 26
11.2 Layout Example .................................................... 26
12 器件和文档支持 ..................................................... 27
12.1 相关文档ꢀ ........................................................... 27
12.2 接收文档更新通知 ................................................. 27
12.3 社区资源................................................................ 27
12.4 商标....................................................................... 27
12.5 静电放电警告......................................................... 27
12.6 术语表 ................................................................... 27
13 机械、封装和可订购信息....................................... 28
7
4 修订历史记录
日期
修订版本
说明
2019 年 3 月
*
初始发行版。
2
Copyright © 2019, Texas Instruments Incorporated
SN74AXCH4T245
www.ti.com.cn
ZHCSJI7 –MARCH 2019
5 Pin Configuration and Functions
PW Package
16-Pin TSSOP
Top View
RSV Package
16-Pin UQFN
Transparent Top View
VCCA
1DIR
2DIR
1A1
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
VCCB
1OE
2OE
1B1
1B2
2B1
2B2
GND
16 15 14 13
1
2
3
4
12
11
10
9
2B2
GND
GND
2A2
1OE
VCCB
1A2
VCCA
2A1
1DIR
2A2
GND
5
6
7
8
Pin Functions
PIN
NO.
TYPE
DESCRIPTION
NAME
PW
4
RSV
6
1A1
1A2
1B1
1B2
1DIR
I/O
I/O
I/O
I/O
I
Input/output 1A1. Referenced to VCCA
Input/output 1A2. Referenced to VCCA
Input/output 1B1. Referenced to VCCB
Input/output 1B2. Referenced to VCCB
Direction-control input for ‘1’ ports
.
.
.
.
5
7
13
12
2
15
14
4
Tri-state output-mode enable. Pull OE high to place ‘1’ outputs in tri-state
mode. Referenced to VCCA
1OE
15
1
I
.
2A1
2A2
2B1
2B2
2DIR
6
7
8
9
I/O
I/O
I/O
I/O
I
Input/output 2A1. Referenced to VCCA
Input/output 2A2. Referenced to VCCA
Input/output 2B1. Referenced to VCCB
Input/output 2B2. Referenced to VCCB
Direction-control input for ‘2’ ports
.
.
.
.
11
10
3
13
12
5
Tri-state output-mode enable. Pull OE high to place ‘2’ outputs in tri-state
2OE
14
16
I
mode. Referenced to VCCA
.
GND
VCCA
VCCB
8, 9
1
10, 11
—
—
—
Ground
3
2
A-port power supply voltage. 0.65 V ≤ VCCA ≤ 3.6 V
B-port power supply voltage. 0.65 V ≤ VCCB ≤ 3.6 V
16
Copyright © 2019, Texas Instruments Incorporated
3
SN74AXCH4T245
ZHCSJI7 –MARCH 2019
www.ti.com.cn
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
UNIT
MIN
MAX
S
VCCA Supply voltage A
VCCB Supply voltage B
–0.5
–0.5
–0.5
–0.5
–0.5
–0.5
–0.5
4.2
4.2
4.2
4.2
4.2
4.2
4.2
V
V
I/O Ports (A Port)
I/O Ports (B Port)
Control Inputs
A Port
VI
Input Voltage(2)
V
VO
VO
Voltage applied to any output in the high-impedance or power-off state(2)
Voltage applied to any output in the high or low state(2)(3)
V
V
B Port
A Port
–0.5 VCCA + 0.2
–0.5 VCCB + 0.2
–50
B Port
IIK
IOK
IO
Input clamp current
VI < 0
mA
mA
Output clamp current
VO < 0
–50
Continuous output current
Continuous current through VCC or GND
Junction Temperature
–50
50 mA
–100
100 mA
Tj
150
150
°C
°C
Tstg
Storage temperature
–65
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input voltage and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
(3) The output positive-voltage rating may be exceeded up to 4.2 V maximum if the output current rating is observed.
6.2 ESD Ratings
VALUE
±8000
±1000
UNIT
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
Charged device model (CDM), per JEDEC specification JESD22-C101(2)
V(ESD)
Electrostatic discharge
V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
4
Copyright © 2019, Texas Instruments Incorporated
SN74AXCH4T245
www.ti.com.cn
ZHCSJI7 –MARCH 2019
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)(1)(2)(3)
MIN
0.65
MAX UNIT
VCCA
VCCB
Supply voltage A
Supply voltage B
3.6
3.6
V
V
0.65
VCCI = 0.65 V - 0.75 V
VCCI = 0.76 V - 1 V
VCCI = 1.1 V - 1.95 V
VCCI = 2.3 V - 2.7 V
VCCI = 3 V - 3.6 V
VCCI x 0.70
VCCI x 0.70
VCCI x 0.65
1.6
Data Inputs
VCCI x 0.65
VCCA x 0.70
VCCA x 0.70
VCCA x 0.65
1.6
VIH
High-level input voltage
VCCA = 0.65 V - 0.75 V
VCCA = 0.76 V - 1 V
VCCA = 1.1 V - 1.95 V
VCCA = 2.3 V - 2.7 V
VCCA = 3 V - 3.6 V
VCCI = 0.65 V - 0.75 V
VCCI = 0.76 V - 1 V
VCCI = 1.1 V - 1.95 V
VCCI = 2.3 V - 2.7 V
VCCI = 3 V - 3.6 V
Control Inputs(xDIR, xOE)
Referenced to VCCA
VCCA x 0.65
VCCI x 0.30
VCCI x 0.30
VCCI x 0.35
0.7
Data Inputs
0.8
VIL
Low-level input voltage
V
VCCA = 0.65 V - 0.75 V
VCCA = 0.76 V - 1 V
VCCA = 1.1 V - 1.95 V
VCCA = 2.3 V - 2.7 V
VCCA = 3 V - 3.6 V
VCCA x 0.30
VCCA x 0.30
VCCA x 0.35
0.7
Control Inputs(xDIR, xOE)
Referenced to VCCA
0.8
(3)
VI
Input voltage
0
0
0
3.6
V
V
Active State
Tri-State
VCCO
VO
Output voltage
3.6
Δt/Δv(2) Input transition rise and fall time
10 ns/V
125 °C
TA Operating free-air temperature
–40
(1) VCCI is the VCC associated with the input port.
(2) VCCO is the VCC associated with the output port.
(3) All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, SCBA004.
6.4 Thermal Information
SN74AXCH4T245
THERMAL METRIC(1)
PW (TSSOP)
16 PINS
126.9
RSV (UQFN)
16 PINS
130.1
UNIT
RθJA
RθJC(top)
RθJB
ψJT
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
49.3
70.3
74.3
57.4
Junction-to-top characterization parameter
Junction-to-board characterization parameter
8.1
4.6
ψJB
73.4
55.8
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
Copyright © 2019, Texas Instruments Incorporated
5
SN74AXCH4T245
ZHCSJI7 –MARCH 2019
www.ti.com.cn
6.5 Electrical Characteristics
over operating free-air temperature range (unless otherwise noted)
(1)(2)
Operating free-air temperature (TA)
-40°C to 85°C -40°C to 125°C
PARAMETER
TEST CONDITIONS
VCCA
VCCB
UNIT
MIN TYP(3)
MAX
MIN TYP(3)
MAX
VCCO
– 0.1
VCCO
– 0.1
IOH = -100 µA
0.7 V - 3.6 V 0.7 V - 3.6 V
IOH = -50 µA
IOH = -200 µA
IOH = -500 µA
0.65 V
0.76 V
0.85 V
1.1 V
1.4 V
1.65 V
2.3 V
3 V
0.65 V
0.76 V
0.85 V
1.1 V
1.4 V
1.65 V
2.3 V
3 V
0.55
0.58
0.65
0.85
1.05
1.2
0.55
0.58
0.65
0.85
1.05
1.2
High-level
output
voltage
VOH
VI = VIH
V
IOH = -3 mA
IOH = -6 mA
IOH = -8 mA
IOH = -9 mA
IOH = -12 mA
IOL = 100 µA
IOL = 50 µA
IOL = 200 µA
IOL = 500 µA
VI = VIL IOL = 3 mA
IOL = 6 mA
1.75
2.3
1.75
2.3
0.7 V - 3.6 V 0.7 V - 3.6 V
0.1
0.1
0.1
0.1
0.65 V
0.76 V
0.85 V
1.1 V
1.4 V
1.65 V
2.3 V
3 V
0.65 V
0.76 V
0.85 V
1.1 V
1.4 V
1.65 V
2.3 V
3 V
0.18
0.2
0.18
0.2
Low-level
output
voltage
VOL
0.25
0.35
0.45
0.55
0.7
0.25
0.35
0.45
0.55
0.7
V
IOL = 8 mA
IOL = 9 mA
IOL = 12 mA
VI = 0.20 V
VI = 0.23 V
VI = 0.26 V
VI = 0.39 V
VI = 0.49 V
VI = 0.58 V
VI = 0.7 V
0.65 V
0.76 V
0.85 V
1.1 V
1.4 V
1.65 V
2.3 V
3 V
0.65 V
0.76 V
0.85 V
1.1 V
1.4 V
1.65 V
2.3 V
3 V
4
8
4
7
10
10
Bus-hold low
sustaining
current (Port
20
20
IBHL
µA
40
30
A or Port B)
(4)
55
45
90
80
VI = 0.8 V
145
–4
135
–4
VI = 0.20 V
VI = 0.23 V
VI = 0.26 V
VI = 0.39 V
VI = 0.49 V
VI = 0.58 V
VI = 0.7 V
0.65 V
0.76 V
0.85 V
1.1 V
1.4 V
1.65 V
2.3 V
3 V
0.65 V
0.76 V
0.85 V
1.1 V
1.4 V
1.65 V
2.3 V
3 V
–8
–7
Bus-hold
high
sustaining
–10
–20
–40
–55
–90
–145
–10
–20
–30
–45
–80
–135
IBHH
µA
current (Port
A or Port B)
(5)
VI = 0.8 V
(1) VCCI is the VCC associated with the input port.
(2) VCCO is the VCC associated with the output port.
(3) All typical data is taken at 25°C.
(4) The bus-hold circuit can sink at least the minimum low sustaining current at VIL max. IBHL should be measured after lowering VIN to GND
and then raising it to VIL max.
(5) The bus-hold circuit can source at least the minimum high sustaining current at VIH min. IBHH should be measured after raising VIN to
VCC and then lowering it to VIH min.
6
Copyright © 2019, Texas Instruments Incorporated
SN74AXCH4T245
www.ti.com.cn
ZHCSJI7 –MARCH 2019
Electrical Characteristics (continued)
over operating free-air temperature range (unless otherwise noted) (1)(2)
Operating free-air temperature (TA)
-40°C to 85°C -40°C to 125°C
PARAMETER
TEST CONDITIONS
VCCA
VCCB
UNIT
MIN TYP(3)
MAX
MIN TYP(3)
MAX
0.75 V
0.75 V
40
40
0.84 V
0.95 V
1.3 V
0.84 V
0.95 V
1.3 V
50
50
65
65
Bus-hold low
overdrive
IBHLO current (Port VI = 0 to VCC
105
105
µA
1.6 V
1.6 V
150
150
A or Port B)
(6)
1.95 V
2.7 V
1.95 V
2.7 V
205
205
335
335
3.6 V
3.6 V
480
480
0.75 V
0.84 V
0.95 V
1.3 V
0.75 V
0.84 V
0.95 V
1.3 V
–40
–40
–50
–50
Bus-hold
high
overdrive
–65
–65
–105
–150
–205
–335
–480
–105
–150
–205
–335
–480
IBHHO
VI = 0 to VCC
µA
current (Port
1.6 V
1.6 V
A or Port B)
(7)
1.95 V
2.7 V
1.95 V
2.7 V
3.6 V
3.6 V
Control inputs (xDIR,
xOE): VI = VCCA or GND
0.65 V- 3.6 V 0.65 V- 3.6 V
0.65 V- 3.6 V 0.65 V- 3.6 V
–0.5
–4
0.5
4
–1
–8
1
8
µA
µA
Input leakage
current
II
Data Inputs (xAx, xBx)
VI = VCCI or GND
A Port: VI or VO = 0 V -
3.6 V
0 V
0 V - 3.6 V
0 V
–8
8
–12
–12
12
12
Partial power
down current
Ioff
µA
B Port: VI or VO = 0 V -
3.6 V
0 V - 3.6 V
–8
8
A or B Port
VI = VCCI or GND, VO
VCCO or GND, OE = VIH
Tri-state
output
current
IOZ
3.6 V
3.6 V
–4
–2
4
–8
8
µA
µA
=
(8)
0.65 V- 3.6 V 0.65 V- 3.6 V
13
26
VI =
VCCA supply
current
ICCA
VCCI or IO = 0
GND
0 V
3.6 V
0 V
–12
3.6 V
8
13
8
16
26
16
0.65 V- 3.6 V 0.65 V- 3.6 V
VI =
VCCB supply
current
ICCB
VCCI or IO = 0
GND
0 V
3.6 V
0 V
µA
3.6 V
–2
–12
Combined
supply
current
VI =
ICCA
ICCB
+
VCCI or IO = 0
GND
0.65 V- 3.6 V 0.65 V- 3.6 V
20
40
µA
pF
pF
Control Input
Capacitance
Ci
VI = 3.3 V or GND
3.3 V
3.3 V
3.3 V
4.5
7.4
4.5
7.4
OE = VCCA, VO = 1.65V
DC +1 MHz -16 dBm sine 3.3 V
wave
Data I/O
Capacitance
Cio
(6) An external driver must source at least IBHLO to switch this node from low to high.
(7) An external driver must sink at least IBHHO to switch this node from high to low.
(8) For I/O ports, the parameter IOZ includes the input leakage current.
Copyright © 2019, Texas Instruments Incorporated
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ZHCSJI7 –MARCH 2019
www.ti.com.cn
6.6 Switching Characteristics, VCCA = 0.7 ± 0.05 V
See Figure 5 and Table 1 for test circuit and loading. See Figure 6, Figure 7, and Figure 8 for measurement waveforms.
B-Port Supply Voltage (VCCB
)
PARAMETER
FROM
TO
Test Conditions 0.7 ± 0.05 V 0.8 ± 0.04 V 0.9 ± 0.045 V 1.2 ± 0.1 V
MIN MAX MIN MAX MIN MAX MIN MAX
1.5 ± 0.1 V
MIN MAX
1.8 ± 0.15 V
MIN MAX
2.5 ± 0.2 V
MIN MAX
3.3 ± 0.3 V
MIN MAX
UNIT
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
161
161
161
161
159
159
158
158
243
243
292
292
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
109
109
134
134
159
159
122
122
243
243
192
192
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
78
78
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
41
41
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
38
38
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
41
41
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
68
68
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
181
181
10
A
B
B
A
A
B
A
B
Propagation
delay
tpd
ns
112
112
159
159
102
102
243
243
134
134
59
22
15
11
59
22
16
11
10
159
159
55
159
159
54
159
159
56
159
159
65
159
159
125
125
243
243
148
148
OE
OE
OE
OE
tdis Disable time
ns
ns
55
54
56
65
243
243
87
243
243
73
243
243
69
243
243
70
ten Enable time
88
74
69
70
8
Copyright © 2019, Texas Instruments Incorporated
SN74AXCH4T245
www.ti.com.cn
ZHCSJI7 –MARCH 2019
6.7 Switching Characteristics, VCCA = 0.8 ± 0.04 V
See Figure 5 and Table 1 for test circuit and loading. See Figure 6, Figure 7, and Figure 8 for measurement waveforms.
B-Port Supply Voltage (VCCB
)
PARAMETER
FROM
TO
Test Conditions 0.7 ± 0.05 V 0.8 ± 0.04 V 0.9 ± 0.045 V 1.2 ± 0.1 V
MIN MAX MIN MAX MIN MAX MIN MAX
1.5 ± 0.1 V
MIN MAX
1.8 ± 0.15 V
MIN MAX
2.5 ± 0.2 V
MIN MAX
3.3 ± 0.3 V
MIN MAX
UNIT
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
134
134
109
109
110
110
147
147
143
143
253
253
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
90
90
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
64
64
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
30
30
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
24
24
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
23
23
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
25
25
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
34
34
A
B
B
A
A
B
A
B
Propagation
delay
tpd
ns
90
72
39
22
15
11
10
90
72
39
22
15
11
10
110
110
111
111
143
143
164
164
110
110
91
110
110
42
110
110
36
110
110
35
110
110
37
110
110
47
OE
OE
OE
OE
tdis Disable time
ns
ns
91
42
36
35
37
47
143
143
117
117
143
143
71
143
143
57
143
143
52
143
143
47
143
143
53
ten Enable time
73
58
53
48
53
Copyright © 2019, Texas Instruments Incorporated
9
SN74AXCH4T245
ZHCSJI7 –MARCH 2019
www.ti.com.cn
6.8 Switching Characteristics, VCCA = 0.9 ± 0.045 V
See Figure 5 and Table 1 for test circuit and loading. See Figure 6, Figure 7, and Figure 8 for measurement waveforms.
B-Port Supply Voltage (VCCB
)
PARAMETER
FROM
TO
Test Conditions 0.7 ± 0.05 V 0.8 ± 0.04 V 0.9 ± 0.045 V 1.2 ± 0.1 V
MIN MAX MIN MAX MIN MAX MIN MAX
1.5 ± 0.1 V
MIN MAX
1.8 ± 0.15 V
MIN MAX
2.5 ± 0.2 V
MIN MAX
3.3 ± 0.3 V
MIN MAX
UNIT
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
112
112
78
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
72
72
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
54
54
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
24
24
27
27
81
82
36
37
84
84
63
65
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
19
19
19
19
81
82
29
30
84
84
48
50
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
17
17
14
14
81
82
27
28
84
84
43
45
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
16
16
10
10
81
82
26
26
84
84
37
39
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
19
19
10
10
81
82
30
30
84
84
38
39
A
B
B
A
A
B
A
B
Propagation
delay
tpd
ns
64
54
78
64
54
81
81
81
OE
OE
OE
OE
82
82
82
tdis Disable time
ns
ns
141
141
84
106
106
84
85
85
84
84
84
84
ten Enable time
229
229
149
149
107
107
10
Copyright © 2019, Texas Instruments Incorporated
SN74AXCH4T245
www.ti.com.cn
ZHCSJI7 –MARCH 2019
6.9 Switching Characteristics, VCCA = 1.2 ± 0.1 V
See Figure 5 and Table 1 for test circuit and loading. See Figure 6, Figure 7, and Figure 8 for measurement waveforms.
B-Port Supply Voltage (VCCB
)
PARAMETER
FROM
TO
Test Conditions 0.7 ± 0.05 V 0.8 ± 0.04 V 0.9 ± 0.045 V 1.2 ± 0.1 V
MIN MAX MIN MAX MIN MAX MIN MAX
1.5 ± 0.1 V
MIN MAX
1.8 ± 0.15 V
MIN MAX
2.5 ± 0.2 V
MIN MAX
3.3 ± 0.3 V
MIN MAX
UNIT
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
60
60
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
39
39
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
27
27
24
24
28
30
79
80
37
39
77
78
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
15
15
15
15
28
30
29
31
37
39
51
53
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
11
12
11
11
28
30
22
23
37
39
37
39
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
10
10
9
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
8
9
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
9
9
A
B
B
A
A
B
A
B
Propagation
delay
tpd
ns
41
30
7
7
41
30
9
7
7
28
28
28
30
20
21
37
39
31
34
28
30
17
18
37
39
25
27
28
30
17
18
37
39
23
24
OE
OE
OE
OE
30
30
tdis Disable time
ns
ns
133
134
37
100
100
37
39
39
ten Enable time
168
168
109
109
Copyright © 2019, Texas Instruments Incorporated
11
SN74AXCH4T245
ZHCSJI7 –MARCH 2019
www.ti.com.cn
6.10 Switching Characteristics, VCCA = 1.5 ± 0.1 V
See Figure 5 and Table 1 for test circuit and loading. See Figure 6, Figure 7, and Figure 8 for measurement waveforms.
B-Port Supply Voltage (VCCB
)
PARAMETER
FROM
TO
Test Conditions 0.7 ± 0.05 V 0.8 ± 0.04 V 0.9 ± 0.045 V 1.2 ± 0.1 V
MIN MAX MIN MAX MIN MAX MIN MAX
1.5 ± 0.1 V
MIN MAX
1.8 ± 0.15 V
MIN MAX
2.5 ± 0.2 V
MIN MAX
3.3 ± 0.3 V
MIN MAX
UNIT
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
22
22
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
22
22
24
24
19
21
98
98
23
25
84
84
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
19
19
19
19
19
21
78
78
23
25
67
68
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
11
11
11
11
19
21
27
29
23
25
43
45
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
9
9
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
8
8
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
7
7
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
6
6
A
B
B
A
A
B
A
B
Propagation
delay
tpd
ns
38
9
8
5
5
38
9
8
6
5
19
19
21
20
21
23
25
31
34
19
21
18
19
23
25
26
29
19
21
14
15
23
25
20
22
19
21
14
15
23
25
18
19
OE
OE
OE
OE
21
tdis Disable time
ns
ns
131
132
23
25
ten Enable time
109
109
12
Copyright © 2019, Texas Instruments Incorporated
SN74AXCH4T245
www.ti.com.cn
ZHCSJI7 –MARCH 2019
6.11 Switching Characteristics, VCCA = 1.8 ± 0.15 V
See Figure 5 and Table 1 for test circuit and loading. See Figure 6, Figure 7, and Figure 8 for measurement waveforms.
B-Port Supply Voltage (VCCB
)
PARAMETER
FROM
TO
Test Conditions 0.7 ± 0.05 V 0.8 ± 0.04 V 0.9 ± 0.045 V 1.2 ± 0.1 V
MIN MAX MIN MAX MIN MAX MIN MAX
1.5 ± 0.1 V
MIN MAX
1.8 ± 0.15 V
MIN MAX
2.5 ± 0.2 V
MIN MAX
3.3 ± 0.3 V
MIN MAX
UNIT
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
15
16
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
15
15
23
23
17
18
98
98
17
19
73
75
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
14
14
17
17
17
18
77
77
17
19
60
62
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
9
9
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
8
8
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
7
7
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
6
6
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
6
6
A
B
B
A
A
B
A
B
Propagation
delay
tpd
ns
41
10
10
17
18
27
28
17
19
38
41
8
7
5
4
41
8
7
5
4
17
17
18
19
21
17
19
28
31
17
18
17
18
17
19
24
26
17
18
13
14
17
19
19
20
17
18
13
14
17
19
16
18
OE
OE
OE
OE
18
tdis Disable time
ns
ns
129
131
17
19
ten Enable time
102
102
Copyright © 2019, Texas Instruments Incorporated
13
SN74AXCH4T245
ZHCSJI7 –MARCH 2019
www.ti.com.cn
6.12 Switching Characteristics, VCCA = 2.5 ± 0.2 V
See Figure 5 and Table 1 for test circuit and loading. See Figure 6, Figure 7, and Figure 8 for measurement waveforms.
B-Port Supply Voltage (VCCB
)
PARAMETER
FROM
TO
Test Conditions 0.7 ± 0.05 V 0.8 ± 0.04 V 0.9 ± 0.045 V 1.2 ± 0.1 V
MIN MAX MIN MAX MIN MAX MIN MAX
1.5 ± 0.1 V
MIN MAX
1.8 ± 0.15 V
MIN MAX
2.5 ± 0.2 V
MIN MAX
3.3 ± 0.3 V
MIN MAX
UNIT
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
11
11
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
11
11
25
25
12
13
96
96
12
13
69
70
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
10
10
17
17
12
13
76
77
12
13
54
56
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
7
7
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
6
6
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
5
5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
5
5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
5
5
A
B
B
A
A
B
A
B
Propagation
delay
tpd
ns
68
8
7
6
5
4
68
9
7
6
5
4
12
12
13
26
27
12
13
33
36
12
13
18
20
12
13
24
26
12
13
16
17
12
13
20
22
12
13
12
13
12
13
16
18
12
13
12
13
12
13
14
15
OE
OE
OE
OE
13
tdis Disable time
ns
ns
128
129
12
13
ten Enable time
120
120
14
Copyright © 2019, Texas Instruments Incorporated
SN74AXCH4T245
www.ti.com.cn
ZHCSJI7 –MARCH 2019
6.13 Switching Characteristics, VCCA = 3.3 ± 0.3 V
See Figure 5 and Table 1 for test circuit and loading. See Figure 6, Figure 7, and Figure 8 for measurement waveforms.
B-Port Supply Voltage (VCCB
)
PARAMETER
FROM
TO
Test Condtions 0.7 ± 0.05 V 0.8 ± 0.04 V 0.9 ± 0.045 V 1.2 ± 0.1 V
MIN MAX MIN MAX MIN MAX MIN MAX
1.5 ± 0.1 V
MIN MAX
1.8 ± 0.15 V
MIN MAX
2.5 ± 0.2 V
MIN MAX
3.3 ± 0.3 V
MIN MAX
UNIT
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
-40°C to 85°C
-40°C to 125°C
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
10
10
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
10
10
34
34
11
12
96
97
9
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
10
10
19
19
11
12
76
77
9
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
7
7
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
5
5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
5
5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
5
5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
4
4
A
B
B
A
A
B
A
B
Propagation
delay
tpd
ns
182
182
11
9
6
5
5
4
9
6
6
5
4
11
12
26
27
9
11
12
18
19
9
11
12
16
17
9
11
12
12
13
9
11
12
11
12
9
OE
OE
OE
OE
12
tdis Disable time
ns
ns
142
142
9
11
11
82
82
11
57
58
11
33
35
11
22
24
11
18
20
11
14
16
11
13
14
ten Enable time
194
194
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MAX UNIT
6.14 Operating Characteristics: TA = 25°C
PARAMETER
TEST CONDITIONS
VCCA
0.7 V
VCCB
0.7 V
MIN
TYP
2.2
0.8 V
0.9 V
1.2 V
1.5 V
1.8 V
2.5 V
3.3 V
0.7 V
0.8 V
0.9 V
1.2 V
1.5 V
1.8 V
2.5 V
3.3 V
0.7 V
0.8 V
0.9 V
1.2 V
1.5 V
1.8 V
2.5 V
3.3 V
0.7 V
0.8 V
0.9 V
1.2 V
1.5 V
1.8 V
2.5 V
3.3 V
0.8 V
0.9 V
1.2 V
1.5 V
1.8 V
2.5 V
3.3 V
0.7 V
0.8 V
0.9 V
1.2 V
1.5 V
1.8 V
2.5 V
3.3 V
0.7 V
0.8 V
0.9 V
1.2 V
1.5 V
1.8 V
2.5 V
3.3 V
0.7 V
0.8 V
0.9 V
1.2 V
1.5 V
1.8 V
2.5 V
3.3 V
2.3
2.3
Power Dissipation Capacitance
per transceiver (A to B: outputs
enabled)
2.3
CL = 0, RL = Open f = 1
MHz, tr = tf = 1 ns
pF
pF
pF
pF
2.2
2.2
2.5
2.6
1.5
1.7
1.7
Power Dissipation Capacitance
per transceiver (A to B: outputs
disabled)
1.7
CL = 0, RL = Open f = 1
MHz, tr = tf = 1 ns
1.5
1.5
1.8
2.1
CpdA
12.6
12.4
12.4
12.8
13.3
14.6
18.0
21.1
1.1
Power Dissipation Capacitance
per transceiver (B to A: outputs
enabled)
CL = 0, RL = Open f = 1
MHz, tr = tf = 1 ns
1.1
1.0
Power Dissipation Capacitance
per transceiver (B to A: outputs
disabled)
1.0
CL = 0, RL = Open f = 1
MHz, tr = tf = 1 ns
1.0
0.9
0.9
0.9
16
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Operating Characteristics: TA = 25°C (continued)
PARAMETER
TEST CONDITIONS
VCCA
0.7 V
VCCB
0.7 V
MIN
TYP
MAX UNIT
12.6
12.4
12.4
12.8
13.3
14.6
17.8
21.0
1.1
0.8 V
0.9 V
1.2 V
1.5 V
1.8 V
2.5 V
3.3 V
0.7 V
0.8 V
0.9 V
1.2 V
1.5 V
1.8 V
2.5 V
3.3 V
0.7 V
0.8 V
0.9 V
1.2 V
1.5 V
1.8 V
2.5 V
3.3 V
0.7 V
0.8 V
0.9 V
1.2 V
1.5 V
1.8 V
2.5 V
3.3 V
0.8 V
0.9 V
1.2 V
1.5 V
1.8 V
2.5 V
3.3 V
0.7 V
0.8 V
0.9 V
1.2 V
1.5 V
1.8 V
2.5 V
3.3 V
0.7 V
0.8 V
0.9 V
1.2 V
1.5 V
1.8 V
2.5 V
3.3 V
0.7 V
0.8 V
0.9 V
1.2 V
1.5 V
1.8 V
2.5 V
3.3 V
Power Dissipation Capacitance
per transceiver (A to B: outputs
enabled)
CL = 0, RL = Open f = 1
MHz, tr = tf = 1 ns
pF
1.1
1.0
Power Dissipation Capacitance
per transceiver (A to B: outputs
disabled)
1.0
CL = 0, RL = Open f = 1
MHz, tr = tf = 1 ns
pF
pF
pF
1.0
0.9
0.9
0.9
CpdB
2.2
2.2
2.2
Power Dissipation Capacitance
per transceiver (B to A: outputs
enabled)
2.0
CL = 0, RL = Open f = 1
MHz, tr = tf = 1 ns
2.0
1.9
2.0
2.6
1.6
1.5
1.6
Power Dissipation Capacitance
per transceiver (B to A: outputs
disabled)
1.4
CL = 0, RL = Open f = 1
MHz, tr = tf = 1 ns
1.3
1.2
1.4
1.9
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6.15 Typical Characteristics
3.4
3.2
3
1.25
1.2
VCC = 1.8V
VCC = 2.5V
VCC = 3.3V
1.15
1.1
1.05
1
2.8
2.6
2.4
2.2
2
0.95
0.9
0.85
0.8
0.75
0.7
1.8
1.6
1.4
0.65
0.6
VCC = 0.7V
VCC = 1.2V
0.55
0
2
4
6
8
10
12
14
16
18
20
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
IOH (mA)
IOH (mA)
D001
D001
图 1. Typical (TA=25°C) Output High Voltage (VOH) vs Source
Current (IOH
图 2. Typical (TA=25°C) Output High Voltage (VOH) vs Source
Current (IOH
)
)
700
650
600
550
500
450
400
350
300
250
200
150
100
50
220
200
180
160
140
120
100
80
60
40
VCC = 1.8V
VCC = 2.5V
VCC = 3.3V
VCC = 0.7V
VCC = 1.2V
20
0
-50
0
0
2
4
6
8
10
12
14
16
18
20
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
IOL (mA)
IOL (mA)
D001
D001
图 3. Typical (TA=25°C) Output High Voltage (VOL) vs Sink
Current (IOL
图 4. Typical (TA=25°C) Output High Voltage (VOL) vs Sink
Current (IOL
)
)
18
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7 Parameter Measurement Information
7.1 Load Circuit and Voltage Waveforms
Unless otherwise noted, all input pulses are supplied by generators having the following characteristics:
•
•
•
f = 1 MHz
ZO = 50 Ω
dv/dt ≤ 1 ns/V
Measurement Point
2 x VCCO
Open
S1
RL
Output Pin
Under Test
GND
(1)
CL
RL
(1) CL includes probe and jig capacitance.
图 5. Load Circuit
表 1. Load Circuit Conditions
Parameter
VCCO
RL
CL
S1
VTP
N/A
N/A
Δt/Δv Input transition rise or fall rate
0.65 V – 3.6 V
1.1 V – 3.6 V
1 MΩ
2 kΩ
15 pF
15 pF
Open
Open
tpd Propagation (delay) time
0.65 V – 0.95
V
20 kΩ
15 pF
Open
N/A
3 V – 3.6 V
1.65 V – 2.7 V
1.1 V – 1.6 V
2 kΩ
2 kΩ
2 kΩ
15 pF
15 pF
15 pF
2 × VCCO
2 × VCCO
2 × VCCO
0.3 V
0.15 V
0.1 V
ten, tdis Enable time, disable time
0.65 V – 0.95
V
20 kΩ
15 pF
2 × VCCO
0.1 V
3 V – 3.6 V
1.65 V – 2.7 V
1.1 V – 1.6 V
2 kΩ
2 kΩ
2 kΩ
15 pF
15 pF
15 pF
GND
GND
GND
0.3 V
0.15 V
0.1 V
ten, tdis Enable time, disable time
0.65 V – 0.95
V
20 kΩ
15 pF
GND
0.1 V
(1)
VCCI
(1)
VCCI
Input A, B
100 kHz
VCCI / 2
VCCI / 2
Input A, B
500 ps/V œ 10 ns/V
0 V
VOH
0 V
VOH
(2)
tpd
tpd
(2)
Output B, A
Ensure Monotonic
Rising and Falling Edge
(2)
Output B, A
VCCI / 2
VCCI / 2
VOL
(2)
VOL
1. VCCI is the supply pin associated with the input port.
2. VOH and VOL are typical output voltage levels that occur with
specified RL, CL, and S1
1. VCCI is the supply pin associated with the input port.
2. VOH and VOL are typical output voltage levels that occur with
specified RL, CL, and S1
图 7. Input Transition Rise or Fall Rate
图 6. Propagation Delay
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VCCA
GND
OE
VCCA / 2
VCCA / 2
tdis
ten
(3)
VCCO
Output(1)
Output(2)
VCCO / 2
VOL + VTP
(4)
VOL
(4)
VOH
VOH - VTP
VCCO / 2
GND
(1) Output waveform on the condition that input is driven to a valid Logic Low.
(2) Output waveform on the condition that input is driven to a valid Logic High.
(3) VCCO is the supply pin associated with the output port.
(4) VOH and VOL are typical output voltage levels with specified RL, CL, and S1.
图 8. Enable Time and Disable Time
20
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8 Detailed Description
8.1 Overview
The SN74AXCH4T245 is a 4-bit, dual-supply noninverting bidirectional voltage level translation device with bus-
hold inputs. xAx pins and control pins (1DIR, 2DIR, 1OE, and 2OE) are reference to VCCA logic levels, and xBx
pins are referenced to VCCB logic levels. The A port is able to accept I/O voltages ranging from 0.65 V to 3.6 V,
while the B port can accept I/O voltages from 0.65 V to 3.6 V. A high on DIR allows data transmission from A to
B and a low on DIR allows data transmission from B to A when OE is set to low. When OE is set to high, both
xAx and xBx pins are in the high-impedance state. See Device Functional Modes for a summary of the operation
of the control logic.
8.2 Functional Block Diagram
One of Two Transceiver Pairs
VCCA
VCCB
xDIR
xOE
Bus-Hold
xB1
xB2
xA1
xA2
Bus-Hold
Bus-Hold
Bus-Hold
Note: Bus-hold circuits are only present for data inputs, not control inputs
8.3 Feature Description
8.3.1 Standard CMOS Inputs
Standard CMOS inputs are high impedance and are typically modeled as a resistor in parallel with the input
capacitance given in the Electrical Characteristics. The worst case resistance is calculated with the maximum
input voltage, given in the Absolute Maximum Ratings, and the maximum input leakage current, given in the
Electrical Characteristics, using Ohm's law (R = V ÷ I).
Signals applied to the inputs need to have fast edge rates, as defined by Δt/Δv in Recommended Operating
Conditions to avoid excessive current consumption and oscillations. If a slow or noisy input signal is required, a
device with a Schmitt-trigger input should be used to condition the input signal prior to the standard CMOS input.
8.3.2 Balanced High-Drive CMOS Push-Pull Outputs
A balanced output allows the device to sink and source similar currents. The high drive capability of this device
creates fast edges into light loads so routing and load conditions should be considered to prevent ringing.
Additionally, the outputs of this device are capable of driving larger currents than the device can sustain without
being damaged. The electrical and thermal limits defined in the Absolute Maximum Ratings must be followed at
all times.
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Feature Description (接下页)
8.3.3 Partial Power Down (Ioff
)
The inputs and outputs for this device enter a high-impedance state when the device is powered down, inhibiting
current backflow into the device. The maximum leakage into or out of any input or output pin on the device is
specified by Ioff in the Electrical Characteristics.
8.3.4 VCC Isolation
The inputs and outputs for this device enter a high-impedance state when either supply is <100mV.
8.3.5 Over-voltage Tolerant Inputs
Input signals to this device can be driven above the supply voltage so long as they remain below the maximum
input voltage value specified in the Recommended Operating Conditions.
8.3.6 Glitch-free Power Supply Sequencing
Either supply rail may be powered on or off in any order without producing a glitch on the I/Os (that is, where the
output erroneously transitions to VCC when it should be held low). Glitches of this nature can be misinterpreted
by a peripheral as a valid data bit, which could trigger a false device reset of the peripheral, a false device
configuration of the peripheral, or even a false data initialization by the peripheral. For more information
regarding the power up glitch performance of the AXC family of level translators, see the Glitch Free Power
Sequencing With AXC Level Translators application report
8.3.7 Negative Clamping Diodes
The inputs and outputs to this device have negative clamping diodes as depicted in 图 9.
CAUTION
Voltages beyond the values specified in the Absolute Maximum Ratings table can
cause damage to the device. The input negative-voltage and output voltage ratings
may be exceeded if the input and output clamp-current ratings are observed.
VCC
Device
Input
Output
Logic
GND
-IIK
-IOK
图 9. Electrical Placement of Clamping Diodes for Each Input and Output
8.3.8 Fully Configurable Dual-Rail Design
Both the VCCA and VCCB pins can be supplied at any voltage from 0.65 V to 3.6 V, making the device suitable for
translating between any of the voltage nodes (0.7 V, 0.8 V, 0.9 V, 1.2 V, 1.8 V, 2.5 V and 3.3 V).
8.3.9 Supports High-Speed Translation
The SN74AXCH4T245 device can support high data-rate applications. The translated signal data rate can be up
to 380 Mbps when the signal is translated from 1.8 V to 3.3 V.
22
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Feature Description (接下页)
8.3.10 Bus-Hold Data Inputs
Each data input on this device includes a weak latch that maintains a valid logic level on the input. The state of
these latches is unknown at startup and remains unknown until the input has been forced to a valid high or low
state. After data has been sent through a channel, the latch then maintains the previous state on the input if the
line is left floating. It is not recommended to use pull-up or pull-down resistors together with a bus-hold input, as
it may cause undefined inputs to occur which leads to excessive current consumption.
Bus-hold data inputs prevent floating inputs on this device. The Implications of Slow or Floating CMOS Inputs
application report explains the problems associated with leaving CMOS inputs floating.
These latches remain active at all times, independent of all control signals such as direction control or output
enable.
The Bus-Hold Circuit application report has additional details regarding bus-hold inputs.
Input
Logic
Output
Bus-Hold Latch
图 10. Simplified Schematic For Device With Bus-Hold Data Inputs
8.4 Device Functional Modes
表 2. Function Table
(Each 2-Bit Section)(1)(2)
CONTROL INPUTS
Port Status
OPERATION
OE
L
DIR
L
A PORT
Output (Enabled)
Input (Hi-Z)
B PORT
Input (Hi-Z)
B data to A bus
A data to B bus
Isolation
L
H
Output (Enabled)
Input (Hi-Z)
H
X
Input (Hi-Z)
(1) Input circuits of the data I/Os are always active.
(2) Bus-hold circuits of the data I/Os are always active, independent of the state of the control inputs.
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9 Application and Implementation
注
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The SN74AXCH4T245 device can be used in level-translation applications for interfacing devices or systems
operating at different interface voltages with one another. The SN74AXCH4T245 device is ideal for use in
applications where a push-pull driver is connected to the data I/Os. The max data rate can be up to 380 Mbps
when device translates a signal from 1.8 V to 3.3 V.
One example application is shown in 图 11, where the SN74AXCH4T245 device is used to translate a low
voltage UART signal from an SoC to a higher voltage signal which properly drive the inputs of the bluetooth
module, and vice versa.
9.2 Typical Application
Pullup Resistors keep device disabled
during power up. OE inputs may also
be tied to GND to keep device enabled
0.7 V
3.3 V
0.1 µF
0.1 µF
VCCA
VCCB
1DIR
2DIR
1OE
GPIO1
Bluetooth
Module
GPIO2
TX
SN74AXCH4T245
SoC
2OE
1A1
1A2
2A1
2A2
RX
1B1
CTS
TX
RTS
RX
1B2
2B1
2B2
RTS
CTS
GND
图 11. UART Interface Application
9.2.1 Design Requirements
For this design example, use the parameters listed in 表 3.
表 3. Design Parameters
DESIGN PARAMETERS
Input voltage range
EXAMPLE VALUES
0.65 V to 3.6 V
Output voltage range
0.65 V to 3.6 V
24
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9.2.2 Detailed Design Procedure
To begin the design process, determine the following:
•
Input voltage range
–
Use the supply voltage of the device that is driving the SN74AXCH4T245 device to determine the input
voltage range. For a valid logic-high, the value must exceed the high-level input voltage (VIH) of the input
port. For a valid logic low the value must be less than the low-level input voltage (VIL) of the input port.
•
Output voltage range
–
Use the supply voltage of the device that the SN74AXCH4T245 device is driving to determine the output
voltage range.
9.2.3 Application Curve
图 12. Up Translation at 2.5 MHz (0.7 V to 3.3 V)
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10 Power Supply Recommendations
Always apply a ground reference to the GND pins first. This device is designed for glitch free power sequencing
without any supply sequencing requirements such as ramp order or ramp rate.
This device was designed with various power supply sequencing methods in mind to help prevent unintended
triggering of downstream devices. For more information regarding the power up glitch performance of the AXC
family of level translators, see the Glitch Free Power Sequencing With AXC Level Translators application report
11 Layout
11.1 Layout Guidelines
To ensure reliability of the device, following common printed-circuit board layout guidelines are recommended:
•
•
•
Use bypass capacitors on the power supply pins and place them as close to the device as possible.
Use short trace lengths to avoid excessive loading.
Do not use pullup or pulldown resistors on data inputs for devices with bus-hold circuits.
11.2 Layout Example
Legend
Via to VCCA
Via to VCCB
A
B
G
Via to GND
Copper Traces
SN74AXCH4T245PW
0.1µF
0.1µF
A
G
B
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
VCCA
1DIR
2DIR
1A1
VCCB
1OE
2OE
1B1
1B2
2B1
2B2
GND
RX to Module
TX from SoC
RTS from SoC
RX to SoC
G
G
CTS to Module
TX from Module
RTS from Module
1A2
2A1
CTS to SoC
2A2
GND
G
G
26
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12 器件和文档支持
12.1 相关文档ꢀ
请参阅如下相关文档:
德州仪器 (TI),《慢速或浮点 CMOS 输入的影响》应用报告
德州仪器 (TI),《AXC 系列器件电源定序》 应用报告
德州仪器 (TI),《利用总线保持电路避免浮点输入系统注意事项》应用报告
12.2 接收文档更新通知
要接收文档更新通知,请导航至 TI.com.cn 上的器件产品文件夹。单击右上角的通知我 进行注册,即可每周接收产
品信息更改摘要。有关更改的详细信息,请查看任何已修订文档中包含的修订历史记录。
12.3 社区资源
下列链接提供到 TI 社区资源的连接。链接的内容由各个分销商“按照原样”提供。这些内容并不构成 TI 技术规范,
并且不一定反映 TI 的观点;请参阅 TI 的 《使用条款》。
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
12.4 商标
E2E is a trademark of Texas Instruments.
12.5 静电放电警告
ESD 可能会损坏该集成电路。德州仪器 (TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理措施和安装程序 , 可
能会损坏集成电路。
ESD 的损坏小至导致微小的性能降级 , 大至整个器件故障。 精密的集成电路可能更容易受到损坏 , 这是因为非常细微的参数更改都可
能会导致器件与其发布的规格不相符。
12.6 术语表
SLYZ022 — TI 术语表。
这份术语表列出并解释术语、缩写和定义。
版权 © 2019, Texas Instruments Incorporated
27
SN74AXCH4T245
ZHCSJI7 –MARCH 2019
www.ti.com.cn
13 机械、封装和可订购信息
以下页面包含机械、封装和可订购信息。这些信息是指定器件的最新可用数据。数据如有变更,恕不另行通知,且
不会对此文档进行修订。如需获取此数据表的浏览器版本,请查阅左侧的导航栏。
28
版权 © 2019, Texas Instruments Incorporated
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
SN74AXCH4T245PWR
SN74AXCH4T245RSVR
ACTIVE
ACTIVE
TSSOP
UQFN
PW
16
16
2000 RoHS & Green
3000 RoHS & Green
NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 125
-40 to 125
S4TH245
1U7R
RSV
NIPDAUAG
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
16-Jun-2023
TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
K0
P1
W
B0
Reel
Diameter
Cavity
A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
Overall width of the carrier tape
W
P1 Pitch between successive cavity centers
Reel Width (W1)
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2
Q3 Q4
Q1 Q2
Q3 Q4
User Direction of Feed
Pocket Quadrants
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
SN74AXCH4T245PWR TSSOP
SN74AXCH4T245RSVR UQFN
PW
16
16
2000
3000
330.0
178.0
12.4
13.5
6.9
2.1
5.6
2.9
1.6
8.0
4.0
12.0
12.0
Q1
Q1
RSV
0.75
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
16-Jun-2023
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W
L
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
SN74AXCH4T245PWR
SN74AXCH4T245RSVR
TSSOP
UQFN
PW
16
16
2000
3000
356.0
189.0
356.0
185.0
35.0
36.0
RSV
Pack Materials-Page 2
PACKAGE OUTLINE
RSV0016A
UQFN - 0.55 mm max height
S
C
A
L
E
5
.
0
0
0
ULTRA THIN QUAD FLATPACK - NO LEAD
1.85
1.75
A
B
PIN 1 INDEX AREA
2.65
2.55
C
0.55
0.45
SEATING PLANE
0.05 C
0.05
0.00
2X 1.2
SYMM
℄
(0.13) TYP
5
8
0.45
0.35
15X
4
9
SYMM
℄
2X 1.2
12X 0.4
1
0.25
16X
12
0.15
0.07
0.05
C A B
13
16
0.55
0.45
PIN 1 ID
(45° X 0.1)
4220314/C 02/2020
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
www.ti.com
EXAMPLE BOARD LAYOUT
RSV0016A
UQFN - 0.55 mm max height
ULTRA THIN QUAD FLATPACK - NO LEAD
SYMM
℄
(0.7)
16
SEE SOLDER MASK
DETAIL
13
12
16X (0.2)
1
SYMM
℄
12X (0.4)
(2.4)
(R0.05) TYP
9
4
15X (0.6)
5
8
(1.6)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE: 25X
0.05 MIN
ALL AROUND
0.05 MAX
ALL AROUND
METAL UNDER
SOLDER MASK
METAL EDGE
EXPOSED METAL
SOLDER MASK
OPENING
EXPOSED
METAL
SOLDER MASK
OPENING
NON SOLDER MASK
DEFINED
SOLDER MASK DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4220314/C 02/2020
NOTES: (continued)
3. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271).
www.ti.com
EXAMPLE STENCIL DESIGN
RSV0016A
UQFN - 0.55 mm max height
ULTRA THIN QUAD FLATPACK - NO LEAD
(0.7)
16
13
16X (0.2)
1
12
SYMM
℄
12X (0.4)
(2.4)
(R0.05) TYP
4
9
15X (0.6)
5
8
SYMM
℄
(1.6)
SOLDER PASTE EXAMPLE
BASED ON 0.125 MM THICK STENCIL
SCALE: 25X
4220314/C 02/2020
NOTES: (continued)
4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
www.ti.com
PACKAGE OUTLINE
PW0016A
TSSOP - 1.2 mm max height
S
C
A
L
E
2
.
5
0
0
SMALL OUTLINE PACKAGE
SEATING
PLANE
C
6.6
6.2
TYP
A
0.1 C
PIN 1 INDEX AREA
14X 0.65
16
1
2X
5.1
4.9
4.55
NOTE 3
8
9
0.30
16X
4.5
4.3
NOTE 4
1.2 MAX
0.19
B
0.1
C A B
(0.15) TYP
SEE DETAIL A
0.25
GAGE PLANE
0.15
0.05
0.75
0.50
A
20
0 -8
DETAIL A
TYPICAL
4220204/A 02/2017
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side.
5. Reference JEDEC registration MO-153.
www.ti.com
EXAMPLE BOARD LAYOUT
PW0016A
TSSOP - 1.2 mm max height
SMALL OUTLINE PACKAGE
SYMM
16X (1.5)
(R0.05) TYP
16
1
16X (0.45)
SYMM
14X (0.65)
8
9
(5.8)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE: 10X
METAL UNDER
SOLDER MASK
SOLDER MASK
OPENING
SOLDER MASK
OPENING
METAL
EXPOSED METAL
EXPOSED METAL
0.05 MAX
ALL AROUND
0.05 MIN
ALL AROUND
NON-SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
15.000
(PREFERRED)
SOLDER MASK DETAILS
4220204/A 02/2017
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
PW0016A
TSSOP - 1.2 mm max height
SMALL OUTLINE PACKAGE
16X (1.5)
SYMM
(R0.05) TYP
16
1
16X (0.45)
SYMM
14X (0.65)
8
9
(5.8)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE: 10X
4220204/A 02/2017
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
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