SN74CBT16292DGV [TI]

12-BIT 1-OF-2 FET MULTIPLEXER/DEMULTIPLEXER WITH INTERNAL PULLDOWN RESISTORS; 12位1 - OF- 2 FET复用器/解复用器具有内部下拉电阻
SN74CBT16292DGV
型号: SN74CBT16292DGV
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

12-BIT 1-OF-2 FET MULTIPLEXER/DEMULTIPLEXER WITH INTERNAL PULLDOWN RESISTORS
12位1 - OF- 2 FET复用器/解复用器具有内部下拉电阻

解复用器
文件: 总5页 (文件大小:70K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
SN74CBT16292  
12-BIT 1-OF-2 FET MULTIPLEXER/DEMULTIPLEXER  
WITH INTERNAL PULLDOWN RESISTORS  
SCDS053C – MARCH 1998 – REVISED FEBRUARY 1999  
DGG, DGV, OR DL PACKAGE  
4-Switch Connection Between Two Ports  
(TOP VIEW)  
TTL-Compatible Control Input Levels  
Make-Before-Break Feature  
1
56  
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
S
1A  
NC  
2A  
NC  
3A  
NC  
GND  
4A  
NC  
5A  
NC  
6A  
NC  
7A  
NC  
NC  
NC  
Internal 500-Pulldown Resistors to  
Ground  
2
3
1B1  
1B2  
2B1  
2B2  
3B1  
GND  
3B2  
4B1  
4B2  
5B1  
5B2  
6B1  
6B2  
7B1  
7B2  
8B1  
GND  
8B2  
9B1  
9B2  
10B1  
10B2  
11B1  
11B2  
12B1  
12B2  
4
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
5
6
Package Options Include Plastic Thin  
Shrink Small-Outline (DGG), Thin Very  
Small-Outline (DGV), and 300-mil Shrink  
Small-Outline (DL) Packages  
7
8
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
description  
The SN74CBT16292 is a 12-bit 1-of-2 high-speed  
TTL-compatible FET multiplexer/ demultiplexer.  
The low on-state resistance of the switch allows  
connections to be made with minimal propagation  
delay.  
V
CC  
8A  
When the select (S) input is low, port A is  
GND  
NC  
9A  
NC  
10A  
NC  
11A  
NC  
12A  
NC  
connectedtoportB1andR  
isconnectedtoport  
INT  
B2. When S is high, port A is connected to port B2  
and R is connected to port B1.  
INT  
The SN74CBT16292 is characterized for  
operation from –40°C to 85°C.  
NC – No internal connection  
FUNCTION TABLE  
INPUT  
S
FUNCTION  
A port = B1 port  
L
R
= B2 port  
INT  
A port = B2 port  
= B1 port  
H
R
INT  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 1999, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN74CBT16292  
12-BIT 1-OF-2 FET MULTIPLEXER/DEMULTIPLEXER  
WITH INTERNAL PULLDOWN RESISTORS  
SCDS053C – MARCH 1998 – REVISED FEBRUARY 1999  
logic diagram (positive logic)  
2
54  
1A  
1B1  
R
INT  
R
INT  
53  
30  
1B2  
27  
12A  
12B1  
R
INT  
R
INT  
29  
12B2  
1
S
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)  
Supply voltage range, V  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V  
CC  
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V  
I
Continuous channel current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA  
Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA  
IK  
I
Package thermal impedance, θ (see Note 2): DGG package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81°C/W  
JA  
DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W  
DL package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74°C/W  
Storage temperature range, T  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C  
stg  
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.  
2. The package thermal impedance is calculated in accordance with JESD 51.  
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN74CBT16292  
12-BIT 1-OF-2 FET MULTIPLEXER/DEMULTIPLEXER  
WITH INTERNAL PULLDOWN RESISTORS  
SCDS053C – MARCH 1998 – REVISED FEBRUARY 1999  
recommended operating conditions (see Note 3)  
MIN  
4
MAX  
UNIT  
V
V
V
V
Supply voltage  
5.5  
CC  
IH  
IL  
High-level control input voltage  
Low-level control input voltage  
Operating free-air temperature  
2
V
0.8  
85  
V
T
A
–40  
°C  
NOTE 3: All unused control inputs of the device must be held at V  
or GND to ensure proper device operation. Refer to the TI application report,  
CC  
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.  
electrical characteristics over recommended operating free-air temperature range (unless  
otherwise noted)  
PARAMETER  
TEST CONDITIONS  
I = –18 mA  
MIN TYP  
MAX  
–1.2  
±5  
UNIT  
V
V
IK  
V
V
V
V
= 4.5 V,  
= 5.5 V,  
= 5.5 V,  
= 5.5 V,  
CC  
CC  
CC  
CC  
I
I
I
V = V  
or GND  
µA  
µA  
mA  
pF  
I
I
CC  
= 0,  
I
O
V = V  
I
or GND  
3
CC  
CC  
I  
CC  
Control input  
Control input  
One input at 3.4 V,  
Other inputs at V  
or GND  
2.5  
CC  
C
C
V = 3 V or 0  
I
3
8
i
V
= 0,  
V = 3 V or 0  
O
pF  
io  
CC  
CC  
V
= 4 V,  
V = 2.4 V,  
I
I = 15 mA  
I
10  
20  
TYP at V  
= 4 V  
CC  
§
r
on  
I = 64 mA  
I
3
3
5
7
7
V = 0  
I
V
CC  
= 4.5 V  
I = 30 mA  
I
V = 2.4 V,  
I
I = 15 mA  
I
15  
§
All typical values are at V  
= 5 V (unless otherwise noted), T = 25°C.  
A
CC  
This is the increase in supply current for each input that is at the specified TTL voltage level rather than V  
or GND.  
CC  
Measured by the voltage drop between the A and B terminals at the indicated current through the switch. On-state resistance is determined by  
the lower of the voltages of the two (A or B) terminals.  
switching characteristics over recommended operating free-air temperature range, C = 50 pF  
L
(unless otherwise noted) (see Figure 1)  
V
= 5 V  
CC  
± 0.5 V  
V
= 4 V  
FROM  
(INPUT)  
TO  
(OUTPUT)  
CC  
PARAMETER  
UNIT  
MIN  
MAX  
MIN  
MAX  
0.25  
6
A or B  
B or A  
A or B  
A or B  
0.5  
6.8  
7
ns  
ns  
ns  
t
t
t
pd  
en  
dis  
S
S
1
1
6.3  
Thepropagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the specified load capacitance, when  
driven by an ideal voltage source (zero output impedance).  
switching characteristics over recommended operating free-air temperature range, C = 50 pF  
L
(unless otherwise noted) (see Figure 1)  
V = 5 V  
CC  
± 0.5 V  
V
CC  
= 4 V  
PARAMETER  
DESCRIPTION  
UNIT  
MIN  
MAX  
MIN  
MAX  
#
t
Make-before-break time  
0
2
0
2
ns  
mbb  
#
The make-before-break time is the time interval between make and break, during the transition from one selected port to the other.  
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN74CBT16292  
12-BIT 1-OF-2 FET MULTIPLEXER/DEMULTIPLEXER  
WITH INTERNAL PULLDOWN RESISTORS  
SCDS053C – MARCH 1998 – REVISED FEBRUARY 1999  
PARAMETER MEASUREMENT INFORMATION  
7 V  
Open  
TEST  
S1  
S1  
500 Ω  
t
Open  
7 V  
pd  
/t  
From Output  
Under Test  
t
PZL PLZ  
/t  
GND  
t
Open  
PZH PHZ  
C
= 50 pF  
L
500 Ω  
(see Note A)  
3 V  
0 V  
Output  
Control  
1.5 V  
1.5 V  
LOAD CIRCUIT  
t
t
PLZ  
PZL  
Output  
Waveform 1  
S1 at 7 V  
2.3 V  
3 V  
0 V  
1.2 V  
Input  
1.5 V  
1.5 V  
V
OL  
+ 0.3 V  
(see Note B)  
V
OL  
t
t
t
t
PLH  
PHL  
PZH  
PHZ  
Output  
Waveform 2  
S1 at Open  
(see Note B)  
2.3 V  
0 V  
V
OH  
V
OH  
– 0.3 V  
1.2 V  
Output  
1.5 V  
1.5 V  
V
OL  
VOLTAGE WAVEFORMS  
VOLTAGE WAVEFORMS  
PROPAGATION DELAY TIMES  
C includes probe and jig capacitance.  
L
ENABLE AND DISABLE TIMES  
NOTES: A.  
B. Waveform 1 is for an output with internal conditions such that the output is low except when connected to the internal 500-Ω  
pulldown resistor. Waveform 2 is for an output with internal conditions such that the output is high except when connected to the  
internal 500-pulldown resistor.  
C. All pulse inputs and DC inputs are supplied by generators having the following characteristics: PRR 10 MHz, Z = 50 ,  
O
t 2.5 ns, t 2.5 ns.  
D. The outputs are measured one at a time with one transition per measurement.  
r
f
E.  
F.  
G.  
t
t
t
and t  
and t  
and t  
are the same as t . Z = R  
dis  
= 500 Ω  
= 500 Ω  
PLZ  
PZL  
PLH  
PHZ  
PZH  
PHL  
INT  
INT  
are the same as t . Z = R  
en  
are the same as t .  
pd  
Figure 1. Load Circuit and Voltage Waveforms  
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
IMPORTANT NOTICE  
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue  
any product or service without notice, and advise customers to obtain the latest version of relevant information  
to verify, before placing orders, that information being relied on is current and complete. All products are sold  
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those  
pertaining to warranty, patent infringement, and limitation of liability.  
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in  
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent  
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily  
performed, except those mandated by government requirements.  
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF  
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL  
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR  
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER  
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO  
BE FULLY AT THE CUSTOMER’S RISK.  
In order to minimize risks associated with the customer’s applications, adequate design and operating  
safeguards must be provided by the customer to minimize inherent or procedural hazards.  
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent  
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other  
intellectual property right of TI covering or relating to any combination, machine, or process in which such  
semiconductor products or services might be or are used. TI’s publication of information regarding any third  
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.  
Copyright 1999, Texas Instruments Incorporated  

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