SN74CBT1G66DCKR [TI]

SINGLE FET BUS SWITCH; 单FET总线开关
SN74CBT1G66DCKR
型号: SN74CBT1G66DCKR
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

SINGLE FET BUS SWITCH
单FET总线开关

开关
文件: 总5页 (文件大小:84K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
SN74CBT1G66  
SINGLE FET BUS SWITCH  
SCDS110A – JULY 2000 – REVISED OCTOBER 2000  
DBV OR DCK PACKAGE  
(TOP VIEW)  
5-Switch Connection Between Two Ports  
CMOS-Compatible Control Input Levels  
A
B
GND  
V
CC  
1
2
3
5
4
description  
OE  
The SN74CBT1G66 features a single high-speed  
line switch. The switch is disabled when the  
output-enable (OE) input is low.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
SOP (SOT-23) – DBV  
SOP (SC-70) – DCK  
Tape and reel  
Tape and reel  
SN74CBT1G66DBVR S66_  
SN74CBT1G66DCKR S6_  
–40°C to 85°C  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design  
guidelines are available at www.ti.com/sc/package.  
The actual top-side marking has one additional character that designates the assembly/test site.  
FUNCTION TABLE  
INPUT  
FUNCTION  
OE  
H
L
A port = B port  
Disconnect  
logic diagram (positive logic)  
1
4
2
B
A
OE  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2000, Texas Instruments Incorporated  
PRODUCT PREVIEW information concerns products in the formative or  
design phase of development. Characteristic data and other  
specifications are design goals. Texas Instruments reserves the right to  
change or discontinue these products without notice.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN74CBT1G66  
SINGLE FET BUS SWITCH  
SCDS110A – JULY 2000 – REVISED OCTOBER 2000  
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)  
Supply voltage range, V  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V  
CC  
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V  
I
Continuous channel current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA  
Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA  
IK I/O  
Package thermal impedance, θ (see Note 2): DBV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 206°C/W  
JA  
DCK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 252°C/W  
Storage temperature range, T  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C  
stg  
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.  
2. The package thermal impedance is calculated in accordance with JESD 51-7.  
recommended operating conditions (see Note 3)  
MIN  
2.3  
MAX  
UNIT  
V
V
V
V
V
Supply voltage  
5.5  
V
V
V
V
V
CC  
I/O  
IH  
I/O port voltage  
0
V
CC  
High-level input voltage  
Low-level input voltage  
Control input voltage  
0.7 × V  
CC  
0.3 × V  
5.5  
10  
IL  
CC  
0
IN  
V
V
= 2.3 V to 3.6 V  
= 4.5 V to 5.5 V  
CC  
t /t  
r f  
Control input transition rise/fall time  
ns  
5
CC  
T
A
Operating free-air temperature  
–40  
85  
°C  
NOTE 3: All unused control inputs of the device must be held at V  
or GND to ensure proper device operation. Refer to the TI application report,  
CC  
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.  
electrical characteristics over recommended operating free-air temperature range (unless  
otherwise noted)  
PARAMETER  
TEST CONDITIONS  
MIN TYP  
MAX  
–1.2  
±1  
UNIT  
V
V
CC  
V
IK  
I = –18 mA  
4.5 V  
I
I
I
I
0 V 5.5 V  
0 to 5.5 V  
µA  
µA  
µA  
I
I
0 A or B 4.5 V  
V
= 0  
10  
±10  
12  
30  
9
off  
CC  
0 A or B V  
2.3 V to 5.5 V  
OZ  
CC  
V = 0  
I
5
I = 8 mA  
I
2.3 V  
V = 2.3 V  
I
13  
4
V = 0  
I
I = 24 mA  
I
3 V  
r
V = 3 V  
I
10  
3
20  
7
on  
V = 0,  
I
I = 30 mA  
I
V = 2.4 V,  
I = 15 mA  
4.5 V  
5
12  
15  
10  
I
I
V = 4.5 V,  
I
I = 30 mA  
I
7
I
V = V  
I
or GND  
I = 0  
O
5.5 V  
0
µA  
pF  
pF  
CC  
CC  
C
C
i
5 V  
io  
All typical values are at V  
= 5 V, T = 25°C.  
A
CC  
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN74CBT1G66  
SINGLE FET BUS SWITCH  
SCDS110A – JULY 2000 – REVISED OCTOBER 2000  
switching characteristics over recommended operating free-air temperature range (unless  
otherwise noted)  
V
= 2.5 V  
V
= 3.3 V  
V
= 5 V  
CC  
± 0.2 V  
CC  
± 0.3 V  
CC  
± 0.5 V  
FROM  
(INPUT)  
TO  
(OUTPUT)  
PARAMETER  
UNIT  
MIN MAX  
MIN MAX  
MIN MAX  
t
A or B  
OE  
B or A  
A or B  
A or B  
ns  
ns  
ns  
pd  
t
en  
t
OE  
dis  
PARAMETER MEASUREMENT INFORMATION  
7 V  
TEST  
S1  
S1  
Open  
GND  
500 Ω  
t
Open  
7 V  
From Output  
Under Test  
pd  
/t  
t
PLZ PZL  
t
/t  
Open  
PHZ PZH  
C
= 50 pF  
L
500 Ω  
(see Note A)  
3 V  
0 V  
Output  
Control  
1.5 V  
1.5 V  
LOAD CIRCUIT  
t
t
PLZ  
PZL  
Output  
Waveform 1  
S1 at 7 V  
3.5 V  
3 V  
1.5 V  
Input  
V
V
+ 0.3 V  
1.5 V  
1.5 V  
OL  
V
(see Note B)  
OL  
OH  
0 V  
t
t
PHZ  
PZH  
t
t
PHL  
PLH  
Output  
Waveform 2  
S1 at Open  
(see Note B)  
V
V
OH  
– 0.3 V  
OH  
1.5 V  
Output  
1.5 V  
1.5 V  
0 V  
V
OL  
VOLTAGE WAVEFORMS  
PROPAGATION DELAY TIMES  
VOLTAGE WAVEFORMS  
ENABLE AND DISABLE TIMES  
NOTES: A.  
C includes probe and jig capacitance.  
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.  
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.  
C. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, Z = 50 , t 2.5 ns, t 2.5 ns.  
O
r
f
D. The outputs are measured one at a time with one transition per measurement.  
E.  
F.  
G.  
t
t
t
and t  
and t  
and t  
are the same as t  
are the same as t  
are the same as t  
.
dis  
en  
.
pd  
PLZ  
PZL  
PLH  
PHZ  
PZH  
PHL  
.
Figure 1. Load Circuit and Voltage Waveforms  
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
PACKAGE OPTION ADDENDUM  
www.ti.com  
19-Feb-2008  
PACKAGING INFORMATION  
Orderable Device  
Status (1)  
Package Package  
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)  
Qty  
Type  
SOT-23  
SC70  
Drawing  
SN74CBT1G66DBVR  
SN74CBT1G66DCKR  
PREVIEW  
PREVIEW  
DBV  
5
5
3000  
3000  
TBD  
TBD  
Call TI  
Call TI  
Call TI  
Call TI  
DCK  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in  
a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2)  
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check  
http://www.ti.com/productcontent for the latest availability information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements  
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered  
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and  
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS  
compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame  
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)  
(3)  
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder  
temperature.  
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Addendum-Page 1  
IMPORTANT NOTICE  
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