SN74CBTS1G125DCKR [TI]
CBT/FST/QS/5C/B SERIES, 1-BIT DRIVER, TRUE OUTPUT, PDSO5, PLASTIC, SO-5;
| 型号： | SN74CBTS1G125DCKR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | CBT/FST/QS/5C/B SERIES, 1-BIT DRIVER, TRUE OUTPUT, PDSO5, PLASTIC, SO-5 驱动 光电二极管 输出元件 逻辑集成电路 |
| 文件： | 总3页 (文件大小：265K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN74CBTS1G125
SINGLE FET BUS SWITCH
SCDS064A – JULY 1998 – REVISED OCTOBER 1998
DBV OR DCK PACKAGE
(TOP VIEW)
D
D
D
5-Ω Switch Connection Between Two Ports
TTL-Compatible Control Input Levels
Packaged in Plastic Small-Outline
Transistor (DBV, DCK) Packages
OE
A
V
B
1
2
3
5
4
CC
GND
description
The SN74CBTS1G125 features a single high-speed line switch with Schottky diodes on the I/O to clamp
undershoot. The switch is disabled when the output-enable (OE) input is high.
The SN74CBTS1G125 is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
INPUT
FUNCTION
OE
L
A port = B port
Disconnect
H
logic diagram (positive logic)
2
1
4
B
A
OE
Copyright 1998, Texas Instruments Incorporated
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
2–11
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74CBTS1G125
SINGLE FET BUS SWITCH
SCDS064A – JULY 1998 – REVISED OCTOBER 1998
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
I
Continuous channel current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA
Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA
IK I/O
Package thermal impedance, θ (see Note 2): DBV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 347°C/W
JA
DCK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 389°C/W
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51.
recommended operating conditions (see Note 3)
MIN
4
MAX
UNIT
V
V
V
V
Supply voltage
5.5
CC
IH
IL
High-level control input voltage
Low-level control input voltage
Operating free-air temperature
2
V
0.8
85
V
T
A
–40
°C
NOTE 3: All unused control inputs of the device must be held at V
or GND to ensure proper device operation. Refer to the TI application report,
CC
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
‡
PARAMETER
TEST CONDITIONS
I = –18 mA
MIN TYP
MAX
–0.7
–1
UNIT
V
V
IK
V
V
V
= 4.5 V,
= 5.5 V
= 5.5 V,
CC
CC
CC
I
I
I
V = GND
I
µA
µA
µA
pF
IL
I
I
V = 5.5 V
I
50
IH
I
I
O
= 0,
V = V or GND
I CC
3
CC
C
C
Control input
V = 3 V or 0
I
i
V
O
= 3 V or 0,
OE = V
CC
pF
io(OFF)
V
CC
= 4 V,
TYP at V
= 4 V,
V
I
= 2.4 V,
I = 15 mA
I
CC
I = 64 mA
I
§
V = 0
I
Ω
r
on
V
CC
= 4.5 V
I = 30 mA
I
V
I
= 2.4 V,
I = 15 mA
I
‡
§
All typical values are at V
= 5 V (unless otherwise noted), T = 25°C.
A
CC
Measured by the voltage drop between the A and the B terminals at the indicated current through the switch. On-state resistance is determined
by the lower of the voltages of the two (A or B) terminals.
2–12
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74CBTS1G125
SINGLE FET BUS SWITCH
SCDS064A – JULY 1998 – REVISED OCTOBER 1998
switching characteristics over recommended operating free-air temperature range, C = 50 pF
L
(unless otherwise noted) (see Figure 1)
V
= 5 V
CC
± 0.5 V
V
= 4 V
FROM
(INPUT)
TO
(OUTPUT)
CC
PARAMETER
UNIT
MIN
MAX
MIN MAX
†
t
t
t
A or B
OE
B or A
A or B
A or B
ns
ns
ns
pd
en
OE
dis
†
Thepropagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the specified load capacitance, when
driven by an ideal voltage source (zero output impedance).
PARAMETER MEASUREMENT INFORMATION
7 V
TEST
S1
S1
Open
GND
500 Ω
t
Open
7 V
pd
/t
From Output
Under Test
t
PLZ PZL
t
/t
Open
PHZ PZH
C
= 50 pF
L
500 Ω
(see Note A)
3 V
0 V
Output
Control
(low-level
enabling)
1.5 V
1.5 V
LOAD CIRCUIT
t
t
PZL
t
PLZ
Output
Waveform 1
S1 at 7 V
3.5 V
3 V
0 V
1.5 V
Input
V
OL
+ 0.3 V
1.5 V
1.5 V
(see Note B)
V
OL
t
PHZ
t
t
PHL
PZH
PLH
Output
Waveform 2
S1 at Open
(see Note B)
V
OH
V
OH
V
OH
– 0.3 V
0 V
1.5 V
Output
1.5 V
1.5 V
V
OL
VOLTAGE WAVEFORMS
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
PROPAGATION DELAY TIMES
C includes probe and jig capacitance.
L
NOTES: A.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω, t ≤ 2.5 ns, t ≤ 2.5 ns.
O
r
f
D. The output is measured with one input transition per measurement.
E.
F.
G.
t
t
t
and t
and t
and t
are the same as t
are the same as t
are the same as t
.
.
.
PLZ
PZL
PLH
PHZ
PZH
PHL
dis
en
pd
Figure 1. Load Circuit and Voltage Waveforms
2–13
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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