SNJ54HC138WR [TI]
HC/UH SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, CDFP16, CERAMIC, DFP-16;型号: | SNJ54HC138WR |
厂家: | TEXAS INSTRUMENTS |
描述: | HC/UH SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, CDFP16, CERAMIC, DFP-16 驱动 CD 输入元件 输出元件 逻辑集成电路 |
文件: | 总22页 (文件大小:1174K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
SN54HC138, SN74HC138
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SCLS107E − DECEMBER 1982 − REVISED SEPTEMBER 2003
SN54HC138 . . . J OR W PACKAGE
SN74HC138 . . . D, DB, N, NS, OR PW PACKAGE
(TOP VIEW)
D
Targeted Specifically for High-Speed
Memory Decoders and Data-Transmission
Systems
D
D
D
D
D
D
D
Wide Operating Voltage Range of 2 V to 6 V
Outputs Can Drive Up To 10 LSTTL Loads
A
B
C
VCC
Y0
Y1
1
2
3
4
5
6
7
8
16
15
14
13
Low Power Consumption, 80-μA Max I
CC
G2A
G2B
G1
Y7
GND
Y2
Typical t = 15 ns
pd
12 Y3
4-mA Output Drive at 5 V
11
10
9
Y4
Y5
Y6
Low Input Current of 1 μA Max
Incorporate Three Enable Inputs to Simplify
Cascading and/or Data Reception
SN54HC138 . . . FK PACKAGE
(TOP VIEW)
description/ordering information
The ’HC138 devices are designed to be used in
high-performance memory-decoding or data-
routing applications requiring very short
propagation delay times. In high-performance
memory systems, these decoders can be used to
minimize the effects of system decoding. When
employed with high-speed memories utilizing a
fast enable circuit, the delay times of these
decoders and the enable time of the memory are
usually less than the typical access time of the
memory. This means that the effective system
delay introduced by the decoders is negligible.
3
2
1
20 19
18
Y1
Y2
NC
C
G2A
NC
G2B
G1
4
5
6
7
8
17
16
15 Y3
14
9 10 11 12 13
Y4
NC − No internal connection
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
T
A
PACKAGE
PDIP − N
SOIC − D
Tube of 25
Tube of 40
Reel of 2500
Reel of 250
Reel of 2000
Reel of 2000
Tube of 90
Reel of 2000
Reel of 250
Tube of 25
Tube of 150
Tube of 55
SN74HC138N
SN74HC138N
SN74HC138D
SN74HC138DR
SN74HC138DT
SN74HC138NSR
SN74HC138DBR
SN74HC138PW
SN74HC138PWR
SN74HC138PWT
SNJ54HC138J
HC138
SOP − NS
HC138
HC138
−40°C to 85°C
SSOP − DB
TSSOP − PW
HC138
CDIP − J
CFP − W
LCCC − FK
SNJ54HC138J
SNJ54HC138W
SNJ54HC138FK
SNJ54HC138W
SNJ54HC138FK
−55°C to 125°C
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright © 2003, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54HC138, SN74HC138
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SCLS107E − DECEMBER 1982 − REVISED SEPTEMBER 2003
description/ordering information (continued)
The conditions at the binary-select inputs at the three enable inputs select one of eight output lines. Two
active-low and one active-high enable inputs reduce the need for external gates or inverters when expanding.
A 24-line decoder can be implemented without external inverters, and a 32-line decoder requires only one
inverter. An enable input can be used as a data input for demultiplexing applications.
FUNCTION TABLE
INPUTS
OUTPUTS
ENABLE
SELECT
G1
X
G2A
H
X
X
L
G2B
X
H
X
L
C
X
X
X
L
B
X
X
X
L
A
X
X
X
L
Y0
H
H
H
L
Y1
H
H
H
H
L
Y2
H
H
H
H
H
L
Y3
H
H
H
H
H
H
L
Y4
H
H
H
H
H
H
H
L
Y5
H
H
H
H
H
H
H
H
L
Y6
H
H
H
H
H
H
H
H
H
L
Y7
H
H
H
H
H
H
H
H
H
H
L
X
L
H
H
H
H
H
H
H
H
L
L
L
L
H
L
H
H
H
H
H
H
H
L
L
L
H
H
L
H
H
H
H
H
H
L
L
L
H
L
H
H
H
H
H
L
L
H
H
H
H
H
H
H
H
L
L
L
H
L
H
H
H
L
L
H
H
H
H
L
L
H
H
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54HC138, SN74HC138
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SCLS107E − DECEMBER 1982 − REVISED SEPTEMBER 2003
logic diagram (positive logic)
15
Y0
1
A
14
Y1
2
B
13
Y2
3
12
Y3
C
11
Y4
10
Y5
6
G1
9
Y6
4
G2A
7
Y7
5
G2B
Pin numbers shown are for the D, DB, J, N, NS, PW, and W packages.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
CC
Input clamp current, I (V < 0 or V > V ) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
IK
I
I
CC
Output clamp current, I (V < 0 or V > V ) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
OK
O
O
CC
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 mA
O
O
CC
Continuous current through V or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
CC
Package thermal impedance, θ (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73°C/W
JA
DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108°C/W
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54HC138, SN74HC138
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SCLS107E − DECEMBER 1982 − REVISED SEPTEMBER 2003
recommended operating conditions (see Note 3)
SN54HC138
MIN NOM
SN74HC138
MIN NOM
UNIT
MAX
MAX
V
V
Supply voltage
2
1.5
5
6
2
1.5
5
6
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 2 V
= 4.5 V
= 6 V
3.15
4.2
3.15
4.2
High-level input voltage
V
V
IH
= 2 V
0.5
1.35
1.8
0.5
1.35
1.8
= 4.5 V
= 6 V
V
IL
Low-level input voltage
V
V
Input voltage
0
0
V
CC
V
CC
0
0
V
CC
V
CC
V
V
I
Output voltage
O
V
CC
V
CC
V
CC
= 2 V
1000
500
400
125
1000
500
400
85
= 4.5 V
= 6 V
Δt/Δv
Input transition rise/fall time
ns
T
A
Operating free-air temperature
−55
−40
°C
NOTE 3: All unused inputs of the device must be held at V
or GND to ensure proper device operation. Refer to the TI application report,
CC
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
T
= 25°C
SN54HC138
SN74HC138
A
PARAMETER
TEST CONDITIONS
V
UNIT
CC
MIN
TYP
MAX
MIN
1.9
4.4
5.9
3.7
5.2
MAX
MIN
1.9
MAX
2 V
4.5 V
6 V
1.9 1.998
4.4 4.499
5.9 5.999
4.4
I
= −20 μA
OH
5.9
V
V
V = V or V
V
OH
I
IH
IL
I
I
= −4 mA
4.5 V
6 V
3.98
5.48
4.3
5.8
3.84
5.34
OH
= −5.2 mA
OH
2 V
0.002
0.001
0.001
0.17
0.15
0.1
0.1
0.1
0.1
0.26
0.26
100
8
0.1
0.1
0.1
0.1
4.5 V
6 V
I
OL
= 20 μA
0.1
0.1
V = V or V
V
OL
I
IH
IL
I
I
= 4 mA
4.5 V
6 V
0.4
0.33
0.33
1000
80
OL
= 5.2 mA
0.4
OL
I
I
V = V or 0
6 V
1000
160
10
nA
μA
pF
I
I
CC
V = V or 0,
I
O
= 0
6 V
CC
I
CC
C
2 V to 6 V
3
10
10
i
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54HC138, SN74HC138
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SCLS107E − DECEMBER 1982 − REVISED SEPTEMBER 2003
switching characteristics over recommended operating free-air temperature range, CL = 50 pF
(unless otherwise noted) (see Figure 1)
T
A
= 25°C
TYP
67
SN54HC138
SN74HC138
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
V
UNIT
CC
MIN
MAX
180
36
MIN
MAX
270
54
MIN
MAX
225
45
2 V
4.5 V
6 V
18
A, B, or C
Enable
Any Y
Any Y
Any
15
31
46
38
t
pd
ns
2 V
66
155
31
235
47
195
39
4.5 V
6 V
18
15
26
40
33
2 V
38
75
110
22
95
t
t
4.5 V
6 V
8
15
19
ns
6
13
19
16
operating characteristics, TA = 25°C
PARAMETER
TEST CONDITIONS
TYP
UNIT
C
Power dissipation capacitance
No load
85
pF
pd
PARAMETER MEASUREMENT INFORMATION
V
CC
From Output
Under Test
Test
Point
Input
50%
50%
0 V
C = 50 pF
(see Note A)
L
t
t
PHL
PLH
V
V
OH
In-Phase
Output
90%
t
90%
50%
10%
50%
10%
LOAD CIRCUIT
OL
t
r
f
f
t
t
PLH
PHL
V
CC
V
V
OH
90%
t
90%
Input
50%
10%
50%
10%
90%
90%
t
Out-of-Phase
Output
50%
10%
50%
10%
0 V
OL
t
r
f
t
r
VOLTAGE WAVEFORM
INPUT RISE AND FALL TIMES
VOLTAGE WAVEFORMS
PROPAGATION DELAY AND OUTPUT TRANSITION TIMES
NOTES: A. C includes probe and test-fixture capacitance.
L
B. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following
characteristics: PRR ≤ 1 MHz, Z = 50 Ω, t = 6 ns, t = 6 ns.
O
r
f
C. The outputs are measured one at a time with one input transition per measurement.
D. and t are the same as t
t
.
pd
PLH
PHL
Figure 1. Load Circuit and Voltage Waveforms
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
18-Oct-2013
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(6)
(3)
(4/5)
5962-8406201VEA
ACTIVE
CDIP
CFP
J
16
16
20
1
TBD
TBD
TBD
A42
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
-55 to 125
5962-8406201VE
A
SNV54HC138J
5962-8406201VFA
84062012A
ACTIVE
ACTIVE
W
1
1
A42
-55 to 125
-55 to 125
5962-8406201VF
A
SNV54HC138W
LCCC
FK
POST-PLATE
84062012A
SNJ54HC
138FK
8406201EA
ACTIVE
ACTIVE
ACTIVE
ACTIVE
NRND
CDIP
CFP
J
W
FK
J
16
16
20
16
16
20
16
16
1
1
1
1
1
1
1
1
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
A42
A42
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
8406201EA
SNJ54HC138J
8406201FA
8406201FA
SNJ54HC138W
JM38510/65802B2A
JM38510/65802BEA
JM38510/65802BFA
M38510/65802B2A
M38510/65802BEA
M38510/65802BFA
LCCC
CDIP
CFP
POST-PLATE
A42
JM38510/
65802B2A
JM38510/
65802BEA
W
FK
J
A42
JM38510/
65802BFA
ACTIVE
ACTIVE
NRND
LCCC
CDIP
CFP
POST-PLATE
A42
JM38510/
65802B2A
JM38510/
65802BEA
W
A42
JM38510/
65802BFA
SN54HC138J
SN74HC138D
ACTIVE
ACTIVE
CDIP
SOIC
J
16
16
1
A42
N / A for Pkg Type
-55 to 125
-40 to 85
SN54HC138J
D
40
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
HC138
SN74HC138DBR
SN74HC138DBRE4
SN74HC138DBRG4
ACTIVE
ACTIVE
ACTIVE
SSOP
SSOP
SSOP
DB
DB
DB
16
16
16
2000
2000
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 85
-40 to 85
-40 to 85
HC138
HC138
HC138
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
18-Oct-2013
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
Device Marking
Samples
Drawing
Qty
(1)
(2)
(6)
(3)
(4/5)
SN74HC138DE4
SN74HC138DG4
SN74HC138DR
SN74HC138DRE4
SN74HC138DRG4
SN74HC138DT
ACTIVE
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
PDIP
D
16
16
16
16
16
16
16
16
16
40
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
HC138
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
D
D
D
D
D
D
D
N
40
2500
2500
2500
250
250
250
25
Green (RoHS
& no Sb/Br)
CU NIPDAU
HC138
Green (RoHS CU NIPDAU | CU SN
& no Sb/Br)
HC138
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
HC138
Green (RoHS
& no Sb/Br)
HC138
Green (RoHS
& no Sb/Br)
HC138
SN74HC138DTE4
SN74HC138DTG4
SN74HC138N
Green (RoHS
& no Sb/Br)
HC138
Green (RoHS
& no Sb/Br)
HC138
Pb-Free
(RoHS)
SN74HC138N
SN74HC138N3
SN74HC138NE4
OBSOLETE
ACTIVE
PDIP
PDIP
N
N
16
16
TBD
Call TI
Call TI
-40 to 85
-40 to 85
25
2000
2000
90
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
SN74HC138N
HC138
SN74HC138NSR
SN74HC138NSRG4
SN74HC138PW
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SO
NS
NS
16
16
16
16
16
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
SO
Green (RoHS
& no Sb/Br)
HC138
TSSOP
TSSOP
TSSOP
PW
PW
PW
Green (RoHS
& no Sb/Br)
HC138
SN74HC138PWE4
SN74HC138PWG4
90
Green (RoHS
& no Sb/Br)
HC138
90
Green (RoHS
& no Sb/Br)
HC138
SN74HC138PWLE
SN74HC138PWR
OBSOLETE
ACTIVE
TSSOP
TSSOP
PW
PW
16
16
TBD
Call TI
Call TI
-40 to 85
-40 to 85
2000
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
HC138
HC138
SN74HC138PWRE4
ACTIVE
TSSOP
PW
16
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
18-Oct-2013
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
-40 to 85
Device Marking
Samples
Drawing
Qty
(1)
(2)
(6)
(3)
(4/5)
SN74HC138PWRG4
SN74HC138PWT
SN74HC138PWTE4
SN74HC138PWTG4
SNJ54HC138FK
ACTIVE
TSSOP
TSSOP
TSSOP
TSSOP
LCCC
PW
16
16
16
16
20
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
POST-PLATE
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
HC138
ACTIVE
ACTIVE
ACTIVE
ACTIVE
PW
PW
PW
FK
250
250
250
1
Green (RoHS
& no Sb/Br)
-40 to 85
HC138
HC138
HC138
Green (RoHS
& no Sb/Br)
-40 to 85
Green (RoHS
& no Sb/Br)
-40 to 85
TBD
-55 to 125
84062012A
SNJ54HC
138FK
SNJ54HC138J
SNJ54HC138W
ACTIVE
ACTIVE
CDIP
CFP
J
16
16
1
1
TBD
TBD
A42
A42
N / A for Pkg Type
N / A for Pkg Type
-55 to 125
-55 to 125
8406201EA
SNJ54HC138J
W
8406201FA
SNJ54HC138W
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
Addendum-Page 3
PACKAGE OPTION ADDENDUM
www.ti.com
18-Oct-2013
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN54HC138, SN54HC138-SP, SN74HC138 :
Catalog: SN74HC138, SN54HC138
•
Automotive: SN74HC138-Q1, SN74HC138-Q1
•
Military: SN54HC138
•
Space: SN54HC138-SP
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
•
Military - QML certified for Military and Defense Applications
•
Space - Radiation tolerant, ceramic packaging and qualified for use in Space-based application
•
Addendum-Page 4
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Oct-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
SN74HC138DBR
SN74HC138DR
SSOP
SOIC
DB
D
16
16
16
16
16
2000
2500
2500
2000
250
330.0
330.0
330.0
330.0
330.0
16.4
16.8
16.4
12.4
12.4
8.2
6.5
6.5
6.9
6.9
6.6
10.3
10.3
5.6
2.5
2.1
2.1
1.6
1.6
12.0
8.0
8.0
8.0
8.0
16.0
16.0
16.0
12.0
12.0
Q1
Q1
Q1
Q1
Q1
SN74HC138DRG4
SN74HC138PWR
SN74HC138PWT
SOIC
D
TSSOP
TSSOP
PW
PW
5.6
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Oct-2013
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
SN74HC138DBR
SN74HC138DR
SSOP
SOIC
DB
D
16
16
16
16
16
2000
2500
2500
2000
250
367.0
364.0
333.2
367.0
367.0
367.0
364.0
345.9
367.0
367.0
38.0
27.0
28.6
35.0
35.0
SN74HC138DRG4
SN74HC138PWR
SN74HC138PWT
SOIC
D
TSSOP
TSSOP
PW
PW
Pack Materials-Page 2
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
DB (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
28 PINS SHOWN
0,38
0,22
0,65
28
M
0,15
15
0,25
0,09
5,60
5,00
8,20
7,40
Gage Plane
1
14
0,25
A
0°–ā8°
0,95
0,55
Seating Plane
0,10
2,00 MAX
0,05 MIN
PINS **
14
16
20
24
28
30
38
DIM
6,50
5,90
6,50
5,90
7,50
8,50
7,90
10,50
9,90
10,50 12,90
A MAX
A MIN
6,90
9,90
12,30
4040065 /E 12/01
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-150
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