TLC59281RGET [TI]
16-Channel,Constant-Current LED Driver; 16通道恒流LED驱动器型号: | TLC59281RGET |
厂家: | TEXAS INSTRUMENTS |
描述: | 16-Channel,Constant-Current LED Driver |
文件: | 总23页 (文件大小:652K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
TLC59281
www.ti.com
SBVS139 –JANUARY 2010
16-Channel, Constant-Current LED Driver
Check for Samples: TLC59281
1
FEATURES
APPLICATIONS
•
•
•
LED Video Displays
Message Boards
Illumination
2
•
16 Channels, Constant-Current Sink Output
with On/Off Control
•
•
35-mA Capability (Constant-Current Sink)
10-ns High-Speed Constant-Current Switching
Transient Time
DESCRIPTION
The TLC59281 is a 16-channel, constant-current sink
LED driver. Each channel can be turned on/off by
writing serial data to an internal register. The
constant-current value of all 16 channels is set by a
single external resistor.
•
•
•
•
Low On-Time Error
LED Power-Supply Voltage up to 17 V
VCC = 3.0 V to 5.5 V
Constant-Current Accuracy:
–
–
Channel-to-Channel = ±1%
Device-to-Device = ±1%
•
•
•
•
CMOS Logic Level I/O
35-MHz Data Transfer Rate
20-ns BLANK Pulse Width
Operating Temperature: –40°C to +85°C
VLED
VLED
VLED
VLED
¼
¼
¼
¼
¼
¼
¼
¼
OUT0
SIN
OUT15
SOUT
OUT0
SIN
OUT15
SOUT
DATA
SCLK
VCC
VCC
SCLK
SCLK
LAT
LAT
Controller
LAT
VCC
GND
VCC
GND
BLANK
BLANK
IREF
BLANK
IREF
TLC59281
ERROR
READ
IC1
ICn
RIREF
RIREF
3
Typical Application Circuit (Multiple Daisy-Chained TLC59281s)
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2010, Texas Instruments Incorporated
TLC59281
SBVS139 –JANUARY 2010
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This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
PACKAGE/ORDERING INFORMATION(1)
PRODUCT
PACKAGE-LEAD
ORDERING NUMBER
TLC59281DBQR
TLC59281DBQ
TRANSPORT MEDIA, QUANTITY
Tape and Reel, 2500
Tube, 50
TLC59281
SO-24
TLC59281RGER
TLC59281RGE
Tape and Reel, 3000
Tape and Reel, 250
TLC59281
QFN-24
(1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
ABSOLUTE MAXIMUM RATINGS(1) (2)
Over operating free-air temperature range, unless otherwise noted.
PARAMETER
TLC59281
–0.3 to +6.0
40
UNIT
V
VCC
IOUT
VIN
Supply voltage: VCC
Output current (dc)
Input voltage range
OUT0 to OUT15
mA
V
SIN, SCLK, LAT, BLANK, IREF
SOUT
–0.3 to VCC + 0.3
–0.3 to VCC + 0.3
–0.3 to +18
+150
V
VOUT
Output voltage range
OUT0 to OUT15
V
TJ(MAX)
TSTG
Operating junction temperature
Storage temperature range
°C
°C
kV
V
–55 to +150
2
Human body model (HBM)
ESD rating
Charged device model (CDM)
500
(1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those specified is not supported.
(2) All voltage values are with respect to network ground terminal.
DISSIPATION RATINGS
OPERATING FACTOR
ABOVE TA = +25°C
TA < +25°C
POWER RATING
TA = +70°C
POWER RATING
TA = +85°C
POWER RATING
PACKAGE
SO-24
QFN-24(1)
14.3 mW/°C
24.8 mW/°C
1782 mW
3106 mW
1140 mW
1988 mW
927 mW
1615 mW
(1) The package thermal impedance is calculated in accordance with JESD51-5.
2
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SBVS139 –JANUARY 2010
RECOMMENDED OPERATING CONDITIONS
At TA= –40°C to +85°C, unless otherwise noted.
TLC59281
NOM
PARAMETER
TEST CONDITIONS
MIN
MAX
UNIT
DC Characteristics: VCC = 3 V to 5.5 V
VCC
VO
VIH
VIL
IOH
IOL
IOLC
TA
Supply voltage
3.0
5.5
17
V
V
Voltage applied to output
High-level input voltage
OUT0 to OUT15
0.7 × VCC
GND
VCC
V
Low-level input voltage
0.3 × VCC
–1
V
High-level output current
Low-level output current
Constant output sink current
Operating free-air temperature range
Operating junction temperature range
SOUT
SOUT
mA
mA
mA
°C
°C
1
OUT0 to OUT15
2
–40
–40
35
+85
TJ
+125
AC Characteristics: VCC = 3 V to 5.5 V
fCLK (SCLK)
TWH0
TWL0
TWH1
TWH2
TWL2
TSU0
Data shift clock frequency
SCLK
SCLK
35
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
10
10
20
20
20
4
SCLK
Pulse duration
LAT
BLANK
BLANK
SIN–SCLK↑
LAT↑–SCLK↑
SIN–SCLK↑
LAT↑–SCLK↑
Setup time
Hold time
TSU1
100
3
TH0
TH1
10
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ELECTRICAL CHARACTERISTICS
At VCC = 3.0 V to 5.5 V and TA = –40°C to +85°C. Typical values at VCC = 3.3 V and TA = +25°C, unless otherwise noted.
TLC59281
PARAMETER
TEST CONDITIONS
IOH = –1 mA at SOUT
MIN
TYP
MAX
VCC
0.4
1
UNIT
V
VOH
VOL
IIN
High-level output voltage
Low-level output voltage
Input current
VCC – 0.4
IOL = 1 mA at SOUT
0
V
VIN = VCC or GND at SIN, SCLK, LAT, and BLANK
–1
μA
SIN/SCLK/LAT = low, BLANK = high, VOUTn = 1 V,
RIREF = 27 kΩ
ICC1
ICC2
ICC3
ICC4
IOLC
1
4.5
7
2
8
mA
mA
mA
mA
mA
SIN/SCLK/LAT = low, BLANK = high, VOUTn = 1 V,
RIREF = 3 kΩ
Supply current (VCC
)
SIN/SCLK/LAT/BLANK = low, VOUTn = 1 V,
RIREF = 3 kΩ
18
40
37
SIN/SCLK/LAT/BLANK = low, VOUTn = 1 V,
RIREF = 1.5 kΩ
16
34
All OUTn = ON, VOUTn = VOUTfix = 1 V, RIREF = 1.5 kΩ
(see Figure 6), at OUT0 to OUT15
Constant output current
Output leakage current
31
All OUTn for constant-current driver, all outputs off
BLANK = high, VOUTn = VOUTfix = 17 V, RIREF = 1.5 kΩ
(see Figure 6), at OUT0 to OUT15
IOLKG
0.1
μA
Constant-current error
(channel-to-channel)(1)
All OUTn = ON, VOUTn = VOUTfix = 1 V, RIREF = 1.5 kΩ
at OUT0 to OUT15
ΔIOLC
±1
±1
±3
±6
±1
%
%
Constant-current error
(device-to-device)(2)
All OUTn = ON, VOUTn = VOUTfix = 1 V, RIREF = 1.5 kΩ
at OUT0 to OUT15
ΔIOLC1
ΔIOLC2
All OUTn = ON, VOUTn = VOUTfix = 1 V, RIREF = 1.5 kΩ
at OUT0 to OUT15
Line regulation(3)
±0.5
%/V
All OUTn = ON, VOUTn = 1 V to 3V, VOUTfix = 1 V,
RIREF = 1.5 kΩ, at OUT0 to OUT15
ΔIOLC3
Load regulation(4)
±1
±3
%/V
V
VIREF
Reference voltage output
RIREF = 1.5 kΩ
1.16
1.20
1.24
(1) The deviation of each output from the average of OUT0–OUT15 constant-current. Deviation is calculated by the formula:
IOUTn
D (%) =
- 1 ´ 100
(IOUT0 + IOUT1 + ... + IOUT14 + IOUT15
)
16
.
(2) The deviation of the OUT0–OUT15 constant-current average from the ideal constant-current value.
Deviation is calculated by the following formula:
(IOUT0 + IOUT1 + ... IOUT14 + IOUT15
)
- (Ideal Output Current)
16
D (%) =
´ 100
Ideal Output Current
Ideal current is calculated by the formula:
1.20
IOUT(IDEAL) = 42 ´
RIREF
(3) Line regulation is calculated by this equation:
(IOUTn at VCC = 5.5 V) - (IOUTn at VCC = 3.0 V)
D (%/V) =
100
´
(IOUTn at VCC = 3.0 V)
5.5 V - 3 V
(4) Load regulation is calculated by the equation:
(IOUTn at VOUTn = 3 V) - (IOUTn at VOUTn = 1 V)
100
3 V - 1 V
D (%/V) =
´
(IOUTn at VOUTn = 1 V)
4
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SBVS139 –JANUARY 2010
SWITCHING CHARACTERISTICS
At VCC = 3.0 V to 5.5 V, TA = –40°C to +85°C, CL = 15 pF, RL = 130 Ω, RIREF = 1.5 kΩ, and VLED = 5.5 V. Typical values at
VCC = 3.3 V and TA = +25°C, unless otherwise noted.
TLC59281
PARAMETER
TEST CONDITIONS
SOUT (see Figure 5)
MIN
TYP
5
MAX
15
UNIT
ns
tR0
tR1
tF0
tF1
tD0
Rise time
OUTn (see Figure 4)
SOUT (see Figure 5)
OUTn (see Figure 4)
SCLK↑ to SOUT
10
5
30
ns
15
ns
Fall time
10
8
30
ns
20
ns
LAT↑ or BLANK↓ to OUTn sink current on
(see Figure 10)
tD1
12
12
30
30
+8
ns
ns
ns
Propagation delay time
Output on-time error(1)
LAT↑ or BLANK↑ to OUTn sink current off
(see Figure 10)
tD2
On/off latch data = all '1', 20 ns BLANK low level
one-shot pulse input (see Figure 4)
tON_ERR
–8
(1) Output on-time error (tON_ERR) is calculated by the formula: tON_ERR (ns) = tOUT_ON – BLANK low level one-shot pulse width (TWL2).
tOUT_ON indicates the actual on-time of the constant-current driver.
FUNCTIONAL BLOCK DIAGRAM
VCC
TI Reserved
Data
VCC
16
SIN
LSB
MSB
On/Off Control Shift Register
(1 Bit x 16 Channels)
SCLK
SOUT
0
15
16
MSB
LSB
LAT
On/Off Control Data Latch
(1 Bit x 16 Channels)
0
15
BLANK
16
IREF
GND
16-Channel Constant-Current Sink Driver
GND
¼
OUT0 OUT1
OUT14 OUT15
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DEVICE INFORMATION
SO-24
DBQ PACKAGE
(TOP VIEW)
QFN-24
RGE PACKAGE
(TOP VIEW)
GND
SIN
1
2
3
4
5
6
7
8
9
24 VCC
23 IREF
SCLK
LAT
22 SOUT
21 BLANK
20 OUT15
19 OUT14
18 OUT13
17 OUT12
16 OUT11
15 OUT10
14 OUT9
13 OUT8
1
2
3
4
5
6
18 BLANK
LAT
OUT0
OUT1
OUT2
OUT3
OUT4
17 OUT15
16 OUT14
15 OUT13
14 OUT12
13 OUT11
OUT0
OUT1
OUT2
OUT3
OUT4
Thermal Pad
(Bottom Side)
TLC59281
TLC59281
OUT5 10
OUT6 11
OUT7 12
NOTE: Thermal pad is not connected to GND internally. The thermal pad must be connected to GND via the PCB pattern.
6
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SBVS139 –JANUARY 2010
TERMINAL FUNCTIONS
TERMINAL
DBQ
NAME
RGE
I/O
DESCRIPTION
Serial data input for driver on/off control. When SIN = high level, data '1' are written into LSB
of the on/off control shift register at the rising edge of SCLK.
SIN
2
23
I
Serial data shift clock. Schmitt buffer input. All data in the on/off control shift register are
shifted toward the MSB by 1-bit synchronization of SCLK. A rising edge on SCLK is allowed
100 ns after a rising edge of LAT.
SCLK
LAT
3
24
1
I
I
I
Edge triggered latch. The data in the on/off control data shift register are transferred to the
on/off control data latch at this rising edge. At the same time, the data in the on/off control shift
register are replaced with TI reserved data for production test. LAT must be toggled only once
after the shift data are updated to avoid the on/off control latch data being replaced with TI
reserved data in the shift register. The reserved data is not a fixed number.
4
Blank, all outputs. When BLANK = high level, all constant-current outputs (OUT0–OUT15) are
forced off. When BLANK = low level, all constant-current outputs are controlled by the on/off
control data in the data latch.
BLANK
21
18
Constant-current value setting, OUT0–OUT15 sink constant-current is set to desired value by
connection to an external resistor between IREF and GND.
IREF
23
22
5
20
19
2
I/O
O
Serial data output. This output is connected to the MSB of the on/off data shift register. SOUT
data changes at the rising edge of SCLK.
SOUT
OUT0
Constant-current output. Each output can be tied together with others to increase the
constant-current. Different voltages can be applied to each output.
O
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
OUT8
OUT9
OUT10
OUT11
OUT12
OUT13
OUT14
OUT15
VCC
6
3
4
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
—
—
Constant-current output
Constant-current output
Constant-current output
Constant-current output
Constant-current output
Constant-current output
Constant-current output
Constant-current output
Constant-current output
Constant-current output
Constant-current output
Constant-current output
Constant-current output
Constant-current output
Constant-current output
Power-supply voltage
Power ground
7
8
5
9
6
10
11
12
13
14
15
16
17
18
19
20
24
1
7
8
9
10
11
12
13
14
15
16
17
21
22
GND
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PARAMETER MEASUREMENT INFORMATION
PIN EQUIVALENT INPUT AND OUTPUT SCHEMATIC DIAGRAMS
VCC
VCC
INPUT
SOUT
GND
GND
Figure 1. SIN, SCLK, LAT, BLANK
Figure 2. SOUT
OUTn
GND
Figure 3. OUT0 Through OUT15
TEST CIRCUITS
RL
CL
VCC
GND
VCC
VCC
IREF
OUTn
SOUT
GND
VLED
VCC
(1)
(1)
RIREF
CL
Figure 4. Rise Time and Fall Time Test Circuit for
OUTn
Figure 5. Rise Time and Fall Time Test Circuit for
SOUT
(1) CL includes measurement probe and jig capacitance.
VCC
OUT0
OUTn
GND OUT15
VCC
IREF
RIREF
VOUTn
VOUTFIX
Figure 6. Constant-Current Test Circuit for OUTn
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TIMING DIAGRAMS
TWH0, TWL0, TWH1, TWH2, TWL2
:
VCC
INPUT(1) 50%
GND
TWH
TWL
TSU0, TSU1, TH0, TH1
:
VCC
CLOCK
INPUT(1)
50%
GND
VCC
TSU
TH
DATA/CONTROL
INPUT(1)
50%
GND
(1) Input pulse rise and fall time is 1 ns to 3 ns.
Figure 7. Input Timing
tR0, tR1, tF0, tF1, tD0, tD1, tD2
:
VCC
INPUT(1)
50%
GND
tD
VOH or VOUTn
90%
50%
10%
OUTPUT
VOL or VOUTn
tR or tF
(1) Input pulse rise and fall time is 1 ns to 3 ns.
Figure 8. Output Timing
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DATA
0A
DATA
15B
DATA
14B
DATA DATA
13B
12B
DATA
11B
DATA
3B
DATA DATA
2B 1B
DATA
0B
DATA
15C
DATA
14C
DATA DATA DATA
13C 12C 11C
DATA
10C
SIN
SCLK
LAT
TH0
TH1
TSU0
TWH0
TSU1
1
2
3
4
5
1
2
3
TWL0
4
5
6
13
14
15
16
TWH1
Shift Register
LSB Data (Internal)
DATA
0A
DATA DATA
15B
DATA DATA
13B
12B
DATA DATA
3B
2B
DATA DATA
0B
DATA
15C
DATA
14C
DATA DATA
13C 12C
DATA
11C
RSV 0A
RSV 1A
RSV
14B
1B
Shift Register
LSB+1 Data (Internal)
DATA
1A
DATA
15B
DATA DATA
13B
DATA DATA
3B
DATA DATA
2B
1B
RSV
RSV
RSV
DATA
DATA DATA
DATA
14B
4B
Shift Register
MSB-1 Data (Internal)
DATA
14A
DATA DATA
15B
RSV 14A
RSV 15A
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
14B
Shift Register
MSB Data (Internal)
DATA
15A
DATA
15B
RSV
On/Off Control
Latch Data (Internal)
Previous On/Off Latch Data
Latest On/Off Latch Data
DATA
15A
DATA
15B
RSV 15A
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
SOUT
tD0
tR0/tF0
tWH2
BLANK
tWL2
tD2
ON
tD1
OFF
OFF
OUTn(1)
ON
ON
tOUTON
tD1
tD2
OFF
OFF
OUTn(2)
ON
ON
tF1
tD1
OFF
OFF
OUTn(3)
ON
ON
tR1
OFF
OFF
OUTn(4)
ON
(1) On/off latched data are '1'.
(2) On/off latched data are changed from '1' to '0' at the second LAT signal.
(3) On/off latched data are changed from '0' to '1' at the second LAT signal.
(4) On/off latched data are '0'.
Figure 9. Timing Diagram
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TYPICAL CHARACTERISTICS
At VCC = 3.3 V and TA = +25°C, unless otherwise noted.
REFERENCE RESISTOR
vs OUTPUT CURRENT
POWER DISSIPATION RATE
vs FREE-AIR TEMPERATURE
100000
10000
1000
4000
3000
2000
1000
0
TLC59281RGE
25200
10080
5040
TLC59281DBQ
3360
2520
2016
25
1680
1440
35
0
5
10
15
20
30
-40
-20
0
20
40
60
80
100
Output Current (mA)
Free-Air Temperature (°C)
Figure 10.
Figure 11.
OUTPUT CURRENT vs
OUTPUT VOLTAGE
OUTPUT CURRENT vs
OUTPUT VOLTAGE
40
35
30
25
20
15
10
5
40
39
38
37
36
35
34
33
32
31
30
IO = 30 mA
IO = 35 mA
IO = 30 mA
TA = +25°C
IO = 20 mA
IO = 10 mA
IO = 5 mA
TA = -40°C
IO = 2 mA
TA = +25°C
TA = +85°C
0
0
0.5
1.0
1.5
2.0
2.5
3.0
0
0.5
1.0
1.5
2.0
2.5
3.0
Output Voltage (V)
Output Voltage (V)
Figure 12.
Figure 13.
ΔIOLC vs AMBIENT TEMPERATURE
ΔIOLC vs OUTPUT CURRENT
4
3
4
3
IO = 35 mA
TA = +25°C
2
2
1
1
0
0
-1
-2
-3
-4
-1
-2
-3
-4
VCC = 3.3 V
VCC = 5 V
VCC = 3.3 V
VCC = 5 V
-40
-20
0
20
40
60
80
100
0
10
20
30
40
Ambient Temperature (°C)
Output Current (mA)
Figure 14.
Figure 15.
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TYPICAL CHARACTERISTICS (continued)
At VCC = 3.3 V and TA = +25°C, unless otherwise noted.
CONSTANT-CURRENT OUTPUT
VOLTAGE WAVEFORM
CH1-BLANK
(20 ns)
CH1 (2 V/div)
CH2-OUT0
(BLANK = 20 ns)
CH2 (2 V/div)
CH3 (2 V/div)
CH3-OUT15
(BLANK = 20 ns)
IOLC = 35 mA
TA = +25°C
RL = 130 W
CL = 15 pF
VLED = 5.5 V
Time (12.5 ns/div)
Figure 16.
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DETAILED DESCRIPTION
SETTING FOR THE CONSTANT SINK CURRENT VALUE
The constant-current values are determined by an external resistor (RIREF) placed between IREF and GND. The
resistor (RIREF) value is calculated by Equation 1.
VIREF (V)
RIREF (kW) =
´ 42
IOLC (mA)
Where:
VIREF = the internal reference voltage on the IREF pin (typically 1.20 V)
(1)
IOLC must be set in the range of 2 mA to 35 mA. The constant sink current characteristic for the external resistor
value is shown in Figure 10. Table 1 describes the constant-current output versus external resistor value.
Table 1. Constant-Current Output versus External Resistor Value
IOLCMax (mA, Typical)
RIREF (kΩ)
1.44
35
30
25
20
15
10
5
1.68
2.02
2.52
3.36
5.04
10.1
2
25.2
CONSTANT-CURRENT DRIVER ON/OFF CONTROL
When BLANK is low, the corresponding output is turned on if the data in the on/off control data latch are '1' and
remains off if the data are '0'. When BLANK is high, all outputs are forced off. This control is shown in Table 2.
Table 2. On/Off Control Data Truth Table
ON/OFF CONTROL LATCH DATA
CONSTANT-CURRENT OUTPUT STATUS
0
1
Off
On
When the IC is initially powered on, the data in the on/off control shift register and data latch are not set to the
respective default value. Therefore, the on/off control data must be written to the data latch before turning the
constant-current output on. BLANK should be at a high level when powered on because the constant-current
may be turned on as a result of random data in the on/off control latch.
The on/off data corresponding to any unconnected OUTn outputs should be set to ‘0’ before turning on the
remaining outputs. Otherwise, the supply current (ICC) increases while the LEDs are on.
Copyright © 2010, Texas Instruments Incorporated
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Product Folder Link(s): TLC59281
TLC59281
SBVS139 –JANUARY 2010
www.ti.com
REGISTER CONFIGURATION
The TLC59281 has an on/off control data shift register and data latch. Both the on/off control shift register and
latch are 16 bits long and are used to turn the constant-current drivers on and off. Figure 17 shows the shift
register and latch configuration. The data at the SIN pin are shifted in to the LSB of the shift register at the rising
edge of the SCLK pin; SOUT data change at the rising edge of SCLK. The timing diagram for data writing is
shown in Figure 18. The driver on/off is controlled by the data in the on/off control data latch.
The on/off data are latched into the data latch by a rising edge of LAT after the data are written into the on/off
control shift register by SIN and SCLK. At the same time, the data in the on/off control shift register are replaced
with TI reserved data for production test. Therefore, LAT must be input only once after the on/off data update to
avoid the on/off control data latch being replaced with TI reserved data in the shift register. When the IC initially
powers on, the data in the on/off control shift register and latch are not set to the default values; on/off control
data must be written to the on/off control data latch before turning the constant-current output on. BLANK should
be high when the IC is powered on because the constant-current may be turned on at that time as a result of
random values in the on/off data latch. All constant-current outputs are forced off when BLANK is high.
On/Off Control Shift Register (1 Bit ´ 16 Channels)
MSB
15
LSB
0
14
13
12
11
4
3
2
1
SIN
On/Off Data On/Off Data On/Off Data On/Off Data
On/Off Data On/Off Data
On/Off Data On/Off Data
¼
¼
for
for
for
for
for
for
for
for
SOUT
OUT15
OUT14
OUT13
OUT12
OUT3
OUT2
OUT1
OUT0
SCLK
MSB
15
LSB
0
14
13
12
11
4
3
2
1
On/Off Data On/Off Data On/Off Data On/Off Data
On/Off Data On/Off Data
On/Off Data On/Off Data
¼
for
for
for
for
for
for
for
for
LAT
OUT15
OUT14
OUT13
OUT12
OUT3
OUT2
OUT1
OUT0
On/Off Control Data Latch (1 Bit ´ 16 Channels)
16 Bits
To Constant Current Driver Control Block
Figure 17. On/Off Control Shift Register and Latch Configuration
14
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Copyright © 2010, Texas Instruments Incorporated
Product Folder Link(s): TLC59281
TLC59281
www.ti.com
SBVS139 –JANUARY 2010
DATA
0A
DATA
15B
DATA
14B
DATA
13B
DATA
12B
DATA
11B
DATA
3B
DATA
2B
DATA
1B
DATA
0B
DATA
15C
DATA
14C
DATA DATA DATA
13C 12C 11C
DATA
10C
SIN
SCLK
1
2
3
4
5
13
14
15
16
1
2
3
4
5
6
LAT
Shift Register
LSB Data (Internal)
DATA
0A
DATA
15B
DATA
14B
DATA DATA
13B
12B
DATA
3B
DATA
2B
DATA DATA
0B
DATA
15C
DATA
14C
DATA
13C
DATA
12C
DATA
11C
RSV 0A
RSV 1A
RSV
1B
Shift Register
LSB+1 Data (Internal)
DATA
1A
DATA
15B
DATA DATA
13B
DATA
4B
DATA
3B
DATA DATA
2B
1B
DATA
15C
DATA
14C
DATA
13C
DATA
12C
RSV
RSV
RSV
14B
Shift Register
MSB-1 Data(Internal)
DATA
14A
DATA DATA
14B
RSV 14A
RSV 15A
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
15B
Shift Register
MSB Data(Internal)
DATA
1A
DATA
15B
RSV
On/Off Control
Latch Data (Internal)
Previous On/Off Latch Data
Latest On/Off Latch Data
DATA
1A
DATA
15B
RSV 15A
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
SOUT
BLANK
OFF
OUTn(1)
OFF
ON
ON
OFF
OUTn(2)
OFF
ON
ON
OFF
OFF
OUTn(3)
OFF
ON
ON
OFF
OFF
OUTn(4)
OFF
ON
(1) On/off latched data are '1'.
(2) On/off latched data are changed from '1' to '0' at the second LAT signal.
(3) On/off latched data are changed from '0' to '1' at the second LAT signal.
(4) On/off latched data are '0'.
Figure 18. On/Off Control Operation
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Product Folder Link(s): TLC59281
PACKAGE OPTION ADDENDUM
www.ti.com
26-May-2010
PACKAGING INFORMATION
Status (1)
Eco Plan (2)
MSL Peak Temp (3)
Samples
Orderable Device
Package Type Package
Drawing
Pins
Package Qty
Lead/
Ball Finish
(Requires Login)
TLC59281DBQ
ACTIVE
ACTIVE
SSOP/QSOP
SSOP/QSOP
DBQ
DBQ
24
24
50
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
Purchase Samples
TLC59281DBQR
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
Request Free Samples
TLC59281RGE
PREVIEW
ACTIVE
24
24
TBD
Call TI
Call TI
Samples Not Available
Request Free Samples
TLC59281RGER
VQFN
VQFN
RGE
RGE
3000
250
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
TLC59281RGET
ACTIVE
24
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
Purchase Samples
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
20-Jul-2010
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TLC59281RGER
TLC59281RGET
VQFN
VQFN
RGE
RGE
24
24
3000
250
330.0
180.0
12.4
12.4
4.25
4.25
4.25
4.25
1.15
1.15
8.0
8.0
12.0
12.0
Q2
Q2
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
20-Jul-2010
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TLC59281RGER
TLC59281RGET
VQFN
VQFN
RGE
RGE
24
24
3000
250
346.0
190.5
346.0
212.7
29.0
31.8
Pack Materials-Page 2
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相关型号:
TLC59282RGET
16-channel constant current LED driver with 4-channel Grouped delay 24-VQFN -40 to 85
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