TLIN1028-Q1_技术文档

TLIN1028-Q1

ZHCSK68B –AUGUST 2019 –REVISED JUNE 2022

TLIN1028-Q1 汽车LIN 125mA 系统基础芯片(SBC)

1 特性

2 应用

• AEC-Q100（1 级）：符合汽车应用要求

• 符合本地互连网络(LIN) 物理层规范ISO/DIS

17987-4，并符合适用于LIN 的SAE J2602 推荐实

践要求

• 车身电子装置和照明

• 混合动力、电动和动力总成系统

• 汽车信息娱乐系统和仪表组

• 电器

• 提供功能安全

3 说明

– 有助于进行功能安全系统设计的文档

• 支持12V 应用

• 宽工作范围

TLIN1028-Q1 是一款本地互连网络 (LIN) 物理层收发

器，符合 LIN 2.2AISO/DIS 17987–4 标准，具有集成

的低压降(LDO) 稳压器。

– ±58V LIN 总线故障保护

– 支持3.3V 或5V 的LDO 输出

– 睡眠模式：超低电流消耗

允许以下类型的唤醒事件：

• LIN 总线或通过EN 引脚的本地唤醒

– 上电和断电无干扰运行

此 LIN 系统基础芯片 (SBC) 通过为功率微处理器、传

感器或其他器件提供电流高达 70mA (D) 或 125mA

（DRB 和 DDA）的 3.3V 或 5V 电压轨，来降低系统

的复杂性。TLIN1028-Q1 具有经过优化的限流波形整

形驱动器，可降低电磁辐射 (EME)。 TLIN1028-Q1 将

TXD 输入上的 LIN 协议数据流转化为 LIN 总线信号。

接收器将数据流转化为逻辑电平信号，此信号通过开漏

RXD 引脚发送到微处理器。

• 保护特性：

– ESD 保护、V_SUP欠压保护

– TXD 显性超时(DTO) 保护、热关断

– 系统级未供电节点或接地断开失效防护

• V_CC电源高达125mA，采用DRB 和DDA 封装

• 采用SOIC (8) 和HSOIC (8) 封装以及无引线

VSON (8) 封装，具有改善的自动光学检测(AOI) 功

能

器件信息

封装⁽¹⁾

封装尺寸（标称值）

4.90mm x 3.91mm

3.00mm x 3.00mm

器件型号

TLIN1028D-Q1

SOIC (8)

TLIN1028DDA-Q1

TLIN1028DRB-Q1

HSOIC (8)

VSON (8)

(1) 如需了解所有可用封装，请参阅数据表末尾的可订购产品附

录。

Commander

Node

V_BAT

Responder

Node

10 µF

V_SUP

Vcc

EN

100 nF

EN

1

8

2

8

2

V_DD

Commander

Node

100 nF

I/O

MCU w/o

pullup

MCU w/o

pullup

Pull-up

1 k

V

_DDI/O

V

_DDI/O

Low

Power

MCU

Low

Power

MCU

LIN

LIN Bus

4

LIN Controller

Or

SCI/UART

LIN Controller

Or

SCI/UART

5

220 pF

RXD

TXD

RXD

TXD

6

7

6

7

GND

3,PAD

GND

3,PAD

nRST

简化版原理图，指挥官节点⁽¹⁾

简化版原理图，响应者节点⁽²⁾

本文档旨在为方便起见，提供有关TI 产品中文版本的信息，以确认产品的概要。有关适用的官方英文版本的最新信息，请访问

www.ti.com，其内容始终优先。TI 不保证翻译的准确性和有效性。在实际设计之前，请务必参考最新版本的英文版本。

English Data Sheet: SLLSEX4

TLIN1028-Q1

ZHCSK68B –AUGUST 2019 –REVISED JUNE 2022

www.ti.com.cn

Table of Contents

9.2 Functional Block Diagram.........................................21

9.3 Feature Description...................................................21

9.4 Device Functional Modes..........................................25

10 Application and Implementation................................29

10.1 Application Information........................................... 29

10.2 Typical Application.................................................. 29

11 Power Supply Recommendations..............................34

12 Layout...........................................................................35

12.1 Layout Guidelines................................................... 35

12.2 Layout Example...................................................... 36

13 Device and Documentation Support..........................37

13.1 Documentation Support.......................................... 37

13.2 Related Links.......................................................... 37

13.3 接收文档更新通知................................................... 37

13.4 支持资源..................................................................37

13.5 Trademarks.............................................................37

13.6 Electrostatic Discharge Caution..............................38

13.7 术语表..................................................................... 38

14 Mechanical, Packaging, and Orderable

1 特性................................................................................... 1

2 应用................................................................................... 1

3 说明................................................................................... 1

4 Revision History.............................................................. 2

5 说明（续）.........................................................................3

6 Pin Configuration and Functions...................................3

7 Specifications.................................................................. 4

7.1 Absolute Maximum Ratings........................................ 4

7.2 ESD Ratings............................................................... 4

7.3 ESD Ratings, IEC Specification..................................4

7.4 Recommended Operating Conditions.........................5

7.5 Thermal Information....................................................5

7.6 Power Supply Characteristics.....................................5

7.7 Electrical Charateristics.............................................. 6

7.8 AC Switching Characteristics......................................8

7.9 Typical Characteristics..............................................10

8 Parameter Measurement Information..........................12

8.1 Test Circuit: Diagrams and Waveforms.....................12

9 Detailed Description......................................................21

9.1 Overview...................................................................21

Information.................................................................... 38

4 Revision History

注：以前版本的页码可能与当前版本的页码不同

Changes from Revision A (July 2020) to Revision B (June 2022)

Page

• 将提到的所有旧术语实例更改为“指挥官”和“响应者”。.............................................................................. 1

• Changed nRST is only dependent.. statement to: nRST is dependent in the nRST (Reset Output) section... 23

• Changed nRST: Float to nRST: GND in the sleep mode section of 图9-5 ......................................................25

Changes from Revision * (August 2019) to Revision A (July 2020)

Page

• 将文档状态从预告信息更改为量产数据.............................................................................................................1

• 添加了特性：提供功能安全.................................................................................................................................1

2

Submit Document Feedback

Product Folder Links: TLIN1028-Q1

TLIN1028-Q1

ZHCSK68B –AUGUST 2019 –REVISED JUNE 2022

www.ti.com.cn

5 说明（续）

休眠模式可实现超低电流消耗，该模式允许通过 LIN 总线或 EN 引脚实现唤醒。LIN 总线有两种状态：显性状态

（电压接近接地）和隐性状态（电压接近电池）。在受支配状态下，LIN 总线被内部上拉电阻器 (45kΩ) 和串联二

极管拉高，所以响应者节点应用无需外部上拉组件。按照 LIN 规范，指挥官节点应用需要一个外部上拉电阻器

(1kΩ) 加上一个串联二极管。

6 Pin Configuration and Functions

1

2

3

4

8

7

6

5

V_SUP

EN

V_CC

1

2

3

4

8

7

6

5

V_SUP

EN

V_CC

nRST

TXD

RXD

nRST

TXD

RXD

Thermal

Pad

GND

LIN

GND

LIN

Not to scale

图6-1. D Package, 8-Pin (SOIC), Top View

图6-2. DRB Package, 8-Pin (VSON), Top View

1

2

3

4

8

7

6

5

V_SUP

EN

V_CC

nRST

TXD

RXD

Thermal

Pad

GND

LIN

Not to scale

图6-3. DDA Package, 8-Pin (HSOIC), Top View

表6-1. Pin Functions

NAME

TYPE⁽¹⁾

DESCRIPTION

NO.

1

V_SUP

EN

HV Supply In Device supply voltage (connected to battery in series with external reverse-blocking diode)

2

D I

GND

HV I/O

D O

Enable input

3

GND

LIN

Ground ^{(2) (3)}

4

LIN bus single-wire transmitter and receiver

RXD output (open-drain) interface reporting state of LIN bus voltage

TXD input interface to control state of LIN output

Reset output (active low)

5

RXD

TXD

nRST

V_CC

6

D I

7

D O

8

Supply Out Output voltage from integrated LDO

(1) HV - High Voltage, DI - Digital Input, DO - Digital Output, HV I/O - High Voltage Input/Output

(2) When the thermal pad is present, it must be soldered to ground plane.

(3) If the DDA package is placed onto a D package footprint without the thermal pad soldered down, expect the performance to match the

D package and not the DDA package.

Submit Document Feedback

3

Product Folder Links: TLIN1028-Q1

TLIN1028-Q1

ZHCSK68B –AUGUST 2019 –REVISED JUNE 2022

www.ti.com.cn

7 Specifications

7.1 Absolute Maximum Ratings

(1)

MIN

–0.3

–58

MAX

UNIT

V

V_SUP

Supply voltage range

42

V_LIN

LIN Bus input voltage

58

V

V_CC50

Regulated 5 V Output Supply

Regulated 3.3 V Output Supply

Reset output voltage

6

V

–0.3

V_CC33

4.5

V

V_nRST

V_CC+ 0.3

V

V_{LOGIC_INPUT}

V_{LOGIC_OUTPUT}

I_VCC

Logic input voltage

6

V

Logic output voltage

V

V_CCsupply current⁽²⁾

300

8

mA

°C

I_O

Digital pin output current

Reset and RXD open-drain output current

Junction temperature

–8

–5

I_{O(nRST_RXD)}

T_J

5

165

150

–40

–65

T_stg

Storage temperature range

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under

Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device

reliability.

(2) Device will enter thermal shutdown prior to hitting this limit. If the limit is reached the device may sustain permanent damage.

7.2 ESD Ratings

VALUE

UNIT

Human body model (HBM) classification level H2: V_SUP, LIN, and WAKE with

respect to ground

±8000

Human body model (HBM) classification level 3A: all other pins, per AEC

Q100-002⁽¹⁾

V_(ESD)

Electrostatic discharge

±4000

±750

V

Charged device model (CDM) classification level

All pins

C5, per AEC Q100-011

(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

7.3 ESD Ratings, IEC Specification

VALUE

UNIT

V

Electrostatic discharge per IEC 62228-2 ⁽¹⁾, LIN, V_SUP

terminal to GND

Contact discharge

Indirect ESD discharge

Contact discharge

Air discharge

Pulse 1

±15000

±8000

±25000

-100

V_(ESD)

V

V_(ESD)

Powered electrostatic discharge per SAE J2962-1⁽³⁾

V

Pulse 2a

75

ISO 7637-2 and IEC 62215-3 transients per IEC

62228-1⁽²⁾

Transient

V

Pulse 3a

-150

Pulse 3b

100

ISO 7637 slow transients pulse

Per SAE J2962-1⁽⁴⁾

30

(1) IEC 62228-2 ESD testing performed at third party. Different system-level configurations may lead to different results.

(2) ISO 7637 is a system-level transient test. Different system-level configurations may lead to different results.

(3) SAE J2962-1 Testing performed at third party US3 approved EMC test facility.

(4) ISO 7637 is a system-level transient test. Results given here are specific to the SAE J2962-1 Test specification conditions. Different

system-level configurations may lead to different results.

4

Submit Document Feedback

Product Folder Links: TLIN1028-Q1

TLIN1028-Q1

ZHCSK68B –AUGUST 2019 –REVISED JUNE 2022

www.ti.com.cn

7.4 Recommended Operating Conditions

MIN

5.5

0

NOM

MAX

28

UNIT

V

V_SUP

Supply voltage

V_LIN

LIN bus input voltage

28

V

V_LOGIC5

V_LOGIC33

I_OH(DO)

I_OL(DO)

C_(VSUP)

C_(VCC)

ESR_CO

Logic pin voltage

0

5.25

3.465

V

Logic pin voltage

0

V

Digital terminal HIGH level output current

Digital terminal LOW level output current

V_SUPsupply capacitance

-2

mA

nF

µF

Ω

2

100

1.5

V_CCsupply capacitance; 20 µA to full load

V_CCsupply capacitance; no load to full load

Output ESR requirements

10

0.001

2

7.5 Thermal Information

TLIN1028

DRB

8 PINS

45.7

THERMAL METRIC⁽¹⁾

D

8 PINS

119.4

51.5

64.9

9.6

DDA

8 PINS

40.9

60.5

15.6

4.0

UNIT

R_θJA

Junction-to-ambient thermal resistance

Junction-to-case (top) thermal resistance

Junction-to-board thermal resistance

°C/W

R_θJC(top)

R_θJB

49.2

18.9

Junction-to-top characterization parameter

Junction-to-board characterization parameter

Junction-to-case (bottom) thermal resistance

0.7

ψ_JT

63.7

n/a

18.8

15.8

4.6

ψ_JB

R_θJC(bot)

2.7

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report.

7.6 Power Supply Characteristics

parameters valid over –40℃≤T_J≤150 ℃range (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

36

UNIT

V

SUPPLY VOLTAGE AND CURRENT

Device is operational beyond the LIN

defined nominal supply voltage range. See

图8-1 and 图8-2

Operational supply voltage (ISO/DIS 17987

Param 10)⁽²⁾

V_SUP

5.5

Normal and Standby Modes: Ramp VSUP

while LIN signal is a 10 kHz square wave

with 50 % duty cycle and swing between 5.5

V ≤V_LIN≤28 V. See 图8-1 and 图8-2

5.5

1.8

28

V

Nominal supply voltage (ISO/DIS 17987

Param 10)⁽²⁾

V_SUP

Sleep Mode

Ramp Up

28

4.2

2.7

V

UV_SUPR

UV_SUPF

Under voltage V_SUPthreshold

3.5

2.1

Ramp Down

Delta hysteresis voltage for V_SUPunder

voltage threshold

U_VHYS

I_SUP

1.5

V

Transceiver and LDO supply current (D

Package)

Transceiver normal mode dominant plus

LDO output

80

mA

Transceiver and LDO supply current (DRB

and DDA Packages)

Transceiver normal mode dominant plus

LDO output

I_SUP

135

Normal Mode: EN = V_CC, bus dominant:

total bus load where R_LIN≥500 Ω and C_LIN

≤10 nF

1.2

1

5

mA

I_SUPTRXDOM

Supply current transceiver only

Standby Mode: EN = 0 V, bus dominant:

total bus load where R_LIN≥500 Ω and C_LIN

≤10 nF

2.1

Submit Document Feedback

5

Product Folder Links: TLIN1028-Q1

TLIN1028-Q1

ZHCSK68B –AUGUST 2019 –REVISED JUNE 2022

www.ti.com.cn

7.6 Power Supply Characteristics (continued)

parameters valid over –40℃≤T_J≤150 ℃range (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Normal Mode: EN = V_CC

Bus recessive: LIN = V_SUP

,

450

775

µA

,

Standby Mode: EN = 0 V, LIN = recessive =

_SUP,I_OHfrom processor ≤1 µA

38

55

33

V

I_SUPTRXREC

Supply current transceiver only⁽³⁾

Added Standby Mode current through the

RXD pull-up resistor with a value of 100 kΩ:

EN = 0 V, LIN = recessive = VSUP, RXD =

GND⁽¹⁾

µA

5.5 V < V_SUP≤28 V, LIN = V_SUP, EN = 0 V,

TXD and RXD floating

I_SUPTRXSLP

Sleep mode supply current transceiver only

17

REGULATED OUTPUT V_CC

V_CC

Regulated output (D package)

V_SUP= 5.5 to 28 V, I_CC= 1 to 70 mA

2

%

–2

V_CC

Regulated output (DRB and DDA package) V_SUP= 5.5 to 28 V, I_CC= 1 to 125 mA

%

Line regulation

50

mV

∆V_CC(∆VSUP)

∆V_CC(∆VSUPL)

V_SUP= 5.5 to 28 V, ΔV_CC, I_CC= 10 mA

I_CC= 1 to 125 mA, V_SUP= 14 V, ΔV_CC

I_CC= 1 to 70 mA, V_SUP= 14 V, ΔV_CC

Load regulation (DRB and DDA package)

Load regulation (D package)

Dropout voltage (5 V LDO) (DRB and DDA

package)

V_DROP

300

350

600

700

mV

V

_SUP–V_CC, I_CC= 125 mA;

_SUP–V_CC, I_CC= 70 mA;

_SUP–V_CC, I_CC= 125 mA;

_SUP–V_CC, I_CC= 70 mA;

Dropout voltage (5 V LDO) (D package)

Dropout voltage (3.3 V LDO) (DRB and DDA

package)

V_DROP

Dropout voltage (3.3 V LDO) (D package)

Under voltage 5 V V_CCthreshold

350

4.7

700

mV

V

UV_CC5R

UV_CC5F

UV_CC33R

UV_CC33F

Ramp Up

4.86

Under voltage 5 V V_CCthreshold

Ramp Down

Ramp Up

4.2

4.45

2.9

V

Under voltage 3.3 V V_CCthreshold ⁽³⁾

Under voltage 3.3 V V_CCthreshold⁽³⁾

3.1

15

V

Ramp Down

2.5

1

2.75

V

VCC undervoltage deglitch time. An UV_CC

event will not be recognized unless the

duration is longer than this.⁽³⁾

t_DET(UVCC)

C_nRST= 20pF

µs

I_CCOUT

I_CCOUTL

Output current (D Package)

Output current (DRB and DDA package)

Output current limit

V_CCin regulation with 12 V V_SUP

V_CCshort to ground

0

70

125

275

mA

V_RIP= 0.5 V_PP, Load = 10 mA, ƒ= 100 Hz,

CO = 10 μF

PSRR

Power supply rejection ratio⁽³⁾

60

10

dB

T_SDR

Thermal shutdown temperature

Thermal shutdown hysteresis

Internal junction temperature - rising

Internal junction temperature - falling

165

°C

T_SDF

150

T_SDHYS

(1) RXD pin is an open-drain output. In standby mode RXD is pulled low which has the device pulling current through V_SUPthrough the

pull-up resisitor to V_CC. The value of the pull-up resistor impacts the standby mode current. A 10 kΩ resistor value can add as much

as 500 µA of current.

(2) Operational supply voltage and nominal supply voltage are in relationship to the LIN transceiver. A VSUP above 28 V means the

device will function but may not meet the rest of the parametric data while the nominal range means the device will meet the

parametric data minus any differences provided in the test conditions.

(3) Specified by design

7.7 Electrical Charateristics

parameters valid over –40℃≤T_J≤150 ℃range (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

RXD OUTPUT TERMINAL (OPEN-DRAIN)

Based upon a 2 kΩto 10 kΩexternal pull-

up to V_CC

V_OL

I_OL

Output low voltage

0.2

V_CC

mA

Low-level output current, open-drain

LIN = 0 V, RXD = 0.4 V

1.5

6

Submit Document Feedback

Product Folder Links: TLIN1028-Q1

TLIN1028-Q1

ZHCSK68B –AUGUST 2019 –REVISED JUNE 2022

www.ti.com.cn

7.7 Electrical Charateristics (continued)

parameters valid over –40℃≤T_J≤150 ℃range (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

I_LKG

Leakage current, high-level

LIN = V_SUP, RXD = V_CC

0

5

µA

–5

TXD INPUT TERMINAL

V_IL

Low-level input voltage

0.8

5.5

5

V

–0.3

2

V_IH

I_IH

High-level input voltage

High-level input leakage current

Internal pull-up resistor value

TXD = high

0

µA

kΩ

–5

125

R_TXD

350

800

LIN TERMINAL (REFERENCED TO V_SUP

)

LIN recessive, TXD = high, I_O= 0 mA, V_SUP

= 5.5 V to 36 V

V_OH

High-level output voltage⁽¹⁾

0.85

V_SUP

V

LIN dominant, TXD = low, V_SUP= 5.5 V to

36 V

V_OL

Low-level output voltage⁽¹⁾

High-level input voltage⁽¹⁾

Low-level input voltage⁽¹⁾

0.2

0.6

LIN recessive, TXD = high, I_O= 0 mA, V_SUP

= 5.5 V to 36 V

V_IH

0.47

0.4

LIN dominant, TXD = low, V_SUP= 5.5 V to

36 V

V_IL

0.53

42

TXD & RXD open, V_LIN= 5.5 V to 42 V, Bus

Load = 60 kΩ+ diode and 1.1 kΩ+ diode

V_SUPwhere impact of recessive LIN bus < 5%

(ISO/DIS 17987 Param 11)

V_{SUP_NON_OP}

–0.3

TXD = 0 V, V_LIN= 36 V, R_MEAS= 440 Ω,

V_SUP= 36 V,

I _{BUS_LIM}

Limiting current (ISO/DIS 17987 Param 12)

40

90

200

mA

V_BUSdom< 4.518 V; 图8-6

V_LIN= 0 V, V_SUP= 12 V Driver off/recessive,

Receiver leakage current, dominant (ISO/DIS

17987 Param 13)

I _{BUS_PAS_dom}

I _{BUS_PAS_rec1}

I _{BUS_PAS_rec2}

I _{BUS_NO_GND}

mA

µA

–1

R

_MEAS= 499 Ω; 图8-7

Receiver leakage current, recessive (ISO/DIS

17987 Param 14)

V_LIN≥V_SUP, 5.5 V ≤V_SUP≤36 V Driver

off, R_MEAS= 1 kΩ; 图8-8

20

8

Receiver leakage current, recessive (ISO/DIS

17987 Param 14)

µA

V_LIN= V_SUP, Driver off, R_MEAS= 1 kΩ; 图8-8

–8

–1

Leakage current, loss of ground (ISO/DIS 17987 GND = V_SUP, V_SUP= 12 V, 0 V ≤V_LIN≤28

1

mA

Param 15)

V, R_MEAS= 1 kΩ; 图8-9

Leakage current, loss of supply (ISO/DIS 17987

Param 16)

0 V ≤V_LIN≤28 V, V_SUP= GND, R_MEAS

10 kΩ; 图8-10

=

I_{BUS_NO_BAT}

V_BUSdom

V_BUSrec

8

µA

LIN dominant (including LIN dominant for

wake up); 图8-3, 图8-4

Low-level input voltage (ISO/DIS 17987 Param

17)

0.4

V_SUP

High-level input voltage (ISO/DIS 17987 Param

18)

0.6

LIN recessive; 图8-3, 图8-4

Receiver center threshold (ISO/DIS 17987 Param

19)

V_{BUS_CNT}

V_HYS

0.475

0.07

0.4

0.5

0.525

0.175

1.0

V_SUP

V

V_{BUS_CNT}= (V_IL+ V_IH)/2; 图8-3, 图8-4

V_HYS= (V_IL- V_IH); 图8-3, 图8-4

By design and characterization

Hysteresis voltage (ISO/DIS 17987 Param 20)⁽²⁾

Serial diode LIN term pull-up path (ISO/DIS 17987

Param 21)

V_{SERIAL_DIODE}

0.7

45

Internal Pull-up resistor to V_SUP(ISO/DIS 17987

Param 26)

R_PU

Normal and Standby modes

20

60

kΩ

I_RSLEEP

C_LINPIN

Pull-up current source to V_SUP

Capacitance of the LIN pin ⁽⁶⁾

Sleep mode, V_SUP= 12 V, LIN = GND

µA

pF

–20

–2

25

EN INPUT TERMINAL

V_IH

V_IL

High-level input voltage

2

–0.3

30

5.5

0.8

500

6

V

Low-level input voltage

Hysteresis voltage

V_HYS

I_IL

By design and characterization

EN = Low

mV

µA

kΩ

Low-level input current

Internal pull-down resistor

0

–6

R_EN

125

350

800

nRST TERMINAL (OPEN DRAIN OUTPUT)

I_LKG

V_OL

I_OL

Leakage current, high-level

Low-level output voltage

LIN = V_SUP, nRST = V_CC

6

µA

V_CC

mA

–6

Based upon external pull up to V_CC

LIN = 0 V, nRST = 0.4 V

0.2

Low-level output current, open-drain

1.5

Submit Document Feedback

7

Product Folder Links: TLIN1028-Q1

TLIN1028-Q1

ZHCSK68B –AUGUST 2019 –REVISED JUNE 2022

www.ti.com.cn

7.7 Electrical Charateristics (continued)

parameters valid over –40℃≤T_J≤150 ℃range (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

DUTY CYCLE CHARACTERISTICS

TH_REC(MAX)= 0.744 x V_SUP

,

TH_DOM(MAX)= 0.581 x V_SUP

,

Duty Cycle 1 (ISO/DIS 17987 Param 27 and

J2602 Normal battery)^{(3) (4)}

V_SUP= 7 V to 18 V, t_BIT= 50/52 µs,

D1 = t_{BUS_rec(min)}/(2 x t_BIT) (See 图8-11, 图

8-12)

D1

D2

D3

0.396

TH_REC(MIN)= 0.422 x V_SUP

TH_DOM(MIN)= 0.284 x V_SUP, V_SUP= 7.6 V to

18 V,

,

Duty Cycle 2 (ISO/DIS 17987 Param 28 and

J2602 Normal battery)^{(3) (4)}

0.581

t_BIT= 50/52 µs (20 kbps), D2 =

t

_{BUS_rec(MAX)}/(2 x t_BIT) (See 图8-11, 图8-12)

TH_REC(MAX)= 0.778 x V_SUP, TH_DOM(MAX)

=

0.616 x V_SUP

,

Duty Cycle 3 (ISO/DIS 17987 Param 29 and

J2602 Normal battery)^{(3) (4)}

V_SUP= 7 V to 18 V, t_BIT= 96 µs (10.4 kbps),

D3 = t_{BUS_rec(min)}/(2 x t_BIT) (See 图8-11, 图

8-12)

0.417

TH_REC(MIN)= 0.389 x V_SUP

,

TH_DOM(MIN)= 0.251 x V_SUP

,

V_SUP= 7.6 V to 18 V, t_BIT= 96 µs (10.4

kbps),

Duty Cycle 4 (ISO/DIS 17987 Param 30 and

J2602 Normal battery)^{(3) (4)}

D4

0.59

D4 = t_{BUS_rec(MAX)}/(2 x t_BIT) (See 图8-11, 图

8-12)

TH_REC(MAX)= 0.665 x V_SUP, TH_DOM(MAX)

0.499 x V_SUP, V_SUP= 5.5 V to 7 V, t_BIT

50/52 µs, D1_LB= t_{BUS_rec(min)/(2 x tBIT)}(See 图

8-11, 图8-12)

=

Duty Cycle 1

D1_LB

D2_LB

D3_LB

D4_LB

0.396

J2602 Low battery ^{(4) (5)}

T TH_REC(MIN)= 0.496 x V_SUP, TH_DOM(MIN)

0.361 x V_SUP, V_SUP= 6.1 V to 7.6 V, t_BIT

50/52 µs, D2_LB= t_{BUS_rec(MAX})/(2 x t_BIT) (See

=

Duty Cycle 2

0.581

J2602 Low battery ^{(4) (5)}

图8-11, 图8-12)

TH_REC(MAX)= 0.665 x V_SUP, TH_DOM(MAX)

=

0.499 x V_SUP, V_SUP= 5.5 V to 7 V, t_BIT= 96

µs, D3_LB= t_{BUS_rec(min)/(2 x tBIT)}(See 图8-11,

图8-12)

Duty Cycle 3

0.417

J2602 Low battery ^{(4) (5)}

T TH_REC(MIN)= 0.496 x V_SUP, TH_DOM(MIN)

0.361 x V_SUP, V_SUP= 6.1 V to 7.6 V, t_BIT

96 µs, D4_LB= t_{BUS_rec(MAX})/(2 x t_BIT) (See 图

8-11, 图8-12)

=

Duty Cycle 4

0.59

J2602 Low battery ^{(4) (5)}

(1) SAE J2602 loads include: commander node: 5.5 nF; 4 kΩ and for a commander node: 5.5 nF; 875 Ω

(2) V_HYSis defined for both ISO 17987 and SAE J2602-1.

(3) ISO 17987 loads include 1 nF; 1 kΩ/ 6.8nF; 660 Ω/ 10 nF; 500 Ω; with t_BITvalues of 50 µs and 96 µs

(4) SAE J2602 loads include: commander node: 5.5 nF; 4 kΩ/ 899 pF; 20 kΩ and for a responder node: 5.5 nF; 875 Ω/ 899 pF; 900 Ω;

with t_BITvalues of 52 µs and 96 µs

(5) ISO 17987 does not have a low battery specification. Using the ISO 17987 loads these low battery duty cycle parameters are covered

for t_BITvalues of 50 µs and 96 µs

(6) Specified by design

7.8 AC Switching Characteristics

parameters valid over –40℃≤T_J≤150 ℃range (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

6

UNIT

µs

DEVICE SWITCHING CHARACTERISTICS

t_{rx_pdr}

t_{rx_pdf}

Receiver rising/falling propagation delay time

(ISO/DIS 17987 Param 31)

R_RXD= 2.4 kΩ, C_RXD= 20 pF

(See 图8-13, 图8-14 and 图8-18)

Rising edge with respect to falling edge,

(t_{rx_sym}= t_{rx_pdf}–t_{rx_pdr}), R_RXD= 2.4 kΩ,

C_RXD= 20 pF (图8-13, 图8-14 and 图

8-18)

Symmetry of receiver propagation delay time

Receiver rising propagation delay time (ISO/DIS

17987 Param 32)

t_{rs_sym}

2

µs

–2

LIN wakeup time (minimum dominant time on

LIN bus for wakeup)

t_LINBUS

25

100

150

µs

See 图8-17, 图9-3 and 图9-4

8

Submit Document Feedback

Product Folder Links: TLIN1028-Q1

TLIN1028-Q1

ZHCSK68B –AUGUST 2019 –REVISED JUNE 2022

www.ti.com.cn

7.8 AC Switching Characteristics (continued)

parameters valid over –40℃≤T_J≤150 ℃range (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

17

MAX

UNIT

Time to clear false wake-up prevention logic if

LIN bus had a bus stuck dominant fault

(recessive time on LIN bus to clear bus stuck

dominant fault)

t_CLEAR

8

50

µs

See 图9-4

t_{TXD_DTO}

t_EN

Dominant state time out

20

3

34

80

12

ms

µs

Time of enable pin state change before

initiating mode change or sampling TXD

pin: See 图8-15

Enable pin deglitch time⁽¹⁾

Time to change from normal mode to sleep

or standby after TXD pin sampling after

EN pin set low: See 图8-15

Mode change delay time from normal mode to

sleep or standby modes

t_{MODE_CHANGE}

20

µs

Time to change from sleep mode to normal

mode through EN pin and not due to a

wake event; RXD pulled up to V_CC: See 图

8-15

Mode change delay time from sleep mode to

normal mode

t_{MODE_CHANGE}

400

Time for normal mode to initialize and data

on RXD pin to be valid after t_EN: See 图

8-15

t_NOMINT

Normal mode initialization time

Power-up time

35

2

µs

Upon power up, time it takes for nRST to

go high

t_PWR

ms

(1) Specified by design

Submit Document Feedback

9

Product Folder Links: TLIN1028-Q1

TLIN1028-Q1

ZHCSK68B –AUGUST 2019 –REVISED JUNE 2022

www.ti.com.cn

7.9 Typical Characteristics

80

75

70

65

60

55

50

45

130

125

120

115

110

105

100

95

40

-40°C

25°C

85°C

105°C

115°C

125°C

90

35

30

25

20

-40°C

25°C

85°C

105°C

125°C

85

80

75

0

3

6

9

12

15

V_SUP(V)

18

21

24

27

30

D001

5

7.5

10

12.5

15

17.5

VSUP (V)

20

22.5

25

27.5

30

Package = DRB

V_CC= 3.3 V

Temp = Ambient

Package = D

V_CC= 3.3 V

Temp = Ambient

图7-2. I_CCvs V_SUPvs Temperature

图7-1. I_CCvs V_SUPvs Temperature

130

128

126

124

122

120

118

116

114

112

110

108

106

104

102

100

80

75

70

65

60

55

50

45

40

35

30

25

-40°C

25°C

85°C

105°C

115°C

125°C

-40°C

25°C

85°C

105°C

125°C

20

3

6

9

12

15

18

V_SUP(V)

21

24

27

30

33

D006

4

6

8

10

12

14

16

18

20

22

24

26

28

30

V_SUP(V)

Package = DDA

V_CC= 3.3 V

Temp = Ambient

Package = D

V_CC= 5 V

Temp = Ambient

图7-3. I_CCvs V_SUPvs Temperature

图7-4. I_CCvs V_SUPvs Temperature

130

120

110

100

90

130

120

110

100

90

80

70

60

50

-40°C

25°C

85°C

105°C

125°C

-40°C

25°C

85°C

105°C

125°C

50

40

30

20

5

7.5

10

12.5

15

17.5

VSUP (V)

20

22.5

25

27.5

30

4

6

8

10

12

14

16

V_SUP(V)

18

20

22

24

26

28

30

Package = DRB

V_CC= 5 V

Temp = Ambient

Package = DDA

V_CC= 5 V

Temp = Ambient

图7-5. I_CCvs V_SUPvs Temperature

图7-6. I_CCvs V_SUPvs Temperature

10

Submit Document Feedback

Product Folder Links: TLIN1028-Q1

TLIN1028-Q1

ZHCSK68B –AUGUST 2019 –REVISED JUNE 2022

www.ti.com.cn

20

19

18

17

16

15

14

13

12

11

10

9

22

20

18

16

14

12

10

8

-40°C

25°C

85°C

105°C

115°C

125°C

-40°C

25°C

85°C

105°C

115°C

125°C

5

7.5

10

12.5

15

17.5

V_SUP(V)

20

22.5

25

27.5

30

D003

5

7.5

10

12.5

15

17.5

V_SUP(V)

20

22.5

25

27.5

30

D013

Package = D

V_CC= 3.3 V

Temp = Ambient

Package = DRB

V_CC= 3.3 V

Temp = Ambient

图7-7. Sleep Mode Current Across V_SUPand

图7-8. Sleep Mode Current Across V_SUPand

Temperature

22

20

18

16

14

12

10

8

20

19

18

17

16

15

14

13

12

11

10

9

-40°C

25°C

85°C

105°C

115°C

125°C

-40°C

25°C

85°C

105°C

115°C

125°C

8

7.5

10

12.5

15

17.5

V_SUP(V)

20

22.5

25

27.5

30

D023

7.5

10

12.5

15

17.5

V_SUP(V)

20

22.5

25

27.5

30

D008

Package = DDA

V_CC= 3.3 V

Temp = Ambient

Package = D

V_CC= 5 V

Temp = Ambient

图7-9. Sleep Mode Current Across V_SUPand

图7-10. Sleep Mode Current Across V_SUPand

Temperature

22

20

18

16

14

12

10

8

22

20

18

16

14

12

10

8

-40°C

25°C

85°C

-40°C

25°C

85°C

105°C

115°C

125°C

105°C

115°C

125°C

7.5

10

12.5

15

17.5

V_SUP(V)

20

22.5

25

27.5

30

D018

7.5

10

12.5

15

17.5

V_SUP(V)

20

22.5

25

27.5

30

D028

Package = DRB

V_CC= 5 V

Temp = Ambient

Package = DDA

V_CC= 5 V

Temp = Ambient

图7-11. Sleep Mode Current Across V_SUPand

图7-12. Sleep Mode Current Across V_SUPand

Temperature

备注

For the LDO I_CCvs V_SUPvs Temperature typical curves the data was collected on a high-k EVM board

using a forced air system. The curves show performance based upon thermal resistance R_θJB

.

Submit Document Feedback

11

Product Folder Links: TLIN1028-Q1

TLIN1028-Q1

ZHCSK68B –AUGUST 2019 –REVISED JUNE 2022

www.ti.com.cn

8 Parameter Measurement Information

8.1 Test Circuit: Diagrams and Waveforms

5

8

1

V_CC

RXD

V_CC

Power Supply

Resolution: 10mV/ 1mA

Accuracy: 0.2%

2

V_SUP

EN

V_PS

7

6

4

Pulse Generator

t_R/t_F^:Square Wave: < 20 ns

t_R/t_F^:Triangle Wave: < 40ns

Frequency: 20 Hz

LIN

3

Jitter: < 25 ns

GND

Measurement Tools

O-scope:

DMM

图8-1. Test System: Operating Voltage Range with RX and TX Access

Delta t = + 5 µs (t_BIT

= 50 µs)

Trigger Point

RX

2 * t_BIT= 100 µs (20 kBaud)

图8-2. RX Response: Operating Voltage Range

Period T = 1/f

Amplitude

(signal range)

LIN Bus Input

Frequency: f = 20 Hz

Symmetry: 50%

图8-3. LIN Bus Input Signal

12

Submit Document Feedback

Product Folder Links: TLIN1028-Q1

TLIN1028-Q1

ZHCSK68B –AUGUST 2019 –REVISED JUNE 2022

www.ti.com.cn

5

2

V_CC

8

1

Power Supply

Resolution: 10mV/ 1mA

Accuracy: 0.2%

RXD

EN

V_CC

V_SUP

V_PS

7

6

4

LIN

Pulse Generator

t_R/t_F^:Square Wave: < 20 ns

t_R/t_F^:Triangle Wave: < 40ns

Frequency: 20 Hz

3

GND

Jitter: < 25 ns

Measurement Tools

O-scope:

DMM

图8-4. LIN Receiver Test with RX access

5

2

8

1

V_CC

Power Supply 1

Resolution: 10mV/ 1mA

Accuracy: 0.2%

V_SUP

EN

V_PS1

D

4

3

6

LIN

Power Supply 2

Resolution: 10mV/ 1mA

Accuracy: 0.2%

3

V_PS2

R_BUS

GND

Measurement Tools

O-scope:

DMM

图8-5. V_{SUP_NON_OP}Test Circuit

Submit Document Feedback

13

Product Folder Links: TLIN1028-Q1

TLIN1028-Q1

ZHCSK68B –AUGUST 2019 –REVISED JUNE 2022

www.ti.com.cn

5

2

1

7

V_CC

Power Supply

Resolution: 10mV/ 1mA

Accuracy: 0.2%

V_SUP

EN

V_PS

R_MEAS

=

440 ꢀ

7

6

4

LIN

Pulse Generator

t_R/t_F^:Square Wave: < 20 ns

t_R/t_F^:Triangle Wave: < 40ns

Frequency: 20 Hz

3

TXD

GND

T = 10 ms

Jitter: < 25 ns

Measurement Tools

O-scope:

DMM

图8-6. Test Circuit for I_{BUS_LIM}at Dominant State (Driver on)

5

8

V_CC

Power Supply

Resolution: 10mV/ 1mA

Accuracy: 0.2%

2

1

V_SUP

EN

V_PS

R_MEAS= 499 Ω

4

7

6

LIN

3

GND

Measurement Tools

O-scope:

DMM

图8-7. Test Circuit for I_{BUS_PAS_dom}; TXD = Recessive State V_BUS= 0 V

14

Submit Document Feedback

Product Folder Links: TLIN1028-Q1

TLIN1028-Q1

ZHCSK68B –AUGUST 2019 –REVISED JUNE 2022

www.ti.com.cn

Power Supply 1

Resolution: 10mV/ 1mA

Accuracy: 0.2%

5

2

8

1

V_CC

V_PS1

V_SUP

EN

Power Supply 2

Resolution: 10mV/ 1mA

Accuracy: 0.2%

R_MEAS

=1 kΩ

4

7

6

LIN

V_PS2

V_PS22 V/s ramp

[8 V ‰ 36 V]

3

GND

V Drop across resistor

< 20 mV

Measurement Tools

O-scope:

DMM

图8-8. Test Circuit for I_{BUS_PAS_rec}

Power Supply 1

Resolution: 10mV/ 1mA

Accuracy: 0.2%

5

2

8

1

V_CC

V_PS1

V_SUP

EN

Power Supply 2

Resolution: 10mV/ 1mA

Accuracy: 0.2%

R_MEAS

= 1 kΩ

4

3

7

6

LIN

V_PS2

V_PS22 V/s ramp

[0 V ‰ 36 V]

GND

V Drop across resistor

< 1V

Measurement Tools

O-scope:

DMM

图8-9. Test Circuit for I_{BUS_NO_GND}Loss of GND

Submit Document Feedback

15

Product Folder Links: TLIN1028-Q1

TLIN1028-Q1

ZHCSK68B –AUGUST 2019 –REVISED JUNE 2022

www.ti.com.cn

8

1

5

V_CC

2

V_SUP

EN

Power Supply 2

Resolution: 10mV/ 1mA

Accuracy: 0.2%

V_PS

R_MEAS

10 kΩ

=

4

7

6

LIN

V_PS2 V/s ramp

[0 V ‰ 36 V]

3

GND

V Drop across resistor

< 1V

Measurement Tools

O-scope:

DMM

图8-10. Test Circuit for I_{BUS_NO_BAT}Loss of Battery

5

2

8

1

V_CC

Power Supply 1

Resolution: 10mV/ 1mA

Accuracy: 0.2%

V_SUP

EN

V_PS1

R_MEAS

4

7

6

LIN

Power Supply 2

Resolution: 10mV/ 1mA

Accuracy: 0.2%

Pulse Generator

t_R/t_F^:Square Wave: < 20 ns

t_R/t_F^:Triangle Wave: < 40ns

Frequency: 20 Hz

3

V_PS2

TXD

GND

Jitter: < 25 ns

Measurement Tools

O-scope:

DMM

图8-11. Test Circuit Slope Control and Duty Cycle

16

Submit Document Feedback

Product Folder Links: TLIN1028-Q1

TLIN1028-Q1

ZHCSK68B –AUGUST 2019 –REVISED JUNE 2022

www.ti.com.cn

t_BIT

RECESSIVE

TXD (Input)

DOMINANT

TH_REC(MAX)

TH_DOM(MAX)

TH_REC(MIN)

TH_DOM(MIN)

Thresholds

RX Node 1

LIN Bus

Signal

V_SUP

Thresholds

RX Node 2

t_{BUS_REC(MIN)}

t_{BUS_DOM(MAX)}

RXD: Node 1

D1 (20 kbps)

D3 (10.4 kbps)

D = t_{BUS_REC(MIN)}/(2 x t_BIT

)

t_{BUS_DOM(MIN)}

t_{BUS_REC(MAX)}

RXD: Node 2

D2 (20 kbps)

D4 (10.4 kbps)

D = t_{BUS_REC(MAX)}/(2 x t_BIT

)

图8-12. Definition of Bus Timing

V_CC

2.4 kΩ

5

2

V_CC

8

1

RXD

V_CC

Power Supply

Resolution: 10mV/ 1mA

Accuracy: 0.2%

20 pF

V_SUP

EN

V_PS

4

7

6

LIN

Pulse Generator

t_R/t_F^:Square Wave: < 20 ns

t_R/t_F^:Triangle Wave: < 40ns

Frequency: 20 Hz

3

GND

Jitter: < 25 ns

Measurement Tools

O-scope:

DMM

图8-13. Propagation Delay Test Circuit

Submit Document Feedback

17

Product Folder Links: TLIN1028-Q1

TLIN1028-Q1

ZHCSK68B –AUGUST 2019 –REVISED JUNE 2022

www.ti.com.cn

TH_REC(MAX)

Thresholds

RX Node 1

TH_DOM(MAX)

LIN Bus

Signal

V_SUP

TH_REC(MIN)

Thresholds

RX Node 2

TH_DOM(MIN)

RXD: Node 1

D1 (20 kbps)

t_{rx_pdr(1)}

t_{rx_pdf(1)}

D3 (10.4 kbps)

RXD: Node 2

D2 (20 kbps)

D4 (10.4 kbps)

t_{rx_pdr(2)}

t_{rx_pdf(2)}

图8-14. Propagation Delay

Wake Event

t_{MODE_CHANGE}

t_NOMINT

t_EN

EN

t_EN

Can be high or low

TXD

EN

Filter/TXD

Sampling

Window

Enable

Filter

Transition

Sleep

Standby

Transition

Normal

MODE

Mirrors

Bus

Wake Request

RXD = Low

RXD

Indeterminate Ignore

‹

Floating for sleep

Indeterminate Ignore

Mirrors Bus

Can be high or low

TXD

EN

Filter/TXD

Sampling

Window

Enable

Filter

Transition

Standby

Transition

Normal

MODE

Wake Request

RXD = Low

Mirrors

Bus

RXD

Indeterminate Ignore

Mirrors Bus

图8-15. Mode Transitions

18

Submit Document Feedback

Product Folder Links: TLIN1028-Q1

TLIN1028-Q1

ZHCSK68B –AUGUST 2019 –REVISED JUNE 2022

www.ti.com.cn

EN

t_EN

Weak Internal Pullup

TXD

Weak Internal Pullup

V_SUP

LIN

RXD

Floating

t_{MODE_CHANGE}

+

Sleep

MODE

Normal

t_NOMINIT

图8-16. Wakeup Through EN

Submit Document Feedback

19

Product Folder Links: TLIN1028-Q1

TLIN1028-Q1

ZHCSK68B –AUGUST 2019 –REVISED JUNE 2022

www.ti.com.cn

0.6 x V_SUP

LIN

0.6 x V_SUP

V_SUP

0.4 x V_SUP

t < t_LINBUS

t_LINBUS

TXD

Weak Internal Pullup

EN

Floating

RXD

MODE

Sleep

Standby

Normal

图8-17. Wakeup through LIN

V_SUP

VCC

100 nF

10 µF

nRST

EN

R_LIN

TXD

GND

R_RXD

LIN

RXD

C_LIN

C_RXD

图8-18. Test Circuit for AC Characteristics

20

Submit Document Feedback

Product Folder Links: TLIN1028-Q1

TLIN1028-Q1

ZHCSK68B –AUGUST 2019 –REVISED JUNE 2022

www.ti.com.cn

9 Detailed Description

9.1 Overview

The TLIN1028-Q1 LIN transceiver is a Local Interconnect Network (LIN) physical layer transceiver, compliant to

LIN 2.0, LIN 2.1, LIN 2.2, LIN 2.2A and ISO/DIS 17987–4 with integrated wake-up and protection features. The

LIN bus is a single-wire, bidirectional bus that typically is used in low-speed in-vehicle networks with data rates

that range up to 20 kbps. The LIN receiver works up to 100 kbps supporting in-line programming. The device

converts the LIN protocol data stream on the TXD input into a LIN bus signal using a current-limited wave-

shaping driver which reduces electromagnetic emissions (EME). The receiver converts the data stream to logic-

level signals that are sent to the microprocessor through the open-drain RXD pin. The LIN bus has two states:

dominant state (voltage near ground) and recessive state (voltage near battery). In the recessive state, the LIN

bus is pulled high by the internal pull-up resistor (45 kΩ) and a series diode.

Ultra-low current consumption is possible using the sleep mode. The TLIN1028-Q1 provides two methods to

wake up from sleep mode: EN pin and LIN bus. The device integrates a low dropout voltage regulator with a

wide input from V_SUPproviding 5 V ±2% or 3.3 V ±2% with up to 125 mA of current depending upon system

implementation. nRST is asserted high when V_CCincreases above UV_CCand stays high as long as V_CCis above

this threshold.

9.2 Functional Block Diagram

V_SUP

V_CC

5.0-V or 3.3-V LDO

POR

UV

DET

CNTL

V_SUP

RXD

V_SUP/2

Filter

V_CC

Comp

250 kΩ

nRST

45 kꢀ

Control

EN

Fault

Detection

& Protection

350 kΩ

LIN

V_CC

GND

Dominant

State

Timeout

DR/

Slope

CTL

TXD

图9-1. Functional Block Diagram

9.3 Feature Description

9.3.1 LIN Pin

This high-voltage input or output pin is a single-wire LIN bus transmitter and receiver. The LIN pin can survive

transient voltages up to 58 V. Reverse currents from the LIN to supply (V_SUP) are minimized with blocking

diodes, even in the event of a ground shift or loss of supply (V_SUP).

Submit Document Feedback

21

Product Folder Links: TLIN1028-Q1

TLIN1028-Q1

ZHCSK68B –AUGUST 2019 –REVISED JUNE 2022

www.ti.com.cn

9.3.1.1 LIN Transmitter Characteristics

The transmitter meets thresholds and AC parameters according to the LIN specification. The transmitter is a low-

side transistor with internal current limitation and thermal shutdown. During a thermal shutdown condition, the

transmitter is disabled to protect the device. There is an internal pull-up resistor with a serial diode structure to

V_SUP, so no external pull-up components are required for the LIN responder node applications. An external pull-

up resistor and series diode to V_SUPmust be added when the device is used for a commander node application.

9.3.1.2 LIN Receiver Characteristics

The receiver characteristic thresholds are ratio-metric with the device supply pin according to the LIN

specification.

The receiver is capable of receiving higher data rates (> 100 kbps) than supported by LIN or SAEJ2602

specifications. This allows the TLIN1028-Q1 to be used for high-speed downloads at the end-of-line production

or other applications. The actual data rate achievable depends on system time constants (bus capacitance and

pull-up resistance) and driver characteristics used in the system.

9.3.1.2.1 Termination

There is an internal pull-up resistor with a serial diode structure to V_SUP, so no external pull-up components are

required for the LIN responder node applications. An external pull-up resistor (1 kΩ) and a series diode to V_SUP

must be added when the device is used for commander node applications as per the LIN specification.

图9-2 shows a commander node configuration and how the voltage levels are defined

Voltage drop across the

Simplified Transceiver

V_{LIN_Bus}

diodes in the pullup path

V_SUP

V_SUP/2

RXD

V_BAT

V_Battery

V_SUP

V_{LIN_Recessive}

Receiver

Filter

1 kꢀ

LIN Bus

45 kΩ

LIN

V_CC

350 kꢀ

TXD

GND

Transmitter

with slope control

V_{LIN_Dominant}

t

图9-2. Commander Node Configuration with Voltage Levels

9.3.2 TXD (Transmit Input)

TXD is the interface to the node processor’s LIN protocol controller that is used to control the state of the LIN

output. When TXD is low, the LIN output is dominant (near ground). When TXD is high, the LIN output is

recessive (near V_SUP). See 图9-2. The TXD input structure is compatible with processors that use 3.3 V and 5 V

V_Iand V_O. TXD has an internal pull-up resistor. The LIN bus is protected from being stuck dominant through a

system failure driving TXD low through the dominant state time-out timer.

9.3.3 RXD (Receive Output)

RXD is the interface to the processor's LIN protocol controller, which reports the state of the LIN bus voltage. LIN

recessive (near V_SUP) is represented by a high level on the RXD and LIN dominant (near ground) is represented

by a low level on the RXD pin. The RXD output structure is an open-drain output stage. This allows the device to

be used with 3.3 V and 5 V_I/Oprocessors. If the processor's RXD pin does not have an integrated pull-up, an

external pull-up resistor to the processors I and O supply voltage is required. In standby mode, the RXD pin is

driven low to indicate a wake-up request from the LIN bus from sleep mode. When going from normal mode to

22

Submit Document Feedback

Product Folder Links: TLIN1028-Q1

TLIN1028-Q1

ZHCSK68B –AUGUST 2019 –REVISED JUNE 2022

www.ti.com.cn

standby mode, the RXD pin is released and pulled-up to the voltage rail that the external pull-up resistor is

connected. A LIN bus wake event will cause the RXD pin to be pulled low indicating a wake request.

9.3.4 V_SUP(Supply Voltage)

V_SUPis the power supply pin. V_SUPis connected to the battery through an external reverse-battery blocking

diode.

The V_SUPpin is a high-voltage-tolerant pin. A decoupling capacitor with a value of 100 nF is recommended to be

connected close to this pin to improve the transient performance. If there is a loss of power at the ECU level, the

device has ultra low leakage from the LIN pin, which does not load the bus down. This is optimal for LIN systems

in which some of the nodes are unpowered (ignition supplied) while the rest of the network remains powered

(battery supplied). When V_SUPdrops low enough the regulated output drops out of regulation. The LIN bus works

with a V_SUPas low as 5.5 V, but at a lower voltage, the performance is indeterminate and not ensured. If V_SUP

voltage level drops enough, it triggers the UV_SUP, and if it keeps dropping, at some point it passes the POR

threshold.

9.3.5 GND (Ground)

GND is the device ground connection. The device can operate with a ground shift as long as the ground shift

does not reduce the V_SUPbelow the minimum operating voltage. If there is a loss of ground at the ECU level, the

device has ultra low leakage from the LIN pin, which does not load the bus down. This is optimal for LIN systems

in which some of the nodes are unpowered (ignition supplied) while the rest of the network remains powered

(battery supplied).

9.3.6 EN (Enable Input)

EN controls the operational modes of the device. When EN is high, the device is in normal operating mode

allowing a transmission path from TXD to LIN and from LIN to RXD. When EN is low, the device is put into sleep

or standby mode and there are no transmission paths available. EN has an internal pull-down resistor to ensure

the device remains in low power mode even if EN is left floating. EN should be held low until V_SUPreaches the

expected system voltage level.

9.3.7 nRST (Reset Output)

The V_CCpin is monitored for under voltage events. This pin is internally pulled up to V_CCand when an

undervoltage event takes place, this pin is pulled low. The pin returns to V_CConce the voltage on V_CCexceeds

the under-voltage threshold. nRST is dependent on the value V_CCand not the operational mode. If UV_CCtakes

place for longer than t_DET(UVCC)nRST is pulled to ground. If a thermal shutdown event takes place, this pin is

pulled to ground.

9.3.8 V_CC(Supply Output)

The V_CCterminal can provide 5 V or 3.3 V with up to 125 mA to power up external devices when using high-k

boards and thermal management best practices in order to keep the virtual junction temperature below 165 °C

and avoid thermal shutdown.

9.3.9 Protection Features

The device has several protection features that are described as follows.

9.3.9.1 TXD Dominant Time Out (DTO)

During normal mode, if TXD is inadvertently driven permanently low by a hardware or software application

failure, the LIN bus is protected by the dominant state time-out timer. This timer is triggered by a falling edge on

the TXD pin. If the low signal remains on TXD for longer than t_{TXD_DTO}, the transmitter is disabled, thus allowing

the LIN bus to return to recessive state and communication to resume on the bus. The protection is cleared and

the t_{TXD_DTO}timer is reset by a rising edge on TXD. The TXD pin has an internal pull-up to ensure the device

fails to a known recessive state if TXD is disconnected. During this fault, the transceiver remains in normal mode

(assuming no change of state request on EN), the RXD pin reflects the LIN bus and the LIN bus pull-up

termination remains on.

Submit Document Feedback

23

Product Folder Links: TLIN1028-Q1

TLIN1028-Q1

ZHCSK68B –AUGUST 2019 –REVISED JUNE 2022

www.ti.com.cn

9.3.9.2 Bus Stuck Dominant System Fault: False Wake Up Lockout

The device contains logic to detect bus stuck dominant system faults and prevents the device from waking up

falsely during the system fault. Upon entering sleep mode, the device detects the state of the LIN bus. If the bus

is dominant, the wake-up logic is locked out until a valid recessive on the bus “clears”the bus stuck dominant,

preventing excessive current use. 图9-3 and 图9-4 show the behavior of this protection.

RXD

EN

LIN Bus

t_LINBUS

< t_LINBUS

图9-3. No Bus Fault: Entering Sleep Mode with Bus Recessive Condition and Wakeup

RXD

EN

t_LINBUS

LIN Bus

t_CLEAR

< t_CLEAR

图9-4. Bus Fault: Entering Sleep Mode with Bus Stuck Dominant Fault, Clearing, and Wakeup

9.3.9.3 Thermal Shutdown

The LIN transmitter is protected by current-limiting circuit; however, if the junction temperature of the device

exceeds the thermal shutdown threshold, the device puts the LIN transmitter into the recessive state and turns

off the V_CCregulator. The nRST pin is pulled to ground during a TSD event. Once the over-temperature fault

condition has been removed and the virtual junction temperature has cooled beyond the hysteresis temperature,

the transmitter is re-enabled. During this fault the device enters a TSD off mode. Once the junction temperature

cools, the device enters standby mode as per the state diagram.

9.3.9.4 Under Voltage on V_SUP

The device contains a power-on reset circuit to avoid false bus messages during under voltage conditions when

V_SUPis less than UV_SUP

.

24

Submit Document Feedback

Product Folder Links: TLIN1028-Q1

TLIN1028-Q1

ZHCSK68B –AUGUST 2019 –REVISED JUNE 2022

www.ti.com.cn

9.3.9.5 Unpowered Device and LIN Bus

In automotive applications, some LIN nodes in a system can be unpowered (ignition supplied) while others in the

network remain powered by the battery. The device has extremely low unpowered leakage current from the bus,

so an unpowered node does not affect the network nor load it down.

9.4 Device Functional Modes

nRST: Float

The TLIN1028-Q1 has three functional modes of operation: normal, sleep, and standby. The next sections

describes these modes as well as how the device moves between the different modes. 图 9-5 graphically shows

the relationship while 表9-1 shows the state of pins.

表9-1. Operating Modes

LIN BUS

Termination

Mode

EN

RXD

Transmitter

nRST

Comment

nRST is internally connected to the LDO output which

is pulled to ground in sleep mode.

Sleep

Low

Floating Weak Current pull-up

Off

Ground

nRST is internally connected to the LDO output which

in standby init mode is pulled low until VCC raises

beyond UV_CCthreshold.

Standby

Init

Low

Floating

Low

Off

Ramping

V_CC

45 kΩ (typical)

Standby

from

SLP

Wake-up event detected, waiting on processors to set

EN

nRST comes on to V_CConce thresholds are met.

Standby

from

Norm

LDO is on and RXD is high but if a LIN bus wake

event takes place RXD is pulled low.

High

V_CC

LIN Bus

Data

Normal

High

NA

On

Off

V_CC

LIN transmission up to 20 kbps

45 kΩ (typical)

nRST is pulled low as the LDO is turned off which

means UV_CCthreshold has been met.

TSD Off

Floating

Ground

Submit Document Feedback

25

Product Folder Links: TLIN1028-Q1

TLIN1028-Q1

ZHCSK68B –AUGUST 2019 –REVISED JUNE 2022

www.ti.com.cn

Unpowered System

V_SUP< UV_SUP

V_SUP≥ UV_SUP

Standby Init Mode

V_CC> UV_CC

EN = High

Transceiver: Off

WUP Receiver: Off

RXD: Floating

Termination: 45 k

LDO: Ramping up

Any State

V_CC> UV_CC

EN = Low

Tj > TSD

TSD Off Mode

Standby Mode

Transceiver: Off

WUP Receiver: On

RXD: Floating

Termination: 45 k

LDO: Off

Tj < TSD

Transceiver: Off

WUP Receiver: On

RXD: Signals wake event

Termination: 45 k

LDO: On

nRST: Low (Fault Condition)

nRST: High

EN = Low > t_EN

AND TXD = High

AND nRST = High

V_SUP< UV_SUP

LIN Bus Wake up

Unpowered State

EN = High > t_EN

nRST = High

V_SUP< UV_SUP

Normal Mode

Sleep Mode

EN = Low > t_EN

AND TXD = Low

AND nRST = High

Transceiver: On

WUP Receiver: Off

RXD: LIN Bus Data

Termination: 45 k

LDO: On

Transceiver: Off

WUP Receiver: On

RXD: Floating

Termination: Weak pullup

LDO: Off

EN = High > t_EN

nRST: High

nRST: Low

图9-5. Operating State Diagram

9.4.1 Normal Mode

If the EN pin is high after the device enters standby init mode, the device enters normal mode. If EN is low, it

enters standby mode. In normal operational mode, the receiver and transmitter are active and the LIN

transmission up to the LIN specified maximum of 20 kbps is supported. If TXD pin is dominant at the time of

entering normal mode the LIN transmitter is kept off until a recessive is applied to TXD. The receiver detects the

data stream on the LIN bus and outputs it on RXD for the LIN controller. A recessive signal on the LIN bus is a

digital high and a dominant signal on the LIN bus is a digital low. The driver transmits input data from TXD to the

LIN bus. Normal mode is entered as EN transitions high while the device is in sleep or standby mode for > t_EN

.

Once EN has been high for t_ENthe device enters normal mode after t_{MODE_CHANGE}and t_NOMINIT

.

9.4.2 Sleep Mode

Sleep Mode is the power saving mode for the TLIN1028-Q1. Even with extremely low current consumption in

this mode, the device can still wake up from the LIN bus through a wake-up signal or if EN is set high for > t_EN

.

The wake-up events must be active for the respective time periods (t_LINBUS).

While the device is in sleep mode, the following conditions exist:

26

Submit Document Feedback

Product Folder Links: TLIN1028-Q1

TLIN1028-Q1

ZHCSK68B –AUGUST 2019 –REVISED JUNE 2022

www.ti.com.cn

• The LIN bus driver is disabled and the internal LIN bus termination is switched off (to minimize power loss if

LIN is short-circuited to ground). However, the weak current pull-up is active to prevent false wake-up events

in case an external connection to the LIN bus is lost.

• The normal receiver is disabled.

• EN input and LIN wake-up receiver are active.

9.4.3 Standby Mode

Standby mode is entered either by a wake-up event through LIN bus while the device is in sleep mode or by the

EN pin from normal or standby init modes. From normal mode EN must be low for > t_ENand TXD and nRST are

high. RXD pin in standby mode is dependent upon how standby mode was entered. If entered from normal

mode or power up, RXD is high. If entered from sleep mode, RXD is pulled low to indicate a wake event. When

entering standby mode from normal or standby init modes, a wake event on the LIN bus causes the RXD pin to

be pulled low.

During power up, if EN is low the device goes into standby mode, and if EN is high, the device goes into normal

mode. EN has an internal pull-down resistor ensuring EN is pulled low if the pin is left floating in the system.

9.4.4 Wake-Up Events

There are two ways to wake-up from sleep mode:

• Remote wake-up initiated by the falling edge of a recessive (high) to dominant (low) state transition on the

LIN bus where the dominant state is held for the t_LINBUSfilter time. After this t_LINBUSfilter time has been met

and a rising edge on the LIN bus going from dominant state to recessive state initiates a remote wake-up

event eliminating false wake ups from disturbances on the LIN bus or if the bus is shorted to ground.

• Local wake-up through EN being set high for longer than t_EN

.

9.4.4.1 Wake-Up Request (RXD)

When the TLIN1028-Q1 encounters a wake-up event from the LIN bus, RXD goes low and the device transitions

to standby mode until EN is reasserted high and the device enters normal mode. Once the device enters normal

mode, the RXD pin releases the wake-up request signal and the RXD pin then reflects the receiver output from

the LIN bus.

9.4.5 Mode Transitions

When the device is transitioning between modes, the device needs the time t_{MODE_CHANGE}and t_NOMINTto allow

the change to fully propagate from the EN pin through the device into the new state.

9.4.6 Voltage Regulator

The device has an integrated high-voltage LDO that operates over a 5.5 V to 28 V input voltage range for both

3.3 V and 5 V V_CC. The device has an output current capability of 70 mA and 125 mA depending upon package

and support fixed output voltages of 3.3 V (TLIN10283-Q1) or 5 V (TLIN10285-Q1). It features thermal shutdown

and short-circuit protection to prevent damage during over-temperature and over-current conditions

9.4.6.1 V_CC

The V_CCpin is the regulated output based on the required voltage. The regulated voltage accuracy is ± 2%. The

output is current limited. In the event that the regulator drops out of regulation, the output tracks the input minus

a drop based on the load current. When the input voltage drops below the UV_SUPthreshold, the regulator shuts

down until the input voltage returns above the UV_SUPRlevel. The device monitors situations where V_CCmay drop

below the UV_CClevel thus causing the nRST pin to be pulled low.

9.4.6.2 Output Capacitance Selection

For stable operation over the full temperature range and with load currents up to 125 mA on V_CCa certain

capacitance is expected and depends upon the minimum load current. To support no load to full load a value of

10 µF and ESR smaller than 2 Ω is needed. For 20 µA to full load an 1.5 µF capacitance can be used. The low

ESR recommendation is to improve the load transient performance.

Submit Document Feedback

27

Product Folder Links: TLIN1028-Q1

TLIN1028-Q1

ZHCSK68B –AUGUST 2019 –REVISED JUNE 2022

www.ti.com.cn

9.4.6.3 Low-Voltage Tracking

At low input voltages, the regulator drops out of regulation and the output voltage tracks input minus a voltage

based on the load current (IL) and power-switch resistor. This tracking allows for a smaller input capacitance and

can possibly eliminate the need for a boost converter during cold-crank conditions.

9.4.6.4 Power Supply Recommendation

The device is designed to operate from an input-voltage supply range between 5.5 V and 28 V. This input supply

must be well regulated. If the input supply is located more than a few inches from the device. The recommended

minimum capacitance at the pin is 100 nF . The max voltage range is for the LIN functionality. Exceeding 24V for

the LDO reduces the effective current sourcing capability due to thermal considerations.

28

Submit Document Feedback

Product Folder Links: TLIN1028-Q1

TLIN1028-Q1

ZHCSK68B –AUGUST 2019 –REVISED JUNE 2022

www.ti.com.cn

10 Application and Implementation

备注

以下应用部分中的信息不属于TI 器件规格的范围，TI 不担保其准确性和完整性。TI 的客户应负责确定

器件是否适用于其应用。客户应验证并测试其设计，以确保系统功能。

10.1 Application Information

The TLIN1028-Q1 can be used as both a responder device and a commander device in a LIN network. The

device comes with the ability to support a remote wake-up requests. It can provide the power to the local

processor.

10.2 Typical Application

The device comes with an integrated 45 kΩ pull-up resistor and series diode for responder node applications.

For commander node applications, an external 1 kΩ pull-up resistor with series blocking diode can be used. 图

10-1 shows the device being used in both commander and responder node applications.

Commander

Node

10 µF

V_SUP

Vcc

100 nF⁽⁴⁾

EN

I/O

2

8

1

V_DD

Commander

Node

MCU w/o

pull-up⁽²⁾

Pull-up⁽³⁾

V

_DDI/O

1 k

LIN

MCU

4

LIN Controller

Or

5

220 pF

RXD

TXD

SCI/UART⁽¹⁾

6

GND

7

3

nRST

Responder

Node

10 µF

Vcc

V_SUP

100 nF⁽⁴⁾

EN

I/O

2

8

1

V_DD

MCU w/o

pull-up⁽²⁾

Responder Node⁽³⁾

V

_DDI/O

LIN

MCU

4

LIN Controller

Or

5

6

7

220 pF

RXD

TXD

SCI/UART⁽¹⁾

3

GND

nRST

(1) If RXD on MCU or LIN responder node has internal pullup; no external pull-up resistor is needed.

(2) If RXD on MCU or LIN responder node does not have an internal pull-up requires external pull-up resistor.

(3) Commander node applica ons require and external 1 k pull-up resistor and serial diode.

(4) Decoupling capacitor values are system dependent but usually have 100 nF, 1 µF and ≥10 µF

图10-1. Typical LIN Bus

Submit Document Feedback

29

Product Folder Links: TLIN1028-Q1

TLIN1028-Q1

ZHCSK68B –AUGUST 2019 –REVISED JUNE 2022

www.ti.com.cn

10.2.1 Design Requirements

10.2.1.1 Normal Mode Application Note

When using the TLIN1028-Q1 in systems which are monitoring the RXD pin for a wake-up request, special care

should be taken during the mode transitions. The output of the RXD pin is indeterminate for the transition period

between states as the receivers are switched. The application software should not look for an edge on the RXD

pin indicating a wake-up request until t_{MODE_CHANGE}. This is shown in 图8-15 when transitioning to normal mode

there is an initialization period shown as t_NOMINIT

.

10.2.1.2 TXD Dominant State Timeout Application Note

The maximum dominant TXD time allowed by the TXD dominant state time out limits the minimum possible data

rate of the device. The LIN protocol has different constraints for commander and responder node applications;

thus, there are different maximum consecutive dominant bits for each application case and thus different

minimum data rates.

10.2.1.3 Brownout

图 10-17 and 图 10-18 show the behavior of the LIN, nRST and V_CCpins during a brownout condition. For the

TLIN10283-Q1, V_SUPdown to ~ 2.24 V has results as shown. For the TLIN10285-Q1, V_SUPdown to ~ 2.63 V

has results as shown. When V_SUPdrops below these levels the signals are indeterminate.

10.2.2 Detailed Design Procedures

For processors or LIN responder nodes with an internal pull-up on RXD, no external pull-up resistor is needed.

For processors or LIN responder nodes without internal pull-up on RXD, an external pull-up resistor is required.

Commander node applications require an external 1 kΩ pull-up resistor and serial diode.

30

Submit Document Feedback

Product Folder Links: TLIN1028-Q1

TLIN1028-Q1

ZHCSK68B –AUGUST 2019 –REVISED JUNE 2022

www.ti.com.cn

10.2.3 Application Curves

Characteristic curves below show the LDO performance ramping between 0 V and up to 7 V.

80

70

60

50

40

30

20

10

0

130

120

110

100

90

80

70

60

50

40

-40°C

25°C

85°C

105°C

115°C

125°C

-40°C

25°C

85°C

105°C

115°C

125°C

30

20

10

0

0.5

1

1.5

2

2.5

3

3.5

V_SUP(V)

4

4.5

5

5.5

6

6.5

7

3

3.5

4

4.5

5

V_SUP(V)

5.5

6

6.5

7

D012

D002

Package = DRB

I_CC= 125 mA

V_CC= 3.3 V

Temperature =

Ambient

Package = D

I_CC= 70 mA

V_CC= 3.3 V

Temperature =

Ambient

图10-3. I_SUPvs V_SUPvs Temperature

图10-2. I_SUPvs V_SUPvs Temperature

130

120

110

100

90

75

70

65

60

55

50

45

40

35

30

25

20

15

10

5

80

70

60

50

40

-40°C

25°C

85°C

105°C

115°C

125°C

-40°C

25°C

85°C

105°C

115°C

125°C

30

20

10

0

-5

0

0.5

1

1.5

2

2.5

3

3.5

V_SUP(V)

4

4.5

5

5.5

6

6.5

7

0

0.5

1

1.5

2

2.5

3

3.5

V_SUP(V)

4

4.5

5

5.5

6

6.5

7

D022

D007

Package = DDA

I_CC= 125 mA

V_CC= 3.3 V

Temperature =

Ambient

Package = D

I_CC= 70 mA

V_CC= 5 V

Temperature =

Ambient

图10-4. I_SUPvs V_SUPvs Temperature

图10-5. I_SUPvs V_SUPvs Temperature

130

120

110

100

90

130

120

110

100

90

80

70

60

50

40

30

-40°C

25°C

85°C

-40°C

25°C

85°C

30

20

105°C

115°C

125°C

105°C

115°C

125°C

20

10

0

-10

0

0.5

1

1.5

2

2.5

3

3.5

V_SUP(V)

4

4.5

5

5.5

6

6.5

7

0

0.5

1

1.5

2

2.5

3

3.5

V_SUP(V)

4

4.5

5

5.5

6

6.5

7

D017

D027

Package = DRB

I_CC= 125 mA

V_CC= 5 V

Temperature =

Ambient

Package = DDA

I_CC= 125 mA

V_CC= 5 V

Temperature =

Ambient

图10-6. I_SUPvs V_SUPvs Temperature

图10-7. I_SUPvs V_SUPvs Temperature

Submit Document Feedback

31

Product Folder Links: TLIN1028-Q1

TLIN1028-Q1

ZHCSK68B –AUGUST 2019 –REVISED JUNE 2022

www.ti.com.cn

16

14

12

10

8

18

16

14

12

10

8

6

-40°C

25°C

85°C

-40°C

25°C

85°C

4

105°C

115°C

125°C

105°C

115°C

125°C

2

0

0.5

1

1.5

2

2.5

3

3.5

V_SUP(V)

4

4.5

5

5.5

6

6.5

D004

0

0.5

1

1.5

2

2.5

3

3.5

V_SUP(V)

4

4.5

5

5.5

6

6.5

D014

Package = D

Mode = Sleep

3.3 V V_CC= Off

Temperature =

Ambient

Package = DRB

Mode = Sleep

3.3 V V_CC= Off

Temperature =

Ambient

图10-8. I_SUPvs V_SUPvs Temperature Ramp-down 图10-9. I_SUPvs V_SUPvs Temperature Ramp-down

16

14

12

10

8

16

14

12

10

8

6

-40°C

25°C

85°C

-40°C

25°C

85°C

4

105°C

115°C

125°C

105°C

115°C

125°C

2

0

0.5

1

1.5

2

2.5

3

3.5

V_SUP(V)

4

4.5

5

5.5

6

6.5

D024

0

0.5

1

1.5

2

2.5

3

3.5

V_SUP(V)

4

4.5

5

5.5

6

6.5

D009

Package = DDA

Mode = Sleep

3.3 V V_CC= Off

Temperature =

Ambient

Package = D

Mode = Sleep

5 V V_CC= Off

Temperature =

Ambient

图10-10. I_SUPvs V_SUPvs Temperature Ramp-down 图10-11. I_SUPvs V_SUPvs Temperature Ramp-down

18

16

14

12

10

8

16

14

12

10

8

6

-40°C

25°C

85°C

-40°C

25°C

85°C

4

105°C

115°C

125°C

105°C

115°C

125°C

2

0

0.5

1

1.5

2

2.5

3

3.5

V_SUP(V)

4

4.5

5

5.5

6

6.5

D019

0

0.5

1

1.5

2

2.5

3

3.5

V_SUP(V)

4

4.5

5

5.5

6

6.5

D029

Package = DRB

Mode = Sleep

5 V V_CC= Off

Temperature =

Ambient

Package = DDA

Mode = Sleep

5 V V_CC= Off

Temperature =

Ambient

图10-12. I_SUPvs V_SUPvs Temperature Ramp-down 图10-13. I_SUPvs V_SUPvs Temperature Ramp-down

32

Submit Document Feedback

Product Folder Links: TLIN1028-Q1

TLIN1028-Q1

ZHCSK68B –AUGUST 2019 –REVISED JUNE 2022

www.ti.com.cn

图10-14. LIN Bus Performance

图10-15. Dominant to Recessive Propagation

Delay

图10-16. Recessive to Dominant Propagation

图10-17. TLIN10283-Q1 Brownout

Delay

图10-18. TLIN10285-Q1 Brownout

Submit Document Feedback

33

Product Folder Links: TLIN1028-Q1

TLIN1028-Q1

ZHCSK68B –AUGUST 2019 –REVISED JUNE 2022

www.ti.com.cn

11 Power Supply Recommendations

The TLIN1028-Q1 was designed to operate directly off a car battery, or any other DC supply ranging from 5.5 V

to 28 V . A 100 nF decoupling capacitor should be placed as close to the V_SUPpin of the device as possible.For

applications where the device goes from no load to full load, a minimum decoupling capacitance to ground of 10

μF is recommended when the LDO turns on. If the device is going from 20 µA to full load then a minimum of 1.5

µF capacitance is recommended.

34

Submit Document Feedback

Product Folder Links: TLIN1028-Q1

TLIN1028-Q1

ZHCSK68B –AUGUST 2019 –REVISED JUNE 2022

www.ti.com.cn

12 Layout

PCB design should start with understanding that frequency bandwidth from approximately 3 MHz to 3 GHz is

needed thus high frequency layout techniques must be applied during PCB design. Placement at the connector

also prevents these noisy events from propagating further into the PCB and system.

12.1 Layout Guidelines

• Pin 1 (V_SUP): This is the supply pin for the device. A 100 nF decoupling capacitor should be placed as close

to the device as possible.

• Pin 2 (EN): EN is an input pin that is used to place the device in a low power sleep mode. If this feature is not

used, the pin should be pulled high to the regulated voltage supply of the microprocessor through a series

resistor, values between 1 kΩ and 10 kΩ. Additionally, a series resistor may be placed on the pin to limit

current on the digital lines in the event of an over-voltage fault.

• Pin 3 (GND): This is the ground connection for the device. This pin should be tied to the ground plane

through a short trace with the use of two vias to limit total return inductance.

• Pin 4 (LIN): This pin connects to the LIN bus. For responder node applications, a 220 pF capacitor to ground

is implemented. For commander node applications, an additional series resistor and blocking diode should be

placed between the LIN pin and the V_SUPpin. See 图10-1

• Pin 5 (RXD): The pin is an open-drain output and requires and external pull-up resistor in the range of 1 kΩ

to 10 kΩ to function properly. If the microprocessor paired with the transceiver does not have an integrated

pull-up, an external pull-up resistor should be placed on RXD. If RXD is connected to the V_CCpin a higher

pull-up resistor value can be used to reduce standby current.

• Pin 6 (TXD): The TXD pin is the transmit input signal to the device from the processors. A series resistor can

be placed to limit the input current to the device in the event of an over voltage on this pin. A capacitor to

ground can be placed close to the input pin of the device to filter noise.

• Pin 7 (nRST): This pin connects to the processors as a reset out.

• Pin 8 (V_CC): Output source, either 3.3 V or 5 V depending upon the version of the device.

备注

All ground and power connections should be made as short as possible and use at least two vias to

minimize the total loop inductance.

Submit Document Feedback

35

Product Folder Links: TLIN1028-Q1

TLIN1028-Q1

ZHCSK68B –AUGUST 2019 –REVISED JUNE 2022

www.ti.com.cn

12.2 Layout Example

V_SUP

C2

V_SUP

1

2

V_CC

8

U1

Only needed for

the Commander

node

V_CC

GND

R2

EN

nRST

7

LIN

GND

3

4

GND

6

5

R4

TXD

GND

V_CC

GND

LIN

RXD

图12-1. Layout Example

36

Submit Document Feedback

Product Folder Links: TLIN1028-Q1

TLIN1028-Q1

ZHCSK68B –AUGUST 2019 –REVISED JUNE 2022

www.ti.com.cn

13 Device and Documentation Support

13.1 Documentation Support

13.1.1 Related Documentation

For related documentation see the following:

• LIN Standards:

– ISO/DIS 17987-1: Road vehicles -- Local Interconnect Network (LIN) -- Part 1: General information and

use case definition

– ISO/DIS 17987-4: Road vehicles -- Local Interconnect Network (LIN) -- Part 4: Electrical Physical Layer

(EPL) specification 12V/24V

– SAE J2602-1: LIN Network for Vehicle Applications

– LIN2.0, LIN2.1, LIN2.2 and LIN2.2A specification

• EMC requirements:

– SAE J2962-2: TBD

– HW Requirements for CAN, LIN, FR V1.3: German OEM requirements for LIN

– ISO 10605: Road vehicles - Test methods for electrical disturbances from electrostatic discharge

– ISO 11452-4:2011: Road vehicles - Component test methods for electrical disturbances from narrowband

radiated electromagnetic energy - Part 4: Harness excitation methods

– ISO 7637-1:2015: Road vehicles - Electrical disturbances from conduction and coupling - Part 1:

Definitions and general considerations

– ISO 7637-3: Road vehicles - Electrical disturbances from conduction and coupling - Part 3: Electrical

transient transmission by capacitive and inductive coupling via lines other than supply lines

– IEC 62132-4:2006: Integrated circuits - Measurement of electromagnetic immunity 150 kHz to 1 GHz -

Part 4: Direct RF power injection method

– IEC 61967-4

– CISPR25

• Conformance Test requirements:

– ISO/DIS 17987-7: Road vehicles -- Local Interconnect Network (LIN) -- Part 7: Electrical Physical Layer

(EPL) conformance test specification

– SAE J2602-2: LIN Network for Vehicle Applications Conformance Test

TLINx441 LDO Performance, SLLA427

13.2 Related Links

The table below lists quick access links. Categories include technical documents, support and community

resources, tools and software, and quick access to order now.

13.3 接收文档更新通知

要接收文档更新通知，请导航至 ti.com 上的器件产品文件夹。点击订阅更新进行注册，即可每周接收产品信息更

改摘要。有关更改的详细信息，请查看任何已修订文档中包含的修订历史记录。

13.4 支持资源

TI E2E^™支持论坛是工程师的重要参考资料，可直接从专家获得快速、经过验证的解答和设计帮助。搜索现有解

答或提出自己的问题可获得所需的快速设计帮助。

链接的内容由各个贡献者“按原样”提供。这些内容并不构成 TI 技术规范，并且不一定反映 TI 的观点；请参阅

TI 的《使用条款》。

13.5 Trademarks

TI E2E^™is a trademark of Texas Instruments.

所有商标均为其各自所有者的财产。

Submit Document Feedback

37

Product Folder Links: TLIN1028-Q1

TLIN1028-Q1

ZHCSK68B –AUGUST 2019 –REVISED JUNE 2022

www.ti.com.cn

13.6 Electrostatic Discharge Caution

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled

with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may

be more susceptible to damage because very small parametric changes could cause the device not to meet its published

specifications.

13.7 术语表

TI 术语表

本术语表列出并解释了术语、首字母缩略词和定义。

14 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most

current data available for the designated devices. This data is subject to change without notice and revision of

this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

38

Submit Document Feedback

Product Folder Links: TLIN1028-Q1

GENERIC PACKAGE VIEW

DDA 8

PowerPAD^TMSOIC - 1.7 mm max height

PLASTIC SMALL OUTLINE

Images above are just a representation of the package family, actual package may vary.

Refer to the product data sheet for package details.

4202561/G

PACKAGE OUTLINE

D0008A

SOIC - 1.75 mm max height

SCALE 2.800

SMALL OUTLINE INTEGRATED CIRCUIT

C

SEATING PLANE

.228-.244 TYP

[5.80-6.19]

.004 [0.1] C

A

PIN 1 ID AREA

6X .050

[1.27]

8

1

2X

.189-.197

[4.81-5.00]

NOTE 3

.150

[3.81]

4X (0 -15 )

4

5

8X .012-.020

[0.31-0.51]

B

.150-.157

[3.81-3.98]

NOTE 4

.069 MAX

[1.75]

.010 [0.25]

C A B

.005-.010 TYP

[0.13-0.25]

4X (0 -15 )

SEE DETAIL A

.010

[0.25]

.004-.010

[0.11-0.25]

0 - 8

.016-.050

[0.41-1.27]

DETAIL A

TYPICAL

(.041)

[1.04]

4214825/C 02/2019

NOTES:

1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches.

Dimensioning and tolerancing per ASME Y14.5M.

2. This drawing is subject to change without notice.

3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not

exceed .006 [0.15] per side.

4. This dimension does not include interlead flash.

5. Reference JEDEC registration MS-012, variation AA.

www.ti.com

EXAMPLE BOARD LAYOUT

D0008A

SOIC - 1.75 mm max height

SMALL OUTLINE INTEGRATED CIRCUIT

8X (.061 )

[1.55]

SYMM

SEE

DETAILS

1

8

8X (.024)

[0.6]

SYMM

(R.002 ) TYP

[0.05]

5

4

6X (.050 )

[1.27]

(.213)

[5.4]

LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN

SCALE:8X

SOLDER MASK

OPENING

SOLDER MASK

OPENING

METAL UNDER

SOLDER MASK

METAL

EXPOSED

METAL

EXPOSED

METAL

.0028 MAX

[0.07]

.0028 MIN

[0.07]

ALL AROUND

SOLDER MASK

DEFINED

NON SOLDER MASK

DEFINED

SOLDER MASK DETAILS

4214825/C 02/2019

NOTES: (continued)

6. Publication IPC-7351 may have alternate designs.

7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.

www.ti.com

EXAMPLE STENCIL DESIGN

D0008A

SOIC - 1.75 mm max height

SMALL OUTLINE INTEGRATED CIRCUIT

8X (.061 )

[1.55]

SYMM

1

8

8X (.024)

[0.6]

SYMM

(R.002 ) TYP

[0.05]

5

4

6X (.050 )

[1.27]

(.213)

[5.4]

SOLDER PASTE EXAMPLE

BASED ON .005 INCH [0.125 MM] THICK STENCIL

SCALE:8X

4214825/C 02/2019

NOTES: (continued)

8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate

design recommendations.

9. Board assembly site may have different recommendations for stencil design.

www.ti.com

PACKAGE OUTLINE

VSON - 1 mm max height

DRB0008J

PLASTIC QUAD FLAT PACK- NO LEAD

3.1

2.9

B

A

PIN 1 INDEX AREA

3.1

2.9

0.1 MIN

(0.13)

SECTION A-A

TYPICAL

1 MAX

C

SEATING PLANE

0.08 C

0.05

0.00

1.75

1.55

(0.2) TYP

6X 0.65

(0.19)

4

5

SYMM

9

2.5

2.3

1.95

1

8

0.36

0.26

8X

PIN 1 ID

(OPTIONAL)

0.1

0.05

C A B

C

SYMM

0.5

0.3

8X

4225036/A 06/2019

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing

per ASME Y14.5M.

2. This drawing is subject to change without notice.

3. The package thermal pad must be soldered to the printed circuit board for optimal thermal and mechanical performance.

www.ti.com

EXAMPLE BOARD LAYOUT

VSON - 1 mm max height

DRB0008J

PLASTIC QUAD FLAT PACK- NO LEAD

(2.8)

(1.65)

8X (0.6)

8X (0.31)

SYMM

1

8

6X (0.65)

SYMM

9

(1.95) (2.4)

(0.95)

(R0.05) TYP

4

5

(Ø 0.2) VIA

TYP

(0.575)

LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN

SCALE: 20X

0.07 MAX

ALL AROUND

0.07 MIN

ALL AROUND

METAL

SOLDER MASK

OPENING

EXPOSED METAL

SOLDER MASK

OPENING

METAL

NON- SOLDER MASK

SOLDER MASK

DEFINED

(PREFERRED)

SOLDER MASK DETAILS

4225036/A 06/2019

NOTES: (continued)

4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature

number SLUA271 (www.ti.com/lit/slua271).

5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown

on this view. It is recommended that vias under paste be filled, plugged or tented.

www.ti.com

EXAMPLE STENCIL DESIGN

VSON - 1 mm max height

DRB0008J

PLASTIC QUAD FLAT PACK- NO LEAD

(2.8)

2X

(1.51)

8X (0.6)

8X (0.31)

SYMM

1

8

2X

(1.06)

6X (0.65)

SYMM

(1.95)

(0.63)

9

(R0.05) TYP

4

5

METAL

TYP

SOLDER PASTE EXAMPLE

BASED ON 0.125 mm THICK STENCIL

EXPOSED PAD

81% PRINTED COVERAGE BY AREA

SCALE: 20X

4225036/A 06/2019

NOTES: (continued)

6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate

design recommendations.

www.ti.com

重要声明和免责声明

TI“按原样”提供技术和可靠性数据（包括数据表）、设计资源（包括参考设计）、应用或其他设计建议、网络工具、安全信息和其他资源，

不保证没有瑕疵且不做出任何明示或暗示的担保，包括但不限于对适销性、某特定用途方面的适用性或不侵犯任何第三方知识产权的暗示担

保。

这些资源可供使用 TI 产品进行设计的熟练开发人员使用。您将自行承担以下全部责任：(1) 针对您的应用选择合适的 TI 产品，(2) 设计、验

证并测试您的应用，(3) 确保您的应用满足相应标准以及任何其他功能安全、信息安全、监管或其他要求。

这些资源如有变更，恕不另行通知。TI 授权您仅可将这些资源用于研发本资源所述的 TI 产品的应用。严禁对这些资源进行其他复制或展示。

您无权使用任何其他 TI 知识产权或任何第三方知识产权。您应全额赔偿因在这些资源的使用中对 TI 及其代表造成的任何索赔、损害、成

本、损失和债务，TI 对此概不负责。

TI 提供的产品受 TI 的销售条款或 ti.com 上其他适用条款/TI 产品随附的其他适用条款的约束。TI 提供这些资源并不会扩展或以其他方式更改

TI 针对 TI 产品发布的适用的担保或担保免责声明。

TI 反对并拒绝您可能提出的任何其他或不同的条款。IMPORTANT NOTICE

邮寄地址：Texas Instruments, Post Office Box 655303, Dallas, Texas 75265


型号：	TLIN1028-Q1
厂家：	TEXAS INSTRUMENTS
描述：	具有集成稳压器的汽车本地互联网络 (LIN) 收发器稳压器
文件：	总54页 (文件大小：3174K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

TLIN1028-Q1 [TI]

相关型号：

TLIN10283DDARQ1

TLIN10283DRBRQ1

TLIN10283DRQ1

TLIN10285DDARQ1

TLIN10285DRBRQ1

TLIN10285DRQ1

TLIN1029A-Q1

TLIN1029A-Q1_V01

TLIN1029ADRBRQ1

TLIN1029ADRQ1

TLIN1029AMDRBRQ1

TLIN1039-Q1