TLIN1039-Q1_技术文档

TLIN1039-Q1

ZHCSOR2 –AUGUST 2021

具有显性状态超时的TLIN1039-Q1 本地互连网络(LIN) 收发器

1 特性

2 应用

• 符合面向汽车应用的AEC-Q100（1 级）标准

• 符合LIN 2.0、LIN 2.1、LIN 2.2、LIN 2.2A 和

ISO/DIS 17987–4 电气物理层(EPL) 规格标准

• 符合SAE J2602-1 面向汽车应用的LIN 网络标准

• 提供功能安全

• 车身电子装置和照明

• 信息娱乐系统与仪表组

• 混合动力电动汽车和动力总成系统

• 被动安全

• 电器

– 可帮助进行功能安全系统设计的文档

• 支持12V 应用

3 说明

TLIN1039-Q1 是一款本地互连网络 (LIN) 物理层收发

器，集成了唤醒和保护功能，符合 LIN 2.0、LIN 2.1、

LIN 2.2、LIN 2.2A 和 ISO/DIS 17987–4 标准。LIN

是一种单线双向总线，通常用于车载网络。TLIN1039-

Q1 旨在为12V 应用提供支持，具有更宽的工作电压范

围和额外的总线故障保护。

• 宽工作电源电压范围：4.5 V 至36V

• LIN 传输数据速率高达20kbps

• LIN 接收数据速率高达100kbps

• 休眠模式：超低电流消耗允许以下类型的唤醒事

件：

– LIN 总线

TLIN1039-Q1 变送器支持高达 20kbps 的数据速率。

TLIN1039-Q1 接收器支持高达 100kbps 的数据速率，

从而更快速地执行内联编程。TLIN1039-Q1 使用一个

可降低电磁辐射 (EME) 的限流波形整形驱动器将 TXD

输入上的数据流转化为 LIN 总线信号。接收器将数据

流转化为逻辑电平信号，此信号通过开漏 RXD 引脚发

送到微处理器。休眠模式可实现超低电流消耗，该模式

允许通过LIN 总线或EN 引脚实现唤醒。

– 通过EN 引脚的本地唤醒

• 集成45kΩLIN 上拉电阻器

• 在LIN 总线和RXD 输出上实现上电/断电无干扰运

行

• 保护特性：

– ±45V LIN 总线容错

– V_SUP欠压保护

– TXD 显性超时(DTO) 保护

– 热关断保护

器件信息

– 系统级未供电节点或接地断开失效防护

• 结温范围为-40°C 至150°C

• 采用小型SOT-23 封装

封装⁽¹⁾

封装尺寸（标称值）

器件型号

TLIN1039-Q1

SOT-23 (8) (DDF)

2.90mm x 1.60mm

(1) 如需了解所有可用封装，请参阅数据表末尾的可订购产品附

录。

V_BAT

V_SUP

V_BAT

V_SUP

VREG

V_SUP

VREG

V_SUP

V_DD

Commander

Node

Pullup

V_DD

V_SUP

NC NC

EN

NC

8

NC

3

8

3

7

2

V_DD

EN

I/O

2

7

V_DD

MCU w/o

pullup

MCU w/o

pullup

V_DDI/O

1 kΩ

LIN Bus

LIN

LIN Bus

MCU

LIN

MCU

6

LIN Controller

or

SCI/UART

LIN Controller

Or

SCU/UART

1

4

1

4

220 pF

RXD

TXD

RXD

TXD

GND

5

GND

5

简化版原理图，响应者模式

简化版原理图，指挥官模式

本文档旨在为方便起见，提供有关TI 产品中文版本的信息，以确认产品的概要。有关适用的官方英文版本的最新信息，请访问

www.ti.com，其内容始终优先。TI 不保证翻译的准确性和有效性。在实际设计之前，请务必参考最新版本的英文版本。

English Data Sheet: SLLSFH7

TLIN1039-Q1

ZHCSOR2 –AUGUST 2021

www.ti.com.cn

Table of Contents

9.1 Overview...................................................................20

9.2 Functional Block Diagram.........................................20

9.3 Feature Description...................................................21

9.4 Functional Modes......................................................24

10 Application and Implementation................................26

10.1 Application Information........................................... 26

10.2 Typical Application.................................................. 26

11 Power Supply Recommendations..............................27

12 Layout...........................................................................28

12.1 Layout Guidelines................................................... 28

12.2 Layout Example...................................................... 29

13 Device and Documentation Support..........................30

13.1 Related Documentation.......................................... 30

13.2 接收文档更新通知................................................... 30

13.3 支持资源..................................................................30

13.4 Trademarks.............................................................30

13.5 静电放电警告.......................................................... 30

13.6 术语表..................................................................... 31

1 特性................................................................................... 1

2 应用................................................................................... 1

3 说明................................................................................... 1

4 Revision History.............................................................. 2

5 说明（续）.........................................................................3

6 Pin Configuration and Functions...................................4

7 Specifications.................................................................. 5

7.1 Absolute Maximum Ratings ....................................... 5

7.2 ESD Ratings .............................................................. 5

7.3 ESD Ratings - IEC Specification ................................5

7.4 Thermal Information ...................................................6

7.5 Recommended Operating Conditions ........................6

7.6 Power Supply Characteristics ....................................6

7.7 Electrical Characteristics ............................................7

7.8 AC Switching Characteristics ...................................10

7.9 Typical Characteristics.............................................. 11

8 Parameter Measurement Information..........................12

9 Detailed Description......................................................20

4 Revision History

注：以前版本的页码可能与当前版本的页码不同

DATE

REVISION

NOTES

August 2021

*

Initial release.

2

Submit Document Feedback

Product Folder Links: TLIN1039-Q1

TLIN1039-Q1

ZHCSOR2 –AUGUST 2021

www.ti.com.cn

5 说明（续）

TLIN1039-Q1 集成了一个用于LIN 响应器节点应用、ESD 保护和故障保护的电阻器，可减少应用中的外部组件数

量。一旦发生接地漂移或电源电压断开，该器件可防止反馈电流经 LIN 流向电源输入。器件还包含欠压保护、过

热关断保护和接地失效保护功能。

Submit Document Feedback

3

Product Folder Links: TLIN1039-Q1

TLIN1039-Q1

ZHCSOR2 –AUGUST 2021

www.ti.com.cn

6 Pin Configuration and Functions

RXD

EN

1

2

3

4

8

7

6

5

NC

V_SUP

LIN

NC

TXD

GND

Not to scale

图6-1. DDF Package, 8-Pin (SOT), Top View

表6-1. Pin Functions

DESCRIPTION

Type

Name

RXD

No.

1

DO

DI

RXD output (open-drain) interface reporting state of LIN bus voltage

Enable input - High puts the device in normal operation mode and low puts the device in sleep

mode; integrated pull-down

EN

2

NC

3

4

5

6

7

8

Not connected

–

DI

TXD

GND

LIN

TXD input interface to control state of LIN output; integrated pull-down

Ground

GND

HV I/O

LIN bus single-wire transmitter and receiver

V_SUP

NC

HV Supply Device supply voltage (connected to battery in series with external reverse blocking diode)

Not connected

–

4

Submit Document Feedback

Product Folder Links: TLIN1039-Q1

TLIN1039-Q1

ZHCSOR2 –AUGUST 2021

www.ti.com.cn

7 Specifications

7.1 Absolute Maximum Ratings

(1) (2)

MIN

–0.3

–45

MAX

45

6

UNIT

V

V_SUP

Supply voltage range (ISO 17987)

LIN Bus input voltage (ISO 17987)

Logic input voltage (TXD, EN)

Logic output voltage (RXD)

Digital pin output current

Junction Temp

V_LIN

V

V_{LOGIC_INPUT}

V

–0.3

V_{LOGIC_OUTPUT}

6

V

I_O

8

mA

°C

T_J

165

150

–55

T_stg

Storage temperature

-65

(1) Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply

functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If

used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully

functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime.

(2) All voltage values are with respect to ground terminal.

7.2 ESD Ratings

VALUE

±8000

±10000

±4000

UNIT

Human body model (HBM) classification level 3B: V_SUPwith respect to ground

Human body model (HBM) classification level 3B: LIN with respect to ground

Human body model (HBM) classification level 3A: all other pins, per AEC Q100-002⁽¹⁾

V

V_ESDElectrostatic discharge

Charged device model (CDM) classification

All pins

±750

V

level C5, per AEC Q100-011

(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

7.3 ESD Ratings - IEC Specification

VALUE

UNIT

IEC 62228-2 per ISO 10605

Contact discharge

R = 330 Ω, C = 150 pF (IEC 61000-4-2)

LIN, V_SUPterminal to GND⁽¹⁾

LIN terminal to GND⁽¹⁾

±8000

-100

75

V_ESDElectrostatic discharge

V

IEC 62228-2 per ISO 10605

Indirect contact discharge

R = 330 Ω, C = 150 pF (IEC 61000-4-2)

IEC 62228-2 per IEC 62215-3

12 V electrical systems

Pulse 1

IEC 62228-2 per IEC 62215-3

12 V electrical systems

Pulse 2

Non-synchronous transient

LIN, V_SUPterminal to GND⁽¹⁾

injection

IEC 62228-2 per IEC 62215-3

12 V electrical systems

Pulse 3a

V_TRAN

V

-150

IEC 62228-2 per IEC 62215-3

12 V electrical systems

Pulse 3b

150

±30

SAE J2962-1 per ISO 7637-3

DCC - Slow transient pulse

Direct capacitor coupling

LIN terminal to GND⁽²⁾

(1) Results given here are specific to the IEC 62228-2 Integrated circuits –EMC evaluation of transceivers –Part 2: LIN transceivers.

Testing performed by OEM approved independent 3^rdparty, EMC report available upon request.

(2) Results given here are specific to the SAE J2962-1 Communication Transceivers Qualification Requirements - LIN. Testing performed

by OEM approved independent 3^rdparty, EMC report available upon request.

Submit Document Feedback

5

Product Folder Links: TLIN1039-Q1

TLIN1039-Q1

ZHCSOR2 –AUGUST 2021

www.ti.com.cn

7.4 Thermal Information

TLIN1039-Q1

DDF(SOT)

8 PINS

125.3

THERMAL METRIC⁽¹⁾

UNIT

R_θJA

Junction-to-ambient thermal resistance

Junction-to-case (top) thermal resistance

Junction-to-board thermal resistance

°C/W

R_θJC(top)

R_θJB

64.3

45.8

Junction-to-top characterization parameter

Junction-to-board characterization parameter

Junction-to-case (bottom) thermal resistance

2.8

Ψ_JT

45.5

Ψ_JB

R_θJC(bot)

–

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report.

7.5 Recommended Operating Conditions

parameters valid across -40℃≤T_J≤150℃(unless otherwise noted)

MIN

4.5

0

NOM

MAX

36

UNIT

V

V_SUP

V_LIN

Supply Voltage

LIN Bus input voltage

36

V

V_LOGIC

T_J

Logic Pin Voltage

0

5.25

150

V

Operating virtual junction temperature range

Thermal shutdown rising

Thermal shutdown falling

Thermal shutdown hysteresis

-40

160

°C

T_SDR

T_SDF

T_SD(HYS)

150

10

7.6 Power Supply Characteristics

parameters valid across -40℃≤T_J≤150℃(unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Supply Voltage and Current

Device is operational beyond the LIN

defined nominal supply voltage range

See 图8-1 and 图8-2

Operational supply voltage

ISO 17987 Param 10

4.5

36

V

V_SUP

Normal and standby modes⁽¹⁾

See 图8-1 and 图8-2

4.5

36

V

Nominal supply voltage

ISO 17987 Param 10

Sleep mode

Normal mode

EN = High_,R_LIN≥500 Ω, C_LIN≤10 nF

1.2

1

6.5

mA

Supply current

Bus dominant

Standby mode

EN = 0 V, R_LIN≥500 Ω, C_LIN≤10 nF

1.7

700

30

mA

µA

Normal mode

EN = High

300

20

9

Supply current

Bus recessive

I_SUP

Standby mode

EN = 0 V

4.5 V < V_SUP≤14 V,

EN = 0 V, TXD and RXD floating

14

Supply current

Sleep mode

14 V < V_SUP≤36 V,

EN = 0 V, TXD and RXD floating

22

UV_SUP(R)

UV_SUP(F)

UV_HYS

Under voltage V_SUPthreshold

Ramp up

4.15

4

4.45

V

Ramp down

3.5

Delta hysteresis voltage for V_SUPunder voltage threshold

0.13

(1) Ramp V_SUPwhile LIN signal is a 10 kHz square wave with 50% duty cycle and 36 V swing.

6

Submit Document Feedback

Product Folder Links: TLIN1039-Q1

TLIN1039-Q1

ZHCSOR2 –AUGUST 2021

www.ti.com.cn

7.7 Electrical Characteristics

parameters valid across -40℃≤T_J≤150℃(unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

0.6

5

UNIT

RXD Output Terminal

(4)

V_OL

I_OL

Low-level voltage

Based upon external pull-up to V_CC

LIN = 0 V, RXD = 0.4 V

V

Low-level output current, open drain

Leakage current, high-level

1.5

mA

µA

I_LKG

LIN = V_SUP, RXD = V_CC

–5

TXD Input Terminal

V_IL

Low-level input voltage

0.8

V

V_IH

High-level input voltage

2

–5

125

I_LKG

R_TXD

EN Input Terminal

Low-level input leakage current

TXD = 0 V

5

µA

Internal pull-down resistor value

350

800

kΩ

V_IL

Low-level input voltage

0.8

5.25

500

5

V

–0.3

2

V_IH

High-level input voltage

Hysteresis voltage

V_HYS

By design and characterization

EN = 0 V

30

mV

µA

I_IL

Low-level input current

Internal pull-down resistor

–5

125

R_EN

350

800

kΩ

LIN Terminal

TXD = V_CC, I_O= 0 mA

7 V ≤V_SUP≤36 V

V_OH

V_OL

LIN recessive high-level output voltage⁽³⁾

LIN recessive high-level output voltage^{(1) (2)}

LIN dominant low-level output voltage⁽³⁾

LIN dominant low-level output voltage^{(1) (2)}

0.85

3

V_SUP

TXD = V_CC, I_O= 0 mA

4.5 V ≤V_SUP< 7 V

V

TXD = V_CC, I_O= 0 mA

7 V ≤V_SUP≤18 V

0.8

V_SUP

V

TXD = 0 V

7 V ≤V_SUP≤36 V

0.2

1.2

0.2

TXD = 0 V

4.5 V ≤V_SUP< 7 V

TXD = 0 V

7 V ≤V_SUP≤18 V

V_SUP

LIN dominant (including LIN dominant for

wake up)

See 图8-3 and 图8-4

Low-level input voltage

ISO 17987 Param 17

V_BUSdom

0.4

V_SUP

LIN recessive

See 图8-3 and 图8-4

High-level input voltage

ISO 17987 Param 18

V_BUSrec

V_IH

0.6

0.47

V_SUP

V

LIN recessive high-level input voltage threshold⁽¹⁾

0.6

0.53

42

7 V ≤V_SUP≤18 V

(2)

LIN dominant low-level input voltage threshold⁽¹⁾

V_IL

0.4

(2)

TXD & RXD open

4.5 V ≤LIN ≤45 V

V_{SUP_NON_OP}

V_{BUS_CNT}

V_HYS

V_SUPwhere impact of recessive LIN bus < 5%⁽³⁾

Receiver center threshold

–0.3

0.475

V_{BUS_CNT}= (V_BUSrec+ V_BUSdom)/2

See 图8-3 and 图8-4

0.5

0.525

0.175

V_SUP

V_HYS= V_BUSrec- V_BUSdom

See 图8-3 and 图8-4

Hysteresis voltage (ISO 17987)

V_SUP

V_HYS= V_IH- V_IL

See 图8-3 and 图8-4

V_HYS

Hysteresis voltage (SAE J2602)

0.07

0.4

40

0.175

1.0

V_SUP

V

V_{SERIAL_DIODE}

I_BUS(LIM)

Serial diode LIN termination pull-up path

I_{SERIAL_DIODE}= 10 µA

0.7

90

Limiting current

ISO 17987 Param 12

TXD = 0 V, V_LIN= 18 V

V_SUP= 18 V

200

mA

Driver off/recessive, LIN = 0 V

V_SUP= 12 V

See 图8-6

I_{BUS_PAS_dom}

Receiver leakage current, dominant

Receiver leakage current, recessive

mA

µA

–1

Driver off/recessive, LIN ≥V_SUP

4.5 V ≤V_SUP≤36 V

See 图8-7

I_{BUS_PAS_rec1}

20

Submit Document Feedback

7

Product Folder Links: TLIN1039-Q1

TLIN1039-Q1

ZHCSOR2 –AUGUST 2021

www.ti.com.cn

7.7 Electrical Characteristics (continued)

parameters valid across -40℃≤T_J≤150℃(unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Driver off/recessive, LIN = V_SUP

See 图8-7

I_{BUS_PAS_rec2}

Receiver leakage current, recessive

5

µA

–5

GND_Device= V_SUP= 18 V

R_Meas= 1 kΩ

I_{BUS_NO_GND}

Leakage current, loss of ground

Leakage current, loss of ground ⁽⁵⁾

1

mA

–1

0 V < V_LIN< 18 V

V_SUP= 8 V, GND = open, V_SUP= 18 V, GND

= open

R_COMMANDER= 1 kΩ, C_L= 1 nF

R_RESPONDER= 20 kΩ, C_L= 1 nF

LIN = dominant

I_{leak gnd(dom)}

V_SUP= 8 V, GND = open, V_SUP= 18 V, GND

= open

R_COMMANDER= 1 kΩ, C_L= 1 nF

R_RESPONDER= 20 kΩ, C_L= 1 nF

LIN = recessive

I_{leak gnd(rec)}

Leakage current, loss of ground ⁽⁵⁾

Leakage current, loss of supply

100

5

µA

–100

V_SUP= GND

0 V ≤V_LIN≤18 V

I_{BUS_NO_BAT}

µA

I_RSLEEP

R_PU

Pull-up current source to V_SUPsleep mode

Pull-up resistor to V_SUP

V_SUP= 14 V, LIN = GND

Normal and standby modes

V_SUP= 14 V

–20

–1.5

60

20

45

kΩ

C_LIN

Capacitance of the LIN pin

25

pF

Duty Cycle Characteristics

TH_REC(MAX)= 0.744 x V_SUP

TH_DOM(MAX)= 0.581 x V_SUP

V_SUP= 7 V to 18 V, t_BIT= 50 µs

Duty Cycle 1⁽³⁾

D1

0.396

ISO 17987 Param 27

D1 = t_{BUS_rec(min)}/(2 x t_BIT

)

See 图8-10 and 图8-11

TH_REC(MAX)= 0.665 x V_SUP

,

TH_DOM(MAX)= 0.499 x V_SUP

V_SUP= 4.5 V to 7 V, t_BIT= 50 µs

D1

D2

D3

Duty Cycle 1 ^{(3) (6)}

D1 = t_{BUS_rec(min)}/(2 x t_BIT

)

See 图8-10 and 图8-11

TH_REC(MAX)= 0.744 x V_SUP

TH_DOM(MAX)= 0.581 x V_SUP

V_SUP= 7 V to 18 V, t_BIT= 52 µs

,

Duty cycle 1^{(1) (2) (6)}

D1 = t_{BUS_rec(min)}/(2 x t_BIT

)

See 图8-10 and 图8-11

TH_REC(MIN)= 0.422 x V_SUP

TH_DOM(MIN)= 0.284 x V_SUP

V_SUP= 7 V to 18 V, t_BIT= 50 µs

Duty Cycle 2⁽³⁾

ISO 17987 Param 28

0.581

D2 = t_{BUS_rec(MAX)}/(2 x t_BIT

)

See 图8-10 and 图8-11

TH_REC(MIN)= 0.496 x V_SUP

TH_DOM(MIN)= 0.361 x V_SUP

V_SUP= 4.5 V to 7 V, t_BIT= 50 µs

,

Duty cycle 2^{(3) (6)}

D2 = t_{BUS_rec(MAX)}/(2 x t_BIT

)

See 图8-10 and 图8-11

TH_REC(MIN)= 0.422 x V_SUP

TH_DOM(MIN)= 0.284 x V_SUP

V_SUP= 7 V to 18 V, t_BIT= 52 µs

,

Duty cycle 2^{(1) (2) (6)}

D2 = t_{BUS_rec(MAX)}/(2 x t_BIT

)

See 图8-10 and 图8-11

TH_REC(MAX)= 0.778 x V_SUP

TH_DOM(MAX)= 0.616 x V_SUP

V_SUP= 7 V to 18 V, t_BIT= 96 µs

Duty Cycle 3⁽³⁾

ISO 17987 Param 29

0.417

D3 = t_{BUS_rec(min)}/(2 x t_BIT

)

See 图8-10 and 图8-11

TH_REC(MAX)= 0.665 x V_SUP

TH_DOM(MAX)= 0.499 x V_SUP

V_SUP= 4.5 V to 7 V, t_BIT= 96 µs

Duty Cycle 3^{(3) (6)}

D3 = t_{BUS_rec(min)}/(2 x t_BIT

)

See 图8-10 and 图8-11

8

Submit Document Feedback

Product Folder Links: TLIN1039-Q1

TLIN1039-Q1

ZHCSOR2 –AUGUST 2021

www.ti.com.cn

7.7 Electrical Characteristics (continued)

parameters valid across -40℃≤T_J≤150℃(unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

TH_REC(MAX)= 0.778 x V_SUP

TH_DOM(MAX)= 0.616 x V_SUP

V_SUP= 7 V to 18 V, t_BIT= 96 µs

D3

D4

Duty cycle 3^{(1) (2) (6)}

0.417

D3 = t_{BUS_rec(min)}/(2 x t_BIT

)

See 图8-10 and 图8-11

TH_REC(MIN)= 0.389 x V_SUP

TH_DOM(MIN)= 0.251 x V_SUP

V_SUP= 7 V to 18 V, t_BIT= 96 µs

Duty Cycle 4⁽³⁾

ISO 17987 Param 30

0.59

D4 = t_{BUS_rec(MAX)}/(2 x t_BIT

)

See 图8-10 and 图8-11

TH_REC(MAX)= 0.496 x V_SUP

TH_DOM(MAX)= 0.361 x V_SUP

V_SUP= 4.5 V to 7 V, t_BIT= 96 µs

Duty Cycle 4^{(3) (6)}

D4 = t_{BUS_rec(MAX)}/(2 x t_BIT

)

See 图8-10 and 图8-11

TH_REC(MIN)= 0.389 x V_SUP

TH_DOM(MIN)= 0.251 x V_SUP

V_SUP= 7 V to 18 V, t_BIT= 96 µs

Duty cycle 4^{(1) (2) (6)}

D4 = t_{BUS_rec(MAX)}/(2 x t_BIT

)

See 图8-10 and 图8-11

TH_REC(MAX)= 0.665 x V_SUP

TH_DOM(MAX)= 0.499 x V_SUP

V_SUP= 5.5 V to 7 V, t_BIT= 52 µs

,

D1_LB

D2_LB

D3_LB

D_4LB

Duty cycle 1 at low battery^{(1) (2) (6)}

Duty cycle 2 at low battery^{(1) (2) (6)}

Duty cycle 3 at low battery^{(1) (2) (6)}

Duty cycle 4 at low battery^{(1) (2) (6)}

0.396

TH_REC(MAX)= 0.496 x V_SUP

TH_DOM(MAX)= 0.361 x V_SUP

V_SUP= 6.1 V to 7 V, t_BIT= 52 µs

0.581

TH_REC(MAX)= 0.665 x V_SUP

,

TH_DOM(MAX)= 0.499 x V_SUP

V_SUP= 5.5 V to 7 V, t_BIT= 96 µs

,

TH_REC(MAX)= 0.496 x V_SUP

TH_DOM(MAX)= 0.361 x V_SUP

V_SUP= 6.1 V to 7 V, t_BIT= 96 µs

0.581

10.8

TH_REC(MAX)= 0.744 x V_SUP

,

Transmitter propagation delay timings for the duty

cycle^{(1) (2) (6)}

Recessive to dominant

TH_DOM(MAX)= 0.581 x V_SUP

7 V ≤V_SUP≤18 V, t_BIT= 52 µs

t_{REC(MAX)_D1}- t_{DOM(MIN)_D1}

T_{r-d max_D1}

T_{d-r max_D2}

T_{r-d max_D3}

T_{d-r max_D4}

T_{r-d max_low}

T_{d-r max_low}

µs

TH_REC(MAX)= 0.422 x V_SUP

,

Transmitter propagation delay timings for the duty

cycle^{(1) (2) (6)}

Dominant to recessive

TH_DOM(MAX)= 0.284 x V_SUP

7 V ≤V_SUP≤18 V, t_BIT= 52 µs

t_{DOM(MAX)_D2}- t_{REC(MIN)_D2}

8.4

15.9

17.28

10.8

8.4

TH_REC(MAX)= 0.778 x V_SUP

TH_DOM(MAX)= 0.616 x V_SUP

7 V ≤V_SUP≤18 V, t_BIT= 96 µs

t_{REC(MAX)_D3}- t_{DOM(MIN)_D3}

Transmitter propagation delay timings for the duty

cycle^{(1) (2) (6)}

Recessive to dominant

TH_REC(MIN)= 0.389 x V_SUP

TH_DOM(MIN)= 0.251 x V_SUP

7 V ≤V_SUP≤18 V, t_BIT= 96 µs

t_{DOM(MAX)_D4}- t_{REC(MIN)_D4}

Transmitter propagation delay timings for the duty

cycle^{(1) (2) (6)}

Dominant to recessive

TH_REC(MAX)= 0.665 x V_SUP

,

Low battery transmitter propagation delay timings

for the duty cycle^{(1) (2) (6)}

Recessive to dominant

TH_DOM(MAX)= 0.499 x V_SUP

5.5 V ≤V_SUP≤7 V, t_BIT= 52 µs

t_{REC(MAX)_low}- t_{DOM(MIN)_low}

TH_REC(MAX)= 0.496 x V_SUP

TH_DOM(MAX)= 0.361 x V_SUP

6.1 V ≤V_SUP≤7 V, t_BIT= 52 µs

t_{DOM(MAX)_low}- t_{REC(MIN)_low}

Low battery transmitter propagation delay timings

for the duty cycle^{(1) (2) (6)}

Dominant to recessive

(1) SAE 2602 commander node load conditions: 5.5 nF/4 kΩ and 899 pF/20 kΩ

(2) SAE 2602 responder node load conditions: 5.5 nF/875 Ω and 899 pF/900 Ω

(3) ISO 17987 bus load conditions (C_LINBUS, R_LINBUS) include 1 nF/1 kΩ; 6.8 nF/660 Ω; 10 nF/500 Ω.

(4) RXD uses open drain output structure therefore V_OLlevel is based upon microcontroller supply voltage.

(5) I_{leak gnd}= (V_BAT- V_LIN)/R_Load

(6) Specified by design

Submit Document Feedback

9

Product Folder Links: TLIN1039-Q1

TLIN1039-Q1

ZHCSOR2 –AUGUST 2021

www.ti.com.cn

7.8 AC Switching Characteristics

parameters valid across -40℃≤T_J≤150℃(unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Device Switching Characteristics

Receiver rising propagation delay time

ISO 17987 Param 31

t_{rx_pdr}

t_{rx_pdf}

t_{rx_pdr}

t_{rx_pdf}

5

6

µs

5.5 V ≤VSUP , R_RXD= 2.4 kΩ, C_RXD= 20

pF

Receiver falling propagation delay time

ISO 17987 Param 31

See 图8-12 and 图8-13

Receiver rising propagation delay time

ISO 17987 Param 31

4.5 V ≤VSUP < 5.5 V, R_RXD= 2.4 kΩ,

C_RXD= 20 pF

See 图8-12 and 图8-13

Receiver falling propagation delay time

ISO 17987 Param 31

Rising edge with respect to falling edge

t_{rx_sym}= t_{rx_pdf}–t_{rx_pdr}

R_RXD= 2.4 kΩ, C_RXD= 20 pF

See 图8-12 and 图8-13

Symmetry of receiver propagation delay time

Receiver rising propagation delay time

ISO 17987 Param 32

t_{rx_sym}

2

µs

–2

t_LINBUS

t_CLEAR

Minimum dominant time on LIN bus for wake-up

25

8

65

25

150

50

µs

See 图8-16, 图9-2 and 图9-3

Time to clear false wake-up prevention logic if LIN

bus had a bus stuck dominant fault (recessive

time on LIN bus to clear bus stuck dominant fault)

See 图9-3

Time to change from normal mode to sleep

mode through EN pin

See 图9-4 and 图8-14

t_{MODE_CHANGE}Mode change delay time

2

15

45

µs

Time for normal mode to initialize and data

on RXD pin to be valid, includes

t_{MODE_CHANGE}for standby to normal mode.

See 图8-14

t_NOMINT

Normal mode initialization time⁽¹⁾

Time it takes for valid data on RXD upon

power-up

t_PWR

Power-up time

1.5

80

ms

t_{TXD_DTO}

Dominant state time out

20

50

(1) The transition time from sleep mode to normal mode includes both t_{MODE_CHANGE}and t_NOMINT

.

10

Submit Document Feedback

Product Folder Links: TLIN1039-Q1

TLIN1039-Q1

ZHCSOR2 –AUGUST 2021

www.ti.com.cn

7.9 Typical Characteristics

40

35

30

25

20

15

10

5

1

0.9

0.8

0.7

0.6

0.5

0.4

0.3

-55°C

25°C

125°C

150°C

-55°C

25°C

125°C

150°C

0

5

10

15

Supply voltage (V)

20

25

30

35

40

0

5

10

15

Supply voltage (V)

20

25

30

35

40

D001

D002

图7-1. V_OHvs V_SUPand Temperature

图7-2. V_OLvs V_SUPand Temperature

2.5

500

450

400

350

300

250

200

150

2.25

2

1.75

1.5

1.25

1

-55°C

25°C

125°C

150°C

-55°C

25°C

125°C

150°C

0.75

0.5

0.25

0

5

10

15

Supply voltage (V)

20

25

30

35

40

0

5

10

15

Supply voltage (V)

20

25

30

35

40

D003

D004

图7-3. I_SUPDominant vs V_SUPand Temperature

图7-4. I_SUPRecessive vs V_SUPand Temperature

1.2

13

12

11

10

9

1

0.8

0.6

8

0.4

7

-55°C

25°C

125°C

150°C

-55°C

25°C

125°C

150°C

6

0.2

0

5

4

0

5

10

15

Supply voltage (V)

20

25

30

35

40

0

5

10

15

Supply voltage (V)

20

25

30

35

40

D005

D006

图7-5. Standby Mode I_SUPDominant vs V_SUPand Temperature

图7-6. Standby Mode I_SUPRecessive vs V_SUPand Temperature

14

12

10

8

-55°C

25°C

6

125°C

150°C

4

0

5

10

15

20

25

Supply voltage (V)

30

35

40

D007

图7-7. Sleep Mode I_SUPvs V_SUPand Temperature

Submit Document Feedback

11

Product Folder Links: TLIN1039-Q1

TLIN1039-Q1

ZHCSOR2 –AUGUST 2021

www.ti.com.cn

8 Parameter Measurement Information

1

8

7

NC

RXD

Power Supply

Resolution: 10mV/1mA

Accuracy: 0.2%

5 V

2

V_SUP

V_PS

EN

NC

3

4

6

Pulse Generator

t_R/t_FSquare Wave: < 20 ns

LIN

:

t_R/t_FTriangle Wave: < 40ns

TXD

5

GND

Frequency: 20 ppm

Jitter: < 25 ns

Measurement Tools

O-scope:

DMM

图8-1. Test System: Operating Voltage Range with RX and TX Access: Parameters 9, 10

Delta t = + 5 µs

Trigger Point

(t_BIT= 50 µs)

RX

2 x t_BIT= 100 µs (20 kBaud)

图8-2. RX Response: Operating Voltage Range

Period T = 1/f

Amplitude

(signal range)

LIN Bus Input

Frequency: f = 20 Hz

Symmetry: 50%

图8-3. LIN Bus Input Signal

12

Submit Document Feedback

Product Folder Links: TLIN1039-Q1

TLIN1039-Q1

ZHCSOR2 –AUGUST 2021

www.ti.com.cn

1

2

3

4

8

7

NC

RXD

Power Supply

Resolution: 10mV/1mA

Accuracy: 0.2%

5 V

V_SUP

V_PS

EN

NC

6

Pulse Generator

t_R/t_FSquare Wave: < 20 ns

LIN

:

t_R/t_FTriangle Wave: < 40ns

TXD

5

GND

Frequency: 20 ppm

Jitter: < 25 ns

Measurement Tools

O-scope:

DMM

图8-4. LIN Receiver Test with RX access Param 17, 18, 19, 20

1

8

7

NC

RXD

EN

Power Supply 1

Resolution: 10mV/1mA

Accuracy: 0.2%

5 V

2

V_SUP

V_PS1

D

Power Supply 2

Resolution: 10mV/1mA

Accuracy: 0.2%

6

5

3

4

NC

LIN

V_PS2

TXD

R_BUS

GND

Measurement Tools

O-scope:

DMM

图8-5. V_{SUP_NON_OP}Param 11

Submit Document Feedback

13

Product Folder Links: TLIN1039-Q1

TLIN1039-Q1

ZHCSOR2 –AUGUST 2021

www.ti.com.cn

1

RXD

8

7

NC

Power Supply

Resolution: 10mV/1mA

Accuracy: 0.2%

2

3

V_SUP

V_PS

EN

NC

R_MEAS= 499 Ω

6

LIN

5

4

TXD

GND

Measurement Tools

O-scope:

DMM

图8-6. Test Circuit for I_{BUS_PAS_dom}; TXD = Recessive State V_BUS= 0 V, Param 13

Power Supply 1

Resolution: 10mV/ 1mA

Accuracy: 0.2%

1

2

8

7

NC

RXD

EN

V_PS1

V_SUP

Power Supply 2

Resolution: 10mV/1mA

Accuracy: 0.2%

V_PS2

1 kΩ

6

3

4

NC

LIN

V_PS22 V/s ramp

[8 V ‰ 36 V]

5

TXD

GND

V Drop across resistor

< 20 mV

Measurement Tools

O-scope:

DMM

图8-7. Test Circuit for I_{BUS_PAS_rec}Param 14

14

Submit Document Feedback

Product Folder Links: TLIN1039-Q1

TLIN1039-Q1

ZHCSOR2 –AUGUST 2021

www.ti.com.cn

Power Supply 1

Resolution: 10mV/ 1mA

Accuracy: 0.2%

1

2

8

7

NC

RXD

EN

5 V

V_PS1

V_SUP

Power Supply 2

Resolution: 10mV/1mA

Accuracy: 0.2%

V_PS2

1 kΩ

6

5

3

4

NC

LIN

V_PS22 V/s ramp

[0 V ‰ 36 V]

TXD

GND

V Drop across resistor

< 1V

Measurement Tools

O-scope:

DMM

图8-8. Test Circuit for I_{BUS_NO_GND}Loss of GND

8

1

2

NC

RXD

EN

5 V

7

V_SUP

Power Supply 2

Resolution: 10mV/ 1mA

10 kΩ

6

3

4

Accuracy: 0.2%

V_PS

NC

LIN

V_PS2 V/s ramp

[0 V ‰ 36 V]

5

TXD

GND

V Drop across resistor

< 1V

Measurement Tools

O-scope:

DMM

图8-9. Test Circuit for I_{BUS_NO_BAT}Loss of Battery

Submit Document Feedback

15

Product Folder Links: TLIN1039-Q1

TLIN1039-Q1

ZHCSOR2 –AUGUST 2021

www.ti.com.cn

1

2

8

7

RXD

NC

5 V

Power Supply 1

Resolution: 10mV/1mA

Accuracy: 0.2%

V_SUP

EN

NC

V_PS1

R_MEAS

6

3

4

Power Supply 2

Resolution: 10mV/1mA

Accuracy: 0.2%

LIN

Pulse Generator

t_R/t_FSquare Wave: < 20 ns

5

:

V_PS2

TXD

GND

:

t_R/t_FTriangle Wave: < 40ns

Frequency: 20 ppm

Jitter: < 25 ns

Measurement Tools

O-scope:

DMM

图8-10. Test Circuit Slope Control and Duty Cycle Param 27, 28, 29, 30

T_BIT

D = 50%

TXD (Input)

D1₁₂: 0.744 * V_SUP

D3₁₂: 0.778 * V_SUP

TH_REC(MAX)

TH_DOM(MAX)

TH_REC(MIN)

TH_DOM(MIN)

Thresholds

RX Node 1

D1₁₂: 0.581 * V_SUP

D3₁₂: 0.616 * V_SUP

LIN Bus

Signal

D2₁₂: 0.422 * V_SUP

D4₁₂: 0.389 * V_SUP

V_SUP

Thresholds

RX Node 2

D2₁₂: 0.284 * V_SUP

D4₁₂: 0.251 * V_SUP

t_{BUS_REC(MIN)}

t_{BUS_DOM(MAX)}

RXD: Node 1

D1 (20 kbps)

D3 (10.4 kbps)

t_{BUS_DOM(MIN)}

t_{BUS_REC(MAX)}

RXD: Node 2

D2 (20 kbps)

D4 (10.4 kbps)

图8-11. Definition of Bus Timing Parameters

16

Submit Document Feedback

Product Folder Links: TLIN1039-Q1

TLIN1039-Q1

ZHCSOR2 –AUGUST 2021

www.ti.com.cn

V_CC

2.4 kΩ

1

2

8

7

RXD

EN

NC

Power Supply

Resolution: 10mV/1mA

Accuracy: 0.2%

5 V

20 pF

V_SUP

V_PS

6

3

4

Pulse Generator

t_R/t_FSquare Wave: < 20 ns

NC

LIN

:

t_R/t_FTriangle Wave: < 40ns

5

TXD

GND

Frequency: 20 ppm

Jitter: < 25 ns

Measurement Tools

O-scope:

DMM

图8-12. Propagation Delay Test Circuit; Param 31, 32

D1: 0.744 * V_SUP

D3: 0.778 * V_SUP

TH_REC(MAX)

TH_DOM(MAX)

TH_REC(MIN)

TH_DOM(MIN)

Thresholds

RX Node 1

D1: 0.581 * V_SUP

D3: 0.616 * V_SUP

LIN Bus

Signal

D2: 0.422 * V_SUP

D4: 0.389 * V_SUP

V_SUP

Thresholds

RX Node 2

D2: 0.284 * V_SUP

D4: 0.251 * V_SUP

RXD: Node 1

D1 (20 kbps)

D3 (10.4 kbps)

t_{rx_pdr(1)}

t_{rx_pdf(1)}

RXD: Node 2

D2 (20 kbps)

D4 (10.4 kbps)

t_{rx_pdr(2)}

t_{rx_pdf(2)}

图8-13. Propagation Delay

Submit Document Feedback

17

Product Folder Links: TLIN1039-Q1

TLIN1039-Q1

ZHCSOR2 –AUGUST 2021

www.ti.com.cn

Wake Event

t_{MODE_CHANGE}

t_NOMINT

t_{MODE_CHANGE}

EN

Transition

Sleep

Standby

Transition

Normal

MODE

Indeterminate

Ignore

Mirrors

Bus

Wake Request

RXD = Low

RXD

Floating

Indeterminate Ignore

Mirrors Bus

图8-14. Mode Transitions

EN

Weak Internal Pulldown

TXD

Weak Internal Pulldown

V_SUP

LIN

RXD

Floating

Sleep

MODE

Normal

图8-15. Wakeup Through EN

18

Submit Document Feedback

Product Folder Links: TLIN1039-Q1

TLIN1039-Q1

ZHCSOR2 –AUGUST 2021

www.ti.com.cn

0.6 x V_SUP

LIN

0.6 x V_SUP

V_SUP

0.4 x V_SUP

t < t_LINBUS

t_LINBUS

TXD

Weak Internal Pulldown

EN

Floating

Sleep

RXD

MODE

Standby

Normal

图8-16. Wakeup through LIN

Submit Document Feedback

19

Product Folder Links: TLIN1039-Q1

TLIN1039-Q1

ZHCSOR2 –AUGUST 2021

www.ti.com.cn

9 Detailed Description

9.1 Overview

The TLIN1039-Q1 is a Local Interconnect Network (LIN) physical layer transceiver, compliant with LIN 2.0, LIN

2.1, LIN 2.2, LIN 2.2A and ISO/DIS 17987–4 standards, with integrated wake-up and protection features. The

LIN bus is a single-wire bidirectional bus typically used for low speed in-vehicle networks. The device transmitter

supports data rates from 2.4 kbps to 20 kbps and the receiver works up to 100 kbps supporting in-line

programming. The LIN protocol data stream on the TXD input is converted by the TLIN1039-Q1 into a LIN bus

signal using a current-limited wave-shaping driver as outlined by the LIN physical layer specification. The

receiver converts the data stream to logic-level signals that are sent to the microprocessor through the open-

drain RXD pin. The LIN bus has two states: dominant state (voltage near ground) and recessive state (voltage

near battery). In the recessive state, the LIN bus is pulled high by the internal pull-up resistor (45 kΩ) and a

series diode. No external pull-up components are required for responder node applications. Commander node

applications require an external pull-up resistor (1 kΩ) plus a series diode per the LIN specification.

The device is designed to support 12-V applications with a wide input voltage operating range and also supports

low-power sleep mode. The device also provides two methods to wake up: EN pin and from the LIN bus.

The TLIN1039-Q1 integrates ESD protection and fault protection which allow for a reduction in the required

external components in the applications. In the event of a ground shift or supply voltage disconnection, the

device prevents back-feed current through LIN to the supply input. The device also includes undervoltage

detection, temperature shutdown protection, and loss-of-ground protection.

9.2 Functional Block Diagram

V_SUP/2

RXD

V_SUP

Receiver

Filter

EN

45 kΩ

350 kΩ

Wake Up

State & Control

Fault Detection

& Protection

LIN

Dominant

State

Timeout

TXD

DR Slope CTL

350 kΩ

GND

20

Submit Document Feedback

Product Folder Links: TLIN1039-Q1

TLIN1039-Q1

ZHCSOR2 –AUGUST 2021

www.ti.com.cn

9.3 Feature Description

9.3.1 LIN (Local Interconnect Network) Bus

This high voltage input/output pin is a single-wire LIN bus transmitter and receiver. The LIN pin can survive

transient voltages up to 45 V. Reverse currents from the LIN to supply (V_SUP) are minimized with blocking

diodes, even in the event of a ground shift or loss of supply (V_SUP).

9.3.1.1 LIN Transmitter Characteristics

The transmitter has thresholds and AC parameters according to the LIN specification. The transmitter is a low-

side transistor with internal current limitation and thermal shutdown. During a thermal shutdown condition, the

transmitter is disabled to protect the device. There is an internal pull-up resistor with a serial diode structure to

V_SUP, so no external pull-up components are required for the LIN responder node applications. An external pull-

up resistor and series diode to V_SUPmust be added when the device is used for a commander node application

per the LIN specification.

9.3.1.2 LIN Receiver Characteristics

The receiver characteristic thresholds are proportional to the device supply pin in accordance to the LIN

specification.

The receiver is capable of receiving higher data rates (> 100 kbps) than supported by LIN or SAE J2602

specifications. This allows the TLIN1039-Q1 to be used for high speed downloads at the end-of-line production

or other applications. The actual data rate achievable depends on system time constants (bus capacitance and

pull-up resistance) and driver characteristics used in the system.

9.3.1.2.1 Termination

There is an internal pull-up resistor with a serial diode structure to V_SUP, so no external pull-up components are

required for the LIN responder node applications. An external pull-up resistor (1 kΩ) and a series diode to V_SUP

must be added when the device is used for commander node applications as per the LIN specification.

图9-1 shows a commander node configuration, and how the voltage levels are defined.

Voltage drop across the

diodes in the pull-up path

V_{LIN_Bus}

V_SUP

V_SUP/2

RXD

V_Battery

V_SUP

V_{LIN_Recessive}

Receiver

Filter

45 kΩ

1 kΩ

LIN

LIN Bus

TXD

350 kΩ

Transmitter

with slope control

GND

V_{LIN_Dominant}

t

图9-1. Commander Node Configuration with Voltage Levels

9.3.2 TXD (Transmit Input and Output)

TXD is the interface to the MCU LIN protocol controller or SCI and UART that is used to control the state of the

LIN output. When TXD is low, the LIN output is dominant (near ground). When TXD is high, the LIN output is

recessive (near V_Battery). See 图 9-1. The TXD input structure is compatible with microcontrollers with 3.3 V and

5 V I/O and integrates a weak pull-down resistor.

Submit Document Feedback

21

Product Folder Links: TLIN1039-Q1

TLIN1039-Q1

ZHCSOR2 –AUGUST 2021

www.ti.com.cn

9.3.3 RXD (Receive Output)

RXD is the interface to the MCU's LIN protocol controller or SCI and UART, which reports the state of the LIN

bus voltage. LIN recessive (near V_Battery) is represented by a high level on the RXD and LIN dominant (near

ground) is represented by a low level on the RXD pin. The RXD output structure is an open-drain output stage.

This allows the device to be used with 3.3 V and 5 V I/O microcontrollers. If the microcontroller’s RXD pin does

not have an integrated pull-up, an external pull-up resistor to the microcontroller I/O supply voltage is required. In

standby mode the RXD pin is driven low to indicate a wake-up request from the LIN bus.

9.3.4 V_SUP(Supply Voltage)

V_SUPis the power supply pin. V_SUPis connected to the battery through an external reverse-blocking diode (图

9-1). If there is a loss of power at the ECU level, the device has extremely low leakage from the LIN pin, which

does not load the bus down. This is optimal for LIN systems in which some of the nodes are unpowered (ignition

supplied) while the rest of the network remains powered (battery supplied).

9.3.5 GND (Ground)

GND is the device ground connection. The device can operate with a ground shift as long as the ground shift

does not reduce the V_SUPbelow the minimum operating voltage, as well as ensuring the input and output

voltages are within their appropriate thresholds. If there is a loss of ground at the ECU level, the device has

extremely low leakage from the LIN pin, which does not load the bus down. This is optimal for LIN systems in

which some of the nodes are unpowered (ignition supplied) while the rest of the network remains powered

(battery supplied).

9.3.6 EN (Enable Input)

EN controls the operational modes of the device. When EN is high, the device is in normal operating mode

allowing a transmission path from TXD to LIN and from LIN to RXD. When EN is low, the device is put into sleep

mode and there are no transmission paths available. After LIN bus wake-up is received, the device can enter

normal mode only by making EN = high. EN has an internal pull-down resistor to make sure the device remains

in low-power mode even if EN floats.

9.3.7 Protection Features

The TLIN1039-Q1 has several protection features such as:

9.3.8 TXD Dominant Timeout (DTO)

While the LIN driver is active, TXD DTO circuit prevents the local node from blocking network communication in

event of a hardware or software failure where TXD is held dominant longer than the timeout period t_{TXD_DTO}. The

TXD DTO circuit is triggered by a falling edge on TXD. If no rising edge is seen before the timeout constant of

the circuit, t_{TXD_DTO}, expires the LIN driver is disabled releasing the bus line to the recessive level. This keeps

the bus free for communication between other nodes on the network. The LIN driver is re-activated on the next

dominant to recessive transition on the TXD terminal, thus clearing the dominant timeout. During this fault, the

transceiver remains in normal mode, the integrated LIN bus pull-up termination remains on, and the LIN receiver

and RXD terminal remain active reflecting the LIN bus data.

The TXD pin has an internal pull-down to make sure the transceiver fails to a known state if TXD is

disconnected. If EN pin is high at power-up the TLIN1039-Q1 enters normal mode. With the internal TXD

connected low, the DTO timer starts. To avoid a t_{TXD_DTO}fault, a recessive signal should be put onto the TXD pin

before the t_{TXD_DTO}timer expires, or the transceiver should be into sleep mode by connecting EN pin low.

9.3.9 Bus Stuck Dominant System Fault: False Wake-Up Lockout

The TLIN1039-Q1 contains logic to detect bus stuck dominant system faults and prevents the device from

waking up falsely during the system fault. Upon entering sleep mode, the device detects the state of the LIN bus.

If the bus is dominant, the wake-up logic is locked out until a valid recessive on the bus “clears”the bus stuck

dominant, preventing excessive current consumption. 图9-2 and 图9-3 show the behavior of this protection.

22

Submit Document Feedback

Product Folder Links: TLIN1039-Q1

TLIN1039-Q1

ZHCSOR2 –AUGUST 2021

www.ti.com.cn

EN

LIN Bus

t_LINBUS

< t_LINBUS

图9-2. No Bus Fault: Entering Sleep Mode with Bus Recessive Condition and Wake-up

EN

t_LINBUS

LIN Bus

t_CLEAR

< t_CLEAR

图9-3. Bus Fault: Entering Sleep Mode with Bus Stuck Dominant Fault, Clearing, and Wake-up

9.3.10 Thermal Shutdown

The LIN transmitter is protected by current limiting circuitry. If the junction temperature of the device exceeds the

thermal shutdown threshold, the device puts the LIN transmitter into the recessive state. Once the over-

temperature fault condition has been removed and the junction temperature has cooled beyond the hysteresis

temperature, the transmitter is re-enabled, assuming the device remains in the normal operation mode. During

this fault, the transceiver remains in normal mode (assuming no change of state request on EN), the transmitter

is in recessive state, the RXD pin reflects the LIN bus and LIN bus pull-up termination remains on.

9.3.11 Under Voltage on V_SUP

The TLIN1039-Q1 contains a power-on reset circuit to avoid false bus messages during under voltage conditions

when V_SUPis less than UV_SUP

.

9.3.12 Unpowered Transceiver

In automotive applications, some LIN nodes in a system can be unpowered, ignition supplied, while others in the

network remains powered by the battery. The TLIN1039-Q1 has extremely low unpowered leakage current from

the bus so an unpowered node does not affect the network or load it down.

Submit Document Feedback

23

Product Folder Links: TLIN1039-Q1

TLIN1039-Q1

ZHCSOR2 –AUGUST 2021

www.ti.com.cn

9.4 Functional Modes

The TLIN1039-Q1 has three functional modes of operation: normal, sleep, and standby. The next sections will

describe these modes as well as how the device moves between the different modes. 图 9-4 graphically shows

the relationship while 表9-1 shows the state of pins

表9-1. Operating Modes

MODE

EN

RXD

LIN BUS TERMINATION

TRANSMITTER

COMMENT

Sleep

Low

Floating

Weak current pull-up

Off

Wake-up event detected,

waiting on MCU to set EN

Standby

Normal

Low

Off

On

45 kΩ

High

LIN bus data

LIN transmission up to 20 kbps

Unpowered System

V_SUP< UV_SUP

V_SUP> UV_SUP

EN = LOW

,

V_SUP> UV_SUP

EN = High

,

V_SUP< UV_SUP

Standby Mode

Driver: Off

RXD: Low

LIN termination: 45 kΩ

V_SUP< UV_SUP

EN = High

Normal Mode

LIN bus wake-up

Sleep Mode

Driver: On

RXD: LIN Bus Data

LIN termination: 45 kΩ

Driver: Off

RXD: Floating

LIN termination: Weak pull-up

EN = Low

EN = High

图9-4. Operating State Diagram

9.4.1 Normal Mode

If the EN pin is high at power-up, the device will power-up in normal mode. If the EN pin is low, it will power-up in

standby mode. The EN pin controls the mode of the device. In normal operational mode the receiver and

transmitter are active and the LIN transmission up to the LIN specified maximum of 20 kbps is supported. The

receiver detects the data stream on the LIN bus and outputs it on RXD for the LIN controller. A recessive signal

on the LIN bus is a logic high and a dominant signal on the LIN bus is a logic low. The driver transmits input data

from TXD to the LIN bus. Normal mode is entered as EN transitions high while the TLIN1039-Q1 is in sleep or

standby mode for > t_NOMINT

.

24

Submit Document Feedback

Product Folder Links: TLIN1039-Q1

TLIN1039-Q1

ZHCSOR2 –AUGUST 2021

www.ti.com.cn

9.4.2 Sleep Mode

Sleep mode is the power saving mode for the TLIN1039-Q1. Sleep mode is only entered when the EN pin is low

and from normal mode. Even with extremely low current consumption in this mode, the TLIN1039-Q1 can still

wake-up from LIN bus through a wake-up signal or if EN is set high for ≥ t_{MODE_CHANGE}. The LIN bus is filtered

to prevent false wake-up events. The wake-up events must be active for the respective time periods (t_LINBUS).

The sleep mode is entered by setting EN low for longer than t_{MODE_CHANGE}

.

While the device is in sleep mode:

• The LIN bus driver is disabled and the internal LIN bus termination is switched off (to minimize power loss if

LIN is short circuited to ground). However, the weak current pull-up is active to prevent false wake-up events

in case an external connection to the LIN bus is lost.

• The normal receiver is disabled.

• EN input and LIN wake-up receiver are active.

9.4.3 Standby Mode

This mode is entered whenever a wake-up event occurs through LIN bus while the device is in sleep mode. The

LIN bus responder mode termination circuit is turned on when standby mode is entered. Standby mode is

signaled through a low level on RXD. See Standby Mode Application Note for more application information.

When EN is set high for longer than t_{MODE_CHANGE}while the device is in standby mode, the device returns to

normal mode. The normal transmission paths from TXD to LIN bus and LIN bus to RXD are enabled.

9.4.4 Wake-Up Events

There are two ways to wake up from sleep mode:

• Remote wake up initiated by the falling edge of a recessive (high) to dominant (low) state transition on LIN

bus where the dominant state is be held for t_LINBUSfilter time. After the t_LINBUSfilter time has been met, a

rising edge on the LIN bus going from dominant state to recessive state initiates a remote wake-up event,

eliminating false wake-ups from disturbances on the LIN bus or if the bus is shorted to ground.

• Local wake-up through EN being set high for longer than t_{MODE_CHANGE}

.

9.4.4.1 Wake-Up Request (RXD)

When the TLIN1039-Q1 encounters a wake-up event from the LIN bus, RXD goes low and the device transitions

to standby mode until EN is reasserted high and the device enters normal mode. Once the device enters normal

mode, the RXD pin releases the wake-up request signal and the RXD pin then reflects the receiver output from

the LIN bus.

9.4.4.2 Mode Transitions

When the TLIN1039-Q1 is transitioning from normal to sleep or standby modes the device needs the time

t_{MODE_CHANGE}to allow the change to fully propagate from the EN pin through the device into the new state.

When transitioning from sleep or standby to normal mode the device needs t_NOMINT

.

Submit Document Feedback

25

Product Folder Links: TLIN1039-Q1

TLIN1039-Q1

ZHCSOR2 –AUGUST 2021

www.ti.com.cn

10 Application and Implementation

Note

以下应用部分中的信息不属于TI 器件规格的范围，TI 不担保其准确性和完整性。TI 的客户应负责确定

器件是否适用于其应用。客户应验证并测试其设计，以确保系统功能。

10.1 Application Information

The TLIN1039-Q1 can be used as both a responder node device and a commander node device in a LIN

network. The device comes with the ability to support both remote wake up request and local wake up request.

10.2 Typical Application

The device integrates a 45 kΩ pull-up resistor and series diode for responder node applications. For commander

applications an external 1 kΩ pull-up resistor with series blocking diode can be used. 图 10-1 shows the device

being used in both commander node and responder node applications.

V_BAT

V_SUP

V_DD

V_SUP

V_DD

(4)

(3)

I/O

EN

1 k

(2)

TLIN1039 LIN

MCU

V_DD

LIN Controller

Or

220 pF

SCI/UART⁽¹⁾

RXD

TXD

GND

Commander Node

V_BAT

V_SUP

V_DD

V_SUP

(4)

V_DD

I/O

EN

(2)

MCU

TLIN1039 LIN

V_DD

LIN Controller

Or

220 pF

SCI/UART⁽¹⁾

RXD

TXD

GND

Responder Node

(1) If RXD on MCU, or LIN transceiver, has an internal pull-up, then an external pull-up resistor is not required.

(2) If RXD on MCU, or LIN transceiver, does not have an internal pull-up, then an external pull-up resistor is required.

(3) Commander node applications require an external 1 k pull-up resistor and serial diode.

(4) Decoupling capacitor values are system dependent but usually have 100 nF, 1 µF and ≥10 µF

图10-1. Typical LIN Bus

10.2.1 Design Requirements

The RXD output structure is an open-drain output stage. This allows the TLIN1039-Q1 to be used with 3.3 V and

5 V I/O processor. If the RXD pin of the processor does not have an integrated pull-up, an external pull-up

resistor to the processor I/O supply voltage is required. The external pull-up resistor value should be between 1

kΩto 10 kΩ, depending on supply used (See I_OLin electrical characteristics). The V_SUPpin of the device should

26

Submit Document Feedback

Product Folder Links: TLIN1039-Q1

TLIN1039-Q1

ZHCSOR2 –AUGUST 2021

www.ti.com.cn

be decoupled with a 100 nF capacitor by placing it close to the V_SUPsupply pin. The system should include

additional decoupling on the V_SUPline as needed per the application requirements.

10.2.2 Detailed Design Procedures

10.2.2.1 Normal Mode Application Note

When using the TLIN1039-Q1 in systems which are monitoring the RXD pin for a wake-up request, special care

should be taken during the mode transitions. The output of the RXD pin is indeterminate for the transition period

between states as the receivers are switched. The application software should not look for an edge on the RXD

pin, for indication of wake-up request, until t_{MODE_CHANGE}has been met. This is shown in 图8-14

10.2.2.2 Standby Mode Application Note

If the TLIN1039-Q1 detects an under voltage on V_SUP, the RXD pin transitions low and signals to the software

that the TLIN1039-Q1 is in standby mode. The transceiver should be returned to sleep mode for the lowest

power state.

10.2.3 Application Curves

图 10-2 and 图 10-3 show the propagation delay from the TXD pin to the LIN pin for the dominant to recessive

and recessive to dominant edges. The device was configured as a commander node with an external pull-up

resistor (1 kΩ) and 680 pF bus capacitance.

图10-3. Recessive to Dominant Propagation Delay

图10-2. Dominant to Recessive Propagation Delay

11 Power Supply Recommendations

The was designed to operate directly from a car battery, or any other DC supply ranging from 4.5 V to 36 V. The

V_SUPpin of the transceiver should be decoupled with a 100-nF capacitor by placing it close to the V_SUPsupply

pin. The system should include additional decoupling on the V_SUPline as needed per the application

requirements.

Submit Document Feedback

27

Product Folder Links: TLIN1039-Q1

TLIN1039-Q1

ZHCSOR2 –AUGUST 2021

www.ti.com.cn

12 Layout

For the PCB design to be successful, start with design of the protection and filtering circuitry. Because ESD

transients have a wide frequency bandwidth from approximately 3 MHz to 3 GHz, high frequency layout

techniques must be applied during PCB design. Placement at the connector also prevents these noisy events

from propagating further into the PCB and system.

12.1 Layout Guidelines

• Pin 1 (RXD): The pin is an open-drain output and requires an external pull-up resistor in the range of 1 kΩ to

10 kΩ to function properly. Note that the minimum value depends on the logic supply used. See I_OLin

electrical specifications. If the microprocessor paired with the transceiver does not have an integrated pull-up,

an external resistor should be placed between RXD and the regulated voltage supply for the microprocessor.

• Pin 2 (EN): EN is an input pin that is used to place the device in a low-power sleep mode. If this feature is not

used the pin should be pulled high to the regulated voltage supply of the microprocessor through a series

resistor between 1 kΩ and 10 kΩ. Additionally, a series resistor may be placed on the pin to limit current on

the digital lines in the case of an over voltage fault.

• Pin 3 (NC): Not Connected.

• Pin 4 (TXD): The TXD pin is used to transmit the input signal from the microcontroller. To prevent an over-

voltage on this pin, a series resistor can be placed to limit the input current to the device. A capacitor to

ground can be placed close to the input pin of the device to filter noise.

• Pin 5 (GND): This is the ground connection for the device. This pin should be tied to the ground plane

through a short trace with the use of two vias to limit total return inductance.

• Pin 6 (LIN): This pin connects to the LIN bus. For responder mode applications a 220 pF capacitor to ground

is implemented. For commander mode applications, an additional series resistor and blocking diode should

be placed between the LIN pin and the V_SUPpin. See Typical LIN Bus.

• Pin 7 (V_SUP): This is the supply pin for the device. A 100 nF decoupling capacitor should be placed as close

to the device as possible.

• Pin 8 (NC): Not Connected.

Note

All ground and power connections should be made as short as possible, and use at least two vias to

minimize the total loop inductance.

28

Submit Document Feedback

Product Folder Links: TLIN1039-Q1

TLIN1039-Q1

ZHCSOR2 –AUGUST 2021

www.ti.com.cn

12.2 Layout Example

V_DD

RXD

1

2

NC

8

7

RXD

U1

V_DD

V_SUP

R2

EN

V_SUP

C3

GND

D1

Only needed for

the commander

node

LIN

3

5

6

NC

LIN

GND

5

TXD

GND

TXD

R6

GND

图12-1. Layout Example

Submit Document Feedback

29

Product Folder Links: TLIN1039-Q1

TLIN1039-Q1

ZHCSOR2 –AUGUST 2021

www.ti.com.cn

13 Device and Documentation Support

13.1 Related Documentation

For related documentation see the following:

• LIN Standards:

– ISO/DIS 17987-1.2: Road vehicles -- Local Interconnect Network (LIN) -- Part 1: General information and

use case definition

– ISO/DIS 17987-4.2: Road vehicles -- Local Interconnect Network (LIN) -- Part 4: Electrical Physical Layer

(EPL) specification 12V/24V

– SAE J2602-1: LIN Network for Vehicle Applications

– LIN Specifications LIN 2.0, LIN 2.1, LIN 2.2 and LIN 2.2A

• EMC requirements:

– SAE J2962-1: Communication Transceivers Qualification Requirements - LIN

– ISO 10605: Road vehicles - Test methods for electrical disturbances from electrostatic discharge

– ISO 11452-4:2011: Road vehicles - Component test methods for electrical disturbances from narrowband

radiated electromagnetic energy - Part 4: Harness excitation methods

– ISO 7637-1:2015: Road vehicles - Electrical disturbances from conduction and coupling - Part 1:

Definitions and general considerations

– ISO 7637-3: Road vehicles - Electrical disturbances from conduction and coupling - Part 3: Electrical

transient transmission by capacitive and inductive coupling via lines other than supply lines

– IEC 62132-4:2006: Integrated circuits - Measurement of electromagnetic immunity 150 kHz to 1 GHz -

Part 4: Direct RF power injection method

– IEC 61000-4-2

– IEC 61967-4

– CISPR25

• Conformance Test requirements:

– ISO/DIS 17987-7.2: Road vehicles -- Local Interconnect Network (LIN) -- Part 7: Electrical Physical Layer

(EPL) conformance test specification

– SAE J2602-2: LIN Network for Vehicle Applications Conformance Test

13.2 接收文档更新通知

要接收文档更新通知，请导航至 ti.com 上的器件产品文件夹。点击订阅更新进行注册，即可每周接收产品信息更

改摘要。有关更改的详细信息，请查看任何已修订文档中包含的修订历史记录。

13.3 支持资源

TI E2E^™支持论坛是工程师的重要参考资料，可直接从专家获得快速、经过验证的解答和设计帮助。搜索现有解

答或提出自己的问题可获得所需的快速设计帮助。

链接的内容由各个贡献者“按原样”提供。这些内容并不构成 TI 技术规范，并且不一定反映 TI 的观点；请参阅

TI 的《使用条款》。

13.4 Trademarks

TI E2E^™is a trademark of Texas Instruments.

所有商标均为其各自所有者的财产。

13.5 静电放电警告

静电放电(ESD) 会损坏这个集成电路。德州仪器(TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理

和安装程序，可能会损坏集成电路。

ESD 的损坏小至导致微小的性能降级，大至整个器件故障。精密的集成电路可能更容易受到损坏，这是因为非常细微的参

数更改都可能会导致器件与其发布的规格不相符。

30

Submit Document Feedback

Product Folder Links: TLIN1039-Q1

TLIN1039-Q1

ZHCSOR2 –AUGUST 2021

www.ti.com.cn

13.6 术语表

TI 术语表

本术语表列出并解释了术语、首字母缩略词和定义。

Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most

current data available for the designated transceiver. This data is subject to change without notice and revision

of this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

Submit Document Feedback

31

Product Folder Links: TLIN1039-Q1

PACKAGE MATERIALS INFORMATION

www.ti.com

29-Aug-2021

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device

Package Package Pins

Type Drawing

SPQ

Reel

A0

B0

K0

P1

W

Pin1

Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant

(mm) W1 (mm)

TLIN1039DDFRQ1

SOT-

DDF

8

3000

180.0

8.4

3.2

1.4

4.0

8.0

Q3

23-THIN

Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com

29-Aug-2021

*All dimensions are nominal

Device

Package Type Package Drawing Pins

SOT-23-THIN DDF

SPQ

Length (mm) Width (mm) Height (mm)

210.0 185.0 35.0

TLIN1039DDFRQ1

8

3000

Pack Materials-Page 2

PACKAGE OUTLINE

DDF0008A

SOT-23 - 1.1 mm max height

S

C

A

L

E

4

.

0

PLASTIC SMALL OUTLINE

C

2.95

2.65

SEATING PLANE

TYP

PIN 1 ID

AREA

0.1 C

A

6X 0.65

8

1

2.95

2.85

NOTE 3

2X

1.95

4

5

0.38

0.22

8X

0.1

C A B

1.65

1.55

B

1.1 MAX

0.20

0.08

TYP

SEE DETAIL A

0.25

GAGE PLANE

0.1

0.0

0 - 8

0.6

0.3

DETAIL A

TYPICAL

4222047/C 10/2022

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing

per ASME Y14.5M.

2. This drawing is subject to change without notice.

3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not

exceed 0.15 mm per side.

www.ti.com

EXAMPLE BOARD LAYOUT

DDF0008A

SOT-23 - 1.1 mm max height

PLASTIC SMALL OUTLINE

8X (1.05)

SYMM

1

8

8X (0.45)

SYMM

6X (0.65)

5

4

(R0.05)

TYP

(2.6)

LAND PATTERN EXAMPLE

SCALE:15X

SOLDER MASK

OPENING

SOLDER MASK

OPENING

METAL UNDER

SOLDER MASK

METAL

SOLDER MASK

DEFINED

NON SOLDER MASK

DEFINED

SOLDER MASK DETAILS

4222047/C 10/2022

NOTES: (continued)

4. Publication IPC-7351 may have alternate designs.

5. Solder mask tolerances between and around signal pads can vary based on board fabrication site.

www.ti.com

EXAMPLE STENCIL DESIGN

DDF0008A

SOT-23 - 1.1 mm max height

PLASTIC SMALL OUTLINE

8X (1.05)

SYMM

(R0.05) TYP

8

1

8X (0.45)

SYMM

6X (0.65)

5

4

(2.6)

SOLDER PASTE EXAMPLE

BASED ON 0.125 mm THICK STENCIL

SCALE:15X

4222047/C 10/2022

NOTES: (continued)

6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate

design recommendations.

7. Board assembly site may have different recommendations for stencil design.

www.ti.com

重要声明和免责声明

TI“按原样”提供技术和可靠性数据（包括数据表）、设计资源（包括参考设计）、应用或其他设计建议、网络工具、安全信息和其他资源，

不保证没有瑕疵且不做出任何明示或暗示的担保，包括但不限于对适销性、某特定用途方面的适用性或不侵犯任何第三方知识产权的暗示担

保。

这些资源可供使用 TI 产品进行设计的熟练开发人员使用。您将自行承担以下全部责任：(1) 针对您的应用选择合适的 TI 产品，(2) 设计、验

证并测试您的应用，(3) 确保您的应用满足相应标准以及任何其他功能安全、信息安全、监管或其他要求。

这些资源如有变更，恕不另行通知。TI 授权您仅可将这些资源用于研发本资源所述的 TI 产品的应用。严禁对这些资源进行其他复制或展示。

您无权使用任何其他 TI 知识产权或任何第三方知识产权。您应全额赔偿因在这些资源的使用中对 TI 及其代表造成的任何索赔、损害、成

本、损失和债务，TI 对此概不负责。

TI 提供的产品受 TI 的销售条款或 ti.com 上其他适用条款/TI 产品随附的其他适用条款的约束。TI 提供这些资源并不会扩展或以其他方式更改

TI 针对 TI 产品发布的适用的担保或担保免责声明。

TI 反对并拒绝您可能提出的任何其他或不同的条款。IMPORTANT NOTICE

邮寄地址：Texas Instruments, Post Office Box 655303, Dallas, Texas 75265


型号：	TLIN1039-Q1
厂家：	TEXAS INSTRUMENTS
描述：	具有显性状态超时故障保护功能的局域互联网络 (LIN) 收发器
文件：	总38页 (文件大小：2240K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

TLIN1039-Q1 [TI]

相关型号：

TLIN1039DDFRQ1

TLIN1431-Q1

TLIN14313RGYRQ1

TLIN14315RGYRQ1

TLIN1441-Q1

TLIN14413DMTRQ1

TLIN14413DMTTQ1

TLIN14415DMTRQ1

TLIN14415DMTTQ1

TLIN2021A-Q1

TLIN2021ADRBRQ1

TLIN2022A-Q1