TMUX6104 [TI]

5pA 导通状态电容、±16.5V、4:1、单通道精密模拟多路复用器;


型号：	TMUX6104
厂家：	TEXAS INSTRUMENTS
描述：	5pA 导通状态电容、±16.5V、4:1、单通道精密模拟多路复用器复用器
文件：	总30页 (文件大小：893K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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TMUX6104

ZHCSHO7A –FEBRUARY 2018–REVISED SEPTEMBER 2018

TMUX6104 36V、低电容、低泄漏电流、

精密 4:1 模拟多路复用器

1 特性

3 说明

•

低导通电容：5pF

TMUX6104 是一款现代互补金属氧化物半导体

(CMOS) 模拟多路复用器，可提供 4:1 单端多路复用。

这些器件在双电源（±5V 至 ±16.5V）、单电源（10V

至 16.5V）或不对称电源（例如 V_DD= 12V，V_SS= –

5V）供电情况下运行良好。所有数字输入均具有兼容

晶体管到晶体管逻辑 (TTL) 的阈值，这些阈值可确保

TTL 和 CMOS 逻辑兼容性。

低输入泄漏：5pA

低电荷注入：0.35pC

轨至轨运行

宽电压范围：±5V 至 ±16.5V（双电源）或 10V 至

16.5V（单电源）

•

低导通电阻：125Ω

转换时间：88ns

TMUX6104 会根据地址引脚 (A0/A1) 和使能引脚 (EN)

的状态将四个输入中的一个 (Sx) 多路复用为共模输出

(D)。每个开关在“ON”位置时在两个方向上表现得都很

好，而且支持最高到电源的输入信号范围。在 OFF 状

态下，则会阻止最高到电源的信号电平。所有开关都具

有先断后合 (BBM) 开关操作。

先断后合开关操作

EN 引脚与 V_DD相连（集成下拉电阻器）

逻辑电平：2V 至 V_DD

低电源电流：17µA

ESD 保护 HBM：2000V

符合行业标准的薄型小外形尺寸 (TSSOP) 封装：

TMUX6104 器件是德州仪器 (TI) 精密开关和多路复用

器系列的一部分。该系列器件具有非常低的泄漏电流和

电荷注入，因此可用于高精度测量应用中。这些器件

的电源电流低至 17μA，因此可用于便携式应用。

2 应用

•

工厂自动化和工业过程控制

可编程逻辑控制器 (PLC)

模拟输入模块

器件信息⁽¹⁾

自动测试设备 (ATE)

数字万用表

器件型号

TMUX6104

封装

封装尺寸（标称值）

TSSOP (14)

5.00mm × 4.40mm

电池监控系统

(1) 如需了解所有可用封装，请参阅数据表末尾的封装选项附录。

简化原理图

Bridge Sensor

Thermocouple

GND

Gain / Filter

Network

PGA

ADC

Multiplexer

Current

Sensing

TMUX6104

Photo

LED

Detector

Optical Sensor

Analog Inputs

本文档旨在为方便起见，提供有关 TI 产品中文版本的信息，以确认产品的概要。有关适用的官方英文版本的最新信息，请访问 www.ti.com，其内容始终优先。 TI 不保证翻译的准确

性和有效性。在实际设计之前，请务必参考最新版本的英文版本。

English Data Sheet: SCDS376

TMUX6104

ZHCSHO7A –FEBRUARY 2018–REVISED SEPTEMBER 2018

www.ti.com.cn

8.2 Functional Block Diagram ....................................... 18

8.3 Feature Description................................................. 18

8.4 Device Functional Modes........................................ 20

Application and Implementation ........................ 21

9.1 Application Information............................................ 21

9.2 Typical Application ................................................. 21

特性.......................................................................... 1

应用.......................................................................... 1

说明.......................................................................... 1

修订历史记录 ........................................................... 2

Pin Configuration and Functions......................... 3

Specifications......................................................... 4

6.1 Absolute Maximum Ratings ...................................... 4

6.2 ESD Ratings.............................................................. 4

6.3 Thermal Information.................................................. 4

6.4 Recommended Operating Conditions....................... 4

6.5 Electrical Characteristics (Dual Supplies: ±15 V) ..... 5

6.6 Switching Characteristics (Dual Supplies: ±15 V)..... 6

6.7 Electrical Characteristics (Single Supply: 12 V)........ 6

6.8 Switching Characteristics (Single Supply: 12 V)....... 7

6.9 Typical Characteristics.............................................. 9

Parameter Measurement Information ................ 11

7.1 Truth Table.............................................................. 11

Detailed Description ............................................ 12

8.1 Overview ................................................................. 12

10 Power Supply Recommendations ..................... 23

11 Layout................................................................... 24

11.1 Layout Guidelines ................................................. 24

11.2 Layout Example .................................................... 24

12 器件和文档支持 ..................................................... 25

12.1 文档支持................................................................ 25

12.2 接收文档更新通知 ................................................. 25

12.3 社区资源................................................................ 25

12.4 商标....................................................................... 25

12.5 静电放电警告......................................................... 25

12.6 术语表 ................................................................... 25

13 机械、封装和可订购信息....................................... 25

4 修订历史记录

注：之前版本的页码可能与当前版本有所不同。

Changes from Original (February 2018) to Revision A

Page

•

将器件状态从预告信息更改为生产数据.................................................................................................................................. 1

TMUX6104

www.ti.com.cn

ZHCSHO7A –FEBRUARY 2018–REVISED SEPTEMBER 2018

5 Pin Configuration and Functions

PW Package

14-Pin TSSOP

Top View

V_SS

GND

V_DD

Not to scale

Pin Functions

TYPE

DESCRIPTION

NAME

NO.

Address line 0

Address line 1

I/O

Drain pin. Can be an input or output.

Active high digital input. When this pin is low, all switches are turned off. When this pin is

high, the A0 and A1 logic inputs determine which switch is turned on.

GND

7, 8, 9

Ground (0 V) reference

No Connect

No internal connection

I/O

Source pin 1. Can be an input or output.

Source pin 2. Can be an input or output.

Source pin 3. Can be an input or output.

Source pin 4. Can be an input or output.

Positive power supply. This pin is the most positive power-supply potential. For reliable

operation, connect a decoupling capacitor ranging from 0.1 µF to 10 µF between V_DDand

GND.

V_DD

Negative power supply. This pin is the most negative power-supply potential. In single-supply

applications, this pin can be connected to ground. For reliable operation, connect a

decoupling capacitor ranging from 0.1 µF to 10 µF between V_SSand GND.

V_SS

TMUX6104

ZHCSHO7A –FEBRUARY 2018–REVISED SEPTEMBER 2018

www.ti.com.cn

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)⁽¹⁾

MIN

MAX

UNIT

V_DDto V_SS

V_DDto GND

V_SSto GND

V_DIG

Supply voltage

–0.3

–18

0.3

Digital input pin (EN, A0, A1) voltage

Digital input pin (EN, A0, A1) current

Analog input pin (Sx) voltage

Analog input pin (Sx) current

Analog output pin (D) voltage

Analog output pin (D) current

Ambient temperature

GND –0.3

–30

V_DD+0.3

I_DIG

V_{ANA_IN}

I_{ANA_IN}

V_{ANA_OUT}

I_{ANA_OUT}

T_A

V_SS–0.3

–30

V_DD+0.3

V_SS–0.3

–30

V_DD+0.3

°C

–55

125

T_J

Junction temperature

150

T_stg

Storage temperature

–65

150

(1) Stresses beyond those listed under Absolute Maximum Rating may cause permanent damage to the device. These are stress ratings

only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended

Operating Condition. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

6.2 ESD Ratings

VALUE

UNIT

Human body model (HBM), per

±2000

ANSI/ESDA/JEDEC JS-001, all pins⁽¹⁾

V_(ESD)

Electrostatic discharge

Charged device model (CDM), per JEDEC

specification JESD22-C101, all pins⁽²⁾

±500

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Thermal Information

TMUX6104

THERMAL METRIC⁽¹⁾

PW (TSSOP)

14 PINS

122.4

52.0

UNIT

R_θJA

Junction-to-ambient thermal resistance

Junction-to-case (top) thermal resistance

Junction-to-board thermal resistance

°C/W

R_θJC(top)

R_θJB

65.4

Ψ_JT

Junction-to-top characterization parameter

Junction-to-board characterization parameter

Junction-to-case (bottom) thermal resistance

8.1

Ψ_JB

64.8

R_θJC(bot)

N/A

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report.

6.4 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

MIN

NOM

MAX

UNIT

(1)

V_DDto V_SS

Power supply voltage differential

V_DDto GND

V_SSto GND

Positive power supply voltage (singlle supply, V_SS= 0 V)

Positive power supply voltage (dual supply)

Negative power supply voltage (dual supply)

16.5

–16.5

–5

(1) V_DDand V_SScan be any value as long as 10 V ≤ (V_DD– V_SS) ≤ 33 V.

TMUX6104

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ZHCSHO7A –FEBRUARY 2018–REVISED SEPTEMBER 2018

Recommended Operating Conditions (continued)

over operating free-air temperature range (unless otherwise noted)

MIN

V_SS

NOM

MAX

V_DD

UNIT

(2)

V_S

Source pins voltage

V_D

Drain pin voltage

V_DIG

I_CH

T_A

Digital input pin (EN, A0, A1) voltage

Channel current (T_A= 25°C )

Ambient temperature

–25

–40

°C

125

(2) V_Sis the voltage on all the S pins.

6.5 Electrical Characteristics (Dual Supplies: ±15 V)

at T_A= 25°C, V_DD= 15 V, and V_SS= -15 V (unless otherwise noted)

PARAMETER

ANALOG SWITCH

TEST CONDITIONS

MIN

TYP

MAX UNIT

V_A

Analog signal range

T_A= –40°C to +125°C

V_SS

V_DD

170

200

230

250

V_S= 0 V, I_S= 1 mA

125

145

R_ON

On-resistance

V_S= ±10 V, I_S= 1 mA

T_A= –40°C to +85°C

T_A= –40°C to +125°C

1.5

On-resistance mismatch

between channels

ΔR_ON

V_S= ±10 V, I_S= 1 mA

T_A= –40°C to +85°C

T_A= –40°C to +125°C

V_S= –10 V, 0 V, +10 V, I_S

= 1 mA

R_{ON_FLAT}

On-resistance flatness

T_A= –40°C to +85°C

T_A= –40°C to +125°C

R_{ON_DRIFT}On-resistance drift

V_S= 0 V

0.5

Ω/°C

–0.02

–0.13

–1

0.005

0.02

0.05

0.5

Switch state is off, V_S

+10 V/ –10 V, V_D= –10

V/ + 10 V

I_S(OFF)

I_D(OFF)

I_D(ON)

Source off leakage current⁽¹⁾

T_A= –40°C to +85°C

T_A= –40°C to +125°C

–0.05

–0.14

–1

0.01

0.05

0.1

Switch state is off, V_S

+10 V/ –10 V, V_D= –10

V/ +10 V

Drain off leakage current⁽¹⁾

Drain on leakage current

T_A= –40°C to +85°C

T_A= –40°C to +125°C

0.5

–0.07

–0.27

–2

0.07

0.15

Switch state is on, V_S

+10 V/ –10 V, V_D= –10

V/ +10 V

T_A= –40°C to +85°C

T_A= –40°C to +125°C

DIGITAL INPUT (EN, Ax pins)

V_IH

Logic voltage high

T_A= –40°C to +125°C

V_IL

Logic voltage low

0.8

R_PD(EN)

Pull-down resistance on EN pin

MΩ

POWER SUPPLY

µA

V_A= 0 V or 3.3 V, V_S= 0

V, V_EN= 3.3 V

I_DD

V_DDsupply current

T_A= –40°C to +85°C

T_A= –40°C to +125°C

V_A= 0 V or 3.3 V, V_S= 0

V, V_EN= 3.3 V

I_SS

V_SSsupply current

T_A= –40°C to +85°C

T_A= –40°C to +125°C

(1) When V_Sis positive, V_Dis negative, and vice versa.

TMUX6104

ZHCSHO7A –FEBRUARY 2018–REVISED SEPTEMBER 2018

www.ti.com.cn

MAX UNIT

6.6 Switching Characteristics (Dual Supplies: ±15 V)

at T_A= 25°C, V_DD= 15 V, and V_SS= -15 V (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

V_S= ±10 V, R_L= 300 Ω , C_L= 35 pF

120

130

V_S= ±10 V, R_L= 300 Ω , C_L= 35 pF, T_A= –40°C to

+85°C

t_ON

Enable turn-on time

V_S= ±10 V, R_L= 300 Ω , C_L= 35 pF, T_A= –40°C to

+125°C

140

V_S= ±10 V, R_L= 300 Ω , C_L= 35 pF

V_S= ±10 V, R_L= 300 Ω , C_L= 35 pF, T_A= –40°C to

+85°C

t_OFF

Enable turn-off time

V_S= ±10 V, R_L= 300 Ω , C_L= 35 pF, T_A= –40°C to

+125°C

125

135

V_S= 10 V, R_L= 300 Ω , C_L= 35 pF

V_S= 10 V, R_L= 300 Ω , C_L= 35 pF, T_A= –40°C to

+85°C

t_TRAN

Transition time

V_S= 10 V, R_L= 300 Ω , C_L= 35 pF, T_A= –40°C to

+125°C

145

V_S= 10 V, R_L= 300 Ω , C_L= 35 pF, T_A= –40°C to

+125°C

t_BBM

Break-before-make time delay

V_S= 0 V, R_S= 0 Ω , C_L= 1 nF

–0.35

–0.41

–86

Q_J

Charge injection

Off-isolation

V_S= –15 V to 15 V, R_S= 0 Ω , C_L= 1 nF

R_L= 50 Ω , C_L= 5 pF, f = 1 MHz

O_ISO

R_L= 50 Ω , C_L= 5 pF, f = 1 MHz, non-adjacent

channels

–105

X_TALK

I_L

Channel-to-channel crosstalk

Insertion loss

R_L= 50 Ω , C_L= 5 pF, f = 1 MHz, adjacent channels

R_L= 50 Ω , C_L= 5 pF, f = 1 MHz

–87

–7

R_L= 10 kΩ , C_L= 5 pF, V_PP= 0.62 V on V_DD, f= 1

MHz

–52

AC Power Supply Rejection

Ratio

ACPSRR

R_L= 10 kΩ , C_L= 5 pF, V_PP= 0.62 V on V_SS, f= 1

MHz

–49

500

MHz

-3dB Bandwidth

R_L= 50 Ω , C_L= 5 pF

Total harmonic distortion +

noise

THD + N

R_L= 10k Ω , C_L= 5 pF, f= 20Hz to 20kHz

0.08

C_IN

Digital input capacitance

Source off-capacitance

Drain off-capacitance

V_IN= 0 V or V_DD

1.2

1.6

3.8

C_S(OFF)

C_D(OFF)

V_S= 0 V, f = 1 MHz

2.3

4.2

C_S(ON),

C_D(ON)

Source and drain on-

capacitance

V_S= 0 V, f = 1 MHz

5.0

6.5

6.7 Electrical Characteristics (Single Supply: 12 V)

at T_A= 25°C, V_DD= 12 V, and V_SS= 0 V (unless otherwise noted)

PARAMETER

ANALOG SWITCH

TEST CONDITIONS

MIN

TYP

235

2.4

MAX UNIT

V_A

Analog signal range

T_A= –40°C to +125°C

V_S= 10 V, I_S= 1 mA

T_A= –40°C to +125°C

V_SS

V_DD

345

400

440

R_ON

On-resistance

T_A= –40°C to +85°C

T_A= –40°C to +125°C

On-resistance mismatch

between channels

ΔR_ON

V_S= 10 V, I_S= 1 mA

V_S= 0 V

T_A= –40°C to +85°C

T_A= –40°C to +125°C

R_{ON_DRIFT}On-resistance drift

0.47

%/°C

TMUX6104

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ZHCSHO7A –FEBRUARY 2018–REVISED SEPTEMBER 2018

Electrical Characteristics (Single Supply: 12 V) (continued)

at T_A= 25°C, V_DD= 12 V, and V_SS= 0 V (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

–0.02

–0.1

TYP

MAX UNIT

0.005

0.02

0.05

0.4

Switch state is off, V_S

10 V/ 1 V, V_D= 1 V/ 10 V

I_S(OFF)

I_D(OFF)

I_D(ON)

Source off leakage current⁽¹⁾

T_A= –40°C to +85°C

T_A= –40°C to +125°C

–0.8

–0.03

–0.1

0.01

0.03

0.08

0.4

Switch state is off, V_S

10 V/ 1 V, V_D= 1 V/ 10 V

Drain off leakage current⁽¹⁾

Drain on leakage current

T_A= –40°C to +85°C

T_A= –40°C to +125°C

–0.8

–0.05

–0.2

0.05

0.15

0.8

Switch state is on, V_S

floating, V_D= 1 V/ 10 V

T_A= –40°C to +85°C

T_A= –40°C to +125°C

–1.6

DIGITAL INPUT (EN, Ax pins)

V_IH

Logic voltage high

T_A= –40°C to +125°C

V_IL

Logic voltage low

0.8

R_PD(EN)

Pull-down resistance on EN pin

MΩ

POWER SUPPLY

µA

V_A= 0 V or 3.3 V, V_S= 0

V , V_EN= 3.3 V

I_DD

V_DDsupply current

T_A= –40°C to +85°C

T_A= –40°C to +125°C

(1) When V_Sis positive, V_Dis negative, and vice versa.

6.8 Switching Characteristics (Single Supply: 12 V)

at T_A= 25°C, V_DD= 12 V, and V_SS= 0 V (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX UNIT

V_S= 8 V, R_L= 300 Ω , C_L= 35 pF

125

V_S= 8 V, R_L= 300 Ω , C_L= 35 pF, T_A= –40°C to

+85°C

135

t_ON

Enable turn-on time

V_S= 8 V, R_L= 300 Ω , C_L= 35 pF, T_A= –40°C to

+125°C

145

V_S= 8 V, R_L= 300 Ω , C_L= 35 pF

V_S= 8 V, R_L= 300 Ω , C_L= 35 pF, T_A= –40°C to

+85°C

t_OFF

Enable turn-off time

V_S= 8 V, R_L= 300 Ω , C_L= 35 pF, T_A= –40°C to

+125°C

127

140

V_S= 8 V, R_L= 300 Ω , C_L= 35 pF

V_S= 8 V, R_L= 300 Ω , C_L= 35 pF, T_A= –40°C to

+85°C

t_TRAN

Transition time

V_S= 8 V, R_L= 300 Ω , C_L= 35 pF, T_A= –40°C to

+125°C

150

V_S= 8 V, R_L= 300 Ω , C_L= 35 pF, T_A= –40°C to

+125°C

t_BBM

Break-before-make time delay

V_S= 6 V, R_S= 0 Ω , C_L= 1 nF

–0.2

–86

Q_J

Charge injection

Off-isolation

V_S= 0 V to 12 V, R_S= 0 Ω , C_L= 1 nF

R_L= 50 Ω , C_L= 5 pF, f = 1 MHz

O_ISO

R_L= 50 Ω , C_L= 5 pF, f = 1 MHz, non-adjacent

channels

–107

X_TALK

Channel-to-channel crosstalk

Insertion loss

R_L= 50 Ω , C_L= 5 pF, f = 1 MHz, adjacent channels

R_L= 50 Ω , C_L= 5 pF, f = 1 MHz

–87

–14

I_L

AC Power Supply Rejection

Ratio

ACPSRR

R_L= 10 kΩ , C_L= 5 pF, V_PP= 0.62 V, f= 1 MHz

R_L= 50 Ω , C_L= 5 pF

–51

400

-3dB Bandwidth

MHz

TMUX6104

ZHCSHO7A –FEBRUARY 2018–REVISED SEPTEMBER 2018

www.ti.com.cn

Switching Characteristics (Single Supply: 12 V) (continued)

at T_A= 25°C, V_DD= 12 V, and V_SS= 0 V (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

1.2

1.9

4.6

MAX UNIT

C_IN

Digital input capacitance

Source off-capacitance

Drain off-capacitance

V_IN= 0 V or V_DD

C_S(OFF)

C_D(OFF)

C_S(ON)

C_D(ON)

V_S= 6 V, f = 1 MHz

2.3

5.3

Source and drain on-

capacitance

V_S= 6 V, f = 1 MHz

6.3

7.5

TMUX6104

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ZHCSHO7A –FEBRUARY 2018–REVISED SEPTEMBER 2018

6.9 Typical Characteristics

at T_A= 25°C, V_DD= 15 V, and V_SS= –15 V (unless otherwise noted)

250

200

150

100

700

600

500

400

300

200

100

V_DD= 5V

V_SS= -5V

V_DD= 12V

V_SS= -12V

V_DD= 13.5V

V_SS= -13.5V

V_DD= 6V

V_SS= -6V

V_DD= 15V

V_SS= -15V

V_DD= 16.5V

V_SS= -16.5V

V_DD= 7V

V_SS= -7V

-20

-15

-10

-5

-8

-6

-4

-2

Source or Drain Voltage (V)

D001

D002

T_A= 25°C

图 1. On-Resistance vs Source or Drain Voltage

图 2. On-Resistance vs Source or Drain Voltage

700

600

500

400

300

200

100

250

200

150

100

T_A= 125èC

T_A= 85èC

V_DD= 10V

V_SS= 0V

V_DD= 12V

V_SS= 0V

T_A= 25èC

V_DD= 14V

V_SS= 0V

T_A= -40èC

-15 -10

-20

-5

Source or Drain Voltage (V)

D003

D004

T_A= 25°C

V_DD= 15 V, V_SS= –15 V

图 3. On-Resistance vs Source or Drain Voltage

图 4. On-Resistance vs Source or Drain Voltage

700

600

500

400

300

200

100

800

T_A= 125èC

600

400

200

I_D(OFF)+

I_D(ON)+

I_S(OFF)+

T_A= 85èC

-200

-400

-600

-800

I_S(OFF)-

I_D(OFF)-

T_A= -40èC

T_A= 25èC

I_D(ON)-

-50

-25

100

125

150

Source or Drain Voltage (V)

Ambient Temperature (èC)

D005

D006

V_DD= 12 V, V_SS= 0 V

V_DD= 15 V, V_SS= –15 V

图 6. Leakage Current vs Temperature

图 5. On-Resistance vs Source or Drain Voltage

TMUX6104

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Typical Characteristics (接下页)

600

I_{D(OFF)_10V}

400

V_DD= 12V

V_SS= 0V

V_DD= 10V

V_SS= -10V

I_{S(OFF)_10V}

200

I_{D(ON)_10V}

I_{S(OFF)_1V}

I_{D(OFF)_1V}

I_{D(ON)_1V}

-200

-400

-600

-1

V_DD= 15V

V_SS= -15V

-2

-50

-25

100

125

150

-15

-10

-5

Ambient Temperature (èC)

Source Voltage (V)

D007

D008

V_DD= 12 V, V_SS= 0 V

Source-to-drain, T_A= 25°C

图 7. Leakage Current vs Temperature

图 8. Charge Injection vs Source Voltage

150

120

t_ON(V_DD= 12V, V_SS= 0V)

t_ON(V_DD= 15V, V_SS= -15V)

V_DD= 10V

V_SS= -10V

CS (5 V/div)

-3

-6

-9

V_DD= 12V

V_SS= 0V

V_OUT(5 V/div)

V_DD= 15V

V_SS= -15V

t_OFF(V_DD= 12V, V_SS= 0V)

t_OFF(V_DD= 15V, V_SS= -15V)

-15

-10

-5

-50

-25

100

125

150

Drain Voltage (V)

Ambient Temperature (èC)

D009

D010

Drain-to-source, T_A= 25°C

图 9. Charge Injection vs Drain Voltage

图 10. Turn-On and Turn-Off Times vs Temperature

-20

-40

Adjacent Channel to D

Adjacent Channels

-60

-80

-100

-120

-140

-100

-120

-140

Non-Adjacent Channels

Non-Adjacent Channel to D

1E+5

1E+6

1E+7

1E+8

5E+8

1E+5

1E+6

1E+7

1E+8

5E+8

Frequency (Hz)

D011

D012

V_DD= 15 V, V_SS= –15 V, T_A= 25°C

图 11. Off Isolation vs Frequency

图 12. Crosstalk vs Frequency

TMUX6104

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Typical Characteristics (接下页)

-5

-10

-15

-20

-25

-30

100

V_DD= 15V

V_SS= -15V

V_DD= 5V

V_SS= -5V

0.1

0.01

1E+1

1E+2

1E+3

1E+4

1E+5

1E+6

1E+7

1E+8

1E+9

Frequency (Hz)

Frequency(Hz)

D013

D014

T_A= 25°C

V_DD= 15 V, V_SS= –15 V, T_A= 25°C

图 13. THD+N vs Frequency

图 14. On Response vs. Frequency

C_D(ON), C_S(ON)

C_S(ON), C_D(ON)

C_D(OFF)

C_S(OFF)

-15 -12

-9

-6

-3

Source Voltage (V)

D015

D016

V_DD= 15 V, V_SS= –15 V, T_A= 25°C

图 15. Capacitance vs Source Voltage

V_DD= 12 V, V_SS= 0 V, T_A= 25°C

图 16. Capacitance vs Source Voltage

7 Parameter Measurement Information

7.1 Truth Table

表 1. TMUX6104 Truth Table

X⁽¹⁾

STATE

All channels are off

Channel 1

Channel 2

Channel 3

Channel 4

(1) X denotes don't care..

TMUX6104

ZHCSHO7A –FEBRUARY 2018–REVISED SEPTEMBER 2018

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8 Detailed Description

8.1 Overview

8.1.1 On-Resistance

The on-resistance of the TMUX6104 is the ohmic resistance across the source (Sx) and drain (D) pins of the

device. The on-resistance varies with input voltage and supply voltage. The symbol R_ONis used to denote on-

resistance. The measurement setup used to measure R_ONis shown in 图 17. Voltage (V) and current (I_CH) are

measured using this setup, and R_ONis computed as shown in 公式 1:

I_CH

V_S

图 17. On-Resistance Measurement Setup

R_ON= V / I_CH

(1)

8.1.2 Off-Leakage Current

There are two types of leakage currents associated with a switch during the off state:

1. Source off-leakage current

2. Drain off-leakage current

Source leakage current is defined as the leakage current flowing into or out of the source pin when the switch is

off. This current is denoted by the symbol I_S(OFF)

Drain leakage current is defined as the leakage current flowing into or out of the drain pin when the switch is off.

This current is denoted by the symbol I_D(OFF)

The setup used to measure both off-leakage currents is shown in 图 18

I_{s (OFF)}

I_{D (OFF)}

V_S

V_D

图 18. Off-Leakage Measurement Setup

TMUX6104

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Overview (接下页)

8.1.3 On-Leakage Current

On-leakage current is defined as the leakage current that flows into or out of the drain pin when the switch is in

the on state. The source pin is left floating during the measurement. 图 19 shows the circuit used for measuring

the on-leakage current, denoted by I_D(ON)

I_{D (ON)}

NC = No Connection

V_D

图 19. On-Leakage Measurement Setup

8.1.4 Transition Time

Transition time is defined as the time taken by the output of the TMUX6104 to rise (to 90% of the transition) or

fall (to 10% of the transition) after the digital address signal has fallen or risen to 50% of the transition. 图 20

shows the setup used to measure transition time, denoted by the symbol t_TRAN

V_DD

V_SS

V_DD

V_SS

V_S1

3 V

Output

t_r< 20 ns

t_f< 20 ns

50%

V_IN

0 V

V_S

300 Ω

35 pF

V_S4

0.9 V_S

t_TRAN

Output

0.1 V_S

2.0V

V_IN

t_TRAN= max ( t_TRAN1, t_TRAN2)

GND

图 20. Transition-Time Measurement Setup

TMUX6104

ZHCSHO7A –FEBRUARY 2018–REVISED SEPTEMBER 2018

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Overview (接下页)

8.1.5 Break-Before-Make Delay

Break-before-make delay is a safety feature that prevents two inputs from connecting when the TMUX6104 is

switching. The TMUX6104 output first breaks from the on-state switch before making the connection with the

next on-state switch. The time delay between the break and the make is known as break-before-make delay. 图

21 shows the setup used to measure break-before-make delay, denoted by the symbol t_BBM

V_DD

V_SS

V_DD

V_SS

V_S

3 V

Output

V_IN

0 V

V_S

300 Ω

35 pF

0.8 V_S

Output

0 V

t_BBM

t_BBM2

2.0V

V_IN

GND

t_BBM= min ( t_BBM1, t_BBM2)

图 21. Break-Before-Make Delay Measurement Setup

8.1.6 Turn-On and Turn-Off Time

Turn-on time is defined as the time taken by the output of the TMUX6104 to rise to a 90% final value after the

enable signal has risen to a 50% final value. 图 22 shows the setup used to measure turn-on time. Turn-on time

is denoted by the symbol t_{ON (EN)}

Turn off time is defined as the time taken by the output of the TMUX6104 to fall to a 10% initial value after the

enable signal has fallen to a 50% initial value. 图 22 shows the setup used to measure turn-off time. Turn-off time

is denoted by the symbol t_{OFF (EN)}

V_DD

V_SS

V_DD

V_SS

V_S

3 V

Output

50%

V_IN

0 V

300 Ω

35 pF

V_S

0.9 V_S

t_OFF(EN)

0.1 V_S

t_ON(EN)

Output

V_IN

GND

图 22. Turn-On and Turn-Off Time Measurement Setup

TMUX6104

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Overview (接下页)

8.1.7 Charge Injection

The TMUX6104 have a simple transmission-gate topology. Any mismatch in capacitance between the NMOS

and PMOS transistors results in a charge injected into the drain or source during the falling or rising edge of the

gate signal. The amount of charge injected into the source or drain of the device is known as charge injection,

and is denoted by the symbol Q_INJ. 图 23 shows the setup used to measure charge injection from source (Sx) to

drain (D).

V_DD

V_SS

3 V

0 V

V_DD

V_SS

V_IN

V_S

Output

V_S

V_OUT

Q_INJ= C_L×

V_OUT

1 nF

2.0V

V_IN

GND

图 23. Charge-Injection Measurement Setup

8.1.8 Off Isolation

Off isolation is defined as the voltage at the drain pin (D) of the TMUX6104 when a 1-V_RMSsignal is applied to

the source pin (Sx) of an off-channel. 图 24 shows the setup used to measure off isolation. Use 公式 2 to

compute off isolation.

V_DD

V_SS

Network Analyzer

V_DD

V_SS

50 Ω

V_S

V_OUT

50 Ω

V_IN

2.0V

GND

图 24. Off Isolation Measurement Setup

≈

∆

’

◊

V_OUT

V_S

Off Isolation = 20 ∂ Log

(2)

TMUX6104

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www.ti.com.cn

Overview (接下页)

8.1.9 Channel-to-Channel Crosstalk

Channel-to-channel crosstalk is defined as the voltage at the source pin (Sx) of an off-channel, when a 1-V_RMS

signal is applied at the source pin (Sx) of an on-channel. 图 25 shows the setup used to measure, and 公式 3 is

the equation used to compute, channel-to-channel crosstalk.

V_DD

V_SS

Network Analyzer

V_DD

V_SS

V_OUT

V_S

50 Ω

V_IN

2.0V

GND

图 25. Channel-to-Channel Crosstalk Measurement Setup

≈

∆

’

◊

V_OUT

V_S

Channel-to-Channel Crosstalk = 20 ∂ Log

(3)

8.1.10 Bandwidth

Bandwidth is defined as the range of frequencies that are attenuated by < 3 dB when the input is applied to the

source pin (Sx) of an on-channel, and the output is measured at the drain pin (D) of the TMUX6104. 图 26 shows

the setup used to measure bandwidth of the mux. Use 公式 4 to compute the attenuation.

V_DD

V_SS

Network Analyzer

V_DD

V_SS

V_S

V_OUT

50 Ω

V_IN

2.0V

GND

图 26. Bandwidth Measurement Setup

#PPAJQ=PEKJ = 20 × .KC (⁸

)

176

(4)

TMUX6104

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ZHCSHO7A –FEBRUARY 2018–REVISED SEPTEMBER 2018

Overview (接下页)

8.1.11 THD + Noise

The total harmonic distortion (THD) of a signal is a measurement of the harmonic distortion, and is defined as the

ratio of the sum of the powers of all harmonic components to the power of the fundamental frequency at the mux

output. The on-resistance of the TMUX6104 varies with the amplitude of the input signal and results in distortion

when the drain pin is connected to a low-impedance load. Total harmonic distortion plus noise is denoted as

THD+N.

V_DD

V_SS

V_DD

V_SS

Audio Precision

R_S

V_S

V_OUT

10k Ω

V_IN

2.0V

GND

图 27. THD+N Measurement Setup

8.1.12 AC Power Supply Rejection Ratio (AC PSRR)

AC PSRR measures the ability of a device to prevent noise and spurious signals that appear on the supply

voltage pin from coupling to the output of the switch. The DC voltage on the device supply is modulated by a sine

wave of 620 mV_PP. The ratio of the amplitude of signal on the output to the amplitude of the modulated signal is

the AC PSRR.

V_DD

Network Analyzer

DC Bias

Injector

V_SS

V_DD

V_SS

V_BIAS

620 mV_PP

V_IN

V_OUT

10k Ω

5 pF

50 Ω

V_IN

2.0V

GND

V_BIAS= 0 V

PSRR= 20 × Log (V_OUT/ V_IN

)

图 28. AC PSRR Measurement Setup

TMUX6104

ZHCSHO7A –FEBRUARY 2018–REVISED SEPTEMBER 2018

www.ti.com.cn

Overview (接下页)

The Functional Block Diagram section provides a top-level block diagram of the TMUX6104. The TMUX6104 is a

4-channel, single-ended, analog multiplexer. Each channel is turned on or turned off based on the state of the

address lines and enable pin.

8.2 Functional Block Diagram

TMUX6104

1-of-4

Decoder

8.3 Feature Description

8.3.1 Ultralow Leakage Current

The TMUX6104 provide extremely low on- and off-leakage currents. The TMUX6104 is capable of switching

signals from high source-impedance inputs into a high input-impedance op amp with minimal offset error

because of the ultralow leakage currents. 图 29 shows typical leakage currents of the TMUX6104 versus

temperature.

800

600

I_D(OFF)+

I_D(ON)+

I_S(OFF)+

400

200

-200

-400

-600

-800

I_S(OFF)-

I_D(OFF)-

I_D(ON)-

-50

-25

100

125

150

Ambient Temperature (èC)

D006

图 29. Leakage Current vs Temperature

8.3.2 Ultralow Charge Injection

The TMUX6104 is implemented with simple transmission gate topology, as shown in 图 30. Any mismatch in the

stray capacitance associated with the NMOS and PMOS causes an output level change whenever the switch is

opened or closed.

TMUX6104

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Feature Description (接下页)

OFF ON

C_GDN

C_GSN

C_GSP

C_GDP

OFF ON

图 30. Transmission Gate Topology

The TMUX6119 utilizes special charge-injection cancellation circuitry that reduces the source (Sx) to drain (D)

charge injection to as low as –0.35 pC at V_S= 0 V, and –0.41 pC in the full signal range, as shown in 图 31.

V_DD= 12V

V_SS= 0V

V_DD= 10V

V_SS= -10V

-1

V_DD= 15V

V_SS= -15V

-2

-15

-10

-5

Source Voltage (V)

D008

图 31. Source-to-Drain Charge Injection vs Source Voltage

The drain (D)-to-source (Sx) charge injection becomes important when the device is used as a demultiplexer

(demux), where the drain (D) becomes the input and the source (Sx) becomes the output. 图 32 shows the drain-

to-source charge injection across the full signal range.

TMUX6104

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www.ti.com.cn

Feature Description (接下页)

V_DD= 10V

V_SS= -10V

CS (5 V/div)

-3

V_DD= 12V

V_SS= 0V

V_OUT(5 V/div)

V_DD= 15V

V_SS= -15V

-6

-9

-15

-10

-5

Drain Voltage (V)

D009

图 32. Drain-to-Source Charge Injection vs Drain Voltage

8.3.3 Bidirectional and Rail-to-Rail Operation

The TMUX6104 conducts equally well from source (Sx) to drain (D) or from drain (D) to source (Sx). Each

TMUX6104 channel has very similar characteristics in both directions. The valid analog signal for TMUX6104

ranges from V_SSto V_DD. The input signal to the TMUX6104 swings from V_SSto V_DDwithout any significant

degradation in performance.

8.4 Device Functional Modes

When the EN pin of the TMUX6104 is pulled high, one of the four switches is closed based on the state of the

address pins (A0 and A1). When the EN pin is pulled low, all four switches remain open irrespective of the state

of the address pins. The EN pin is weakly pull-down internally through a 6 MΩ resistor; thereby, setting each

channel to the open state if the EN pin is not actively driven. The address pins are also weakly pulled-down

through an internal 6 MΩ resistor, allowing channel 1 (S1 to D) to be selected by default when EN pin is driven

high. Both the EN pin and the address pins can be connected to V_DD(as high as 16.5 V).

TMUX6104

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9 Application and Implementation

注

Information in the following applications sections is not part of the TI component

specification, and TI does not warrant its accuracy or completeness. TI’s customers are

responsible for determining suitability of components for their purposes. Customers should

validate and test their design implementation to confirm system functionality.

9.1 Application Information

The TMUX6104 offers outstanding input/output leakage currents and ultralow charge injection. These devices

operate up to 33 V, and offer true rail-to-rail input and output. The on-capacitance of the TMUX6104 is very low.

These features makes the TMUX6104 a precision, robust, high-performance analog multiplexer for high-voltage,

industrial applications.

9.2 Typical Application

图 33 shows a 16-bit, differential, 4-channel, multiplexed, data-acquisition system. This example is typical in

industrial applications that require low distortion and a high-voltage input. The circuit uses the ADS8864, a 16-bit,

400-kSPS successive-approximation-resistor (SAR) analog-to-digital converter (ADC), along with a precision,

high-voltage, signal-conditioning front end, and a 4-channel single-ended mux. This TI Precision Design details

the process for optimizing the precision, high-voltage, front-end drive circuit using the TMUX6104 and OPA192 to

achieve excellent dynamic performance and linearity with the ADS8864.

Bridge Sensor

Thermocouple

GND

Gain / Filter

Network

OPA192

ADS8864

Multiplexer

Current

Sensing

TMUX6104

Photo

Detector

LED

Optical Sensor

Analog Inputs

图 33. 16-Bit Precision Multiplexed Data-Acquisition System for High-Voltage Inputs With Lowest

Distortion

TMUX6104

ZHCSHO7A –FEBRUARY 2018–REVISED SEPTEMBER 2018

www.ti.com.cn

Typical Application (接下页)

9.2.1 Design Requirements

The primary objective is to design a ±15 V, single-ended, 4-channel, multiplexed, data-acquisition system with

lowest distortion using the 16-bit ADS8864 at a throughput of 400 kSPS for a 10-kHz, full-scale, pure, sine-wave

input. The design requirements for this block design are:

•

System supply voltage: ±15 V

ADC supply voltage: 3.3 V

ADC sampling rate: 400 kSPS

ADC reference voltage (REFP): 4.096 V

System input signal: A high-voltage differential input signal with a peak amplitude of 15 V and frequency

(f_IN) of 10 kHz are applied to each differential input of the mux.

9.2.2 Detailed Design Procedure

The purpose of this precision design is to design an optimal, high-voltage, multiplexed, data-acquisition system

for highest system linearity and fast settling. The overall system block diagram is illustrated in 图 33. The circuit

is a multichannel, data-acquisition signal chain consisting of an input low-pass filter, mux, mux output buffer, and

attenuating SAR ADC driver. The architecture allows fast sampling of multiple channels using a single ADC,

providing a low-cost solution. This design systematically approaches each analog circuit block to achieve a 16-bit

settling for a full-scale input stage voltage and linearity for a 10-kHz sinusoidal input signal at each input channel.

9.2.3 Application Curve

1.0

0.8

0.6

0.4

0.2

0.0

œ0.2

œ0.4

œ0.6

œ0.8

œ1.0

œ20

œ15

œ10

œ5

C030

ADC Differential Peak-to-Peak Input (V)

图 34. ADC 16-Bit Linearity Error for the Multiplexed Data-Acquisition Block

TMUX6104

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ZHCSHO7A –FEBRUARY 2018–REVISED SEPTEMBER 2018

10 Power Supply Recommendations

The TMUX6104 operates across a wide supply range of ±5 V to ±16.5 V (10 V to 16.5 V in single-supply mode).

The device also perform well with unsymmetric supplies such as V_DD= 12 V and V_SS= –5 V. For reliable

operation, use a supply decoupling capacitor ranging between 0.1 µF to 10 µF at both the V_DDand V_SSpins to

ground.

The on-resistance of the TMUX6104 varies with supply voltage, as illustrated in 图 35

250

200

150

100

V_DD= 12V

V_SS= -12V

V_DD= 13.5V

V_SS= -13.5V

V_DD= 15V

V_SS= -15V

V_DD= 16.5V

V_SS= -16.5V

-20

-15

-10

-5

Source or Drain Voltage (V)

D001

图 35. On-Resistance Variation With Supply and Input Voltage

TMUX6104

ZHCSHO7A –FEBRUARY 2018–REVISED SEPTEMBER 2018

www.ti.com.cn

11 Layout

11.1 Layout Guidelines

图 36 illustrates an example of a PCB layout with the TMUX6104.

Some key considerations are:

1. Decouple the V_DDand V_SSpins with a 0.1-µF capacitor, placed as close to the pin as possible. Make sure

that the capacitor voltage rating is sufficient for the V_DDand V_SSsupplies.

2. Keep the input lines as short as possible.

3. Use a solid ground plane to help distribute heat and reduce electromagnetic interference (EMI) noise pickup.

4. Do not run sensitive analog traces in parallel with digital traces. Avoid crossing digital and analog traces if

possible, and only make perpendicular crossings when necessary.

11.2 Layout Example

Via to

ground plane

GND

V_DD

Via to

ground plane

V_SS

TMUX6104

图 36. TMUX6104 Layout Example

TMUX6104

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ZHCSHO7A –FEBRUARY 2018–REVISED SEPTEMBER 2018

12 器件和文档支持

12.1 文档支持

12.1.1 相关文档

•

《支持双极输入范围的 ADS8664 12 位、500kSPS、4 通道和 8 通道单电源 SAR ADC》(SBAS492)

《采用 e-Trim™ 技术的 OPA192 36V、轨至轨输入/输出、低失调电压、低输入偏置电流运算放大器》

(SBOS620)

12.2 接收文档更新通知

要接收文档更新通知，请导航至 TI.com.cn 上的器件产品文件夹。单击右上角的通知我进行注册，即可每周接收产

品信息更改摘要。有关更改的详细信息，请查看任何已修订文档中包含的修订历史记录。

12.3 社区资源

下列链接提供到 TI 社区资源的连接。链接的内容由各个分销商“按照原样”提供。这些内容并不构成 TI 技术规范，

并且不一定反映 TI 的观点；请参阅 TI 的《使用条款》。

TI E2E™ 在线社区 TI 的工程师对工程师 (E2E) 社区。此社区的创建目的在于促进工程师之间的协作。在

e2e.ti.com 中，您可以咨询问题、分享知识、拓展思路并与同行工程师一道帮助解决问题。

设计支持

TI 参考设计支持可帮助您快速查找有帮助的 E2E 论坛、设计支持工具以及技术支持的联系信息。

12.4 商标

E2E is a trademark of Texas Instruments.

All other trademarks are the property of their respective owners.

12.5 静电放电警告

ESD 可能会损坏该集成电路。德州仪器 (TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理措施和安装程序 , 可

能会损坏集成电路。

ESD 的损坏小至导致微小的性能降级 , 大至整个器件故障。精密的集成电路可能更容易受到损坏 , 这是因为非常细微的参数更改都可

能会导致器件与其发布的规格不相符。

12.6 术语表

SLYZ022 — TI 术语表。

这份术语表列出并解释术语、缩写和定义。

13 机械、封装和可订购信息

以下页面包含机械、封装和可订购信息。这些信息是指定器件的最新可用数据。数据如有变更，恕不另行通知，且

不会对此文档进行修订。如需获取此数据表的浏览器版本，请查阅左侧的导航栏。

PACKAGE OPTION ADDENDUM

www.ti.com

10-Dec-2020

PACKAGING INFORMATION

Orderable Device

Status Package Type Package Pins Package

Eco Plan

Lead finish/

Ball material

MSL Peak Temp

Op Temp (°C)

Device Marking

Samples

Drawing

Qty

(1)

(2)

(3)

(4/5)

(6)

TMUX6104PWR

ACTIVE

TSSOP

2000 RoHS & Green

NIPDAU

Level-1-260C-UNLIM

-40 to 125

MUX6104

⁽¹⁾The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

⁽²⁾RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance

do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may

reference these types of products as "Pb-Free".

RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.

Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based

flame retardants must also meet the <=1000ppm threshold requirement.

⁽³⁾MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

⁽⁴⁾There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

⁽⁵⁾Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation

of the previous line and the two combined represent the entire Device Marking for that device.

(6)

Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two

lines if the finish value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information

provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.

TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com

3-Jun-2022

TAPE AND REEL INFORMATION

REEL DIMENSIONS

TAPE DIMENSIONS

Reel

Diameter

Cavity

A0 Dimension designed to accommodate the component width

B0 Dimension designed to accommodate the component length

K0 Dimension designed to accommodate the component thickness

Overall width of the carrier tape

P1 Pitch between successive cavity centers

Reel Width (W1)

QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE

Sprocket Holes

Q1 Q2

Q3 Q4

Q1 Q2

Q3 Q4

User Direction of Feed

Pocket Quadrants

*All dimensions are nominal

Device

Package Package Pins

Type Drawing

SPQ

Reel

Pin1

Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant

(mm) W1 (mm)

TMUX6104PWR

TSSOP

2000

330.0

12.4

6.9

5.6

1.6

8.0

12.0

Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com

3-Jun-2022

TAPE AND REEL BOX DIMENSIONS

Width (mm)

*All dimensions are nominal

Device

Package Type Package Drawing Pins

TSSOP PW 14

SPQ

Length (mm) Width (mm) Height (mm)

356.0 356.0 35.0

TMUX6104PWR

2000

Pack Materials-Page 2

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证并测试您的应用，(3) 确保您的应用满足相应标准以及任何其他功能安全、信息安全、监管或其他要求。

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TI 反对并拒绝您可能提出的任何其他或不同的条款。IMPORTANT NOTICE

邮寄地址：Texas Instruments, Post Office Box 655303, Dallas, Texas 75265

TMUX6104 [TI]

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