TMUXHS221 [TI]
USB 2.0 480Mbps 2:1 多路复用器和 1:2 多路信号分离器;
| 型号： | TMUXHS221 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | USB 2.0 480Mbps 2:1 多路复用器和 1:2 多路信号分离器 复用器 |
| 文件： | 总23页 (文件大小：1392K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TMUXHS221
ZHCSQZ0A –AUGUST 2022 –REVISED NOVEMBER 2022
TMUXHS221 USB 2.0 480Mbps 2:1/1:2 多路复用器/多路信号分离器开关
1 特性
3 说明
• 与USB 2.0 以及eUSB2 LS、FS 和HS 物理层兼
容
• 模拟开关可支持大多数高达3.3V 和3Gbps 的
CMOS 或差分信号
• 数据引脚可承受5V 电压
• VI/O = 0.2V 时，RON 低至3Ω
• 高-3dB 带宽为3.3GHz
TMUXHS221 是一款针对 USB 2.0 以及 eUSB2 LS、
FS 和 HS 信号传输进行优化的高速双向 2:1/1:2 多路
复用器/多路信号分离器。TMUXHS221 是一款适用于
诸多数据速率高达 3Gbps 的高速接口的模拟无源开
关。TMUXHS221 支持电压范围为−0.3V 至3.6V 的差
分或单端CMOS 信号传输。
TMUXHS221 的出色高速性能可将USB 2.0 或eUSB2
HS 信号眼图的衰减降至超低水平，具有非常低的通道
导通电阻、高带宽、低反射和低附加抖动。该器件经过
优化，可实现出色的高频响应，从而更容易通过 USB
2.0 HS 电气合规性测试。该器件的数据路径也经过匹
配，可实现出色的差分对内延迟性能。
• 非常适合240MHz 下的
USB 2.0 或eUSB2 HS 信号：
– 插入损耗= -0.4dB
– 回损= -22dB
– 关断隔离/串扰= –32dB
• 超低的垂直和水平USB 2.0
HS 眼图衰减
TMUXHS221 的工作温度范围适用于多种严苛应用，
包括工业和高可靠性用例。
• 3.3V 电源电压
封装信息(1)
• 1.8V 或3.3V 控制逻辑输入
• 工业级工作温度范围：
-40°C 至125°C
• 小型10 引脚1.4mm × 1.8mm UQFN 封装
• 具有多个源的引脚对引脚和BOM 对BOM
封装尺寸（标称值）
器件型号
封装
NKG（UQFN，
10）
TMUXHS221
1.40mm × 1.80mm
(1) 如需了解所有可用封装，请参阅数据表末尾的可订购产品附
录。
2 应用
.
• PC 和笔记本电脑
• 游戏、电视、家庭影院和娱乐系统
• 数据中心和企业级计算
• 医疗应用
• 测试和测量
• 工厂自动化和控制
• 手机和平板电脑
TMUXHS221
DB+
DB-
Debug
Interface
D+
USB
Connector
D-
DA+
DA-
USB Host
OEn
SEL
应用用例
本文档旨在为方便起见，提供有关TI 产品中文版本的信息，以确认产品的概要。有关适用的官方英文版本的最新信息，请访问
www.ti.com，其内容始终优先。TI 不保证翻译的准确性和有效性。在实际设计之前，请务必参考最新版本的英文版本。
English Data Sheet: SLASF52
TMUXHS221
ZHCSQZ0A –AUGUST 2022 –REVISED NOVEMBER 2022
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Table of Contents
7.3 Feature Description.....................................................9
7.4 Device Functional Modes............................................9
8 Application and Implementation..................................10
8.1 Application Information............................................. 10
8.2 Typical Applications.................................................. 10
8.3 Systems Examples................................................... 12
9 Power Supply Recommendations................................14
10 Layout...........................................................................14
10.1 Layout Guidelines................................................... 14
10.2 Layout Example...................................................... 14
11 Device and Documentation Support..........................15
11.1 Related Documentation...........................................15
11.2 接收文档更新通知................................................... 15
11.3 支持资源..................................................................15
11.4 Trademarks............................................................. 15
11.5 Electrostatic Discharge Caution..............................15
11.6 术语表..................................................................... 15
12 Mechanical, Packaging, and Orderable
1 特性................................................................................... 1
2 应用................................................................................... 1
3 说明................................................................................... 1
4 Revision History.............................................................. 2
5 Pin Configuration and Functions...................................3
6 Specifications.................................................................. 4
6.1 Absolute Maximum Ratings........................................ 4
6.2 ESD Ratings............................................................... 4
6.3 Recommended Operating Conditions.........................4
6.4 Thermal Information....................................................4
6.5 Electrical Characteristics.............................................5
6.6 High-Speed Performance Parameters........................5
6.7 Switching Characteristics............................................5
6.8 Typical Characteristics –S-Parameters.................... 6
6.9 Typical Characteristics –Eye Diagrams....................7
6.10 Typical Characteristics –RON .................................8
7 Detailed Description........................................................9
7.1 Overview.....................................................................9
7.2 Functional Block Diagram...........................................9
Information.................................................................... 15
4 Revision History
注：以前版本的页码可能与当前版本的页码不同
Changes from Revision * (August 2022) to Revision A (November 2022)
Page
• 将数据表的状态从预告信息更改为量产数据..................................................................................................... 1
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5 Pin Configuration and Functions
DB+
DB-
D+
D-
Not to scale
图5-1. TMUXHS221 NKG Package, 10-Pin UQFN (Top View)
表5-1. Pin Functions
PIN
TYPE(1)
DESCRIPTION
NAME
NO.
1
D+
D-
I/O
I/O
I/O
I/O
I/O
I/O
IN
Data signals Common Port, positive
Data signals Common Port, negative
Data signals Port A, positive
2
DA+
DA-
5
4
Data signals Port A, negative
Data signals Port B, positive
DB+
DB-
7
6
Data signals Port B, negative
SEL
OEn
VCC
GND
10
8
Switch control configuration signal as provided in 表7-1.
IN
9
P
3.3 V power supply
Ground
3
G
(1) IN = input, I/O = input or output, P = power, G = ground
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN
–0.5
–0.5
–0.5
MAX
UNIT
V
VCC-ABSMAX
VI/O-ABSMAX
VIN-ABSMAX
II/O-ABSMAX
TJ-ABSMAX
TSTG
Supply voltage
Voltage
4.0
5.5
Data pins
Control pins
Data pins
V
Voltage
4.0
V
ON-state switch current
Junction temperature
Storage temperature
100
125
150
mA
°C
°C
–40
–65
(1) Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply
functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If
used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully
functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime.
6.2 ESD Ratings
VALUE
±5000
±1000
UNIT
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
Charged device model (CDM), per ANSI/ESDA/JEDEC JS-002(2)
VESD
Electrostatic discharge
V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
TYP
MAX
UNIT
DC plus AC power should not
exceed these limits
VCC
Supply voltage
3.0
3.3
3.6
V
VCCRAMP
Supply voltage ramp time
0.1
-0.3
-40
-40
100
3.6
ms
V
VI/O
TA
Voltage range for data signals (VI/O
)
D, DA, DB
Operating free-air/ambient temperature
Device junction temperature
125
125
°C
°C
TJ
6.4 Thermal Information
TMUXHS221
NKG (UQFN)
10 PINS
225.9
THERMAL METRIC(1)
UNIT
RθJA
RθJC(top)
RθJB
ψJT
Junction-to-ambient thermal resistance - High K
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
93.5
147.5
Junction-to-top characterization parameter
Junction-to-board characterization parameter
3.4
147.1
ψJB
(1) For more information about traditional and new thermalmetrics, see the Semiconductor and IC Package ThermalMetrics application
report.
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6.5 Electrical Characteristics
over operating free-air temperature and supply voltage range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
11
MAX
30
UNIT
µA
ICC
Device active current
OEn = L
OEn = H
OEn = L
ISTDN
CON
Device shutdown current
1.3
1.7
3
4
µA
Output ON capacitance to GND
pF
5.4
8
VI/O =0 V , IO = –8 mA
VI/O = 2.4 V, IO = –8 mA
Ω
Ω
RON
Channel ON resistance
3.9
Channel ON resistance flatness defined as
difference of RON over input voltage range
RON,FLAT
1
VI/O = 0 V and VI/O = 2.4 V; IO = –8 mA
Ω
Ω
0.5
0.5
3.6
0.4
1
VI/O = 0 V; IO = –8 mA
VI/O = 2.4 V; IO = –8 mA
On-resistance match between pairs for the same
channel at same VI/O, VCC and TA,
ΔRON
Ω
VIH
Input high voltage, control pins (OEn, SEL)
Input low voltage, control pins (OEn, SEL)
Input high current, control pins (OEn, SEL)
Input low current, control pins (OEn, SEL)
Input high current, data pins (Dx, DAx, DBx)
Input low current, data pins (Dx, DAx, DBx)
Leakage current through turned off switch
Failsafe leakage current for control pins (IN)
Failsafe leakage current for data pins (I/O)
1.4
V
-0.3
VIL
IIH
VIN = 3.6 V
µA
µA
µA
µA
µA
µA
µA
IIL
VIN = 0 V
0.2
2
II/O,H
II/O,L
VI/O = 3.6 V
VI/O = 0 V
0.2
2
IHIZ,I/O
IOFF,IN
IOFF,I/O
OEn = H; VI/O = 3.6 V
VCC = 0 V, VIN = 3.6 V
VCC = 0 V, VI/O = 3.6 V
10
10
6.6 High-Speed Performance Parameters
PARAMETER
TEST CONDITION
MIN
TYP
MAX
UNIT
BW
IL
Relative to DC
ƒ= 10 MHz
ƒ= 240 MHz
ƒ= 10 MHz
ƒ= 240 MHz
ƒ= 10 MHz
ƒ= 240 MHz
ƒ= 10 MHz
ƒ= 240 MHz
3.3
-0.3
-0.4
-32
-22
-56
-32
-64
-32
GHz
–3-dB bandwidth
Differential insertion loss
dB
RL
Differential return loss
dB
dB
Differential OFF isolation (D to
DA/DB)
OIRR
XT
dB
dB
Differential cross-talk (DA to DB or
DB to DA)
6.7 Switching Characteristics
over operating free-air temperature and supply voltage range (unless otherwise noted)
PARAMETER
MIN
TYP
MAX
UNIT
tPD
Switch propagation delay
60
80
1
ps
µs
Switching time CTRL-to-Switch ON (SEL toggles in
between H, L)
tSW
RL = 50 Ω, CL = 10 pF
RL = 50 Ω, CL = 10 pF
RL = 50 Ω, CL = 10 pF
Time required for device ON-to-OFF transition (OEn =
L to H)
tOFF
tON
tSK_INTRA
tSK_INTER
0.5
16
µs
µs
Time required for device OFF-to-ON transition (OEn =
H to L)
Intra-pair output skew between positive and negative
for same differential channel
For Dx to DAx or DBx channels
For Dx to DAx or DBx channels
2
2
10
10
ps
ps
Inter-pair output skew between channels
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6.8 Typical Characteristics –S-Parameters
图6-1 and 图6-2 show differential insertion loss and return loss repectively for a typical TMUXHS221 channel. The excellent
high speed performance at 240 MHz results in minimal attenuation to the USB 2.0 or eUSB2 HS signal eye diagrams. Note:
measurements are performed in TI evaluation board with board and equipment parasitics calibrated out.
0
-1
-2
-3
-4
-5
-6
-7
-8
0
-5
-10
-15
-20
-25
-30
-35
-9
1E+7
1E+8
Frequency (Hz)
1E+9
1E+10
1E+7
1E+8
Frequency (Hz)
1E+9
1E+10
图6-2. Typical Differential Return Loss vs Frequency
图6-1. Typical Differential Insertion Loss vs Frequency
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6.9 Typical Characteristics –Eye Diagrams
图6-3 and 图6-4 show a side by side comparison of 480 Mbps USB 2.0 HS signals through calibration traces (without the
device) and a typical TMUXHS221 channel. Attenuation of the vertical and horizonal eye opening through the device is
minimal. The mux device also adds a very negligble amount of jitter to the signals.
图6-3. Through Calibration Traces at 480 Mbps
图6-4. Through a Typical TMUXHS221 Channel at 480 Mbps
图6-5 and 图6-6 show a side by side eye diagram comparison at 3 Gbps signals through calibration traces (without the
device) and a typical TMUXHS221 channel. Attenuation of the vertical and horizonal eye opening through the device is
minimal. The mux device adds only a small amount of jitter at 3 Gbps.
图6-5. Through Calibration Traces at 3 Gbps
图6-6. Through a Typical TMUXHS221 Channel at 3 Gbps
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6.10 Typical Characteristics –RON
图6-7, 图6-8, and 图6-9 show switch ON resistance RON versus common mode voltage VCM, supply voltage VCC, and
ambient temperature respectively. All curves are at nominal PVT conditions unless specified.
6.4
5.6
4.8
4
5
4.5
4
VCM = 0 V
VCM = 2.4 V
3.5
3
3.2
2.4
1.6
2.5
2
0
0.6
1.2
1.8
VCM (V)
2.4
3
3.6
3
3.1
3.2
3.3
VCC (V)
3.4
3.5
3.6
图6-7. RON vs Common Mode Voltage VCM
图6-8. RON vs Supply Voltage VCC
图6-9. RON vs Ambient Temperature
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7 Detailed Description
7.1 Overview
The TMUXHS221 is an analog passive mux with 2:1/1:2 multiplexer/demultiplexer that can work for any low-
speed, high-speed, differential or single ended signals. The signals must be within the allowable voltage range of
−0.3 to 3.6 V. The device is optimized for eUSB2 and USB 2.0 LS, FS, and HS signaling.
Excellent dynamic characteristics of the device allow high speed switching with minimal attenuation to the signal
eye diagram with very little added jitter. While the device is recommended for the interfaces up to 3 Gbps, actual
data rate where the device can be used highly depends on the electrical channels. For low loss channels where
adequate margin is maintained, the device can potentially be used for higher data rates.
7.2 Functional Block Diagram
VCC
OEn
SEL
Charge Pump
/Gate Drive
DA+
DA-
D+
D-
DB+
DB-
GND
7.3 Feature Description
7.3.1 Output Enable and Power Savings
The TMUXHS221 has two power modes: Active or Normal operating mode and Standby or Shutdown mode.
During Standby mode, the device consumes very-little current to achieve ultra low power in systems where
saving power is critical. To enter Standby mode, OEn must be pulled high.
7.3.2 Data Line Biasing
The TMUXHS221 does not contain any internal biasing. All channels of the device must be biased from either of
the two sides to avoid floating channels.
7.4 Device Functional Modes
表7-1. Mux Configuration Control Logic for TMUXHS221(1)
SEL
L
OEn
Mux Configuration
L
D to DA
H
L
D to DB
X
H
All channels are disabled and Hi-Z
(1) The TMUXHS221 can tolerate polarity inversions for differential signals. Ensure that the polarity
consistency is maintained for all differential pairs.
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8 Application and Implementation
备注
以下应用部分中的信息不属于TI 器件规格的范围，TI 不担保其准确性和完整性。TI 的客 户应负责确定
器件是否适用于其应用。客户应验证并测试其设计，以确保系统功能。
8.1 Application Information
The TMUXHS221 is an analog high-speed mux/demux that can be used for routing differential as well as single
ended CMOS signals through it. The device can be used for many high speed and low speed interfaces up to 3
Gbps including the following:
• Universal Serial Bus (USB) 2.0 HS, FS, and LS
• Embedded Universal Serial Bus (eUSB) 2.0 HS, FS, and LS
• I2C
• System Management Bus (SMBus™)
• Universal Asynchronous Receiver-Transmitter (UART™)
• Debug interface signals
• Mipi® Camera Serial Interface (CSI-2), Display Serial Interface (DSI)
• PCIe® clock
• DisplayPort™ Auxiliary and Hot Plug Detect Signals
• USB-C™ SBU signals
• Low Voltage Differential Signalling (LVDS)
An available GPIO pin of a controller or hard tie to voltage level H or L can easily control the mux or demux
selection pin (SEL) of the device as an application requires.
Many interfaces require AC coupling capacitors between the transmitter and receiver. The 0201 or 0402
capacitors are the preferred option, but other capacitors can also be used depending on interface speed and
signal integrity needs. If AC coupling capacitors are used on both sides of the TMUXHS221, then ensure the
device is biased from either side, as there is no internal biasing to the device.
8.2 Typical Applications
8.2.1 Routing Debug Signals to USB Port
Many electronic end-equipment such as PCs, media players, point of sales registers, printers, cameras,
headphones, smartphones, tablets, and so forth use USB ports (such as USB Type-A, USB Type-B, or USB
Type-C™) for in-field or factory debug interface. In such use cases debug signals are routed to USB 2.0 pins of a
USB port through a mux or demux device. TMUXHS221 is a good fit for such use cases with its flexible data
handling capability. TMUXHS221 virtually can handle any debug interface signals as long as they are limited to
−0.3 V (minimum) to 3.6 V (maximum). The device also provides very low attenuation to both USB 2.0 and
debug signals with its very low channel ON resistance, high bandwidth, and low reflection.
图 8-1 shows a system implementation where USB 2.0 signals are multiplexed with debug interface signals into
DP/DM wires of a USB port.
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SEL
OEn
USB
Port
DB+
DB-
Debug Interface
D+
D-
DP/DM
DA+
DA-
USB 2.0
VCC
GND
1
F
0.1 F
图8-1. Routing Debug Signals to USB Port
8.2.1.1 Design Requirements
表 8-1 provides various parameters and their expected values to implement the routing debug signals into the
USB port. Note that the recommendation is for illustration purpose only.
表8-1. Design Parameters
DESIGN PARAMETER
VALUE
DA+, DA-, DB+, and DB−
Direct connect to processors, −0.3 –3.6 V
SEL/OEn pin maximum voltage for low
SEL/OEn pin minimum voltage for high
Decoupling capacitor for VCC
0.4 V
1.4 V
0.1 µF and 1 µF
8.2.1.2 Detailed Design Procedure
The TMUXHS221 is a high-speed passive switch device that can behave as a mux or demux. Signal integrity is
important because as a passive switch, the device provides no signal conditioning capability. The TMUXHS221
has an excellent electrical performance with very low channel ON resistance, high bandwidth, low reflection, and
low added jitter for both debug signals and USB 2.0 signals.
• Determine the loss profile between circuits that are to be muxed or demuxed.
• Provide clean impedance and electrical length matched board traces.
• Provide a control signal for the SEL and OEn pins.
• Provide good ground connection to the board ground plane.
• See the application schematics for the recommended decouple capacitors from VCC pins to ground.
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8.2.1.3 Application Curves
图 8-2 and 图 8-3 show eye diagrams for USB 2.0 signals through calibration traces (without device) and
TMUXHS221 channel. A combination of very low channel ON resistance, high bandwidth, very low reflection
(retun loss), and low added jitter from the device allows 480 MBps USB 2.0 HS signals to stay almost
unattenuated. Many system platforms struggle to pass USB 2.0 compliance due to high loss. TMUXHS221
allows insertion of an analog mux device in the signal path without creating any additional signal integrity
challenge.
图8-2. USB 2.0 HS Compliance Eye in TI
图8-3. USB 2.0 HS Compliance Eye in TI
Evaluation Board –Through Calibration Traces Evaluation Board –Through TMUXHS221 Channel
8.3 Systems Examples
8.3.1 PCIe Clock Muxing
图8-4 shows an application where TMUXHS221 is used to switch the PCIe clock. The device is measured in a
TI evaluation board with an available clock source to show an added jitter less than 10 fs for all NOISE_FOLD
and PCIe 5.0 CK filter versions, which is well below PCIe 5.0 clock specifications.
SEL
OEn
DB+
Local
Clock
Local CK
DB-
D+
D-
Forwarded CK
DA+
DA-
Incoming CK
VCC
GND
1
F
0.1 F
图8-4. PCIe Clock Muxing
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8.3.2 USB-C SBU Muxing
图8-5 shows an application block diagram that implements SBU cross-muxing in a USB Type-C interface for
implementing DisplayPort (DP) Alternate mode using the TMUXHS221. Note that the device has adequate
bandwidth to support fast Auxiliary (AUX) signals. It is also capable of handling asymetric biasing for DP AUX
signals.
SEL
OEn
USB-C
Port
DB+
DB-
D+
D-
SBU
DA+
DA-
DP Auxiliary
TMUXHS221
VCC
GND
1
F
0.1 F
图8-5. USB Type-C SBU Signals Muxing
8.3.3 Switching USB Port
图8-6 shows an application block diagram where TMUXHS221 is used to switch the USB port in between a
handheld portable device and its connected dock.
USB Port A
USB Host
Handheld Portable Device
Dock
图8-6. Switching USB Port
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Product Folder Links: TMUXHS221
TMUXHS221
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9 Power Supply Recommendations
The TMUXHS221 does not require a power supply sequence. However, TI recommends that the device is
enabled after VCC is stable and in specification. TI also recommends to place ample decoupling capacitors at
the device VCC near the pin.
10 Layout
10.1 Layout Guidelines
Place supply bypass capacitors as close to the VCC pin as possible. Avoid placing the bypass capacitors near
the D+/D–traces. The high-speed D+/D– traces should always be matched and must be no more than 4
inches, otherwise the eye diagram performance may be degraded. A high-speed USB connection is made
through a shielded, twisted pair cable with a differential characteristic impedance. In the layout, the impedance of
D+ and D– traces should match the cable characteristic differential impedance for optimal performance. Route
the high-speed USB signals using a minimum of vias and corners which will reduce signal reflections and
impedance changes. When a via must be used, increase the clearance size around it to minimize its
capacitance. Each via introduces discontinuities in the signal’s transmission line and increases the chance of
picking up interference from the other layers of the board. Be careful when designing test points on twisted pair
lines; through-hole pins are not recommended.
When it becomes necessary to turn 90°, use two 45° turns or an arc instead of making a single 90° turn. This
reduces reflections on the signal traces by minimizing impedance discontinuities. Do not route USB traces under
or near crystals, oscillators, clock signal generators, switching regulators, mounting holes, magnetic devices, or
IC’s that use or duplicate clock signals. Avoid stubs on the high-speed USB signals because they cause signal
reflections. If a stub is unavoidable, then the stub should be less than 200 mm. Route all high-speed USB signal
traces over continuous planes (VCC or GND) with no interruptions. Avoid crossing over anti-etch, commonly
found with plane split.
For high speed layout guidelines, refer to High-Speed Layout Guidelines for Signal Conditioners and USB Hubs
application note.
10.2 Layout Example
图10-1 shows TMUXHS221 layout example.
图10-1. TMUXHS221 Layout Example
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11 Device and Documentation Support
11.1 Related Documentation
For related documenattion, see the following:
• Texas Instruments, High-Speed Layout Guidelines for Signal Conditioners and USB Hubs application note
11.2 接收文档更新通知
要接收文档更新通知，请导航至 ti.com 上的器件产品文件夹。点击订阅更新 进行注册，即可每周接收产品信息更
改摘要。有关更改的详细信息，请查看任何已修订文档中包含的修订历史记录。
11.3 支持资源
TI E2E™ 支持论坛是工程师的重要参考资料，可直接从专家获得快速、经过验证的解答和设计帮助。搜索现有解
答或提出自己的问题可获得所需的快速设计帮助。
链接的内容由各个贡献者“按原样”提供。这些内容并不构成 TI 技术规范，并且不一定反映 TI 的观点；请参阅
TI 的《使用条款》。
11.4 Trademarks
SMBus™ is a trademark of Intel.
UART™ is a trademark of Synopsys, Inc.
DisplayPort™ is a trademark of VESA.
USB-C™ and USB Type-C™ are trademarks of USB Implementers Forum.
TI E2E™ is a trademark of Texas Instruments.
Mipi® is a registered trademark of MIPI Alliance, Inc.
PCIe® is a registered trademark of PCI-SIG.
所有商标均为其各自所有者的财产。
11.5 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
11.6 术语表
TI 术语表
本术语表列出并解释了术语、首字母缩略词和定义。
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
www.ti.com
8-Dec-2022
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
TMUXHS221NKGR
TMUXHS221NKGT
ACTIVE
ACTIVE
UQFN
UQFN
NKG
NKG
10
10
3000 RoHS & Green
250 RoHS & Green
NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 125
-40 to 125
21
21
Samples
Samples
NIPDAU
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
8-Dec-2022
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
28-Nov-2022
TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
K0
P1
W
B0
Reel
Diameter
Cavity
A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
Overall width of the carrier tape
W
P1 Pitch between successive cavity centers
Reel Width (W1)
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2
Q3 Q4
Q1 Q2
Q3 Q4
User Direction of Feed
Pocket Quadrants
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TMUXHS221NKGR
TMUXHS221NKGT
UQFN
UQFN
NKG
NKG
10
10
3000
250
180.0
180.0
8.4
8.4
1.7
1.7
2.1
2.1
0.7
0.7
4.0
4.0
8.0
8.0
Q1
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
28-Nov-2022
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W
L
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TMUXHS221NKGR
TMUXHS221NKGT
UQFN
UQFN
NKG
NKG
10
10
3000
250
210.0
210.0
185.0
185.0
35.0
35.0
Pack Materials-Page 2
PACKAGE OUTLINE
NKG0010A
UQFN - 0.55 mm max height
S
C
A
L
E
7
.
0
0
0
PLASTIC QUAD FLATPACK - NO LEAD
1.45
1.35
A
B
PIN 1 INDEX AREA
1.85
1.75
0.55
0.45
C
NOTE 3
SEATING PLANE
0.05 C
0.05
0.00
2X 0.8
SYMM
(0.1) TYP
3
5
0.45
0.35
6X
2
6
7
SYMM
6X 0.4
1
0.25
10X
0.15
0.07
0.05
C A B
10
8
0.55
0.45
PIN 1 ID
(45 X 0.1)
4X
4228479/A 02/2022
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This package complies to JEDEC MO-288 variation UDEE, except minimum package height.
www.ti.com
EXAMPLE BOARD LAYOUT
NKG0010A
UQFN - 0.55 mm max height
PLASTIC QUAD FLATPACK - NO LEAD
SYMM
4X (0.7)
10
8
SEE SOLDER MASK
DETAIL
10X (0.2)
1
7
SYMM
6X (0.4)
(1.6)
6
2
(R0.05) TYP
6X (0.6)
3
5
(1.1)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE: 30X
0.05 MIN
ALL AROUND
0.05 MAX
ALL AROUND
METAL UNDER
SOLDER MASK
METAL EDGE
EXPOSED METAL
SOLDER MASK
OPENING
EXPOSED
METAL
SOLDER MASK
OPENING
NON SOLDER MASK
DEFINED
SOLDER MASK DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4228479/A 02/2022
NOTES: (continued)
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
number SLUA271 (www.ti.com/lit/slua271).
5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown
on this view. It is recommended that vias under paste be filled, plugged or tented.
www.ti.com
EXAMPLE STENCIL DESIGN
NKG0010A
UQFN - 0.55 mm max height
PLASTIC QUAD FLATPACK - NO LEAD
SYMM
4X (0.7)
10
8
10X (0.2)
6X (0.4)
1
7
SYMM
(1.6)
6
2
(R0.05) TYP
6X (0.6)
3
5
(1.1)
SOLDER PASTE EXAMPLE
BASED ON 0.1 MM THICK STENCIL
SCALE: 30X
4228479/A 02/2022
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
www.ti.com
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