TPD4S1394 [TI]
FIREWIRE ESD CLAMP WITH LIVE-INSERTION DETECTION CIRCUIT; 火线与静电带电插入检测电路CLAMP
| 型号： | TPD4S1394 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | FIREWIRE ESD CLAMP WITH LIVE-INSERTION DETECTION CIRCUIT |
| 文件： | 总10页 (文件大小：534K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TPD4S1394
www.ti.com
SLVSA55 –NOVEMBER 2009
FIREWIRE ESD CLAMP WITH LIVE-INSERTION DETECTION CIRCUIT
Check for Samples: TPD4S1394
1
FEATURES
DESCRIPTION
•
IEEE1394 Live Insertion Protection
•
Exceeds ESD protection to IEC61000-4- 2
(Level 4)
The TPD4S1394 provides robust system level ESD
solution for the IEEE.1394 port along with a live
insertion detection mechanism for high-speed lines
interfacing a low-voltage, ESD sensitive core chipset.
This device protects and monitors up to two
differential input pairs. The optimized line capacitance
allows to protect the data lines with data rate in
excess of 1.6 GHz without degrading signal integrity.
–
–
±15-kV Human-Body Model (HBM)
±6-kV IEC 61000-4-2 Contact Discharge
•
•
•
4-Channel Matching ESD Clamps for
High-Speed Differential Lines
Flow-Through, Single-in-Line Pin Mapping
Simplifies Board Layout
The TPD4S1394 incorporates a live insertion circuit
whose output state changes when improper voltage
levels are present on the input data lines. The
FWPWR_EN signal controls an external FireWire port
power switch. During the live insertion event if there
is a floating GND or a high level signal at the D+, D–
pins, the internal comparator will detect the changes
and pull the FWPWR_EN signal to low state. When
FWPWR_EN is driven low, there is an internal delay
mechanism preventing it from being driven to the high
state regardless of the inputs to the comparator.
Available in an 8-Pin X2SON (DQL) package
APPLICATIONS
•
IEEE 1394 Live Insertion Protection
DQL PACKAGE
(TOP VIEW)
1
2
3
4
8
7
6
5
V
D1+
D1–
D2+
D2–
CC
Additionally, the TPD4S1394 performs ESD
protection on the four inputs pins: D1+, D1–, D2+,
and D2–. The TPD4S1394 conforms to the
IEC61000-4-2 (Level 4) ESD protection and ±15 kV
HBM ESD protection. The TPD4S1394 is
characterized for operation over ambient air
temperature of –40°C to 85°C.
GND
V
CMLP
FWPWR_EN
A 0.1uF decoupling capacitor is required at VCC
(pin1)
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
TA
PACKAGE(1) (2)
NOMINAL DIMENSIONS (mm)
–40°C to 85°C SON – DQL
Reel of 3000
W = 1.4, L = 2.0, H = 0.4, Pitch = 0.5
TPD4S1394DQLR
5JR
(1) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
(2) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2009, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
TPD4S1394
SLVSA55 –NOVEMBER 2009
www.ti.com
FUNCTIONAL BLOCK DIAGRAM
V
V
CC
FWPWR_EN
D2+
D2–
D1+
D1–
CMLP
Reference
Generator
V
REF
GND
TERMINAL FUNCTIONS
TERMINAL
TYPE
DESCRIPTION
PIN NO.
NAME
VCC
1
2
3
4
Power Power supply
GND
GND
O
Ground
VCLMP
Comparator trip reference
Control output
FWPWR_EN
O
5, 6,
7, 8
D2+, D2–,
D1+, D1–
I
High-speed ESD clamp inputs
ABSOLUTE MAXIMUM RATINGS(1)
over operating free-air temperature range (unless otherwise noted)
MIN
–0.5
0
MAX
4.6
4
UNIT
V
VCC
VIO
Supply voltage range
IO voltage range at D+, D–, VCLMP
V
FWPWR_E
N
Switch output
–0.5
4.6
V
Tstg
TA
Storage temperature range
Operating free-air temperature range
IEC 61000-4-2 Contact Discharge
HBM ESD
–65
–40
150
85
°C
°C
kV
kV
D+, D– pins
D+, D– pins
±6
±15
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range (unless otherwise noted)
PARAMETER
MIN
NOM
MAX
UNIT
VCC
Supply voltage
3.0
3.6
V
2
Submit Documentation Feedback
Copyright © 2009, Texas Instruments Incorporated
Product Folder Link(s): TPD4S1394
TPD4S1394
www.ti.com
SLVSA55 –NOVEMBER 2009
ELECTRICAL CHARACTERISTICS(1)
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
2.9
TYP
MAX UNIT
Voltage at D1+, D1-, D2+, and D2- to trip the
FWPWR_EN from high to low
3.4
4.0
V
Vdx
Voltage to trip the FWPWR_EN from low to high
Value on pin
2.7
3.2
3.8
VCLMP
ttrip
No connect
2.45
V
Loading on FWPWR_EN = 50
pF
Time for FWPWR_EN to go low
0.5
2
5
μs
treset
Time delay for the FWPWR_EN to go high after
trip condition is met
FWPWR_EN = VCC
300
450
600
ms
VBR
VD
Breakdown voltage at VCLAMP
II = 1 mA
4.2
V
V
Diode forward voltage for lower clamp
ID = 8 mA lower clamp diode
–0.6
–0.8
–0.95
FWPWR_E
N
Switch output
VCC
V
Dynamic resistance (for in and out clamp) of the
D+, D-
RDYN
CIO
I = 1 A
1
1.5
Ω
IO Capacitance of D+, D-
VIO = 2.5 V
2
pF
μA
VCC = 3.3 V, FWPWR_EN =
high
ICC
Current Consumption
130
200
(1) A 0.1-μF decoupling capacitor is required at VCC (pin 1).
TYPICAL CHARACTERISTICS
2.5
2.0
1.5
1.0
0.5
0.0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
Voltage Bias (V)
Figure 1. IO Capacitance vs IO Voltage (D+, D– Pins)
Copyright © 2009, Texas Instruments Incorporated
Submit Documentation Feedback
3
Product Folder Link(s): TPD4S1394
TPD4S1394
SLVSA55 –NOVEMBER 2009
www.ti.com
TYPICAL CHARACTERISTICS (continued)
0
-3
-3.0 dB Frequency = 2.4 GHz
-6
-9
-12
-15
-18
1.0E+07
1.0E+08
1.0E+09
1.0E+10
Frequency (Hz)
Figure 2. Insertion Loss (S21) for D+, D– Pins
4
Submit Documentation Feedback
Copyright © 2009, Texas Instruments Incorporated
Product Folder Link(s): TPD4S1394
PACKAGE OPTION ADDENDUM
www.ti.com
3-Dec-2009
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
TPD4S1394DQLR
ACTIVE
X2SON
DQL
8
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
7-Mar-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TPD4S1394DQLR
X2SON
DQL
8
3000
180.0
9.5
1.6
2.3
0.5
4.0
8.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
7-Mar-2012
*All dimensions are nominal
Device
Package Type Package Drawing Pins
X2SON DQL
SPQ
Length (mm) Width (mm) Height (mm)
180.0 180.0 30.0
TPD4S1394DQLR
8
3000
Pack Materials-Page 2
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