TPD6E001RSERG4 [TI]
LOW-CAPACITANCE 6-CHANNEL 【15-kV ESD-PROTECTION ARRAY FOR HIGH-SPEED DATA INTERFACES; 低电容6通道【 15千伏ESD保护阵列高速数据接口型号: | TPD6E001RSERG4 |
厂家: | TEXAS INSTRUMENTS |
描述: | LOW-CAPACITANCE 6-CHANNEL 【15-kV ESD-PROTECTION ARRAY FOR HIGH-SPEED DATA INTERFACES |
文件: | 总14页 (文件大小:702K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
TPD6E001
LOW-CAPACITANCE 6-CHANNEL ±15-kV ESD-PROTECTION ARRAY
FOR HIGH-SPEED DATA INTERFACES
www.ti.com
SLLS685C–JULY 2006–REVISED APRIL 2007
FEATURES
APPLICATIONS
•
•
•
•
•
•
•
•
UBB
USB 2.0
Ethernet
FireWire™
Video
Cell Phones
SVGA Video Connections
Glucosemeters
•
ESD Protection Exceeds
–
–
–
±15-kV Human-Body Model (HBM)
±8-kV IEC 61000-4-2 Contact Discharge
±15-kV IEC 61000-4-2 Air-Gap Discharge
•
•
•
•
•
•
•
Low 1.5-pF Input Capacitance
Low 1-nA (Max) Leakage Current
Low 1-nA Supply Current
0.9-V to 5.5-V Supply-Voltage Range
Six-Channel Device
Space-Saving RSE and RSF Packages
Alternate 2-, 3-, 4-Channel Options Available:
TPD2E001, TPD3E001, and TPD4E001
RSE PACKAGE
(TOP VIEW)
RSF PACKAGE
(TOP VIEW)
10
12
11
GND
5
10
1
2
3
4
9
8
7
6
IO1
IO2
N.C.
IO6
IO5
IO4
IO1
IO2
IO3
1
IO6
IO5
IO4
9
8
7
IO3
2
3
N.C.
5
4
6
N.C. – Not internally connected
DESCRIPTION/ORDERING INFORMATION
The TPD6E001 is a low-capacitance ±15-kV ESD-protection diode array designed to protect sensitive
electronics attached to communication lines. Each channel consists of a pair of diodes that steer ESD current
pulses to VCC or GND. The TPD6E001 protects against ESD pulses up to ±15-kV Human-Body Model (HBM),
±8-kV Contact Discharge, and ±15-kV Air-Gap Discharge, as specified in IEC 61000-4-2. This device has a
1.5-pF capacitance per channel, making it ideal for use in high-speed data IO interfaces.
The TPD6E001 is a six-channel device designed for cell-phone connectors and SVGA video connections.
The TPD6E001 is available in tiny RSE and RSF packages and is specified for –40°C to 85°C operation.
ORDERING INFORMATION
TA
PACKAGE(1)
Reel of 3000
Reel of 2000
ORDERABLE PART NUMBER
TPD6E001RSER
TOP-SIDE MARKING
2DO
ZWN
2 × 1.5 RSE
4 × 4 RSF
–40°C to 85°C
TPD6E001RSFR
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
FireWire is a trademark of Apple Computer, Inc.
PRODUCTION DATA information is current as of publication date.
Copyright © 2006–2007, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
TPD6E001
LOW-CAPACITANCE 6-CHANNEL ±15-kV ESD-PROTECTION ARRAY
FOR HIGH-SPEED DATA INTERFACES
www.ti.com
SLLS685C–JULY 2006–REVISED APRIL 2007
LOGIC BLOCK DIAGRAM
VCC
IO1
IO2
IO3
IO4
IO5
IO6
GND
PIN DESCRIPTION
RSE NO.
RSF NO.
NAME
FUNCTION
1, 2, 3,
6, 7, 8
1, 2, 3,
7, 8, 9
IOx
ESD-protected channel
Ground
5
5
11
GND
VCC
N.C.
EP
10
Power-supply input. Bypass VCC to GND with a 0.1-µF ceramic capacitor.
Not internally connected
4, 9
4, 6, 10, 12
EP
Exposed pad. Connect to GND.
Absolute Maximum Ratings(1)
over operating free-air temperature range (unless otherwise noted)
MIN
–0.3
–0.3
–65
MAX UNIT
VCC
VI/O
7
VCC + 0.3
150
V
V
Tstg
TJ
Storage temperature range
Junction temperature
°C
°C
150
Infrared (15 s)
220
Bump temperature (soldering)
°C
°C
Vapor phase (60 s)
215
Lead temperature (soldering, 10 s)
300
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the
specifications is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
2
Submit Documentation Feedback
TPD6E001
LOW-CAPACITANCE 6-CHANNEL ±15-kV ESD-PROTECTION ARRAY
FOR HIGH-SPEED DATA INTERFACES
www.ti.com
SLLS685C–JULY 2006–REVISED APRIL 2007
Electrical Characteristics
VCC = 5 V ± 10%, TA = -40°C to 85°C (unless otherwise noted)
PARAMETER
Supply voltage
TEST CONDITIONS
MIN
TYP(1)
MAX
5.5
UNIT
V
VCC
ICC
VF
0.9
Supply current
1
100
0.95
nA
V
Diode forward voltage
Breakdown voltage
IF = 10 mA
0.65
11
VBR
IBR = 10 mA
V
Positive transients
Negative transients
Positive transients
VCC + 25
–25
TA = 25°C, ±15-kV HBM,
IF = 10 A
TA = 25°C,
±8-kV Contact Discharge
(IEC 61000-4-2), IF = 24 A
VCC + 60
VC
Channel clamp voltage(2)
Channel leakage current
V
Negative transients
Positive transients
Negative transients
–60
VCC + 100
–100
TA = 25°C,
±15-kV Air-Gap Discharge
(IEC 61000-4-2), IF = 45 A
Ii/o
Vi/o = GND to VCC
±1
nA
pF
Channel input
capacitance
Ci/o
VCC = 5 V, Bias of VCC/2
1.5
(1) Typical values are at VCC = 5 V and TA = 25°C.
(2) Channel clamp voltage is not production tested.
ESD Protection
PARAMETER
TYP
±15
±8
UNIT
kV
HBM
IEC 61000-4-2 Contact Discharge
IEC 61000-4-2 Air-Gap Discharge
kV
±15
kV
3
Submit Documentation Feedback
TPD6E001
LOW-CAPACITANCE 6-CHANNEL ±15-kV ESD-PROTECTION ARRAY
FOR HIGH-SPEED DATA INTERFACES
www.ti.com
SLLS685C–JULY 2006–REVISED APRIL 2007
TYPICAL OPERATING CHARACTERISTICS
IO CAPACITANCE
vs
IO VOLTAGE
(VCC = 5.0 V)
2.20
2.00
1.80
1.60
1.40
1.20
1.00
0.00
1.00
2.00
2.50
3.00
4.00
5.00
IO Voltage (V)
IO LEAKAGE CURRENT
vs
TEMPERATURE
(VCC = 5.5 V)
1000
100
10
1
–40
25
45
65
85
Temperature (°C)
4
Submit Documentation Feedback
TPD6E001
LOW-CAPACITANCE 6-CHANNEL ±15-kV ESD-PROTECTION ARRAY
FOR HIGH-SPEED DATA INTERFACES
www.ti.com
SLLS685C–JULY 2006–REVISED APRIL 2007
APPLICATION INFORMATION
VBUS
0.1 µF
D+
D–
VCC
RT
GND
IO5
IO3
IO1
USB
Controller
D1
IO6
IO4
IO2
VBUS
D+
D–
GND
GND
Detailed Description
When placed near the connector, the TPD6E001 ESD solution offers little or no signal distortion during normal
operation due to low IO capacitance and ultra-low leakage current specifications. The TPD6E001 ensures that
the core circuitry is protected and the system is functioning properly in the event of an ESD strike. For proper
operation, the following layout/design guidelines should be followed:
1. Place the TPD6E001 solution close to the connector. This allows the TPD6E001 to take away the energy
associated with ESD strike before it reaches the internal circuitry of the system board.
2. Place a 0.1-µF capacitor very close to the VCC pin. This limits any momentary voltage surge at the IO pin
during the ESD strike event.
3. Ensure that there is enough metallization for the VCC and GND loop. During normal operation, the
TPD6E001 consumes nA leakage current. But during the ESD event, VCC and GND may see 15 A to
30 A of current, depending on the ESD level. Sufficient current path enables safe discharge of all the
energy associated with the ESD strike.
4. Leave the unused IO pins floating.
5. The VCC pin can be connected in two different ways:
a. If the VCC pin is connected to the system power supply, the TPD6E001 works as a transient suppressor
for any signal swing above VCC + VF. A 0.1-µF capacitor on the device VCC pin is recommended for ESD
bypass.
b. If the VCC pin is not connected to the system power supply, the TPD6E001 can tolerate higher signal
swing in the range up to 10V. Please note that a 0.1-µF capacitor is still recommended at the VCC pin for
ESD bypass.
5
Submit Documentation Feedback
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2007
PACKAGING INFORMATION
Orderable Device
TPD6E001RSER
TPD6E001RSERG4
TPD6E001RSFR
TPD6E001RSFRG4
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
QFN
RSE
10
10
12
12
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
QFN
QFN
QFN
RSE
RSF
RSF
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
24-Sep-2007
TAPE AND REEL BOX INFORMATION
Device
Package Pins
Site
Reel
Reel
A0 (mm)
B0 (mm)
K0 (mm)
P1
W
Pin1
Diameter Width
(mm) (mm) Quadrant
(mm)
(mm)
TPD6E001RSER
RSE
10
SITE 48
179
8
1.75
2.25
0.65
4
8
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
24-Sep-2007
Device
Package
Pins
Site
Length (mm) Width (mm) Height (mm)
TPD6E001RSER
RSE
10
SITE 48
220.0
205.0
0.0
Pack Materials-Page 2
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