TPS22965NDSGR [TI]
具有可调节上升时间和可选输出放电功能的 5.7V、6A、16mΩ 负载开关 | DSG | 8 | -40 to 105;
| 型号： | TPS22965NDSGR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 具有可调节上升时间和可选输出放电功能的 5.7V、6A、16mΩ 负载开关 | DSG | 8 | -40 to 105 开关 驱动 外围驱动器 驱动程序和接口 |
| 文件： | 总25页 (文件大小：1541K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TPS22965
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SLVSBJ0 –AUGUST 2012
Single Channel, Ultra-Low Resistance Load Switch
Check for Samples: TPS22965
1
FEATURES
DESCRIPTION
The TPS22965 is a small, ultra-low RON, single
channel load switch with controlled turn on. The
device contains an N-channel MOSFET that can
operate over an input voltage range of 0.8V to 5.5V
and can support a maximum continuous current of
6A. The switch is controlled by an on/off input (ON),
which is capable of interfacing directly with low-
voltage control signals. In the TPS22965, a 225-Ω on-
chip load resistor is added for quick output discharge
when switch is turned off.
2
•
•
•
Integrated Single Channel Load Switch
Input Voltage Range: 0.8V to 5.5V
Ultra low RON Resistance
–
–
–
RON = 16mΩ at VIN = 5V (VBIAS = 5V)
RON = 16mΩ at VIN = 3.6V (VBIAS = 5V)
RON = 16mΩ at VIN = 1.8V (VBIAS = 5V)
•
•
•
6A Maximum Continuous Switch Current
Low Quiescent Current (50µA)
The TPS22965 is available in a small, space-saving
Low Control Input Threshold Enables Use of
1.2V/1.8V/2.5V/3.3V Logic
2mm
x 2mm 8-pin SON package (DSG) with
integrated thermal pad allowing for high power
dissipation. The device is characterized for operation
over the free-air temperature range of –40°C to 85°C.
•
•
•
•
Configurable Rise Time
Quick Output Discharge (QOD)
SON 8-pin Package With Thermal Pad
ESD Performance Tested per JESD 22
Feature List
RON Typical at 3.6 V (VBIAS = 5V)
Rise Time(1)
Quick Output Discharge(2)
Maximum Output Current
GPIO Enable
16 mΩ
–
2KV HBM and 1KV CDM
Adjustable
Yes
APPLICATIONS
6 A
•
•
•
•
•
•
•
Ultrabook™
Active High
–40°C to 85°C
Notebooks/Netbooks
Tablet PC
Operating Temperature
(1) See Application Information section for CT value vs. rise time.
Consumer Electronics
Set-top Boxes/Residental Gateways
Telecom Systems
(2) This feature discharges the output of the switch to GND
through a 225-Ω resistor, preventing the output from floating.
Solid State Drives (SSD)
VIN
VOUT
Power
Supply
ON
C
IN
ON
CL
RL
CT
OFF
GND
GND
VBIAS
TPS22965
Typical Application
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
Ultrabook is a trademark of Intel.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2012, Texas Instruments Incorporated
TPS22965
SLVSBJ0 –AUGUST 2012
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION
TA
PACKAGE
ORDERABLE PART NO.
TOP-SIDE MARKING/STATUS
-40°C to 85°C
-40°C to 85°C
DSG
DSG
Tape and reel 3000 units
Tape and reel 250 units
TPS22965DSGR
ZSA0
ZSA0
TPS22965DSGT
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)(1)(2)
VALUE
–0.3 to 6
–0.3 to 6
–0.3 to 6
–0.3 to 6
6
UNIT(2)
VIN
Input voltage range
V
V
VOUT
VBIAS
VON
IMAX
IPLS
TA
Output voltage range
Bias voltage range
V
Input voltage range
V
Maximum continuous switch current
Maximum pulsed switch current, pulse <300 µs, 2% duty cycle
Operating free-air temperature range(3)
Maximum junction temperature
Storage temperature range
A
8
A
–40 to 85
125
°C
°C
°C
°C
TJ
TSTG
TLEAD
–65 to 150
300
Maximum lead temperature (10-s soldering time)
Human-Body Model (HBM)
2000
Electrostatic discharge
protection
ESD
V
Charged-Device Model (CDM)
1000
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to network ground terminal.
(3) In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may
have to be derated. Maximum ambient temperature [TA(max)] is dependent on the maximum operating junction temperature [TJ(max)], the
maximum power dissipation of the device in the application [PD(max)], and the junction-to-ambient thermal resistance of the part/package
in the application (θJA), as given by the following equation: TA(max) = TJ(max) – (θJA × PD(max)
)
THERMAL INFORMATION
TPS22965
DSG (8 PINS)
65.3
THERMAL METRIC(1)
UNITS
θJA
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
θJCtop
θJB
74.2
35.4
°C/W
ψJT
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
2.2
ψJB
36.0
θJCbot
12.8
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
2
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SLVSBJ0 –AUGUST 2012
RECOMMENDED OPERATING CONDITIONS
MIN
MAX UNIT
VIN
Input voltage range
Bias voltage range
0.8 VBIAS
V
V
VBIAS
VON
VOUT
VIH
2.5
0
5.5
VIN
VIN
5.5
0.5
ON voltage range
V
Output voltage range
High-level input voltage, ON
Low-level input voltage, ON
Input capacitor
V
VBIAS = 2.5 V to 5.5 V
VBIAS = 2.5 V to 5.5 V
1.2
0
V
VIL
V
CIN
1(1)
µF
(1) Refer to Application Information section.
ELECTRICAL CHARACTERISTICS
Unless otherwise note, the specification in the following table applies over the operating ambient temperature –40°C ≤ TA ≤
85°C (Full) and VBIAS = 5.0 V. Typical values are for TA = 25°C.
PARAMETER
TEST CONDITIONS
TA
MIN
TYP MAX UNIT
POWER SUPPLIES AND CURRENTS
IOUT = 0,
VIN = VON = VBIAS = 5.0 V
IIN(VBIAS-ON) VBIAS quiescent current
IIN(VBIAS-OFF) VBIAS shutdown current
Full
Full
50
75
µA
µA
VON = GND, VOUT = 0 V
2
8
VIN = 5.0 V
VIN = 3.3 V
VIN = 1.8 V
VIN = 0.8 V
0.2
0.02
3
VON = GND,
VOUT = 0 V
IIN(VIN-OFF)
VIN off-state supply current
ON pin input leakage current
Full
Full
µA
µA
0.01
2
0.005
1
ION
VON = 5.5 V
0.5
RESISTANCE CHARACTERISTICS
25°C
Full
16
16
16
16
16
16
23
25
23
25
23
25
23
25
23
25
23
25
VIN = 5.0 V
VIN = 3.3 V
VIN = 1.8 V
VIN = 1.5 V
VIN = 1.2 V
VIN = 0.8 V
mΩ
mΩ
mΩ
mΩ
mΩ
25°C
Full
25°C
Full
IOUT = –200 mA,
VBIAS = 5.0 V
RON
ON-state resistance
25°C
Full
25°C
Full
25°C
Full
mΩ
RPD
Output pulldown resistance
VIN = 5.0 V, VON = 0V, IOUT = 15 mA
Full
225 300
Ω
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ELECTRICAL CHARACTERISTICS
Unless otherwise noted, the specification in the following table applies over the operating ambient temperature –40°C ≤ TA ≤
85°C (Full) and VBIAS = 2.5 V. Typical values are for TA = 25°C.
PARAMETER
TEST CONDITIONS
TA
MIN
TYP MAX UNIT
POWER SUPPLIES AND CURRENTS
IOUT = 0,
VIN = VON = VBIAS = 2.5 V
IIN(VBIAS-ON) VBIAS quiescent current
IIN(VBIAS-OFF) VBIAS shutdown current
Full
Full
20
30
µA
µA
VON = GND, VOUT = 0 V
2
3
VIN = 2.5 V
VIN = 1.8 V
VIN = 1.2 V
VIN = 0.8 V
0.01
0.01
2
VON = GND,
VOUT = 0 V
IIN(VIN-OFF)
VIN off-state supply current
ON pin input leakage current
Full
Full
µA
µA
0.005
0.003
2
1
ION
VON = 5.5 V
0.5
RESISTANCE CHARACTERISTICS
25°C
Full
20
19
18
18
17
26
28
26
28
25
27
25
27
25
27
VIN = 2.5 V
VIN = 1.8 V
VIN = 1.5 V
VIN = 1.2 V
VIN = 0.8 V
mΩ
mΩ
mΩ
mΩ
25°C
Full
25°C
Full
IOUT = –200 mA,
VBIAS = 2.5 V
RON
ON-state resistance
25°C
Full
25°C
Full
mΩ
RPD
Output pulldown resistance
VIN = 2.5 V, VON = 0V, IOUT = 1 mA
Full
275 325
Ω
4
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SLVSBJ0 –AUGUST 2012
SWITCHING CHARACTERISTIC MEASUREMENT INFORMATION
VIN
VOUT
CIN = 1µF
ON
(A)
CT
ON
CL
+
-
RL
OFF
VBIAS
GND
TPS22965
GND
GND
TEST CIRCUIT
VON
50%
50%
tF
tOFF
tR
VOUT
tON
90%
90%
VOUT
50%
50%
10%
10%
tD
tON/tOFF WAVEFORMS
(A) Rise and fall times of the control signal is 100ns.
Figure 1. Test Circuit and tON/tOFF Waveforms
SWITCHING CHARACTERISTICS
PARAMETER
TEST CONDITION
MIN
TYP
MAX UNIT
VIN = VON = VBIAS = 5 V, TA = 25ºC (unless otherwise noted)
tON
tOFF
tR
Turn-on time
Turn-off time
VOUT rise time
VOUT fall time
ON delay time
1325
10
RL = 10-Ω, CL = 0.1 µF, CT = 1000 pF
1625
3.5
µs
tF
tD
500
VIN = 0.8 V, VON = VBIAS = 5V, TA = 25ºC (unless otherwise noted)
tON
tOFF
tR
Turn-on time
Turn-off time
VOUT rise time
VOUT fall time
ON delay time
600
80
RL = 10-Ω, CL = 0.1 µF, CT = 1000 pF
300
5.5
460
µs
µs
µs
tF
tD
VIN = 2.5V, VON = 5 V, VBIAS = 2.5V, TA = 25ºC (unless otherwise noted)
tON
tOFF
tR
Turn-on time
Turn-off time
VOUT rise time
VOUT fall time
ON delay time
2200
9
RL = 10-Ω, CL = 0.1 µF, CT = 1000 pF
2275
3.1
tF
tD
1075
VIN = 0.8 V, VON = 5 V, VBIAS = 2.5 V, TA = 25ºC (unless otherwise noted)
tON
tOFF
tR
Turn-on time
Turn-off time
VOUT rise time
VOUT fall time
ON delay time
1450
60
RL = 10-Ω, CL = 0.1 µF, CT = 1000 pF
875
5.5
tF
tD
1010
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FUNCTIONAL BLOCK DIAGRAM
VIN
Charge
Pump
VBIAS
Control
Logic
ON
VOUT
CT
GND
Figure 2. Functional Block Diagram
Table 1. FUNCTIONAL TABLE
ON
L
VIN to VOUT
VOUT to GND
Off
On
On
Off
H
6
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SLVSBJ0 –AUGUST 2012
DSG PACKAGE
1
2
3
4
8
7
6
5
8
7
6
5
1
2
3
4
VIN
VOUT
VOUT
VOUT
CT
VIN
VIN
ON
VOUT
CT
VIN
ON
VBIAS
VBIAS
GND
GND
BOTTOM VIEW
TOP VIEW
PIN DESCRIPTIONS
TPS22965
PIN NAME
I/O
DESCRIPTION
DSG
1
VIN
I
I
Switch input. Input bypass capacitor recommended for minimizing VIN dip. Recommended voltage
range for this pin for optimal RON performance is 0.8V to VBIAS
.
2
VIN
Switch input. Input bypass capacitor recommended for minimizing VIN dip. Recommended voltage
range for this pin for optimal RON performance is 0.8V to VBIAS
.
3
4
ON
I
I
Active high switch control input. Do not leave floating.
VBIAS
Bias voltage. Power supply to the device. Recommended voltage range for this pin is 2.5V to 5.5V.
See Application Information section for more information.
5
6
GND
CT
-
Device ground.
O
Switch slew rate control. Can be left floating. See Application Information section for more
information.
7
8
VOUT
O
O
-
Switch output.
Switch output.
VOUT
Thermal Pad
Thermal pad (exposed center pad) to alleviate thermal stress. Tie to GND. See Application
Information for layout guidelines.
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TYPICAL CHARACTERISTICS
VBIAS vs. QUIESCENT CURRENT
VBIAS vs. SHUTDOWN CURRENT
60
50
40
30
20
10
0.7
−40C
25C
70C
85C
−40C
25C
70C
85C
0.6
0.5
0.4
0.3
0.2
0.1
VIN=VBIAS, VON = 5V, VOUT=OPEN
3.25 3.5 3.75 4.25 4.5 4.75 5.25 5.5
VIN=VBIAS, VON=0V, VOUT=0V
3.25 3.5 3.75 4.25 4.5 4.75 5.25 5.5
2.5 2.75
3
4
5
2.5 2.75
3
4
5
VBIAS (V)
VBIAS (V)
G070
G070
TEMPERATURE vs. RON
(VBIAS = 2.5V)
VIN vs. OFF-STATE VIN CURRENT
8.5
8
24
23
22
21
20
19
18
17
16
15
14
13
−40C
25C
70C
85C
VBIAS=5.5V, VON=0V, VOUT = 0V
VIN =0.8V
VIN =1.05
VIN =1.2
VIN=1.5V
VIN = 1.8V
VIN = 2.5V
7.5
7
6.5
6
5.5
5
4.5
4
3.5
3
2.5
2
1.5
1
0.5
0
VBIAS =2.5V, IOUT=−200mA
35 60 85
0.8 1.2 1.6
2
2.4 2.8 3.2 3.6
VIN (V)
4
4.4 4.8 5.2 5.6
−40
−15
10
Temperature (°C)
G067
G063
8
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TYPICAL CHARACTERISTICS (continued)
TEMPERATURE vs. RON
(VBIAS = 5.5V)
VIN vs. RON
(VBIAS = 2.5V)
21
20.5
20
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
VIN =0.8V
VIN =1.05
VIN =1.2
VIN=1.5V
VIN = 1.8V
VIN = 2.5V
VIN = 3.3V
VIN =3.6V
VIN=4.2V
VIN=5V
−40C
25C
70C
85C
19.5
19
18.5
18
17.5
17
VN=5.5V
16.5
16
15.5
15
14.5
14
13.5
13
12.5
12
VBIAS =5.5V, IOUT=−200mA
35 60 85
VBIAS =2.5V, IOUT = −200mA
1.8 2.05 2.3 2.5
−40
−15
10
0.8
1.05
1.3
1.55
VIN (V)
Temperature (°C)
G064
G060
VIN vs. RON
(VBIAS = 5.5V)
VIN vs. RON
(TA = 25°C)
20
19
18
17
16
15
14
13
12
21
20
19
18
17
16
15
VBIAS =5.5V, IOUT = −200mA
Temperature=25C, IOUT=−200mA
VBIAS = 2.5V
VBIAS = 3.3V
VBIAS = 3.6V
VBIAS= 4.2V
VBIAS = 5V
VBIAS = 5.5V
−40C
25C
70C
85C
0.8 1.2 1.6
2
2.4 2.8 3.2 3.6
VIN (V)
4
4.4 4.8 5.2 5.6
0.8 1.2 1.6
2
2.4 2.8 3.2 3.6
VIN (V)
4
4.4 4.8 5.2 5.6
G061
G062
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TYPICAL CHARACTERISTICS (continued)
VIN vs. RPD
(VBIAS = 5.5V)
VON vs. VOUT
(TA = 25°C)
231
2.4
2.2
2
IPD=1mA, VBIAS=5.5V, VON=0V
−40C
25C
70C
85C
VIN=2V, Tempeature = 25C
230
229
228
227
226
225
224
1.8
1.6
1.4
1.2
1
0.8
0.6
0.4
0.2
0
VBIAS = 2.5V
VBIAS=3.3V
VBIAS=3.6V
VBIAS=4.2
VBIAS=5V
VBIAS=5.5V
0.8 1.2 1.6
2
2.4 2.8 3.2 3.6
VIN (V)
4
4.4 4.8 5.2 5.6
0
0.25 0.5 0.75
1
1.25 1.5 1.75
VON (V)
2
2.25 2.5
G065
G066
VIN vs. tD
(VBIAS = 2.5V, CT = 1nF)
VIN vs. tD
(VBIAS = 5.5V, CT = 1nF)
1500
1450
1400
1350
1300
1250
1200
1150
1100
1050
1000
950
650
600
550
500
450
400
350
300
VBIAS = 2.5V
CT = 1nf
VBIAS = 5.5V, CT = 1nf
900
850
800
−40C
25C
70C
85C
−40C
25C
70C
85C
750
700
650
600
0.8
1
1.2
1.4
1.6
VIN (V)
1.8
2
2.2
2.4
2.6
0.8 1.2 1.6
2
2.4 2.8 3.2 3.6
VIN (V)
4
4.4 4.8 5.2 5.5
G030
G035
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TYPICAL CHARACTERISTICS (continued)
VIN vs. tF
(VBIAS = 2.5V, CT = 1nF)
VIN vs. tF
(VBIAS = 5.5V, CT = 1nF)
8
8
7
6
5
4
3
2
1
0
VBIAS = 2.5V
CT = 1nf
−40C
25C
70C
85C
VBIAS = 5.5V
CT = 1nf
−40C
25C
70C
85C
7
6
5
4
3
2
1
0.8
1
1.2
1.4
1.6
1.8
2
2.2
2.4
2.6
0.8 1.2 1.6
2
2.4 2.8 3.2 3.6
VIN (V)
4
4.4 4.8 5.2 5.6
VIN (V)
G036
G041
VIN vs. tOFF
(VBIAS = 2.5V, CT = 1nF)
VIN vs. tOFF
(VBIAS = 5.5V, CT = 1nF)
80
70
60
50
40
30
20
10
0
125
100
75
50
25
0
−40C
25C
70C
85C
VBIAS = 5.5V
CT = 1nf
−40C
25C
70C
85C
VBIAS = 2.5V
CT = 1nf
0.8
1
1.2
1.4
1.6
VIN (V)
1.8
2
2.2
2.4
2.6
0.8 1.2 1.6
2
2.4 2.8 3.2 3.6
VIN (V)
4
4.4 4.8 5.2 5.6
G042
G047
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TYPICAL CHARACTERISTICS (continued)
VIN vs. tON
(VBIAS = 2.5V, CT = 1nF)
VIN vs. tON
(VBIAS = 5.5V, CT = 1nF)
2700
1600
1500
1400
1300
1200
1100
1000
900
−40C
−40C
25C
70C
85C
2600
2500
2400
2300
2200
2100
2000
1900
1800
1700
1600
1500
1400
1300
1200
1100
25C
70C
85C
800
700
600
VBIAS = 2.5V
CT = 1nf
VBIAS = 5.5V
CT = 1nf
500
400
0.8
1
1.2
1.4
1.6
1.8
2
2.2
2.4
2.6
0.8 1.2 1.6
2
2.4 2.8 3.2 3.6
VIN (V)
4
4.4 4.8 5.2 5.6
VIN (V)
G048
G053
VIN vs. tR
(VBIAS = 2.5V, CT = 1nF)
VIN vs. tR
(VBIAS = 5.5V, CT = 1nF)
2800
2450
2100
1750
1400
1050
700
2000
1750
1500
1250
1000
750
−40C
25C
70C
85C
−40C
25C
70C
85C
500
VBIAS= 2.5V
CT = 1nf
VBIAS = 5.5V
CT = 1nf
250
0.8
1
1.2
1.4
1.6
VIN (V)
1.8
2
2.2
2.4
2.6
0.8 1.2 1.6
2
2.4 2.8 3.2 3.6
VIN (V)
4
4.4 4.8 5.2 5.6
G061
G059
12
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TYPICAL CHARACTERISTICS (continued)
VBIAS vs. tR
(VIN = 2.5V, CT = 1nF)
3000
−40C
25C
70C
2750
85C
2500
2250
2000
1750
1500
1250
1000
750
VIN = 2.5V
CT = 1nf
500
2.5 2.8
3
3.2 3.5 3.8
4
4.2 4.5 4.8
5
5.2 5.5
VBIAS (V)
G061
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TYPICAL AC SCOPE CAPTURES at TA = 25ºC, CT = 1nF (CH1 = VOUT, CH2 = ON)
TURN-ON RESPONSE TIME
TURN-ON RESPONSE TIME
(VIN = 0.8V, VBIAS = 2.5V, CIN = 1µF, CL = 0.1µF, RL = 10Ω)
(VIN = 0.8V, VBIAS = 5.0V, CIN = 1µF, CL = 0.1µF, RL = 10Ω)
TURN-ON RESPONSE TIME
TURN-ON RESPONSE TIME
(VIN = 2.5V, VBIAS = 2.5V, CIN = 1µF, CL = 0.1µF, RL = 10Ω)
(VIN = 5.0V, VBIAS = 5.0V, CIN = 1µF, CL = 0.1µF, RL = 10Ω)
TURN-OFF RESPONSE TIME
TURN-OFF RESPONSE TIME
(VIN = 0.8V, VBIAS = 2.5V, CIN = 1µF, CL = 0.1µF, RL = 10Ω)
(VIN = 0.8V, VBIAS = 5.0V, CIN = 1µF, CL = 0.1µF, RL = 10Ω)
14
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TYPICAL AC SCOPE CAPTURES at TA = 25ºC, CT = 1nF (CH1 = VOUT, CH2 = ON) (continued)
TURN-OFF RESPONSE TIME
TURN-OFF RESPONSE TIME
(VIN = 2.5V, VBIAS = 2.5V, CIN = 1µF, CL = 0.1µF, RL = 10Ω)
(VIN = 5.0V, VBIAS = 5.0V, CIN = 1µF, CL = 0.1µF, RL = 10Ω)
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APPLICATION INFORMATION
ON/OFF CONTROL
The ON pin controls the state of the switch. Asserting ON high enables the switch. ON is active high and has a
low threshold, making it capable of interfacing with low-voltage signals. The ON pin is compatible with standard
GPIO logic thresholds. It can be used with any microcontroller with 1.2V or higher GPIO voltage. This pin cannot
be left floating and must be driven either high or low for proper functionality.
INPUT CAPACITOR (OPTIONAL)
To limit the voltage drop on the input supply caused by transient in-rush currents when the switch turns on into a
discharged load capacitor or short-circuit, a capacitor needs to be placed between VIN and GND. A 1-µF ceramic
capacitor, CIN, placed close to the pins, is usually sufficient. Higher values of CIN can be used to further reduce
the voltage drop during high current applications. When switching heavy loads, it is recommended to have an
input capacitor about 10 times higher than the output capacitor to avoid excessive voltage drop.
OUTPUT CAPACITOR (OPTIONAL)
Due to the integrated body diode in the NMOS switch, a CIN greater than CL is highly recommended. A CL
greater than CIN can cause VOUT to exceed VIN when the system supply is removed. This could result in current
flow through the body diode from VOUT to VIN. A CIN to CL ratio of 10 to 1 is recommended for minimizing VIN dip
caused by inrush currents during startup, however a 10 to 1 ratio for capacitance is not required for proper
functionality of the device. A ratio smaller than 10 to 1 (such as 1 to 1) could cause slightly more VIN dip upon
turn-on due to inrush currents. This can be mitigated by increasing the capacitance on the CT pin for a longer
rise time (see below).
VIN and VBIAS VOLTAGE RANGE
For optimal RON performance, make sure VIN ≤ VBIAS. The device will still be functional if VIN > VBIAS but it will
exhibit RON greater than what is listed in the ELECTRICAL CHARACTERISTICS table. See Figure 3 for an
example of a typical device. Notice the increasing RON as VIN exceeds VBIAS voltage. Be sure to never exceed
the maximum voltage rating for VIN and VBIAS
.
50
VBIAS = 2.5V
VBIAS = 3.3V
VBIAS = 3.6V
VBIAS= 4.2V
VBIAS = 5V
45
40
35
30
25
20
15
VBIAS = 5.5V
Temperature=25C, IOUT=−200mA
0.8 1.2 1.6
2
2.4 2.8 3.2 3.6
VIN (V)
4
4.4 4.8 5.2 5.6
G062
Figure 3. RON vs. VIN (VIN > VBIAS
)
16
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ADJUSTABLE RISE TIME
A capacitor to GND on the CT pins sets the slew rate for each channel. The voltage on the CT pin can be as
high as 12V. Therefore, the minimum voltage rating for the CT cap should be 25V for optimal performance. An
approximate formula for the relationship between CT and slew rate is (the equation below accounts for 10% to
90% measurement on VOUT and does NOT apply for CT = 0pF. Use table below to determine rise times for when
CT = 0pF):
SR = 0.39´CT +13.4
(1)
Where,
SR = slew rate (in µs/V)
CT = the capacitance value on the CT pin (in pF)
The units for the constant 13.4 is in µs/V. The units for the constant 0.39 are in µs/(V*pF).
Rise time can be calculated by multiplying the input voltage by the slew rate. The table below contains rise time
values measured on a typical device. Rise times shown below are only valid for the power-up sequence where
VIN and VBIAS are already in steady state condition, and the ON pin is asserted high.
RISE TIME (µs) 10% - 90%, CL = 0.1µF, CIN = 1µF, RL = 10Ω
TYPICAL VALUES at 25°C, 25V X7R 10% CERAMIC CAP
CTx (pF)
5V
127
3.3V
93
1.8V
62
1.5V
55
1.2V
51
1.05V
46
0.8V
42
0
220
475
314
188
162
141
125
103
188
344
681
1568
3449
470
939
637
359
304
255
218
1000
2200
4700
10000
1869
4020
8690
18360
1229
2614
5746
12550
684
567
476
414
1469
3167
6849
1211
2703
5836
1024
2139
4782
876
1877
4089
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BOARD LAYOUT AND THERMAL CONSIDERATIONS
For best performance, all traces should be as short as possible. To be most effective, the input and output
capacitors should be placed close to the device to minimize the effects that parasitic trace inductances may have
on normal operation. Using wide traces for VIN, VOUT, and GND helps minimize the parasitic electrical effects
along with minimizing the case to ambient thermal impedance.
The maximum IC junction temperature should be restricted to 125°C under normal operating conditions. To
calculate the maximum allowable dissipation, PD(max) for a given output current and ambient temperature, use the
following equation as a guideline:
T
J(max) - TA
P
=
D(max)
QJA
(2)
Where:
PD(max) = maximum allowable power dissipation
TJ(max) = maximum allowable junction temperature (125°C for the TPS22965)
TA = ambient temperature of the device
ΘJA = junction to air thermal impedance. See Thermal Information section. This parameter is highly
dependent upon board layout.
The figure below shows an example of a layout. Notice the thermal vias located under the exposed thermal pad
of the device. This allows for thermal diffusion away from the device.
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PACKAGE OPTION ADDENDUM
www.ti.com
17-Aug-2012
PACKAGING INFORMATION
Status (1)
Eco Plan (2)
MSL Peak Temp (3)
Samples
Orderable Device
Package Type Package
Drawing
Pins
Package Qty
Lead/
Ball Finish
(Requires Login)
TPS22965DSGR
TPS22965DSGT
PREVIEW
PREVIEW
WSON
WSON
DSG
DSG
8
8
3000
250
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
31-Aug-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TPS22965DSGR
WSON
DSG
8
3000
330.0
8.4
2.3
2.3
1.15
4.0
8.0
Q2
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
31-Aug-2012
*All dimensions are nominal
Device
Package Type Package Drawing Pins
WSON DSG
SPQ
Length (mm) Width (mm) Height (mm)
367.0 367.0 35.0
TPS22965DSGR
8
3000
Pack Materials-Page 2
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