TPS22965NTDSGRQ1 [TI]

具有可调节上升时间和输出放电功能的单通道、5.7V、4A、16mΩ 汽车负载开关 | DSG | 8 | -40 to 105;


型号：	TPS22965NTDSGRQ1
厂家：	TEXAS INSTRUMENTS
描述：	具有可调节上升时间和输出放电功能的单通道、5.7V、4A、16mΩ 汽车负载开关 \| DSG \| 8 \| -40 to 105 开关
文件：	总34页 (文件大小：2581K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

TPS22965-Q1

ZHCSCB9E –APRIL 2014 –REVISED JULY 2022

TPS22965x-Q1 5.5V、4A、16mΩ 导通电阻汽车负载开关

1 特性

3 说明

• 符合汽车应用要求

TPS22965x-Q1 是一款具有受控导通功能的小型、超

低R_ON单通道负载开关。该器件包含一个可在0.8V 至

5.5V 输入电压范围内运行的 N 沟道 MOSFET，并且

支持 4A 的最大持续电流。VOUT 上升时间是可配置

的，因此可以减小浪涌电流。TPS22965-Q1 和

TPS22965W-Q1 器件包括一个 225Ω 片上负载电阻，

用于在开关关闭时快速输出放电。

– 符合AEC-Q100 标准

– 器件温度等级2：–40°C 至+105°C

（TPS22965-Q1、TPS22965N-Q1）

– 器件温度等级1：–40°C 至+125°C

(TPS22965W-Q1、TPS22965NW-Q1)

– 器件HBM ESD 分类等级3A

– 器件CDM ESD 分类等级C6

• 提供功能安全

TPS22965x-Q1 器件采用节省空间的 2mm × 2mm 8

引脚 WSON 小型封装 (DSG0008A)，带有集成散热焊

盘，可实现较高的功率耗散。TPS22965-Q1 和

TPS22965N-Q1 器件可在 –40°C 至 +105°C 的自然

通风温度范围内正常运行。此外，TPS22965W-Q1 和

TPS22965NW-Q1 器件采用相同的 WSON 封装

(DSG0008B)，具有可湿性侧面。其可在 –40°C 至

+125°C 的自然通风温度范围内正常工作。

– 可帮助进行功能安全系统设计的文档

• 集成型单通道负载开关

• 输入电压范围：0.8V 至5.5V

• 超低导通电阻(R_ON

)

– V_IN= 5V (V_BIAS= 5V) 时，R_ON= 16mΩ

– V_IN= 3.6V (V_BIAS= 5V) 时，R_ON= 16mΩ

– V_IN= 1.8V (V_BIAS= 5V) 时，R_ON= 16mΩ

• 4A 最大连续开关电流

器件信息⁽¹⁾

封装尺寸（标称值）

器件型号

TPS22965-Q1

封装

• 低静态电流(50µA)

• 低控制输入阈值支持使用

1.2V、1.8V、2.5V 和3.3V 逻辑器件

• 可配置上升时间

• 快速输出放电(QOD)（仅限TPS22965-Q1 和

TPS22965W-Q1）

• 带有散热焊盘的WSON 8 引脚封装

DSG0008A

WSON (8)

TPS22965N-Q1

TPS22965W-Q1

TPS22965NW-Q1

2.00mm × 2.00mm

DSG0008B

WSON (8)

(1) 如需了解所有可用封装，请参阅数据表末尾的可订购产品附

录。

2 应用

• 汽车电子产品

• 信息娱乐系统

• 高级驾驶辅助系统(ADAS)

VOUT

-40èC

VIN

Power

Supply

25èC

105èC

125èC

OFF

GND

VBIAS

TPS22965x-Q1

简化版原理图

0.5

1.5

2.5 3

V_IN(V)

3.5

4.5

5.5

D008

R_ON与V_IN之间的关系（V_BIAS= 5V，I_OUT= –

200mA）

本文档旨在为方便起见，提供有关TI 产品中文版本的信息，以确认产品的概要。有关适用的官方英文版本的最新信息，请访问

www.ti.com，其内容始终优先。TI 不保证翻译的准确性和有效性。在实际设计之前，请务必参考最新版本的英文版本。

English Data Sheet: SLVSCI3

TPS22965-Q1

ZHCSCB9E –APRIL 2014 –REVISED JULY 2022

www.ti.com.cn

Table of Contents

9.3 Feature Description...................................................17

9.4 Device Functional Modes..........................................17

10 Application and Implementation................................18

10.1 Application Information........................................... 18

10.2 Typical Application.................................................. 19

11 Power Supply Recommendations..............................21

12 Layout...........................................................................21

12.1 Layout Guidelines................................................... 21

12.2 Layout Example...................................................... 21

12.3 Thermal Consideration............................................21

13 Device and Documentation Support..........................22

13.1 Documentation Support.......................................... 22

13.2 接收文档更新通知................................................... 22

13.3 支持资源..................................................................22

13.4 Trademarks.............................................................22

13.5 Electrostatic Discharge Caution..............................22

13.6 术语表..................................................................... 22

14 Mechanical, Packaging, and Orderable

1 特性................................................................................... 1

2 应用................................................................................... 1

3 说明................................................................................... 1

4 Revision History.............................................................. 2

5 Device Comparison Table...............................................3

6 Pin Configuration and Functions...................................3

7 Specifications.................................................................. 4

7.1 Absolute Maximum Ratings........................................ 4

7.2 ESD Ratings............................................................... 4

7.3 Recommended Operating Conditions.........................4

7.4 Thermal Information....................................................5

7.5 Electrical Characteristics—V_BIAS= 5 V.......................5

7.6 Electrical Characteristics—V_BIAS= 2.5 V....................7

7.7 Switching Characteristics............................................9

7.8 Typical Characteristics..............................................10

8 Parameter Measurement Information..........................15

9 Detailed Description......................................................16

9.1 Overview...................................................................16

9.2 Functional Block Diagram.........................................16

Information.................................................................... 22

4 Revision History

注：以前版本的页码可能与当前版本的页码不同

Changes from Revision D (December 2019) to Revision E (July 2022)

Page

• 更新了整个文档中的表格、图和交叉参考的编号格式.........................................................................................1

• 在文档标题中添加了“汽车”一词......................................................................................................................1

• Updated the ESD Ratings table for automotive devices.....................................................................................4

• Added line item in the Recommended Operating Conditions table for VIL voltage at VBIAS = 2 V to 2.5 V......4

• Added line item in Electrical Characteristics—V_BIAS= 2 V to 2.5 V for QOD resistance at VBIAS = 2 V...........7

• Expanded VBIAS minimum rating from 2.5 V to 2 V.......................................................................................... 7

Changes from Revision C (September 2016) to Revision D (December 2019)

Page

• 向特性部分添加了“提供功能安全”链接..........................................................................................................1

Changes from Revision B (December 2015) to Revision C (September 2016)

Page

• 向说明部分和热性能信息表添加了封装标识符..................................................................................................1

Changes from Revision A (June 2015) to Revision B (December 2015)

Page

• 将TPS22965W-Q1 器件的状态更新为“正在供货”..........................................................................................1

• Added 125°C temperature performance to typical AC timing parameters........................................................12

Changes from Revision * (April 2014) to Revision A (June 2015)

Page

• 添加了TPS22965N-Q1 器件型号.......................................................................................................................1

• Updated Thermal Information table.................................................................................................................... 5

• Updated typical AC timing parameters (tables, graphs and scope captures) ..................................................12

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5 Device Comparison Table

PACKAGE WITH

WETTABLE

FLANKS

QUICK OUTPUT

DISCHARGE

MAXIMUM OUTPUT

CURRENT

TEMPERATURE

RANGE

DEVICE

R_ONAT 3.3 V (TYP)

TPS22965-Q1

TPS22965N-Q1

TPS22965W-Q1

TPS22965NW-Q1

Yes

4 A

16 mΩ

–40°C to +105°C

–40°C to +125°C

Yes

6 Pin Configuration and Functions

VIN

VOUT

Thermal

Pad

VBIAS

GND

图6-1. DSG Package 8-Pin WSON with Exposed Thermal Pad Top View

表6-1. Pin Functions

I/O

DESCRIPTION

NO.

NAME

Switch input. Input bypass capacitor recommended for minimizing V_INdip. Must be connected to

Pin 1 and Pin 2. See the Application and Implementation section for more information

VIN

VBIAS

GND

Active high switch control input. Do not leave floating

Bias voltage. Power supply to the device. Recommended voltage range for this pin is 2 V to 5.5

V. See the Application and Implementation section for more information

Device ground

—

Switch slew rate control. Can be left floating. See the Application and Implementation section for

more information

VOUT

Switch output

Thermal pad (exposed center pad) to alleviate thermal stress. Tie to GND. See the Layout

section for layout guidelines

Thermal pad

—

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7 Specifications

7.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)^{(1) (2)}

MIN

MAX

UNIT ⁽²⁾

V_IN

Input voltage

–0.3

V_OUT

V_BIAS

V_ON

I_MAX

I_PLS

T_J

Output voltage

Bias voltage

On voltage

Maximum continuous switch current

Maximum pulsed switch current, pulse < 300 µs, 2% duty cycle

Maximum junction temperature

Storage temperature

150

°C

T_STG

–65

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under

Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device

reliability.

(2) All voltage values are with respect to network ground pin.

7.2 ESD Ratings

VALUE

UNIT

Human body model (HBM), per AEC Q100- 002 ⁽¹⁾

HBM classification level 3A

±4000

V_(ESD)

Electrostatic discharge

Charged device model (CDM), per AEC Q100- 011

CDM classification level C6

±1500

(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

7.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

MIN

MAX UNIT

V_IN

Input voltage

0.8 V_BIAS

V_BIAS

V_ON

V_OUT

V_IH

Bias voltage

5.5

ON voltage

Output voltage

High-level input voltage, ON

V_IN

V_BIAS= 2.5 V to 5.5 V

V_BIAS= 2 V to 2.5 V

1.2

5.5

0.5

V_IL

C_IN

T_A

Low-level input voltage, ON

Input capacitor

0.45

1 ⁽¹⁾

–40

µF

TPS22965N-Q1, TPS22965-Q1

105

125

Operating free-air temperature ⁽²⁾

°C

TPS22965NW-Q1, TPS22965W-Q1

(1) See the Application and Implementation section.

(2) In applications where high power dissipation, poor package thermal resistance is present, the maximum ambient temperature can be

derated. Maximum ambient temperature [T_A(max)] is dependent on the maximum operating junction temperature [T_J(max)], the maximum

power dissipation of the device in the application [P_D(max)], and the junction-to-ambient thermal resistance of the part, package in the

application (R_JθA), as given by the following equation: T_A(max)= T_J(max)–(R_θJA× P_D(max)).

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7.4 Thermal Information

TPS22965-Q1, TPS22965N-Q1

TPS22965W-Q1, TPS22965NW-Q1

THERMAL METRIC⁽¹⁾

DSG0008A (WSON)

DSG0008B (WSON)

UNIT

8 PINS

72.3

96.1

42.1

3.3

8 PINS

67.6

R_θJA

Junction-to-ambient thermal resistance

Junction-to-case (top) thermal resistance

Junction-to-board thermal resistance

°C/W

R_θJC(top)

R_θJB

37.4

2.9

Junction-to-top characterization parameter

Junction-to-board characterization parameter

Junction-to-case (bottom) thermal resistance

ψ_JT

42.5

13.2

37.7

ψ_JB

R_θJC(bot)

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report.

7.5 Electrical Characteristics—V_BIAS= 5 V

Unless otherwise noted, the specification in the following table applies over the operating ambient temperature:

–40°C ≤T_A≤+105°C (TPS22965N-Q1, TPS22965-Q1), –40°C ≤T_A≤+125°C (TPS22965NW-Q1, TPS22965W-Q1).

Typical values are for T_A= 25°C.

PARAMETER

TEST CONDITIONS

T_A

MIN

TYP MAX UNIT

POWER SUPPLIES AND CURRENTS

–40°C to +105°C

–40°C to +125°C

–40°C to +105°C

–40°C to +125°C

–40°C to +105°C

–40°C to +125°C

–40°C to +105°C

–40°C to +125°C

–40°C to +105°C

–40°C to +125°C

–40°C to +105°C

–40°C to +125°C

–40°C to +105°C

–40°C to +125°C

I_OUT= 0 mA,

V_IN= V_ON= V_BIAS= 5 V

I_QV_BIAS

V_BIASquiescent current

V_BIASshutdown current

µA

I_SDV_BIAS

V_ON= GND, V_OUT= 0 V

0.2

0.02

V_IN= 5 V

V_IN= 3.3 V

V_IN= 1.8 V

V_IN= 0.8 V

V_ON= GND,

V_OUT= 0 V

I_SDV_IN

V_INoff-state supply current

µA

0.01

0.005

0.5

I_ON

ON pin input leakage current V_ON= 5.5 V

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7.5 Electrical Characteristics—V_BIAS= 5 V (continued)

Unless otherwise noted, the specification in the following table applies over the operating ambient temperature:

–40°C ≤T_A≤+105°C (TPS22965N-Q1, TPS22965-Q1), –40°C ≤T_A≤+125°C (TPS22965NW-Q1, TPS22965W-Q1).

Typical values are for T_A= 25°C.

PARAMETER

TEST CONDITIONS

T_A

MIN

TYP MAX UNIT

RESISTANCE CHARACTERISTICS

25°C

–40°C to +105°C

965N-Q1, 965-Q1

V_IN= 5 V

mΩ

–40°C to +105°C

965NW-Q1, 965W-Q1

–40°C to +125°C

25°C

–40°C to +105°C

965N-Q1, 965-Q1

V_IN= 3.3 V

V_IN= 1.8 V

V_IN= 1.5 V

V_IN= 1.2 V

V_IN= 0.8 V

–40°C to +105°C

965NW-Q1, 965W-Q1

–40°C to +125°C

25°C

–40°C to +105°C

965N-Q1, 965-Q1

–40°C to +105°C

965NW-Q1, 965W-Q1

–40°C to +125°C

I_OUT= –200 mA,

V_BIAS= 5 V

R_ON

ON-state resistance

25°C

–40°C to +105°C

965N-Q1, 965-Q1

–40°C to +105°C

965NW-Q1, 965W-Q1

–40°C to +125°C

25°C

–40°C to +105°C

965N-Q1, 965-Q1

–40°C to +105°C

965NW-Q1, 965W-Q1

–40°C to +125°C

25°C

–40°C to +105°C

965N-Q1, 965-Q1

mΩ

–40°C to +105°C

965NW-Q1, 965W-Q1

–40°C to +125°C

–40°C to +105°C

–40°C to +125°C

225 300

(1)

R_PD

Output pulldown resistance

V_IN= 5 V, V_ON= 0 V, I_OUT= 1 mA

Ω

(1) TPS22965-Q1 and TPS22965W-Q1 only.

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7.6 Electrical Characteristics—V_BIAS= 2.5 V

Unless otherwise noted, the specification in the following table applies over the operating ambient temperature:

–40°C ≤T_A≤+105°C (TPS22965N-Q1, TPS22965-Q1), –40°C ≤T_A≤+125°C (TPS22965NW-Q1, TPS22965W-Q1).

Typical values are for T_A= 25°C.

PARAMETER

TEST CONDITIONS

T_A

MIN

TYP MAX UNIT

POWER SUPPLIES AND CURRENTS

–40°C to +105°C

–40°C to 125°C

–40°C to +105°C

–40°C to 125°C

–40°C to +105°C

–40°C to 125°C

–40°C to +105°C

–40°C to 125°C

–40°C to +105°C

–40°C to 125°C

–40°C to +105°C

–40°C to 125°C

–40°C to +105°C

–40°C to +125°C

I_OUT= 0 mA,

V_IN= V_ON= V_BIAS= 2.5 V

I_QV_BIAS

V_BIASquiescent current

V_BIASshutdown current

µA

I_SDV_BIAS

V_ON= GND, V_OUT= 0 V

0.01

V_IN= 2.5 V

V_IN= 1.8 V

V_IN= 1.2 V

V_IN= 0.8 V

V_ON= GND,

V_OUT= 0 V

I_SDV_IN

V_INoff-state supply current

µA

0.005

0.003

0.5

I_ON

ON pin input leakage current V_ON= 5.5 V

RESISTANCE CHARACTERISTICS

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7.6 Electrical Characteristics—V_BIAS= 2.5 V (continued)

Unless otherwise noted, the specification in the following table applies over the operating ambient temperature:

–40°C ≤T_A≤+105°C (TPS22965N-Q1, TPS22965-Q1), –40°C ≤T_A≤+125°C (TPS22965NW-Q1, TPS22965W-Q1).

Typical values are for T_A= 25°C.

PARAMETER

TEST CONDITIONS

T_A

MIN

TYP MAX UNIT

25°C

–40°C to +105°C

965N-Q1, 965-Q1

V_IN= 2.5 V

mΩ

–40°C to 105°C

965NW-Q1, 965W-Q1

–40°C to +125°C

25°C

–40°C to +105°C

965N-Q1, 965-Q1

V_IN= 1.8 V

V_IN= 1.5 V

V_IN= 1.2 V

V_IN= 0.8 V

–40°C to +105°C

965NW-Q1, 965W-Q1

–40°C to +125°C

25°C

–40°C to +105°C

965N-Q1, 965-Q1

I_OUT= –200 mA,

V_BIAS= 2.5 V

R_ON

ON-state resistance

–40°C to +105°C

965NW-Q1/965W-Q1

–40°C to +125°C

25°C

–40°C to +105°C

965N-Q1, 965-Q1

–40°C to +105°C

965NW-Q1, 965W-Q1

–40°C to +125°C

25°C

–40°C to +105°C

965N-Q1, 965-Q1

–40°C to +105°C

965NW-Q1, 965W-Q1

–40°C to +125°C

–40°C to +105°C

–40°C to +125°C

275 325

330

V_BIAS= V_IN= 2.5 V, V_ON= 0 V, I_OUT

= 1 mA

Ω

(1)

R_PD

Output pulldown resistance

V_BIAS= V_IN= 2 V, V_ON= 0 V, I_OUT

1 mA

310 470

–40°C to +125°C

(1) TPS22965-Q1 and TPS22965W-Q1 only.

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7.7 Switching Characteristics

Over operating free-air temperature range (unless otherwise noted). These switching characteristics are only valid for the

power-up sequence where VIN and VBIAS are already in steady state condition before the ON pin is asserted high.

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX UNIT

V_IN= V_ON= V_BIAS= 5 V, T_A= 25°C (unless otherwise noted)

t_ON

t_OFF

t_R

Turn-on time

Turn-off time

V_OUTrise time

V_OUTfall time

ON delay time

1600

µs

R_L= 10 Ω, C_L= 0.1 µF, C_T= 1000 pF, C_IN= 1 µF

1985

t_F

t_D

660

V_IN= 0.8 V, V_ON= V_BIAS= 5 V, T_A= 25°C (unless otherwise noted)

t_ON

t_OFF

t_R

Turn-on time

Turn-off time

V_OUTrise time

V_OUTfall time

ON delay time

730

100

380

µs

R_L= 10 Ω, C_L= 0.1 µF, C_T= 1000 pF, C_IN= 1 µF

t_F

t_D

560

V_IN= 2.5 V, V_ON= 5 V, V_BIAS= 2.5 V, T_A= 25°C (unless otherwise noted)

t_ON

t_OFF

t_R

Turn-on time

Turn-off time

V_OUTrise time

V_OUTfall time

ON delay time

2435

µs

R_L= 10 Ω, C_L= 0.1 µF, C_T= 1000 pF, C_IN= 1 µF

2515

t_F

t_D

1230

V_IN= 0.8 V, V_ON= 5 V, V_BIAS= 2.5 V, T_A= 25°C (unless otherwise noted)

t_ON

t_OFF

t_R

Turn-on time

Turn-off time

V_OUTrise time

V_OUTfall time

ON delay time

1565

µs

R_L= 10 Ω, C_L= 0.1 µF, C_T= 1000 pF, C_IN= 1 µF

930

t_F

t_D

1110

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7.8 Typical Characteristics

7.8.1 Typical DC Characteristics

T_A= 125°C data is only applicable to TPS22965NW-Q1 and TPS22965W-Q1.

100

-40èC

25èC

105èC

125èC

-40èC

25èC

105èC

125èC

2.5

3.5

V_BIAS(V)

4.5

5.5

0.5

1.5

2.5

V_IN(V)

3.5

4.5

5.5

D001

D002

V_IN= 1.8 V

V_ON= 5 V

V_OUT= 0 V

V_BIAS= 5 V

V_ON= 5 V

V_OUT= 0 V

图7-1. V_BIASQuiescent Current vs V_BIAS

图7-2. I_QV_BIASvs V_IN

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

-40èC

25èC

105èC

125èC

-40èC

25èC

105èC

125èC

-1

2.5

3.5

V_BIAS(V)

4.5

5.5

0.5

1.5

2.5 3

V_IN(V)

3.5

4.5

5.5

D003

D004

V_IN= 5 V

V_ON= 0 V

V_OUT= 0 V

V_BIAS= 5 V

V_ON= 0 V

V_OUT= 0 V

图7-3. I_SDV_BIASvs V_BIAS

图7-4. I_SDV_INvs V_IN

VIN = 0.8 V

VIN = 1.8 V

VIN = 2.5 V

VIN = 0.8 V

VIN = 3.3 V

VIN = 5 V

-50

Temperature (èC)

100

150

-50

Temperature (èC)

100

150

D005

D006

V_BIAS= 2.5 V

V_ON= 5.5 V

V_BIAS= 5 V

V_ON= 5.5 V

I_OUT= –200 mA

All three RON curves have the same

Note: All three R_ONcurves have the same values; therefore,

values and hence only one line is visible.

only one line is visible.

图7-5. R_ONvs Ambient Temperature

图7-6. R_ONvs Ambient Temperature

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7.8.1 Typical DC Characteristics (continued)

-40èC

25èC

105èC

125èC

25èC

105èC

125èC

0.5

1.5

V_IN(V)

2.5

0.5

1.5

2.5 3

V_IN(V)

3.5

4.5

5.5

D007

D008

V_BIAS= 2.5 V

V_ON= 5.5 V

V_BIAS= 5 V

图7-8. R_ONvs V_IN

V_ON= 5.5 V

I_OUT= –200 mA

图7-7. R_ONvs V_IN

320

300

280

260

240

220

200

-40èC

25èC

105èC

125èC

VIN = 0.8V

VIN = 1.8V

VIN = 2.5V

VIN = 3.3V

2.5

3.5

V_BIAS(V)

4.5

5.5

2.5

3.5

4.5

5.5

D011

V_BIAS(V)

C001

V_IN= 1.8 V

V_ON= 0 V

T_A= 25°C

图7-9. R_ONvs V_BIAS

V_ON= 5.5 V

I_OUT= –200 mA

图7-10. R_PDvs V_BIAS

2.5

-40°C

25°C

105°C

1.5

VBIAS = 2.5V

0.5

VBIAS = 3.3V

VBIAS = 5V

VBIAS = 5.5V

-0.5

0.5 0.6 0.7 0.8 0.9

1.1 1.2 1.3 1.4 1.5

0.5

1.5

2.5

V_ON(V)

V_IN(V)

C001

V_IN= 2 V

T_A= 25°C

V_BIAS= 2.5 V

图7-12. R_ONvs V_IN

V_ON= 5.5 V

I_OUT= –4 A

图7-11. V_OUTvs V_ON

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7.8.1 Typical DC Characteristics (continued)

-40°C

25°C

105°C

C001

V_IN(V)

V_BIAS= 5 V

V_ON= 5.5 V

I_OUT= –4 A

图7-13. R_ONvs V_IN

7.8.2 Typical Switching Characteristics

T_A= 25°C, C_T= 1000 pF, C_IN= 1 µF, C_L= 0.1 µF, R_L= 10 Ω(unless otherwise specified). T_A= 125°C data is only applicable

to TPS22965NW-Q1 and TPS22965W-Q1.

1600

1400

1200

1000

800

900

800

700

600

500

400

300

200

-40°C

25°C

-40°C

25°C

105°C

125°C

105°C

125°C

600

400

0.0

0.5

1.0

1.5

2.0

2.5

3.0

0.0

1.0

2.0

3.0

4.0

5.0

6.0

V_IN(V)

C001

V_BIAS= 2.5 V

CT = 1000 pF

V_BIAS= 5 V

CT = 1000 pF

图7-14. t_Dvs V_IN

图7-15. t_Dvs V_IN

-40°C

25°C

105°C

125°C

105°C

125°C

0.0

0.5

1.0

1.5

2.0

2.5

3.0

0.0

1.0

2.0

3.0

4.0

5.0

6.0

V_IN(V)

C001

V_BIAS= 2.5 V

CT = 1000 pF

V_BIAS= 5 V

CT = 1000 pF

图7-16. t_Fvs V_IN

图7-17. t_Fvs V_IN

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7.8.2 Typical Switching Characteristics (continued)

120

160

140

120

100

-40°C

25°C

100

105°C

125°C

105°C

125°C

0.0

0.5

1.0

1.5

2.0

2.5

3.0

0.0

1.0

2.0

3.0

4.0

5.0

6.0

V_IN(V)

C001

V_BIAS= 2.5 V

CT = 1000 pF

V_BIAS= 5 V

CT = 1000 pF

Note: The 105°C and 125°C curves have

similar values; therefore, only one line is

visible.

similar values; therefore, only one line is

visible.

图7-18. t_OFFvs V_IN

图7-19. t_OFFvs V_IN

3500

3000

2500

2000

1500

1000

500

2000

1800

1600

1400

1200

1000

800

-40°C

25°C

-40°C

25°C

105°C

125°C

105°C

125°C

600

400

200

0.0

0.5

1.0

1.5

2.0

2.5

3.0

0.0

1.0

2.0

3.0

4.0

5.0

6.0

V_IN(V)

C001

V_BIAS= 2.5 V

CT = 1000 pF

V_BIAS= 5 V

CT = 1000 pF

图7-20. t_ONvs V_IN

图7-21. t_ONvs V_IN

3500

3000

2500

2000

1500

1000

500

2500

2000

1500

1000

500

-40°C

25°C

-40°C

25°C

105°C

125°C

105°C

125°C

0.0

0.5

1.0

1.5

2.0

2.5

3.0

0.0

1.0

2.0

3.0

4.0

5.0

6.0

V_IN(V)

C001

V_BIAS= 2.5 V

CT = 1000 pF

V_BIAS= 5 V

CT = 1000 pF

Note: The 105°C and 125°C curves have similar values;

therefore, only one line is visible.

图7-22. t_Rvs V_IN

图7-23. t_Rvs V_IN

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7.8.2 Typical Switching Characteristics (continued)

V_IN= 0.8 V

C_L= 0.1 µF

V_BIAS= 2.5 V

C_IN= 1 µF

V_IN= 0.8 V

C_L= 0.1 µF

V_BIAS= 5 V

C_IN= 1 µF

CT = 1000 pF

R_L= 10 Ω

图7-24. Turn-On Response Time

图7-25. Turn-On Response Time

V_IN= 2.5 V

C_L= 0.1 µF

V_BIAS= 2.5 V

C_IN= 1 µF,

V_IN= 5 V

V_BIAS= 5 V

C_IN= 1 µF

CT = 1000 pF

C_L= 0.1 µF

R_L= 10 Ω

图7-26. Turn-On Response Time

图7-27. Turn-On Response Time

V_IN= 0.8 V

C_L= 0.1 µF

V_BIAS= 2.5 V

C_IN= 1 µF

V_IN= 0.8 V

C_L= 0.1 µF

V_BIAS= 5 V

C_IN= 1 µF

R_L= 10 Ω

图7-28. Turn-Off Response Time

图7-29. Turn-Off Response Time

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7.8.2 Typical Switching Characteristics (continued)

V_IN= 2.5 V

C_L= 0.1 µF

V_BIAS= 2.5 V

C_IN= 1 µF

V_IN= 5 V

V_BIAS= 5 V

C_IN= 1 µF

C_L= 0.1 µF

R_L= 10 Ω

R_L= 10 Ω)

图7-30. Turn-Off Response Time

图7-31. Turn-Off Response Time

8 Parameter Measurement Information

VIN

VOUT

C_IN= 1 µF

C_L

–

(A)

R_L

OFF

VBIAS

GND

TPS22965x-Q1

GND

A. Rise and fall times of the control signal are 100 ns.

图8-1. Test Circuit

V_ON

50%

t_F

t_OFF

t_R

V_OUT

t_ON

90%

V_OUT

50%

10%

t_D

图8-2. t_ONand t_OFFWaveforms

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9 Detailed Description

9.1 Overview

The TPS22965x-Q1 is a single-channel, 4-A load switch in an 8-pin WSON package. To reduce the voltage drop

in high current rails, the device implements an ultra-low resistance N-channel MOSFET. The device has a

programmable slew rate for applications that require specific rise time.

The device has very low leakage current during OFF state. This low leakage prevents downstream circuits from

pulling high standby current from the supply. Integrated control logic, driver, power supply, and output discharge

FET eliminates the need for any external components, which reduces solution size and BOM count.

9.2 Functional Block Diagram

VIN

Charge

Pump

VBIAS

Control

Logic

VOUT

TPS22965-Q1 and

TPS22965W-Q1 Only

GND

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9.3 Feature Description

9.3.1 Adjustable Rise Time

A capacitor to GND on the CT pin sets the slew rate. The voltage on the CT pin can be as high as 12 V.

Therefore, the minimum voltage rating for the CT cap must be 25 V for optimal performance. The below

equations shows an approximate formula for the relationship between CT and slew rate when V_BIASis set to 5 V.

This equation accounts for 10% to 90% measurement on V_OUTand does not apply for CT = 0 pF. Use the below

equation to determine rise times for when CT = 0 pF.

SR = 0.38´CT + 34

(1)

where

• SR = slew rate (in µs/V).

• CT = the capacitance value on the CT pin (in pF).

• The units for the constant 34 are µs/V. The units for the constant 0.38 are µs/(V × pF).

Rise time can be calculated by multiplying the input voltage by the slew rate. 表 9-1 contains rise time values

measured on a typical device. The rise times listed in 表 9-1 are only valid for the power-up sequence where V_IN

and V_BIASare already in steady state condition before the ON pin is asserted high.

表9-1. Rise Time vs CT Capacitor

RISE TIME (µs) 10% - 90%, C_L= 0.1 µF, C_IN= 1 µF, R_L= 10 Ω, V_BIAS= 5 V ⁽¹⁾

CT (pF)

VIN = 5 V

180

VIN = 3.3 V

136

VIN = 1.8 V

VIN = 1.5 V

VIN = 1.2 V

VIN = 1.05 V

VIN = 0.8 V

220

547

378

232

202

173

157

129

470

962

654

386

333

282

252

206

1000

2200

4700

10000

1983

4013

8207

17700

1330

2693

5490

11767

765

647

533

476

382

1537

3137

6697

1310

2693

5683

1077

2200

4657

959

766

1970

4151

1590

3350

(1) Typical Values at 25°C with a 25-V X7R 10% Ceramic Capacitor on CT

9.3.2 Quick Output Discharge (TPS22965-Q1 and TPS22965W-Q1 Only)

The TPS22965-Q1 and TPS22965W-Q1 include a Quick Output Discharge (QOD) feature. When the switch is

disabled, a discharge resistor is connected between VOUT and GND. This resistor has a typical value of 225 Ω

and prevents the output from floating while the switch is disabled.

9.3.3 Low Power Consumption During OFF State

The I_SDV_INsupply current is 0.01-µA typical at 1.8 V VIN. Typically, the downstream loads must have a

significantly higher off-state leakage current. The load switch allows system standby power consumption to be

reduced.

9.4 Device Functional Modes

The below table lists the VOUT pin state as determined by the ON pin.

表9-2. Functional Table

TPS22965N-Q1 AND

TPS22965NW-Q1

TPS22965-Q1 AND

TPS22965W-Q1

Open

VIN

GND

VIN

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10 Application and Implementation

备注

以下应用部分中的信息不属于TI 器件规格的范围，TI 不担保其准确性和完整性。TI 的客户应负责确定

器件是否适用于其应用。客户应验证并测试其设计，以确保系统功能。

10.1 Application Information

This section highlights some of the design considerations when implementing this device in various applications.

A PSPICE model for this device is also available in the product page of this device on www.ti.com for further aid.

10.1.1 VIN to VOUT Voltage Drop

The VIN to VOUT voltage drop in the device is determined by the R_ONof the device and the load current. The

R_ONof the device depends upon the V_INand V_BIASconditions of the device. Refer to the R_ONspecification of the

device in the Electrical Characteristics—V_BIAS= 2 V to 2.5 V table of this data sheet. After the R_ONof the device

is determined based upon the V_INand V_BIASconditions, use the following equation to calculate the VIN to VOUT

voltage drop.

DV = I_LOAD´R_ON

(2)

where

• ΔV = voltage drop from VIN to VOUT.

• I_LOAD= load current.

• R_ON= On-resistance of the device for a specific V_INand V_BIAScombination.

An appropriate I_LOADmust be chosen such that the I_MAXspecification of the device is not violated.

10.1.2 On and Off Control

The ON pin controls the state of the switch. ON is active high and has a low threshold, making it capable of

interfacing with low-voltage signals. The ON pin is compatible with standard GPIO logic thresholds. The ON pin

can be used with any microcontroller with 1.2 V or higher GPIO voltage. This pin cannot be left floating and must

be driven either high or low for proper functionality.

10.1.3 Input Capacitor (Optional)

To limit the voltage drop on the input supply caused by transient inrush currents when the switch turns on into a

discharged load capacitor or short circuit, a capacitor must be placed between VIN and GND. A 1-µF ceramic

capacitor, C_IN, placed close to the pins, is usually sufficient. Higher values of C_INcan be used to further reduce

the voltage drop during high current applications. When switching heavy loads, TI recommends to have an input

capacitor about 10 times higher than the output capacitor to avoid excessive voltage drop.

10.1.4 Output Capacitor (Optional)

Due to the integrated body diode in the NMOS switch, TI highly recommends a C_{I N}greater than C_L. A C_L

greater than C_INcan cause V_OUTto exceed V_INwhen the system supply is removed. This event can result in

current flow through the body diode from V_OUTto V_IN. TI recommends a C_INto C_Lratio of 10 to 1 for minimizing

V_INdip caused by inrush currents during startup; however, a 10 to 1 ratio for capacitance is not required for

proper functionality of the device. A ratio smaller than 10 to 1 (such as 1 to 1) can cause slightly more V_INdip

upon turn-on due to inrush currents. This event can be mitigated by increasing the capacitance on the CT pin for

a longer rise time (see the Adjustable Rise Time section).

10.1.5 V_INand V_BIASVoltage Range

For optimal R_ONperformance, make sure V_IN≤ V_BIAS. The device is still functional if V_IN> V_BIASbut it exhibits

R_ONgreater than what is listed in the Electrical Characteristics—V_BIAS= 2 V to 2.5 V table. See the following

figure for an example of a typical device. Notice the increasing R_ONas V_INexceeds V_BIASvoltage. Be sure to

never exceed the maximum voltage rating for V_INand V_BIAS

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VBIAS = 2.5V

VBIAS = 3.3V

VBIAS = 5V

V_IN(V)

C001

T_A= 25°C

I_OUT= –200 mA

图10-1. R_ONvs V_IN(V_IN> V_BIAS

)

10.2 Typical Application

This application demonstrates how the TPS22965x-Q1 can be used to power downstream modules.

VOUT

VIN

Power Supply

OFF

GND

VBIAS

Power Supply

TPS22965x-Q1

图10-2. Schematic for Powering a Downstream Module

10.2.1 Design Requirements

Use the values listed in the following table as the design parameters.

表10-1. Design Parameters

DESIGN PARAMETER

EXAMPLE VALUE

V_IN

3.3 V

5 V

V_BIAS

C_L

22 µF

400 mA

Maximum acceptable inrush current

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10.2.2 Detailed Design Procedure

10.2.2.1 Inrush Current

When the switch is enabled, the output capacitors must be charged up from 0 V to the set value (3.3 V in this

example). This charge arrives in the form of inrush current. Use the following equation to calculate inrush

current.

Inrush Current = C × dV/dt

(3)

where

• C = output capacitance

• dV = output voltage

• dt = rise time

The TPS22965x-Q1 offers adjustable rise time for VOUT. This feature allows the user to control the inrush

current during turn-on. The appropriate rise time can be calculated using the design requirements and the inrush

current equation. See 方程式4 and 方程式5.

400 mA = 22 µF × 3.3 V / dt

dt = 181.5 µs

(4)

(5)

To ensure an inrush current of less than 400 mA, choose a CT value that yields a rise time of more than 181.5

µs. See the oscilloscope captures in the Application Curves section for an example of how the CT capacitor can

be used to reduce inrush current.

10.2.3 Application Curves

V_BIAS= 5 V

V_IN= 3.3 V

C_L= 22 µF

V_BIAS= 5 V

V_IN= 3.3 V

C_L= 22 µF

图10-3. Inrush Current with CT = 0 pF

图10-4. Inrush Current with CT = 220 pF

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11 Power Supply Recommendations

The device is designed to operate from a VBIAS range of 2 V to 5.5 V and a VIN range of 0.8 V to VBIAS.

12 Layout

12.1 Layout Guidelines

For best performance, all traces must be as short as possible. To be most effective, the input and output

capacitors must be placed close to the device to minimize the effects that parasitic trace inductances can have

on normal operation. Using wide traces for VIN, VOUT, and GND helps minimize the parasitic electrical effects

along with minimizing the case to ambient thermal impedance. The CT trace must be as short as possible to

avoid parasitic capacitance.

12.2 Layout Example

VIA to GND

Pin 1

VIN

VOUT

(1)

GND

VBIAS

GND

A. Thermal relief vias. Thermal relief vias connected to the exposed thermal pad.

图12-1. Layout Recommendation

12.3 Thermal Consideration

The maximum IC junction temperature must be restricted to 150°C under normal operating conditions. Use the

below equation as a guideline to calculate the maximum allowable dissipation, P_D(max), for a given output current

and ambient temperature.

T_J(max)- T_A

D(max)

θ_JA

(6)

where

• P_D(max)= maximum allowable power dissipation.

• T_J(max)= maximum allowable junction temperature (150°C for the TPS22965x-Q1).

• T_A= ambient temperature of the device.

• Θ_JA= junction to air thermal impedance. See the Thermal Information table. This parameter is highly

dependent upon board layout.

Refer to 图 12-1. Notice the thermal vias located under the exposed thermal pad of the device. The thermal vias

allow for thermal diffusion away from the device.

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13 Device and Documentation Support

13.1 Documentation Support

13.1.1 Related Documentation

For related documentation see the following:

• Texas Instruments, Load Switches: What Are They, Why Do You Need Them And How Do You Choose The

Right One? application note

• Texas Instruments, Load Switch Thermal Considerations application note

• Texas Instruments, Managing Inrush Current application note

• Texas Instruments, TPS22965WDSGQ1EVM 5.7-V, 4-A, 16-mΩOn-Resistance Load Switch user's guide

13.2 接收文档更新通知

要接收文档更新通知，请导航至 ti.com 上的器件产品文件夹。点击订阅更新进行注册，即可每周接收产品信息更

改摘要。有关更改的详细信息，请查看任何已修订文档中包含的修订历史记录。

13.3 支持资源

TI E2E^™支持论坛是工程师的重要参考资料，可直接从专家获得快速、经过验证的解答和设计帮助。搜索现有解

答或提出自己的问题可获得所需的快速设计帮助。

链接的内容由各个贡献者“按原样”提供。这些内容并不构成 TI 技术规范，并且不一定反映 TI 的观点；请参阅

TI 的《使用条款》。

13.4 Trademarks

TI E2E^™is a trademark of Texas Instruments.

所有商标均为其各自所有者的财产。

13.5 Electrostatic Discharge Caution

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled

with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may

be more susceptible to damage because very small parametric changes could cause the device not to meet its published

specifications.

13.6 术语表

TI 术语表

本术语表列出并解释了术语、首字母缩略词和定义。

14 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most-

current data available for the designated devices. This data is subject to change without notice and without

revision of this document. For browser-based versions of this data sheet, see the left-hand navigation pane.

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PACKAGE OPTION ADDENDUM

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23-Jun-2023

PACKAGING INFORMATION

Orderable Device

Status Package Type Package Pins Package

Eco Plan

Lead finish/

Ball material

MSL Peak Temp

Op Temp (°C)

Device Marking

Samples

Drawing

Qty

(1)

(2)

(3)

(4/5)

(6)

TPS22965NQWDSGRQ1

TPS22965NQWDSGTQ1

TPS22965NTDSGRQ1

TPS22965QWDSGRQ1

TPS22965QWDSGTQ1

TPS22965TDSGRQ1

TPS22965TDSGTQ1

ACTIVE

WSON

DSG

3000 RoHS & Green

250 RoHS & Green

Level-2-260C-1 YEAR

-40 to 125

-40 to 105

-40 to 125

-40 to 105

11B

ZDXI

11A

ZYE

Samples

NIPDAU

3000 RoHS & Green

250

3000 RoHS & Green

250 RoHS & Green

RoHS & Green

NIPDAU

⁽¹⁾The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

⁽²⁾RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance

do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may

reference these types of products as "Pb-Free".

RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.

Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based

flame retardants must also meet the <=1000ppm threshold requirement.

⁽³⁾MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

⁽⁴⁾There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

⁽⁵⁾Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation

of the previous line and the two combined represent the entire Device Marking for that device.

Addendum-Page 1

PACKAGE OPTION ADDENDUM

www.ti.com

23-Jun-2023

(6)

Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two

lines if the finish value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information

provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.

TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

OTHER QUALIFIED VERSIONS OF TPS22965-Q1 :

Catalog : TPS22965

•

NOTE: Qualified Version Definitions:

Catalog - TI's standard catalog product

•

Addendum-Page 2

PACKAGE MATERIALS INFORMATION

www.ti.com

23-Jun-2023

TAPE AND REEL INFORMATION

REEL DIMENSIONS

TAPE DIMENSIONS

Reel

Diameter

Cavity

A0 Dimension designed to accommodate the component width

B0 Dimension designed to accommodate the component length

K0 Dimension designed to accommodate the component thickness

Overall width of the carrier tape

P1 Pitch between successive cavity centers

Reel Width (W1)

QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE

Sprocket Holes

Q1 Q2

Q3 Q4

Q1 Q2

Q3 Q4

User Direction of Feed

Pocket Quadrants

*All dimensions are nominal

Device

Package Package Pins

Type Drawing

SPQ

Reel

Pin1

Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant

(mm) W1 (mm)

TPS22965NQWDSGRQ1 WSON

TPS22965NQWDSGTQ1 WSON

DSG

3000

250

179.0

180.0

179.0

180.0

8.4

2.2

2.3

2.2

2.3

2.2

2.3

2.2

2.3

1.2

4.0

8.0

TPS22965NTDSGRQ1

WSON

3000

250

1.15

1.2

TPS22965QWDSGRQ1 WSON

TPS22965QWDSGTQ1 WSON

1.2

TPS22965TDSGRQ1

TPS22965TDSGTQ1

WSON

3000

250

1.15

Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com

23-Jun-2023

TAPE AND REEL BOX DIMENSIONS

Width (mm)

*All dimensions are nominal

Device

Package Type Package Drawing Pins

SPQ

Length (mm) Width (mm) Height (mm)

TPS22965NQWDSGRQ1

TPS22965NQWDSGTQ1

TPS22965NTDSGRQ1

TPS22965QWDSGRQ1

TPS22965QWDSGTQ1

TPS22965TDSGRQ1

TPS22965TDSGTQ1

WSON

DSG

3000

250

213.0

210.0

213.0

210.0

191.0

185.0

191.0

185.0

35.0

3000

250

3000

250

Pack Materials-Page 2

GENERIC PACKAGE VIEW

DSG 8

2 x 2, 0.5 mm pitch

WSON - 0.8 mm max height

PLASTIC SMALL OUTLINE - NO LEAD

This image is a representation of the package family, actual package may vary.

Refer to the product data sheet for package details.

4224783/A

www.ti.com

PACKAGE OUTLINE

DSG0008B

WSON - 0.8 mm max height

SCALE 5.500

PLASTIC SMALL OUTLINE - NO LEAD

2.1

1.9

0.1 MIN

(0.05)

PIN 1 INDEX AREA

2.1

1.9

SECTION A-A

TYPICAL

0.3

0.2

0.4

0.2

ALTERNATIVE TERMINAL SHAPE

TYPICAL

0.8 MAX

SEATING PLANE

0.08 C

0.05

0.00

EXPOSED

THERMAL PAD

(0.2) TYP

0.9 0.1

6X 0.5

1.5

1.6 0.1

0.3

0.2

0.4

0.2

PIN 1 ID

0.1

0.05

C A B

4222124/E 05/2020

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing

per ASME Y14.5M.

2. This drawing is subject to change without notice.

3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance.

www.ti.com

EXAMPLE BOARD LAYOUT

DSG0008B

WSON - 0.8 mm max height

PLASTIC SMALL OUTLINE - NO LEAD

(0.9)

(

0.2) VIA

8X (0.5)

TYP

8X (0.25)

(0.55)

SYMM

(1.6)

6X (0.5)

SYMM

(1.9)

(R0.05) TYP

LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN

SCALE:20X

0.07 MIN

ALL AROUND

0.07 MAX

ALL AROUND

EXPOSED

METAL

EXPOSED

METAL

SOLDER MASK

OPENING

METAL

SOLDER MASK

OPENING

METAL UNDER

SOLDER MASK

NON SOLDER MASK

SOLDER MASK

DEFINED

(PREFERRED)

SOLDER MASK DETAILS

4222124/E 05/2020

NOTES: (continued)

4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature

number SLUA271 (www.ti.com/lit/slua271).

5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown

on this view. It is recommended that vias under paste be filled, plugged or tented.

www.ti.com

EXAMPLE STENCIL DESIGN

DSG0008B

WSON - 0.8 mm max height

PLASTIC SMALL OUTLINE - NO LEAD

8X (0.5)

METAL

SYMM

8X (0.25)

(0.45)

SYMM

(0.7)

6X (0.5)

(R0.05) TYP

(0.9)

(1.9)

SOLDER PASTE EXAMPLE

BASED ON 0.125 mm THICK STENCIL

EXPOSED PAD 9:

87% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE

SCALE:25X

4222124/E 05/2020

NOTES: (continued)

6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate

design recommendations.

www.ti.com

PACKAGE OUTLINE

DSG0008A

WSON - 0.8 mm max height

SCALE 5.500

PLASTIC SMALL OUTLINE - NO LEAD

2.1

1.9

0.32

0.18

PIN 1 INDEX AREA

2.1

1.9

0.4

0.2

ALTERNATIVE TERMINAL SHAPE

TYPICAL

0.8

0.7

SEATING PLANE

0.05

0.00

SIDE WALL

0.08 C

METAL THICKNESS

DIM A

OPTION 1

0.1

OPTION 2

0.2

EXPOSED

THERMAL PAD

(DIM A) TYP

0.9 0.1

6X 0.5

1.5

1.6 0.1

0.32

0.18

PIN 1 ID

(45 X 0.25)

0.4

0.2

0.1

C A B

0.05

4218900/E 08/2022

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing

per ASME Y14.5M.

2. This drawing is subject to change without notice.

3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance.

www.ti.com

EXAMPLE BOARD LAYOUT

DSG0008A

WSON - 0.8 mm max height

PLASTIC SMALL OUTLINE - NO LEAD

(0.9)

(

0.2) VIA

8X (0.5)

TYP

8X (0.25)

(0.55)

SYMM

(1.6)

6X (0.5)

SYMM

(1.9)

(R0.05) TYP

LAND PATTERN EXAMPLE

SCALE:20X

0.07 MIN

ALL AROUND

0.07 MAX

ALL AROUND

SOLDER MASK

OPENING

METAL

SOLDER MASK

OPENING

METAL UNDER

SOLDER MASK

NON SOLDER MASK

DEFINED

SOLDER MASK

DEFINED

(PREFERRED)

SOLDER MASK DETAILS

4218900/E 08/2022

NOTES: (continued)

4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature

number SLUA271 (www.ti.com/lit/slua271).

5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown

on this view. It is recommended that vias under paste be filled, plugged or tented.

www.ti.com

EXAMPLE STENCIL DESIGN

DSG0008A

WSON - 0.8 mm max height

PLASTIC SMALL OUTLINE - NO LEAD

8X (0.5)

METAL

SYMM

8X (0.25)

(0.45)

SYMM

(0.7)

6X (0.5)

(R0.05) TYP

(0.9)

(1.9)

SOLDER PASTE EXAMPLE

BASED ON 0.125 mm THICK STENCIL

EXPOSED PAD 9:

87% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE

SCALE:25X

4218900/E 08/2022

NOTES: (continued)

6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate

design recommendations.

www.ti.com

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邮寄地址：Texas Instruments, Post Office Box 655303, Dallas, Texas 75265

TPS22965NTDSGRQ1 [TI]

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