TPS22966DPUR [TI]
Dual Channel, Ultra-Low Resistance Load Switch; 双通道,超低电阻负载开关型号: | TPS22966DPUR |
厂家: | TEXAS INSTRUMENTS |
描述: | Dual Channel, Ultra-Low Resistance Load Switch |
文件: | 总26页 (文件大小:858K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
TPS22966
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SLVSBH4A –JUNE 2012–REVISED JULY 2012
Dual Channel, Ultra-Low Resistance Load Switch
Check for Samples: TPS22966
1
FEATURES
DESCRIPTION
•
•
•
Integrated dual channel load switch
Input voltage range: 0.8V to 5.5V
Ultra low RON resistance
The TPS22966 is a small, ultra-low RON, dual
channel load switch with controlled turn on. The
device contains two N-channel MOSFETs that can
operate over an input voltage range of 0.8V to 5.5V
and can support a maximum continuous current of 6A
per channel. Each switch is independently controlled
by an on/off input (ON1 and ON2), which is capable
of interfacing directly with low-voltage control signals.
In TPS22966, a 220-Ω on-chip load resistor is added
for quick output discharge when switch is turned off.
–
–
–
RON = 18mΩ at VIN = 5V (VBIAS = 5V)
RON = 18mΩ at VIN = 3.6V (VBIAS = 5V)
RON = 18mΩ at VIN = 1.8V (VBIAS = 5V)
•
•
6A maximum continuous switch current per
channel
Low quiescent current
The TPS22966 is available in a small, space-saving
2mm x 3mm 14-SON package (DPU) with integrated
thermal pad allowing for high power dissipation. The
device is characterized for operation over the free-air
temperature range of –40°C to 85°C.
–
–
80µA (both channels)
60µA (single channel)
•
Low control input threshold enables use of
1.2-V/1.8-V/2.5-V/3.3-V logic
•
•
•
•
Configurable rise time
Table 1. Feature List
Quick Output Discharge (QOD)
SON 14-pin package with Thermal Pad
ESD performance tested per JESD 22
RON TYPICAL at 3.6 V (VBIAS = 5V)
RISE TIME(1)
18 mΩ
Adjustable
Yes
QUICK OUTPUT DISCHARGE(2)
–
2KV HBM and 1KV CDM
MAXIMUM OUTPUT CURRENT (per
channel)
6 A
APPLICATIONS
GPIO ENABLE
Active High
OPERATING TEMP
–40°C to 85°C
•
•
•
•
•
•
•
Ultrabook™
(1) See Application Information section for CT value vs. rise time.
Notebooks/Netbooks
Tablet PC
(2) This feature discharges output of the switch to GND through a
220-Ω resistor, preventing the output from floating.
Consumer electronics
Set-top boxes/Residental gateways
Telecom systems
Solid State Drives (SSD)
VIN1
VOUT1
Dual
Power
Supply
OFF
CIN
ON1
CL
RL
CT1
CT2
ON
GND
or
VBIAS
Dual
DC/DC
converter
VIN2
VOUT2
OFF
CIN
ON2
CL
ON
GND
TPS22966
GND
Figure 1. Typical Application
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2012, Texas Instruments Incorporated
TPS22966
SLVSBH4A –JUNE 2012–REVISED JULY 2012
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION
TA
PACKAGE
ORDERABLE PART NO.
TOP-SIDE MARKING/STATUS
-40°C to 85°C
-40°C to 85°C
DPU
DPU
Tape and reel 3000 units
Tape and reel 250 units
TPS22966DPUR
RB966
RB966
TPS22966DPUT
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)(1)(2)
VALUE
–0.3 to 6
–0.3 to 6
–0.3 to 6
6
UNIT(2)
VIN1,2
VOUT1,2
VON1,2
IMAX
Input voltage range
V
V
Output voltage range
Input voltage range
V
Maximum continuous switch current
Maximum pulsed switch current, pulse <300 µs, 2% duty cycle
Operating free-air temperature range(3)
Maximum junction temperature
Storage temperature range
A
IPLS
8
A
TA
–40 to 85
125
°C
°C
°C
°C
TJ
TSTG
TLEAD
–65 to 150
300
Maximum lead temperature (10-s soldering time)
Human-Body Model (HBM)
2000
Electrostatic discharge
protection
ESD
V
Charged-Device Model (CDM)
1000
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to network ground terminal.
(3) In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may
have to be derated. Maximum ambient temperature [TA(max)] is dependent on the maximum operating junction temperature [TJ(max)], the
maximum power dissipation of the device in the application [PD(max)], and the junction-to-ambient thermal resistance of the part/package
in the application (θJA), as given by the following equation: TA(max) = TJ(max) – (θJA × PD(max)
)
THERMAL INFORMATION
TPS22966
THERMAL METRIC(1)
UNITS
DPU (14 PINS)
θJA
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
52.3
45.9
11.5
0.8
θJCtop
θJB
°C/W
ψJT
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
ψJB
11.4
6.9
θJCbot
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
2
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SLVSBH4A –JUNE 2012–REVISED JULY 2012
RECOMMENDED OPERATING CONDITIONS
MIN
MAX UNIT
VIN1,2
VBIAS
VON1,2
VOUT1,2
VIH
Input voltage range
Bias voltage range
0.8 VBIAS
V
V
2.5
0
5.5
VIN
VIN
5.5
0.5
ON voltage range
V
Output voltage range
High-level input voltage, ON
Low-level input voltage, ON
Input capacitor
V
VBIAS = 2.5 V to 5.5 V
VBIAS = 2.5 V to 5.5 V
1.2
0
V
VIL
V
CIN1,2
1(1)
µF
(1) Refer to Application Information section.
ELECTRICAL CHARACTERISTICS
Unless otherwise note the specification in the following table applies over the operating ambient temperature –40°C ≤ TA ≤
85°C (full) and VBIAS = 5.0 V. Typical values are for TA = 25°C. (unless otherwise noted)
PARAMETER
TEST CONDITIONS
TA
MIN TYP MAX UNIT
POWER SUPPLIES AND CURRENTS
IOUT1 = IOUT2 = 0,
VIN1,2 = VON1,2 = VBIAS = 5.0 V
VBIAS quiescent current (both
IIN(VBIAS-ON)
channels)
Full
80 120
µA
IOUT1 = IOUT2 = 0, VON2 = 0V
VIN1,2 = VON1 = VBIAS = 5.0 V
VBIAS quiescent current (single
IIN(VBIAS-ON)
channel)
Full
Full
60
µA
µA
IIN(VBIAS-OFF) VBIAS shutdown current
VON1,2 = GND, VOUT1,2 = 0 V
2
VIN1,2 = 5.0 V
2.1
0.3
8
3
2
1
1
VIN1,2 = 3.3 V
VIN1,2 = 1.8 V
VIN1,2 = 0.8 V
VON1,2 = GND,
VOUT1,2 = 0 V
VIN1,2 off-state supply current (per
IIN(VIN-OFF)
channel)
Full
Full
µA
µA
0.07
0.04
ION
ON pin input leakage current
VON = 5.5 V
RESISTANCE CHARACTERISTICS
25°C
Full
18
18
18
18
18
18
25
27
25
27
25
27
25
27
25
27
25
27
VIN = 5.0 V
VIN = 3.3 V
VIN = 1.8 V
VIN = 1.5 V
VIN = 1.2 V
VIN = 0.8 V
mΩ
mΩ
mΩ
mΩ
mΩ
25°C
Full
25°C
Full
IOUT = –200 mA,
VBIAS = 5.0 V
RON
ON-state resistance
25°C
Full
25°C
Full
25°C
Full
mΩ
RPD
Output pulldown resistance
VIN = 5.0 V, VON = 0V, IOUT = 15 mA
Full
220 300
Ω
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ELECTRICAL CHARACTERISTICS
Unless otherwise noted, the specification in the following table applies over the operating ambient temp –40°C ≤ TA ≤ 85°C
(full) and VBIAS = 2.5 V. Typical values are for TA = 25°C unless otherwise noted.
PARAMETER
TEST CONDITIONS
TA
MIN TYP MAX UNIT
POWER SUPPLIES AND CURRENTS
IOUT1 = IOUT2 = 0,
VIN1,2 = VON1,2 = VBIAS = 2.5 V
VBIAS quiescent current (both
IIN(VBIAS-ON)
channels)
Full
25
37
µA
IOUT1 = IOUT2 = 0, VON2 = 0V
VIN1,2 = VON1 = VBIAS = 2.5 V
VBIAS quiescent current (single
IIN(VBIAS-ON)
channel)
Full
Full
µA
µA
IIN(VBIAS-OFF) VBIAS shutdown current
VON1,2 = GND, VOUT1,2 = 0 V
2
3
2
2
1
1
VIN1,2 = 2.5 V
0.13
0.07
0.05
0.04
VIN1,2 = 1.8 V
VIN1,2 = 1.2 V
VIN1,2 = 0.8 V
VON1,2 = GND,
VOUT1,2 = 0 V
VIN1,2 off-state supply current (per
IIN(VIN-OFF)
channel)
Full
Full
µA
µA
ION
ON pin input leakage current
VON = 5.5 V
RESISTANCE CHARACTERISTICS
25°C
Full
22
21
20
20
19
28
30
28
30
27
29
27
29
27
29
VIN = 2.5 V
VIN = 1.8 V
VIN = 1.5 V
VIN = 1.2 V
VIN = 0.8 V
mΩ
mΩ
mΩ
mΩ
25°C
Full
25°C
Full
IOUT = –200 mA,
VBIAS = 2.5 V
RON
ON-state resistance
25°C
Full
25°C
Full
mΩ
RPD
Output pulldown resistance
VIN = 2.5 V, VON = 0V, IOUT = 1 mA
Full
260 300
Ω
4
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SLVSBH4A –JUNE 2012–REVISED JULY 2012
SWITCHING CHARACTERISTIC MEASUREMENT INFORMATION
VIN
VOUT
CIN = 1μF
ON
(A)
ON
CL
+
-
RL
OFF
VBIAS
GND
TPS22966
GND
GND
Single channel shown for clarity.
TEST CIRCUIT
VON
50%
50%
tf
tOFF
tr
tON
90%
90%
VOUT
VOUT
50%
50%
10%
10%
tD
tON/tOFF WAVEFORMS
(A)Rise and fall times of the control signal is 100ns.
Figure 2. Test Circuit and tON/tOFF Waveforms
SWITCHING CHARACTERISTICS
PARAMETER
TEST CONDITION
MIN
TYP
MAX UNIT
VIN = VON = VBIAS = 5 V, TA = 25ºC (unless otherwise noted)
tON
tOFF
tR
Turn-on time
Turn-off time
VOUT rise time
VOUT fall time
ON delay time
RL = 10-Ω, CL = 0.1 µF, CT = 1000 pF
RL = 10-Ω, CL = 0.1 µF, CT = 1000 pF
RL = 10-Ω, CL = 0.1 µF, CT = 1000 pF
RL = 10-Ω, CL = 0.1 µF, CT = 1000 pF
RL = 10-Ω, CL = 0.1 µF, CT = 1000 pF
1210
6
1370
2
µs
tF
tD
460
VIN = 0.8 V, VON = VBIAS = 5V, TA = 25ºC (unless otherwise noted)
tON
tOFF
tR
Turn-on time
Turn-off time
VOUT rise time
VOUT fall time
ON delay time
RL = 10-Ω, CL = 0.1 µF, CT = 1000 pF
RL = 10-Ω, CL = 0.1 µF, CT = 1000 pF
RL = 10-Ω, CL = 0.1 µF, CT = 1000 pF
RL = 10-Ω, CL = 0.1 µF, CT = 1000 pF
RL = 10-Ω, CL = 0.1 µF, CT = 1000 pF
550
170
325
16
µs
µs
µs
tF
tD
400
VIN = 2.5V, VON = 5 V, VBIAS = 2.5V, TA = 25ºC (unless otherwise noted)
tON
tOFF
tR
Turn-on time
Turn-off time
VOUT rise time
VOUT fall time
ON delay time
RL = 10-Ω, CL = 0.1 µF, CT = 1000 pF
RL = 10-Ω, CL = 0.1 µF, CT = 1000 pF
RL = 10-Ω, CL = 0.1 µF, CT = 1000 pF
RL = 10-Ω, CL = 0.1 µF, CT = 1000 pF
RL = 10-Ω, CL = 0.1 µF, CT = 1000 pF
2050
5
2275
2.5
tF
tD
990
VIN = 0.8 V, VON = 5 V, VBIAS = 2.5 V, TA = 25ºC (unless otherwise noted)
tON
tOFF
tR
Turn-on time
Turn-off time
VOUT rise time
VOUT fall time
ON delay time
RL = 10-Ω, CL = 0.1 µF, CT = 1000 pF
RL = 10-Ω, CL = 0.1 µF, CT = 1000 pF
RL = 10-Ω, CL = 0.1 µF, CT = 1000 pF
RL = 10-Ω, CL = 0.1 µF, CT = 1000 pF
RL = 10-Ω, CL = 0.1 µF, CT = 1000 pF
1300
130
875
16
tF
tD
870
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FUNCTIONAL BLOCK DIAGRAM
VIN1
Control
ON1
Logic
CT1
VBIAS
CT1
VOUT1
GND
Charge Pump
VOUT2
Control
Logic
ON2
VIN2
Figure 3. Functional Block Diagram
Table 2. FUNCTIONAL TABLE
ONx
L
VINx to VOUTx
VOUTx to GND
Off
On
On
Off
H
6
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SLVSBH4A –JUNE 2012–REVISED JULY 2012
DPU PACKAGE
14
1
1
14
VIN1
VIN1
VOUT1
VOUT1
VOUT1
VIN1
VIN1
VOUT1
1
1
1
1
ON
ON
CT
CT
GND
GND
VBIAS
ON2
VBIAS
ON2
2
2
CT
CT
VIN2
VIN2
VIN2
VIN2
VOUT2
VOUT2
VOUT2
VOUT2
Top View
Bottom View
PIN TABLE
TPS22966
PIN NAME
I/O
DESCRIPTION
DPU
1
VIN1
VIN1
I
Switch #1 input. Bypass this input with a ceramic capacitor to GND. Recommended voltage range for
this pin for optimal RON performance is 0.8V to VBIAS
.
2
I
Switch #1 input. Bypass this input with a ceramic capacitor to GND. Recommended voltage range for
this pin for optimal RON performance is 0.8V to VBIAS
.
3
4
ON1
I
I
Active high switch #1 control input. Do not leave floating.
VBIAS
Bias voltage. Power supply to the device. Recommended voltage range for this pin is 2.5V to 5.5V.
See Application Information section.
5
6
ON2
VIN2
I
I
Active high switch #2 control input. Do not leave floating.
Switch #2 input. Bypass this input with a ceramic capacitor to GND. Recommended voltage range for
this pin for optimal RON performance is 0.8V to VBIAS
.
7
VIN2
I
Switch #2 input. Bypass this input with a ceramic capacitor to GND. Recommended voltage range for
this pin for optimal RON performance is 0.8V to VBIAS
.
8
VOUT2
VOUT2
CT2
O
O
O
–
Switch #2 output.
9
Switch #2 output.
10
11
12
13
14
15
Switch #2 slew rate control. Can be left floating.
Ground
GND
CT1
O
O
O
O
Switch #1 slew rate control. Can be left floating.
Switch #2 output.
VOUT1
VOUT1
Thermal Pad
Switch #2 output.
Thermal pad (exposed center pad) to alleviate thermal stress. Tie to GND. See Application
Information for layout guidelines.
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TYPICAL CHARACTERISTICS
VBIAS vs. QUIESCENT CURRENT
(BOTH CHANNELS)
VBIAS vs. QUIESCENT CURRENT
(SINGLE CHANNEL)
100
95
90
85
80
75
70
65
60
55
50
45
40
35
30
25
20
15
10
70
65
60
55
50
45
40
35
30
25
20
15
10
−40C
25C
85C
70C
−40C
25C
85C
70C
VIN1=VIN2=VBIAS, VON1=VON2=5V, VOUT=Open
SW1= On, SW2=On
VIN1=VIN2=VBIAS, VON1=VON2=5V, VOUT=Open
SW1 = Off, SW2 = On
2.5 2.75
3
3.25 3.5 3.75
4
4.25 4.5 4.75
5
5.25 5.5
2.5 2.75
3
3.25 3.5 3.75
4
4.25 4.5 4.75
5
5.25 5.5
VBIAS (V)
VBIAS (V)
G069
G069
VBIAS vs. SHUTDOWN CURRENT
(BOTH CHANNELS)
VIN vs. OFF-STATE SUPPLY CURRENT
(SINGLE CHANNEL)
1.2
1
3
2.5
2
−40C
25C
85C
70C
−40C
25C
85C
70C
VBIAS=5.5V, VON=0V, VOUT = 0V
0.8
0.6
0.4
0.2
1.5
1
0.5
0
VIN1=VIN2=VBIAS, VON1=VON2=0V, VOUT=0V
3.25 3.5 3.75 4.25 4.5 4.75 5.25 5.5
2.5 2.75
3
4
5
0.8 1.2 1.6
2
2.4 2.8 3.2 3.6
VIN (V)
4
4.4 4.8 5.2 5.6
VBIAS (V)
G070
G067
8
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TYPICAL CHARACTERISTICS (continued)
TEMPERATURE vs. RON
TEMPERATURE vs. RON
(VBIAS = 2.5V, SINGLE CHANNEL)
(VBIAS = 5.5V, SINGLE CHANNEL)
26
25
24
23
22
21
20
19
18
17
16
15
22
21.5
21
VIN =0.8V
VIN =1.05
VIN =1.2
VIN=1.5V
VIN = 1.8V
VIN = 2.5V
VIN =0.8V
VIN =1.05
VIN =1.2
VIN=1.5V
VIN = 1.8V
VIN = 2.5V
VIN = 3.3V
VIN =3.6V
VIN=4.2V
VIN=5V
20.5
20
19.5
19
18.5
18
VN=5.5V
17.5
17
16.5
16
15.5
15
14.5
14
VBIAS =2.5V, IOUT=−200mA
35 60 85
VBIAS =5.5V, IOUT=−200mA
35 60 85
−40
−15
10
−40
−15
10
Temperature (°C)
Temperature (°C)
G063
G064
VIN vs. RON
VIN vs. RON
(VBIAS = 2.5V, SINGLE CHANNEL)
(VBIAS = 5.5V, SINGLE CHANNEL)
26
25
24
23
22
21
20
19
18
17
16
15
14
22
21
20
19
18
17
16
15
14
−40C
85C
25C
70C
VBIAS =5.5V, IOUT = −200mA
−40C
85C
25C
70C
VBIAS =2.5V, IOUT = −200mA
1.8 2.05 2.3 2.5
0.8
1.05
1.3
1.55
VIN (V)
0.8 1.2 1.6
2
2.4 2.8 3.2 3.6
VIN (V)
4
4.4 4.8 5.2 5.6
G060
G061
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TYPICAL CHARACTERISTICS (continued)
VIN vs. RON
VIN vs. RPD
(TA = 25°C, SINGLE CHANNEL)
(VBIAS = 5.5V, SINGLE CHANNEL)
23
22.5
22
216
212
208
204
200
Temperature=25C, IOUT=−200mA
VBIAS = 2.5V
IPD=1mA, VBIAS=5.5V, VON=0V
−40C
85C
25C
70C
VBIAS = 3.3V
VBIAS = 3.6V
VBIAS= 4.2V
VBIAS = 5V
21.5
21
VBIAS = 5.5V
20.5
20
19.5
19
18.5
18
17.5
17
0.8 1.2 1.6
2
2.4 2.8 3.2 3.6
VIN (V)
4
4.4 4.8 5.2 5.6
0.8 1.2 1.6
2
2.4 2.8 3.2 3.6
VIN (V)
4
4.4 4.8 5.2 5.6
G062
G065
VON vs. VOUT
VIN vs. tD
(TA = 25°C, SINGLE CHANNEL)
(VBIAS = 2.5V, CT = 1nF)
2.4
2.2
2
1300
1250
1200
1150
1100
1050
1000
950
VIN=2V, Tempeature = 25C
VBIAS = 2.5V
CT = 1nf
1.8
1.6
1.4
1.2
1
900
850
0.8
0.6
0.4
0.2
0
800
VBIAS = 2.5V
VBIAS=3.3V
VBIAS=3.6V
VBIAS=4.2
VBIAS=5V
750
−40C
25C
70C
85C
700
650
VBIAS=5.5V
600
0
0.25 0.5 0.75
1
1.25 1.5 1.75
VON (V)
2
2.25 2.5
0.8
1
1.2
1.4
1.6
1.8
2
2.2
2.4
2.6
VIN (V)
G066
G030
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SLVSBH4A –JUNE 2012–REVISED JULY 2012
TYPICAL CHARACTERISTICS (continued)
VIN vs. tD
VIN vs. tF
(VBIAS = 5.5V, CT = 1nF)
(VBIAS = 2.5V, CT = 1nF)
650
600
550
500
450
400
350
300
24
20
16
12
8
VBIAS = 5.5V, CT = 1nf
VBIAS = 2.5V
CT = 1nf
−40C
25C
70C
85C
−40C
25C
70C
85C
4
0
0.8
0.8 1.2 1.6
2
2.4 2.8 3.2 3.6
4
4.4 4.8 5.2 5.5
1
1.2
1.4
1.6
1.8
2
2.2
2.4
2.6
VIN (V)
VIN (V)
G035
G036
VIN vs. tF
(VBIAS = 5.5V, CT = 1nF)
VIN vs. tOFF
(VBIAS = 2.5V, CT = 1nF)
24
20
16
12
8
160
150
140
130
120
110
100
90
VBIAS = 5.5V
CT = 1nf
−40C
25C
70C
85C
−40C
25C
70C
85C
80
70
60
50
40
30
4
20
VBIAS = 2.5V
CT = 1nf
10
0
0
0.8
0.8 1.2 1.6
2
2.4 2.8 3.2 3.6
VIN (V)
4
4.4 4.8 5.2 5.6
1
1.2
1.4
1.6
VIN (V)
1.8
2
2.2
2.4
2.6
G041
G042
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TYPICAL CHARACTERISTICS (continued)
VIN vs. tOFF
VIN vs. tON
(VBIAS = 5.5V, CT = 1nF)
(VBIAS = 2.5V, CT = 1nF)
250
225
200
175
150
125
100
75
2500
2400
2300
2200
2100
2000
1900
1800
1700
1600
1500
1400
1300
1200
1100
VBIAS = 5.5V
CT = 1nf
−40C
25C
70C
85C
−40C
25C
70C
85C
50
25
VBIAS = 2.5V
CT = 1nf
0
0.8 1.2 1.6
2
2.4 2.8 3.2 3.6
VIN (V)
4
4.4 4.8 5.2 5.6
0.8
1
1.2
1.4
1.6
1.8
2
2.2 2.4
2.6
VIN (V)
G047
G048
VIN vs. tON
(VBIAS = 5.5V, CT = 1nF)
VIN vs. tR
(VBIAS = 2.5V, CT = 1nF)
1600
1500
1400
1300
1200
1100
1000
900
2800
2450
2100
1750
1400
1050
700
−40C
−40C
25C
70C
85C
25C
70C
85C
800
700
600
VBIAS = 5.5V
CT = 1nf
VBIAS= 2.5V
CT = 1nf
500
400
0.8 1.2 1.6
2
2.4 2.8 3.2 3.6
VIN (V)
4
4.4 4.8 5.2 5.6
0.8
1
1.2
1.4
1.6
1.8
2
2.2 2.4
2.6
VIN (V)
G053
G061
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TYPICAL CHARACTERISTICS (continued)
VIN vs. tR
VBIAS vs. tR
(VBIAS = 5.5V, CT = 1nF)
(VIN = 2.5V, CT = 1nF)
2000
1750
1500
1250
1000
750
3000
2750
2500
2250
2000
1750
1500
1250
1000
750
−40C
25C
70C
85C
−40C
25C
70C
85C
500
VBIAS = 5.5V
CT = 1nf
VIN = 2.5V
CT = 1nf
250
500
0.8 1.2 1.6
2
2.4 2.8 3.2 3.6
VIN (V)
4
4.4 4.8 5.2 5.6
2.5 2.8
3
3.2 3.5 3.8
4
4.2 4.5 4.8
5
5.2 5.5
VBIAS (V)
G059
G061
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TYPICAL AC SCOPE CAPTURES @ TA = 25ºC, CT = 1nF
TURN-ON RESPONSE TIME
TURN-ON RESPONSE TIME
(VIN = 0.8V, VBIAS = 2.5V, CIN = 1µF, CL = 0.1µF, RL = 10Ω)
(VIN = 0.8V, VBIAS = 5.0V, CIN = 1µF, CL = 0.1µF, RL = 10Ω)
TURN-ON RESPONSE TIME
TURN-ON RESPONSE TIME
(VIN = 2.5V, VBIAS = 2.5V, CIN = 1µF, CL = 0.1µF, RL = 10Ω)
(VIN = 5.0V, VBIAS = 5.0V, CIN = 1µF, CL = 0.1µF, RL = 10Ω)
TURN-OFF RESPONSE TIME
TURN-OFF RESPONSE TIME
(VIN = 0.8V, VBIAS = 2.5V, CIN = 1µF, CL = 0.1µF, RL = 10Ω)
(VIN = 0.8V, VBIAS = 5.0V, CIN = 1µF, CL = 0.1µF, RL = 10Ω)
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SLVSBH4A –JUNE 2012–REVISED JULY 2012
TYPICAL AC SCOPE CAPTURES @ TA = 25ºC, CT = 1nF (continued)
TURN-OFF RESPONSE TIME
TURN-OFF RESPONSE TIME
(VIN = 2.5V, VBIAS = 2.5V, CIN = 1µF, CL = 0.1µF, RL = 10Ω)
(VIN = 5.0V, VBIAS = 5.0V, CIN = 1µF, CL = 0.1µF, RL = 10Ω)
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APPLICATION INFORMATION
ON/OFF CONTROL
The ON pins control the state of the switch. Asserting ON high enables the switch. ON is active high and has a
low threshold, making it capable of interfacing with low-voltage signals. The ON pin is compatible with standard
GPIO logic threshold. It can be used with any microcontroller with 1.2-V or higher GPIO voltage. This pin cannot
be left floating and must be tied either high or low for proper functionality.
INPUT CAPACITOR (OPTIONAL)
To limit the voltage drop on the input supply caused by transient in-rush currents when the switch turns on into a
discharged load capacitor or short-circuit, a capacitor needs to be placed between VIN and GND. A 1-µF ceramic
capacitor, CIN, placed close to the pins, is usually sufficient. Higher values of CIN can be used to further reduce
the voltage drop during high-current application. When switching heavy loads, it is recommended to have an
input capacitor about 10 times higher than the output capacitor to avoid excessive voltage drop.
OUTPUT CAPACITOR (OPTIONAL)
Due to the integrated body diode in the NMOS switch, a CIN greater than CL is highly recommended. A CL
greater than CIN can cause VOUT to exceed VIN when the system supply is removed. This could result in current
flow through the body diode from VOUT to VIN. A CIN to CL ratio of 10 to 1 is recommended for minimizing VIN dip
caused by inrush currents during startup.
VIN and VBIAS VOLTAGE RANGE
For optimal RON performance, make sure VIN ≤ VBIAS. The device will still be functional if VIN > VBIAS but it will
exhibit RON greater than what is listed in the ELECTRICAL CHARACTERISTICS table. See Figure 4 for an
example of a typical device. Notice the increasing RON as VIN exceeds VBIAS voltage. Be sure to never exceed
the maximum voltage rating for VIN and VBIAS
.
50
VBIAS = 2.5V
VBIAS = 3.3V
VBIAS = 3.6V
VBIAS= 4.2V
VBIAS = 5V
47
42
37
32
27
22
17
VBIAS = 5.5V
Temperature=25C, IOUT=−200mA
0.8 1.2 1.6
2
2.4 2.8 3.2 3.6
VIN (V)
4
4.4 4.8 5.2 5.6
G062
Figure 4. RON vs. VIN (VIN > VBIAS, Single Channel)
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SLVSBH4A –JUNE 2012–REVISED JULY 2012
ADJUSTABLE RISE TIME
A capacitor to GND on the CT pins sets the slew rate for each channel. An approximate formula for the
relationship between CT and slew rate is (the equation below accounts for 10% to 90% measurement on VOUT
and does NOT apply for CT = 0pF. Use table below to determine rise times for when CT = 0pF):
SR = 0.32´CT +13.7
(1)
Where,
SR = slew rate (in µs/V)
CT = the capacitance value on the CT pin (in pF)
The units for the constant 13.7 is in µs/V.
Rise time can be calculated by multiplying the input voltage by the slew rate. The table below contains rise time
values measured on a typical device. Rise times shown below are only valid for the power-up sequence where
VIN and VBIAS are already in steady state condition, and the ON pin is asserted high.
RISE TIME (µs) 10% - 90%, CL = 0.1µF, CIN = 1µF, RL = 10Ω
TYPICAL VALUES at 25°C, 25V X7R 10% CERAMIC CAP
CTx (pF)
5V
124
3.3V
88
1.8V
63
1.5V
60
1.2V
53
1.05V
49
0.8V
42
0
220
481
323
193
166
143
251
469
893
1920
4230
133
109
175
342
650
1411
3033
470
855
603
348
299
228
1000
2200
4700
10000
1724
3328
7459
16059
1185
2240
4950
10835
670
570
411
1308
2820
6040
1088
2429
5055
808
1748
3770
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BOARD LAYOUT AND THERMAL CONSIDERATIONS
For best performance, all traces should be as short as possible. To be most effective, the input and output
capacitors should be placed close to the device to minimize the effects that parasitic trace inductances may have
on normal operation. Using wide traces for VIN, VOUT, and GND helps minimize the parasitic electrical effects
along with minimizing the case to ambient thermal impedance.
The maximum IC junction temperature should be restricted to 125°C under normal operating conditions. To
calculate the maximum allowable dissipation, PD(max) for a given output current and ambient temperature, use the
following equation:
T
J(max) - TA
P
=
D(max)
QJA
(2)
Where:
PD(max) = maximum allowable power dissipation
TJ(max) = maximum allowable junction temperature (125°C for the TPS22966)
TA = ambient temperature of the device
ΘJA = junction to air thermal impedance. See Thermal Information section. This parameter is highly
dependent upon board layout.
The figure below shows an example of a layout. Notice the thermal vias located under the exposed thermal pad
of the device. This allows for thermal diffusion away from the device.
VOUT1 capacitor
VIN1 capacitor
CT1 capacitor
Thermal
relief vias
VIN2 capacitor
CT2 capacitor
VOUT2 capacitor
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SLVSBH4A –JUNE 2012–REVISED JULY 2012
REVISION HISTORY
Changes from Original (June 2012) to Revision A
Page
•
•
Updated VBIAS vs. QUIESCENT CURRENT (BOTH CHANNELS) Y-axis Units. .................................................................. 8
Updated VBIAS vs. QUIESCENT CURRENT (SINGLE CHANNEL) Y-axis Units. ................................................................. 8
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PACKAGE OPTION ADDENDUM
www.ti.com
9-Jul-2012
PACKAGING INFORMATION
Status (1)
Eco Plan (2)
MSL Peak Temp (3)
Samples
Orderable Device
Package Type Package
Drawing
Pins
Package Qty
Lead/
Ball Finish
(Requires Login)
TPS22966DPUR
TPS22966DPUT
ACTIVE
ACTIVE
WSON
WSON
DPU
DPU
14
14
3000
250
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
10-Jul-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TPS22966DPUR
TPS22966DPUT
WSON
WSON
DPU
DPU
14
14
3000
250
180.0
180.0
8.4
8.4
2.25
2.25
3.25
3.25
1.05
1.05
4.0
4.0
8.0
8.0
Q1
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
10-Jul-2012
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TPS22966DPUR
TPS22966DPUT
WSON
WSON
DPU
DPU
14
14
3000
250
210.0
210.0
185.0
185.0
35.0
35.0
Pack Materials-Page 2
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