TPS22967 [TI]
具有可调节上升时间和可调节输出放电功能的 5.5V、4A、22mΩ 负载开关;
| 型号： | TPS22967 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 具有可调节上升时间和可调节输出放电功能的 5.5V、4A、22mΩ 负载开关 开关 |
| 文件： | 总26页 (文件大小：2481K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TPS22967
www.ti.com.cn
ZHCSBE4 –AUGUST 2013
单通道、超低电阻负载开关
查询样品: TPS22967
1
特性
说明
2
•
•
•
集成的单通道负载开关
TPS22967 是一款小型，超低 R导通 电阻，单通道负载
开关，此开关具有受控开启功能。 此器件包含一个可
在 0.8V 至 5.5V 输入电压范围内运行的 N 通道金属氧
化物半导体场效应晶体管 (MOSFET)，并且每通道支
持最大 4A 的持续电流。 此开关可由一个打开/关闭输
入 (ON) 控制，此输入可与低压控制信号直接对接。
在 TPS22967 中，为了实现开关关闭时的快速输出放
电，增加了一个 225Ω 的上拉电阻器。
输入电压范围：0.8V 至 5.5V
超低 R导通电阻
–
–
–
V输入 = 5V（V偏置 = 5V）时，R导通 = 22mΩ
V输入 = 3.6V（V偏置 = 5V）时，R导通 = 22mΩ
V输入 = 1.8V（V偏置 = 5V）时，R导通 = 22mΩ
•
•
•
4A 最大持续开关电流
低静态电流 (50µA)
低控制输入阀值支持使用
TPS22967 采用小型，节省空间的 2mm x 2mm 8 引
脚 SON 封装 (DSG)，此类封装具有可实现高功率耗散
的集成散热垫。 器件在自然通风环境下的额定运行温
度范围为 -40°C 至 85°C。
1.2V/1.8V/2.5V/3.3V 逻辑电路
可配置的上升时间
•
•
•
•
快速输出放电 (QOD)
带有散热垫的小外形尺寸无引线 (SON) 8 引脚封装
根据 JESD 22 测试得出的静电放电 (ESD) 性能
特性列表
3.6V（V偏置 = 5V）时，R导通 的典型值
上升时间(1)
22mΩ
–
2KV 人体模型 (HBM) 和 1KV 器件充电模型
可调节
(CDM)
快速输出放电
支持
最大输出电流
4A
应用范围
通用输入输出接口 (GPIO) 启用
工作温度
高电平有效
-40°C 至 85°C
•
•
•
•
•
•
•
Ultrabook™
笔记本电脑/上网本
平板电脑
(1) CT 电容值与上升时间之间的关系请参见应用信息部分。
(2) 这个特性通过一个 225Ω 电阻器将开关的输出放电至接地
(GND)，从而防止输出悬空。
消费类电子产品
机顶盒/家庭网关
电信系统
固态硬盘 (SSD)
VIN
ON
VOUT
Power
Supply
ON
C
IN
CL
RL
CT
OFF
GND
GND
VBIAS
TPS22967
典型应用
ORDERING INFORMATION
For package and ordering information, see the Package Option Addendum at the end of this document.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Ultrabook is a trademark of Intel.
2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2013, Texas Instruments Incorporated
English Data Sheet: SLVSC42
TPS22967
ZHCSBE4 –AUGUST 2013
www.ti.com.cn
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ABSOLUTE MAXIMUM RATINGS
Over operating free-air temperature range (unless otherwise noted)(1)(2)
VALUE
–0.3 to 6
–0.3 to 6
–0.3 to 6
–0.3 to 6
4
UNIT(2)
VIN
Input voltage range
V
V
VOUT
VBIAS
VON
IMAX
IPLS
TA
Output voltage range
Bias voltage range
V
ON voltage range
V
Maximum continuous switch current
Maximum pulsed switch current, pulse <300 µs, 2% duty cycle
Operating free-air temperature range(3)
Maximum junction temperature
Storage temperature range
A
6
A
–40 to 85
125
°C
°C
°C
°C
TJ
TSTG
TLEAD
–65 to 150
300
Maximum lead temperature (10-s soldering time)
Human-Body Model (HBM)
2000
Electrostatic discharge
protection
ESD
V
Charged-Device Model (CDM)
1000
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to network ground terminal.
(3) In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may
have to be derated. Maximum ambient temperature [TA(max)] is dependent on the maximum operating junction temperature [TJ(max)], the
maximum power dissipation of the device in the application [PD(max)], and the junction-to-ambient thermal resistance of the part/package
in the application (θJA), as given by the following equation: TA(max) = TJ(max) – (θJA × PD(max)
)
THERMAL INFORMATION
TPS22967
DSG (8 PINS)
65.3
THERMAL METRIC(1)
UNITS
θJA
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
θJCtop
θJB
74.2
35.4
°C/W
ψJT
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
2.2
ψJB
36.0
θJCbot
12.8
(1) 有关传统和全新热度量的更多信息，请参阅 IC 封装热度量 应用报告 （文献号：ZHCA543）。
2
Copyright © 2013, Texas Instruments Incorporated
TPS22967
www.ti.com.cn
ZHCSBE4 –AUGUST 2013
RECOMMENDED OPERATING CONDITIONS
MIN
MAX UNIT
VIN
Input voltage range
Bias voltage range
0.8 VBIAS
V
V
VBIAS
VON
VOUT
VIH
2.5
0
5.5
5.5
VIN
5.5
0.5
ON voltage range
V
Output voltage range
High-level input voltage, ON
Low-level input voltage, ON
Input capacitor
V
VBIAS = 2.5 V to 5.5 V
VBIAS = 2.5 V to 5.5 V
1.2
0
V
VIL
V
CIN
1(1)
µF
(1) Refer to Application Information section.
ELECTRICAL CHARACTERISTICS
Unless otherwise noted, the specification in the following table applies over the operating ambient temperature –40°C ≤ TA ≤
85°C (Full) and VBIAS = 5.0 V. Typical values are for TA = 25°C.
PARAMETER
TEST CONDITIONS
TA
MIN
TYP MAX UNIT
POWER SUPPLIES AND CURRENTS
IOUT = 0,
VIN = VON = VBIAS = 5.0 V
IIN(VBIAS-ON) VBIAS quiescent current
IIN(VBIAS-OFF) VBIAS shutdown current
Full
Full
50
75
µA
µA
VON = GND, VOUT = 0 V
2
8
VIN = 5.0 V
VIN = 3.3 V
VIN = 1.8 V
VIN = 0.8 V
0.2
0.02
3
VON = GND,
VOUT = 0 V
IIN(VIN-OFF)
VIN off-state supply current
ON pin input leakage current
Full
Full
µA
µA
0.01
2
0.005
1
ION
VON = 5.5 V
0.5
RESISTANCE CHARACTERISTICS
25°C
Full
22
22
22
22
22
22
33
35
33
35
33
35
33
35
33
35
33
35
VIN = 5.0 V
VIN = 3.3 V
VIN = 1.8 V
VIN = 1.5 V
VIN = 1.2 V
VIN = 0.8 V
mΩ
mΩ
mΩ
mΩ
mΩ
25°C
Full
25°C
Full
IOUT = –200 mA,
VBIAS = 5.0 V
RON
ON-state resistance
25°C
Full
25°C
Full
25°C
Full
mΩ
RPD
Output pulldown resistance
VIN = 5.0 V, VON = 0V, IOUT = 15 mA
Full
225 300
Ω
Copyright © 2013, Texas Instruments Incorporated
3
TPS22967
ZHCSBE4 –AUGUST 2013
www.ti.com.cn
ELECTRICAL CHARACTERISTICS
Unless otherwise noted, the specification in the following table applies over the operating ambient temperature –40°C ≤ TA ≤
85°C (Full) and VBIAS = 2.5 V. Typical values are for TA = 25°C.
PARAMETER
TEST CONDITIONS
TA
MIN
TYP MAX UNIT
POWER SUPPLIES AND CURRENTS
IOUT = 0,
VIN = VON = VBIAS = 2.5 V
IIN(VBIAS-ON) VBIAS quiescent current
IIN(VBIAS-OFF) VBIAS shutdown current
Full
Full
20
30
µA
µA
VON = GND, VOUT = 0 V
2
3
VIN = 2.5 V
VIN = 1.8 V
VIN = 1.2 V
VIN = 0.8 V
0.01
0.01
2
VON = GND,
VOUT = 0 V
IIN(VIN-OFF)
VIN off-state supply current
ON pin input leakage current
Full
Full
µA
µA
0.005
0.003
2
1
ION
VON = 5.5 V
0.5
RESISTANCE CHARACTERISTICS
25°C
Full
26
26
25
24
24
38
40
38
40
38
40
38
40
38
40
VIN = 2.5 V
VIN = 1.8 V
VIN = 1.5 V
VIN = 1.2 V
VIN = 0.8 V
mΩ
mΩ
mΩ
mΩ
25°C
Full
25°C
Full
IOUT = –200 mA,
VBIAS = 2.5 V
RON
ON-state resistance
25°C
Full
25°C
Full
mΩ
RPD
Output pulldown resistance
VIN = 2.5 V, VON = 0V, IOUT = 1 mA
Full
275 325
Ω
4
Copyright © 2013, Texas Instruments Incorporated
TPS22967
www.ti.com.cn
ZHCSBE4 –AUGUST 2013
SWITCHING CHARACTERISTIC MEASUREMENT INFORMATION
VIN
VOUT
CT
CIN = 1µF
ON
(A)
ON
CL
+
-
RL
OFF
VBIAS
GND
TPS22967
GND
GND
TEST CIRCUIT
VON
50%
50%
tF
tOFF
tR
VOUT
tON
90%
90%
VOUT
50%
10%
50%
10%
10%
tD
tON/tOFF WAVEFORMS
(A) Rise and fall times of the control signal is 100ns.
Figure 1. Test Circuit and Timing Waveforms
SWITCHING CHARACTERISTICS
PARAMETER
TEST CONDITION
MIN
TYP
MAX UNIT
VIN = VON = VBIAS = 5 V, TA = 25ºC (unless otherwise noted)
tON
tOFF
tR
Turn-on time
Turn-off time
VOUT rise time
VOUT fall time
ON delay time
1325
10
RL = 10-Ω, CL = 0.1 µF, CT = 1000 pF
1625
3.5
µs
tF
tD
500
VIN = 0.8 V, VON = VBIAS = 5V, TA = 25ºC (unless otherwise noted)
tON
tOFF
tR
Turn-on time
Turn-off time
VOUT rise time
VOUT fall time
ON delay time
600
80
RL = 10-Ω, CL = 0.1 µF, CT = 1000 pF
300
5.5
460
µs
µs
µs
tF
tD
VIN = 2.5V, VON = 5 V, VBIAS = 2.5V, TA = 25ºC (unless otherwise noted)
tON
tOFF
tR
Turn-on time
Turn-off time
VOUT rise time
VOUT fall time
ON delay time
2200
9
RL = 10-Ω, CL = 0.1 µF, CT = 1000 pF
2275
3.1
tF
tD
1075
VIN = 0.8 V, VON = 5 V, VBIAS = 2.5 V, TA = 25ºC (unless otherwise noted)
tON
tOFF
tR
Turn-on time
Turn-off time
VOUT rise time
VOUT fall time
ON delay time
1450
60
RL = 10-Ω, CL = 0.1 µF, CT = 1000 pF
875
5.5
tF
tD
1010
Copyright © 2013, Texas Instruments Incorporated
5
TPS22967
ZHCSBE4 –AUGUST 2013
www.ti.com.cn
FUNCTIONAL BLOCK DIAGRAM
VIN
Charge
Pump
VBIAS
Control
Logic
ON
VOUT
CT
GND
Figure 2. Functional Block Diagram
Table 1. FUNCTIONAL TABLE
ON
L
VIN to VOUT
VOUT to GND
Off
On
On
Off
H
6
Copyright © 2013, Texas Instruments Incorporated
TPS22967
www.ti.com.cn
ZHCSBE4 –AUGUST 2013
DSG PACKAGE
1
2
3
4
8
7
6
5
8
7
6
5
1
2
3
4
VIN
VIN
VOUT
VOUT
VOUT
CT
VIN
VOUT
CT
VIN
ON
ON
VBIAS
VBIAS
GND
GND
BOTTOM VIEW
TOP VIEW
PIN DESCRIPTIONS
TPS22967
PIN NAME
I/O
DESCRIPTION
DSG
1
VIN
I
I
Switch input. Input capacitor recommended for minimizing VIN dip. Recommended voltage range for
this pin for optimal RON performance is 0.8V to VBIAS
.
2
VIN
Switch input. Input capacitor recommended for minimizing VIN dip. Recommended voltage range for
this pin for optimal RON performance is 0.8V to VBIAS
.
3
4
ON
I
I
Active high switch control input. Do not leave floating.
VBIAS
Bias voltage. Power supply to the device. Recommended voltage range for this pin is 2.5V to 5.5V.
See Application Information section for more information.
5
6
GND
CT
-
Device ground.
O
Switch slew rate control. Can be left floating. See Application Information section for more
information.
7
8
VOUT
O
O
-
Switch output.
Switch output.
VOUT
Thermal Pad
Thermal pad (exposed center pad) to alleviate thermal stress. Tie to GND. See Application
Information for layout guidelines.
Copyright © 2013, Texas Instruments Incorporated
7
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ZHCSBE4 –AUGUST 2013
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TYPICAL CHARACTERISTICS
VBIAS vs. QUIESCENT CURRENT
VBIAS vs. SHUTDOWN CURRENT
60
50
40
30
20
10
0.7
−40C
25C
70C
85C
−40C
25C
70C
85C
0.6
0.5
0.4
0.3
0.2
0.1
VIN=VBIAS, VON = 5V, VOUT=OPEN
3.25 3.5 3.75 4.25 4.5 4.75 5.25 5.5
VIN=VBIAS, VON=0V, VOUT=0V
3.25 3.5 3.75 4.25 4.5 4.75 5.25 5.5
2.5 2.75
3
4
5
2.5 2.75
3
4
5
VBIAS (V)
VBIAS (V)
G070
G070
TEMPERATURE vs. RON
(VBIAS = 2.5V)
VIN vs. OFF-STATE VIN CURRENT
8.5
8
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
VIN = 0.8V
VIN = 1.05V
VIN = 1.2V
VIN = 1.5V
VIN = 1.8V
VIN =2.5V
−40C
25C
70C
85C
VBIAS=5.5V, VON=0V, VOUT = 0V
7.5
7
6.5
6
5.5
5
4.5
4
3.5
3
2.5
2
1.5
1
VBIAS=2.5V, IOUT=-200mA
0.5
0
0.8 1.2 1.6
2
2.4 2.8 3.2 3.6
VIN (V)
4
4.4 4.8 5.2 5.6
-40
-15
10
35
60
85
Temperature (ºC)
G067
C002
8
Copyright © 2013, Texas Instruments Incorporated
TPS22967
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ZHCSBE4 –AUGUST 2013
TYPICAL CHARACTERISTICS (continued)
TEMPERATURE vs. RON
(VBIAS = 5.5V)
VIN vs. RON
(VBIAS = 2.5V)
28
27.5
27
26.5
26
25.5
25
24.5
24
23.5
23
22.5
22
21.5
21
20.5
20
19.5
19
18.5
18
17.5
17
16.5
16
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
VIN = 0.8V
VIN = 1.05V
VIN = 1.2V
VIN = 1.5V
VIN = 1.8V
VIN = 2.5V
VIN = 3.3V
VIN = 3.6V
VIN = 4.2V
VIN =5V
-40C
25C
85C
70C
VIN = 5.5V
VBIAS=5.5V, IOUT = -200mA
35 60
VBIAS=2.5V, IOUT = -200mA
-40
-15
10
85
0.8
1.2
1.6
VIN (V)
2
2.4
Temperature (C)
C002
C002
VIN vs. RON
(VBIAS = 5.5V)
VIN vs. RON
(TA = 25°C)
27
33
31
29
27
25
23
21
19
17
15
VBIAS = 2.5V
VBIAS = 3.3V
VBIAS = 3.6V
VBIAS = 4.2V
VBIAS = 5V
-40C
25C
70C
85C
26
25
24
23
22
21
VBIAS = 5.5V
Temperature=25C, IOUT = -200mA
VBIAS=5.5V, IOUT = -200mA
0.8 1.2 1.6
2
2.4 2.8 3.2 3.6
VIN (V)
4
4.4 4.8 5.2 5.6
0.8 1.2 1.6
2
2.4 2.8 3.2 3.6
VIN (V)
4
4.4 4.8 5.2 5.6
C002
C002
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TYPICAL CHARACTERISTICS (continued)
VIN vs. RPD
(VBIAS = 5.5V)
VON vs. VOUT
(TA = 25°C)
231
2.4
2.2
2
IPD=1mA, VBIAS=5.5V, VON=0V
−40C
25C
70C
85C
VIN=2V, Tempeature = 25C
230
229
228
227
226
225
224
1.8
1.6
1.4
1.2
1
0.8
0.6
0.4
0.2
0
VBIAS = 2.5V
VBIAS=3.3V
VBIAS=3.6V
VBIAS=4.2
VBIAS=5V
VBIAS=5.5V
0.8 1.2 1.6
2
2.4 2.8 3.2 3.6
VIN (V)
4
4.4 4.8 5.2 5.6
0
0.25 0.5 0.75
1
1.25 1.5 1.75
VON (V)
2
2.25 2.5
G065
G066
VIN vs. tD
(VBIAS = 2.5V, CT = 1nF)
VIN vs. tD
(VBIAS = 5.5V, CT = 1nF)
1500
1450
1400
1350
1300
1250
1200
1150
1100
1050
1000
950
650
600
550
500
450
400
350
300
VBIAS = 2.5V
CT = 1nf
VBIAS = 5.5V, CT = 1nf
900
850
800
−40C
25C
70C
85C
−40C
25C
70C
85C
750
700
650
600
0.8
1
1.2
1.4
1.6
VIN (V)
1.8
2
2.2
2.4
2.6
0.8 1.2 1.6
2
2.4 2.8 3.2 3.6
VIN (V)
4
4.4 4.8 5.2 5.5
G030
G035
10
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ZHCSBE4 –AUGUST 2013
TYPICAL CHARACTERISTICS (continued)
VIN vs. tF
(VBIAS = 2.5V, CT = 1nF)
VIN vs. tF
(VBIAS = 5.5V, CT = 1nF)
8
7
6
5
4
3
2
8
7
6
5
4
3
2
1
0
VBIAS = 2.5V
CT = 1nf
−40C
25C
70C
85C
VBIAS = 5.5V
CT = 1nf
−40C
25C
70C
85C
1
0.8
1
1.2
1.4
1.6
VIN (V)
1.8
2
2.2
2.4
2.6
0.8 1.2 1.6
2
2.4 2.8 3.2 3.6
VIN (V)
4
4.4 4.8 5.2 5.6
G036
G041
VIN vs. tOFF
(VBIAS = 2.5V, CT = 1nF)
VIN vs. tOFF
(VBIAS = 5.5V, CT = 1nF)
80
70
60
50
40
30
20
10
125
100
75
50
25
0
−40C
25C
70C
85C
VBIAS = 5.5V
CT = 1nf
−40C
25C
70C
85C
VBIAS = 2.5V
CT = 1nf
0
0.8
1
1.2
1.4
1.6
VIN (V)
1.8
2
2.2
2.4
2.6
0.8 1.2 1.6
2
2.4 2.8 3.2 3.6
VIN (V)
4
4.4 4.8 5.2 5.6
G042
G047
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ZHCSBE4 –AUGUST 2013
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TYPICAL CHARACTERISTICS (continued)
VIN vs. tON
(VBIAS = 2.5V, CT = 1nF)
VIN vs. tON
(VBIAS = 5.5V, CT = 1nF)
2700
1600
1500
1400
1300
1200
1100
1000
900
−40C
25C
70C
85C
−40C
25C
70C
85C
2600
2500
2400
2300
2200
2100
2000
1900
1800
1700
1600
1500
1400
1300
1200
1100
800
700
600
VBIAS = 2.5V
CT = 1nf
VBIAS = 5.5V
CT = 1nf
500
400
0.8
1
1.2
1.4
1.6
1.8
2
2.2
2.4
2.6
0.8 1.2 1.6
2
2.4 2.8 3.2 3.6
VIN (V)
4
4.4 4.8 5.2 5.6
VIN (V)
G048
G053
VIN vs. tR
(VBIAS = 2.5V, CT = 1nF)
VIN vs. tR
(VBIAS = 5.5V, CT = 1nF)
2800
2450
2100
1750
1400
1050
700
2000
1750
1500
1250
1000
750
−40C
25C
70C
85C
−40C
25C
70C
85C
500
VBIAS= 2.5V
CT = 1nf
VBIAS = 5.5V
CT = 1nf
250
0.8
1
1.2
1.4
1.6
VIN (V)
1.8
2
2.2
2.4
2.6
0.8 1.2 1.6
2
2.4 2.8 3.2 3.6
VIN (V)
4
4.4 4.8 5.2 5.6
G061
G059
12
Copyright © 2013, Texas Instruments Incorporated
TPS22967
www.ti.com.cn
ZHCSBE4 –AUGUST 2013
TYPICAL CHARACTERISTICS (continued)
VBIAS vs. tR
(VIN = 2.5V, CT = 1nF)
3000
−40C
25C
70C
2750
85C
2500
2250
2000
1750
1500
1250
1000
750
VIN = 2.5V
CT = 1nf
500
2.5 2.8
3
3.2 3.5 3.8
4
4.2 4.5 4.8
5
5.2 5.5
VBIAS (V)
G061
Copyright © 2013, Texas Instruments Incorporated
13
TPS22967
ZHCSBE4 –AUGUST 2013
www.ti.com.cn
TYPICAL AC SCOPE CAPTURES at TA = 25ºC, CT = 1nF
TURN-ON RESPONSE TIME
TURN-ON RESPONSE TIME
(VIN = 0.8V, VBIAS = 2.5V, CIN = 1µF, CL = 0.1µF, RL = 10Ω)
(VIN = 0.8V, VBIAS = 5.0V, CIN = 1µF, CL = 0.1µF, RL = 10Ω)
CH1: VOUT, CH2: ON
CH1: VOUT, CH2: ON
TURN-ON RESPONSE TIME
(VIN = 2.5V, VBIAS = 2.5V, CIN = 1µF, CL = 0.1µF, RL = 10Ω)
CH1: VOUT, CH2: ON
TURN-ON RESPONSE TIME
(VIN = 5.0V, VBIAS = 5.0V, CIN = 1µF, CL = 0.1µF, RL = 10Ω)
CH1: VOUT, CH2: ON
TURN-OFF RESPONSE TIME
(VIN = 0.8V, VBIAS = 2.5V, CIN = 1µF, CL = 0.1µF, RL = 10Ω)
CH1: VOUT, CH2: ON
TURN-OFF RESPONSE TIME
(VIN = 0.8V, VBIAS = 5.0V, CIN = 1µF, CL = 0.1µF, RL = 10Ω)
CH1: VOUT, CH2: ON
14
Copyright © 2013, Texas Instruments Incorporated
TPS22967
www.ti.com.cn
ZHCSBE4 –AUGUST 2013
TYPICAL AC SCOPE CAPTURES at TA = 25ºC, CT = 1nF (continued)
TURN-OFF RESPONSE TIME
TURN-OFF RESPONSE TIME
(VIN = 2.5V, VBIAS = 2.5V, CIN = 1µF, CL = 0.1µF, RL = 10Ω)
(VIN = 5.0V, VBIAS = 5.0V, CIN = 1µF, CL = 0.1µF, RL = 10Ω)
CH1: VOUT, CH2: ON
CH1: VOUT, CH2: ON
Copyright © 2013, Texas Instruments Incorporated
15
TPS22967
ZHCSBE4 –AUGUST 2013
www.ti.com.cn
APPLICATION INFORMATION
ON/OFF CONTROL
The ON pin controls the state of the switch. Asserting ON high enables the switch. ON is active high and has a
low threshold, making it capable of interfacing with low-voltage signals. The ON pin is compatible with standard
GPIO logic thresholds. It can be used with any microcontroller with 1.2V or higher GPIO voltage. This pin cannot
be left floating and must be driven either high or low for proper functionality.
INPUT CAPACITOR (OPTIONAL)
To limit the voltage drop on the input supply caused by transient in-rush currents when the switch turns on into a
discharged load capacitor or short-circuit, a capacitor needs to be placed between VIN and GND. A 1-µF ceramic
capacitor, CIN, placed close to the pins, is usually sufficient. Higher values of CIN can be used to further reduce
the voltage drop during high current applications. When switching heavy loads, it is recommended to have an
input capacitor about 10 times higher than the output capacitor to avoid excessive voltage drop.
OUTPUT CAPACITOR (OPTIONAL)
Due to the integrated body diode in the NMOS switch, a CIN greater than CL is highly recommended. A CL
greater than CIN can cause VOUT to exceed VIN when the system supply is removed. This could result in current
flow through the body diode from VOUT to VIN. A CIN to CL ratio of 10 to 1 is recommended for minimizing VIN
dip caused by inrush currents during startup, however a 10 to 1 ratio for capacitance is not required for proper
functionality of the device. A ratio smaller than 10 to 1 (such as 1 to 1) could cause slightly more VIN dip upon
turn-on due to inrush currents. This can be mitigated by increasing the capacitance on the CT pin for a longer
rise time (see below).
VIN and VBIAS VOLTAGE RANGE
For optimal RON performance, make sure VIN ≤ VBIAS. The device will still be functional if VIN > VBIAS but it will
exhibit RON greater than what is listed in the ELECTRICAL CHARACTERISTICS table. See Figure 3 for an
example of a typical device. Notice the increasing RON as VIN exceeds VBIAS voltage. Be sure to never exceed
the maximum voltage rating for VIN and VBIAS.
50
VBIAS = 2.5V
VBIAS = 3.3V
45
VBIAS = 3.6V
VBIAS = 4.2V
VBIAS = 5V
40
35
30
25
20
VBIAS = 5.5V
Temperature=25C,
IOUT=-200mA
0.8 1.2 1.6
2
2.4 2.8 3.2 3.6
VIN (V)
4
4.4 4.8 5.2 5.6
C017
Figure 3. RON vs. VIN (VIN > VBIAS
)
16
Copyright © 2013, Texas Instruments Incorporated
TPS22967
www.ti.com.cn
ZHCSBE4 –AUGUST 2013
ADJUSTABLE RISE TIME
A capacitor to GND on the CT pin sets the VOUT slew rate. The voltage on the CT pin can be as high as 12V.
Therefore, the minimum voltage rating for the CT cap should be 25V for optimal performance. An approximate
formula for the relationship between CT and slew rate is (the equation below accounts for 10% to 90%
measurement on VOUT and does NOT apply for CT = 0pF. Use table below to determine rise times for when CT
= 0pF):
SR = 0.39´CT +13.4
(1)
Where,
SR = slew rate (in µs/V)
CT = the capacitance value on the CT pin (in pF)
The units for the constant 13.4 is in µs/V. The units for the constant 0.39 are in µs/(V*pF).
Rise time can be calculated by multiplying the input voltage by the slew rate. The table below contains rise time
values measured on a typical device. Rise times shown below are only valid for the power-up sequence where
VIN and VBIAS are already in steady state condition, and the ON pin is asserted high.
RISE TIME (µs) 10% - 90%, CL = 0.1µF, CIN = 1µF, RL = 10Ω
TYPICAL VALUES at 25°C, 25V X7R 10% CERAMIC CAP
CTx (pF)
5V
127
3.3V
93
1.8V
62
1.5V
55
1.2V
51
1.05V
46
0.8V
42
0
220
475
314
188
162
141
125
103
188
344
681
1568
3449
470
939
637
359
304
255
218
1000
2200
4700
10000
1869
4020
8690
18360
1229
2614
5746
12550
684
567
476
414
1469
3167
6849
1211
2703
5836
1024
2139
4782
876
1877
4089
Copyright © 2013, Texas Instruments Incorporated
17
TPS22967
ZHCSBE4 –AUGUST 2013
www.ti.com.cn
SAFE OPERATING AREA (SOA)
The SOA curves show the continuous current carrying capability of the device versus ambient temperature (TA)
to ensure reliable operation over 70,000 hours of device lifetime. The different curves represent the percentage
On time over device lifetime and can be used as a reference to understand the current carrying capability of
TPS22967 under different use cases. It is recommended to maintain continuous current at or below the SOA
curves shown in Figure 4.
5
4
3
2
100% On time
1
0
90% On time
70% On time
50% On time
30% On time
VBIAS=5.0V
60
-40
-15
10
35
85
Ambient Temperature (ºC)
C002
“On time” is the duration of time that the device is enabled (ON ≥ VIH) over 70,000 hour lifetime.
Figure 4. Safe Operating Area
18
Copyright © 2013, Texas Instruments Incorporated
TPS22967
www.ti.com.cn
ZHCSBE4 –AUGUST 2013
BOARD LAYOUT AND THERMAL CONSIDERATIONS
For best performance, all traces should be as short as possible. To be most effective, the input and output
capacitors should be placed close to the device to minimize the effects that parasitic trace inductances may have
on normal operation. Using wide traces for VIN, VOUT, and GND helps minimize the parasitic electrical effects
along with minimizing the case to ambient thermal impedance.
The maximum IC junction temperature should be restricted to 125°C under normal operating conditions. To
calculate the maximum allowable dissipation, PD(max) for a given output current and ambient temperature, use the
following equation as a guideline:
T
J(max) - TA
P
=
D(max)
QJA
(2)
Where:
PD(max) = maximum allowable power dissipation
TJ(max) = maximum allowable junction temperature (125°C for the TPS22967)
TA = ambient temperature of the device
ΘJA = junction to air thermal impedance. See Thermal Information section. This parameter is highly
dependent upon board layout.
The figure below shows an example of a layout. Notice the thermal vias located under the exposed thermal pad
of the device. This allows for thermal diffusion away from the device.
Copyright © 2013, Texas Instruments Incorporated
19
PACKAGE OPTION ADDENDUM
www.ti.com
18-Jul-2023
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
TPS22967DSGR
TPS22967DSGT
ACTIVE
ACTIVE
WSON
WSON
DSG
DSG
8
8
3000 RoHS & Green
250 RoHS & Green
NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 85
-40 to 85
ZTU
ZTU
Samples
Samples
NIPDAU
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
18-Jul-2023
Addendum-Page 2
GENERIC PACKAGE VIEW
DSG 8
2 x 2, 0.5 mm pitch
WSON - 0.8 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
This image is a representation of the package family, actual package may vary.
Refer to the product data sheet for package details.
4224783/A
www.ti.com
PACKAGE OUTLINE
DSG0008A
WSON - 0.8 mm max height
SCALE 5.500
PLASTIC SMALL OUTLINE - NO LEAD
2.1
1.9
B
A
0.32
0.18
PIN 1 INDEX AREA
2.1
1.9
0.4
0.2
ALTERNATIVE TERMINAL SHAPE
TYPICAL
0.8
0.7
C
SEATING PLANE
0.05
0.00
SIDE WALL
0.08 C
METAL THICKNESS
DIM A
OPTION 1
0.1
OPTION 2
0.2
EXPOSED
THERMAL PAD
(DIM A) TYP
0.9 0.1
5
4
6X 0.5
2X
1.5
9
1.6 0.1
8
1
0.32
0.18
PIN 1 ID
(45 X 0.25)
8X
0.4
0.2
8X
0.1
C A B
C
0.05
4218900/E 08/2022
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance.
www.ti.com
EXAMPLE BOARD LAYOUT
DSG0008A
WSON - 0.8 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
(0.9)
(
0.2) VIA
8X (0.5)
TYP
1
8
8X (0.25)
(0.55)
SYMM
9
(1.6)
6X (0.5)
5
4
SYMM
(1.9)
(R0.05) TYP
LAND PATTERN EXAMPLE
SCALE:20X
0.07 MIN
ALL AROUND
0.07 MAX
ALL AROUND
SOLDER MASK
OPENING
METAL
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
NON SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4218900/E 08/2022
NOTES: (continued)
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
number SLUA271 (www.ti.com/lit/slua271).
5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown
on this view. It is recommended that vias under paste be filled, plugged or tented.
www.ti.com
EXAMPLE STENCIL DESIGN
DSG0008A
WSON - 0.8 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
8X (0.5)
METAL
8
SYMM
1
8X (0.25)
(0.45)
SYMM
9
(0.7)
6X (0.5)
5
4
(R0.05) TYP
(0.9)
(1.9)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
EXPOSED PAD 9:
87% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE
SCALE:25X
4218900/E 08/2022
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
www.ti.com
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