TPS22968 [TI]

具有可调节上升时间和输出放电功能的 2 通道、5.5V、4A、25mΩ 负载开关;


型号：	TPS22968
厂家：	TEXAS INSTRUMENTS
描述：	具有可调节上升时间和输出放电功能的 2 通道、5.5V、4A、25mΩ 负载开关开关
文件：	总33页 (文件大小：1628K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

Support &

Community

Product

Folder

Order

Now

Tools &

Software

Technical

Documents

TPS22968, TPS22968N

ZHCSCN4F –JANUARY 2014–REVISED JULY 2017

TPS22968 双通道、超低电阻负载开关

1 特性

2 应用

•

集成式双通道负载开关

•

Ultrabook™

笔记本电脑和上网本

平板电脑

输入电压范围：0.8V 至 5.5V

VBIAS 电压范围：2.5V 至 5.5V

消费类电子产品

机顶盒

–

非常适合 1S 电池配置

•

超低 R_ON电阻

电信系统

–

V_IN= 5V (V_BIAS= 5V) 时，R_ON= 27mΩ

V_IN= 3.3V (V_BIAS= 5V) 时，R_ON= 25mΩ

V_IN= 1.8V (V_BIAS= 5V) 时，R_ON= 25mΩ

3 说明

TPS22968x 是一款具有受控接通功能的小型、超低

R_ON双通道负载开关。此器件包含两个可在 0.8 至

5.5V 输入电压范围内运行的 N 沟道 MOSFET，并且

每个沟道可支持最大

•

每通道最大 4A 持续开关电流

低静态电流

–

V_BIAS= 5V 时为 55µA（两个通道）

V_BIAS= 5V 时为 55µA（单通道）

4A 的持续电流。每个开关由一个导通/关断输入（ON1

和 ON2）单独控制，此输入可与低电压控制信号直接

连接。为了能够在开关关闭时快速进行输出放

电，TPS22968 中添加了一个 270Ω 的片上负载电阻

器。

•

低控制输入阈值支持使用

1.2V、1.8V、2.5V、3.3V 逻辑

•

可配置上升时间⁽¹⁾

快速输出放电 (QOD)⁽²⁾（可选）

带有散热垫的 SON 14 引脚封装

ESD 性能经测试符合 JEDEC 标准

TPS22968x 采用小型、节省空间的封装 (DPU)，该封

装具有集成式散热垫，从而支持高功率耗散。该器件在

自然通风环境下的额定运行温度范围为 –40 至 +105°

C。

–

2kV 人体放电模式 (HBM) 和 1kV 器件充电模型

(CDM)

•

闩锁性能超出 100mA，符合 JESD 78 II 类规范的

要求

器件信息⁽¹⁾

通用输入输出 (GPIO) 使能 - 高电平有效

TPS22968N：仅限产品预览

器件型号

TPS22968

TPS22968N

封装

封装尺寸（标称值）

•

(1)

有关 CT 值与上升时间之间的关系，请参阅申请资料部分

WSON (14)

3.00mm x 2.00mm

(2)

此特性通过一个 270Ω 电阻器将开关的输出放电至接地

(GND)，从而防止输出悬空。

(1) 如需了解所有可用封装，请参阅数据表末尾的可订购产品附

录。

典型应用电路原理图

V_IN1

ON1

V_BIAS

V_OUT1

CT1

CT2

Dual Power

C_IN

C_L

R_L

Supply

OFF

GND

Dual DC/DC

converter

V_OUT2

ON2

C_IN

C_L

R_L

OFF

GND

TPS22968x

GND

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.

English Data Sheet: SLVSCG3

TPS22968, TPS22968N

ZHCSCN4F –JANUARY 2014–REVISED JULY 2017

www.ti.com.cn

9.2 Functional Block Diagram ....................................... 15

9.3 Feature Description................................................. 16

9.4 Device Functional Modes........................................ 17

10 Application and Implementation........................ 18

10.1 Application Information.......................................... 18

10.2 Typical Application ................................................ 21

11 Power Supply Recommendations ..................... 24

12 Layout................................................................... 24

12.1 Layout Guidelines ................................................. 24

12.2 Layout Example .................................................... 24

13 器件和文档支持 ..................................................... 25

13.1 器件支持 ............................................................... 25

13.2 文档支持 ............................................................... 25

13.3 相关链接................................................................ 25

13.4 接收文档更新通知 ................................................. 25

13.5 社区资源................................................................ 25

13.6 商标....................................................................... 25

13.7 静电放电警告......................................................... 25

13.8 Glossary................................................................ 26

14 机械、封装和可订购信息....................................... 26

特性.......................................................................... 1

应用.......................................................................... 1

说明.......................................................................... 1

修订历史记录 ........................................................... 2

Device Comparison ............................................... 4

Pin Configuration and Functions......................... 4

Specifications......................................................... 5

7.1 Absolute Maximum Ratings ...................................... 5

7.2 ESD Ratings.............................................................. 5

7.3 Recommended Operating Conditions....................... 5

7.4 Thermal Information.................................................. 5

7.5 Electrical Characteristics (V_BIAS= 5 V)..................... 6

7.6 Electrical Characteristics (V_BIAS= 2.5 V).................. 7

7.7 Switching Characteristics.......................................... 8

7.8 Typical DC Characteristics........................................ 8

7.9 Typical AC Characteristics...................................... 12

Parameter Measurement Information ................ 14

Detailed Description ............................................ 15

9.1 Overview ................................................................. 15

4 修订历史记录

Changes from Revision D (March 2016) to Revision E

Page

•

将 QOD 说明从（仅限 TPS22968）更改成了（可选）（在特性部分中）............................................................................ 1

Changes from Revision E (July 2016) to Revision F

Page

•

已更改 Functional Block Diagram........................................................................................................................................... 1

Changes from Revision C (October 2015) to Revision D

Page

•

Made Changes to Thermal Considerations.......................................................................................................................... 22

Changes from Revision B (June 2015) to Revision C

Page

•

更新了 TPS22968N 发行版的信息。 ...................................................................................................................................... 1

Updated “TEST CONDITIONS” for RON. ............................................................................................................................. 6

Updated “TEST CONDITIONS” for RON. ............................................................................................................................. 7

Changes from Revision A (July 2014) to Revision B

Page

•

Updated Typical Characteristics graphs. ............................................................................................................................... 8

Changes from Original (January 2014) to Revision A

Page

•

已添加添加了处理额定值表、特性说明部分、器件功能模式、应用和实施部分、电源相关建议部分、布局部分、

器件和文档支持部分以及机械、封装和可订购信息部分 ....................................................................................................... 1

TPS22968, TPS22968N

www.ti.com.cn

ZHCSCN4F –JANUARY 2014–REVISED JULY 2017

5 Device Comparison

Ron (typ) at

VIN = 3.3 V,

VBIAS = 5 V

QUICK

OUTPUT

DISCHARGE

MAXIMUM

OUTPUT

CURRENT

DEVICE

ENABLE

TPS22968

25 mΩ

Yes

4 A

Active High

TPS22968N

6 Pin Configuration and Functions

DPU PACKAGE

14-Pin WSON

Top View

DPU PACKAGE

14-Pin WSON

Bottom View

VOUT1

VIN1

VOUT1

VIN1

VOUT1

VIN1

VOUT1

GND

VBIAS

ON2

GND

VBIAS

ON2

VIN2

VOUT2

VIN2

VOUT2

Pin Functions

I/O

DESCRIPTION

NO.

NAME

VIN1

Switch 1 input. Bypass this input with a ceramic capacitor to GND

Active-high switch 1 control input. Do not leave floating

ON1

VBIAS

ON2

Bias voltage. Power supply to the device. Recommended voltage range for this pin is 2.5 V to 5.5

V. See the VIN and VBIAS Voltage Range section

Active-high switch 2 control input. Do not leave floating

VIN2

Switch 2 input. Bypass this input with a ceramic capacitor to GND

VOUT2

Switch 2 output

CT2

GND

CT1

—

Switch 2 slew rate control. Can be left floating

Ground

Switch 1 slew rate control. Can be left floating

VOUT1

Switch 2 output

Thermal pad (exposed center pad) to alleviate thermal stress. Tie to GND. See the Application

Information section for layout guidelines

Thermal Pad

—

TPS22968, TPS22968N

ZHCSCN4F –JANUARY 2014–REVISED JULY 2017

www.ti.com.cn

7 Specifications

7.1 Absolute Maximum Ratings

Over operating free-air temperature (unless otherwise noted)⁽¹⁾

(2)

MIN

–0.3

MAX

UNIT

V_IN1,2

V_BIAS

Input voltage

Bias voltage

V_OUT1,2Output voltage

V_ON1,2

I_MAX

I_PLS

T_J

ON voltage

Maximum continuous switch current per channel, T_A= 30 °C

Maximum pulsed switch current, pulse < 300 µs, 2% duty cycle

Maximum junction temperature

125

150

°C

T_stg

Storage temperature

–65

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended

Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) All voltage values are with respect to network ground terminal.

7.2 ESD Ratings

VALUE

±2000

±1000

UNIT

(1)

Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001

Charged-device model (CDM), per JEDEC specification JESD22-C101

V_(ESD)

Electrostatic discharge

(2)

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Manufacturing with

less than 500-V HBM is possible with the necessary precautions.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Manufacturing with

less than 250-V CDM is possible with the necessary precautions.

7.3 Recommended Operating Conditions

MIN

0.8

2.5

MAX

V_BIAS

5.5

UNIT

V_IN1,2

Input voltage

V_BIAS

Bias voltage

V_ON1,2

V_OUT1,2

V_{IH, ON1,2}

V_{IL, ON1,2}

C_IN1,2

ON voltage

5.5

Output voltage

V_IN

High-level input voltage, ON1,2

Low-level input voltage, ON1,2

Input capacitor

V_BIAS= 2.5 V to 5.5 V

1.2

1⁽¹⁾

5.5

0.5

µF

°C

(2)

T_A

Operating free-air temperature

–40

105

(1) See the Application Information section.

(2) In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may

have to be derated. Maximum ambient temperature [T_A(max)] is dependent on the maximum operating junction temperature [T_J(max)], the

maximum power dissipation of the device in the application [P_D(max)], and the junction-to-ambient thermal resistance of the part/package

in the application (R_θJA), as given by the following equation: T_A(max)= T_J(max)– (R_θJA× P_D(max)).

7.4 Thermal Information

TPS22968

(1) (2)

THERMAL METRIC

DPU (WSON)

14 PINS

62.5

UNIT

R_θJA

Junction-to-ambient thermal resistance

°C/W

R_θJC(top)

R_θJB

Junction-to-case (top) thermal resistance

Junction-to-board thermal resistance

Junction-to-top characterization parameter

70.2

23.2

ψ_JT

2.5

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report.

(2) For thermal estimates of this device based on PCB copper area, see the TI PCB Thermal Calculator.

TPS22968, TPS22968N

www.ti.com.cn

ZHCSCN4F –JANUARY 2014–REVISED JULY 2017

Thermal Information (continued)

TPS22968

(1) (2)

THERMAL METRIC

DPU (WSON)

UNIT

14 PINS

23.2

ψ_JB

Junction-to-board characterization parameter

Junction-to-case (bottom) thermal resistance

°C/W

R_θJC(bot)

7.5 Electrical Characteristics (V_BIAS= 5 V)

Unless otherwise noted, the specification in the following table applies over the operating ambient temperature

–40°C ≤ T_A≤ +105°C (full) and V_BIAS= 5 V. Typical values are for T_A= 25°C (unless otherwise noted).

PARAMETER

POWER SUPPLIES AND CURRENTS

V_BIASquiescent current (both

TEST CONDITIONS

T_A

MIN TYP MAX UNIT

I_OUT1= I_OUT2= 0, V_IN1,2= V_ON1,2= V_BIAS= 5 V

–40°C to +105°C

µA

channels)

I_{Q, VBIAS}

V_BIASquiescent current (single

I_OUT1= I_OUT2= 0, V_ON2= 0 V, V_IN1,2= V_ON1= V_BIAS

5 V

µA

channel)

I_{SD, VBIAS}

I_{SD, VIN1,2}

I_ON1,2

V_BIASshutdown current

V_ON1,2= 0 V, V_OUT1,2= 0 V

–40°C to +105°C

–40°C to +85°C

–40°C to +105°C

–40°C to +85°C

–40°C to +105°C

–40°C to +85°C

–40°C to +105°C

–40°C to +85°C

–40°C to +105°C

–40°C to +85°C

–40°C to +105°C

0.5

V_IN1,2= 5 V

0.1

0.07

0.05

0.04

V_IN1,2= 3.3 V

V_IN1,2shutdown current (per

channel)

V_ON1,2= 0 V, V_OUT1,2= 0 V

V_IN1,2= 1.8 V

V_IN1,2= 1.2 V

V_IN1,2= 0.8 V

µA

ON pin input leakage current

V_ON= 5.5 V

0.1

µA

RESISTANCE CHARACTERISTICS

25°C

320

V_IN= 5 V

–40°C to +85°C

–40°C to +105°C

25°C

mΩ

V_IN= 3.3 V

V_IN= 1.8 V

V_IN= 1.5 V

V_IN= 1.2 V

V_IN= 0.8 V

–40°C to +85°C

–40°C to +105°C

25°C

–40°C to +85°C

–40°C to +105°C

25°C

I_OUT= –200 mA, V_BIAS= 5 V

V_ON1,2= 5 V

R_ON

On-state resistance

–40°C to +85°C

–40°C to +105°C

25°C

–40°C to +85°C

–40°C to +105°C

25°C

–40°C to +85°C

–40°C to +105°C

mΩ

(1)

R_PD

Output pulldown resistance

V_IN= 5 V, V_ON= 0 V, I_OUT= 10 mA

270

(1) TPS22968 only.

TPS22968, TPS22968N

ZHCSCN4F –JANUARY 2014–REVISED JULY 2017

www.ti.com.cn

7.6 Electrical Characteristics (V_BIAS= 2.5 V)

Unless otherwise noted, the specification in the following table applies over the operating ambient temperature

–40 °C ≤ T_A≤ +105 °C (full) and V_BIAS= 2.5 V. Typical values are for T_A= 25°C (unless otherwise noted).

UNIT

PARAMETER

TEST CONDITIONS

T_A

MIN TYP

POWER SUPPLIES AND CURRENTS

V_BIASquiescent current (both

channels)

I_OUT1= I_OUT2= 0, V_IN1,2= V_ON1,2= V_BIAS= 2.5 V

–40°C to +105°C

µA

I_{Q, VBIAS}

V_BIASquiescent current (single

channel)

I_OUT1= I_OUT2= 0, V_ON2= 0 V, V_IN1,2= V_ON1= V_BIAS

2.5 V

µA

I_{SD, VBIAS}

I_{SD, VIN1,2}

I_ON1,2

V_BIASshutdown current

V_ON1,2= 0 V, V_OUT1,2= 0 V

–40°C to +105°C

–40°C to +85°C

–40°C to +105°C

–40°C to +85°C

–40°C to +105°C

–40°C to +85°C

–40°C to +105°C

–40°C to +85°C

–40°C to +105°C

–40°C to +85°C

0.5

0.1

V_IN1,2= 2.5 V

0.07

0.05

0.04

V_IN1,2= 1.8 V

V_IN1,2shutdown current (per

channel)

V_ON1,2= 0 V, V_OUT1,2= 0 V

µA

V_IN1,2= 1.2 V

V_IN1,2= 0.8 V

ON pin input leakage current

V_ON= 5.5 V

0.1

µA

RESISTANCE CHARACTERISTICS

25°C

V_IN= 2.5 V

V_IN= 1.8 V

–40°C to +85°C

–40°C to +105°C

25°C

mΩ

–40°C to +85°C

–40°C to +105°C

25°C

I_OUT= –200 mA, V_BIAS= 2.5 V

V_IN= 1.5 V

R_ON

On-state resistance

–40°C to +85°C

–40°C to +105°C

25°C

V_ON1,2= 5 V

V_IN= 1.2 V

–40°C to +85°C

–40°C to +105°C

25°C

V_IN= 0.8 V

–40°C to +85°C

–40°C to +105°C

mΩ

(1)

R_PD

Output pulldown resistance

V_IN= 2.5 V, V_ON= 0 V, I_OUT= 10 mA

270 320

(1) TPS22968 only.

TPS22968, TPS22968N

www.ti.com.cn

ZHCSCN4F –JANUARY 2014–REVISED JULY 2017

7.7 Switching Characteristics

PARAMETER

TEST CONDITION

MIN

TYP

MAX UNIT

V_IN= V_ON= V_BIAS= 5 V, T_A= 25 °C (unless otherwise noted)

t_ON

t_OFF

t_R

Turnon time

Turnoff time

V_OUTrise time

V_OUTfall time

ON delay time

R_L= 10 Ω, C_L= 0.1 µF, CT = 1000 pF

1128

1387

µs

t_F

t_D

455

V_IN= 0.8 V, V_ON= V_BIAS= 5 V, T_A= 25 ºC (unless otherwise noted)

t_ON

t_OFF

t_R

Turnon time

Turnoff time

V_OUTrise time

V_OUTfall time

ON delay time

R_L= 10 Ω, C_L= 0.1 µF, CT = 1000 pF

508

273

µs

t_F

t_D

377

V_IN= 2.5 V, V_ON= 5 V, V_BIAS= 2.5V, T_A= 25 ºC (unless otherwise noted)

t_ON

t_OFF

t_R

Turnon time

Turnoff time

V_OUTrise time

V_OUTfall time

ON delay time

R_L= 10 Ω, C_L= 0.1 µF, CT = 1000 pF

1718

1701

t_F

t_D

859

V_IN= 0.8 V, V_ON= 5 V, V_BIAS= 2.5 V, T_A= 25 ºC (unless otherwise noted)

t_ON

t_OFF

t_R

Turnon time

Turnoff time

V_OUTrise time

V_OUTfall time

ON delay time

R_L= 10 Ω, C_L= 0.1 µF, CT = 1000 pF

1117

651

t_F

t_D

775

7.8 Typical DC Characteristics

-40èC

25èC

-40èC

25èC

85èC

105èC

85èC

105èC

2.5 2.7 2.9 3.1 3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9

Bias Voltage (V)

2.5 2.7 2.9 3.1 3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9

Bias Voltage (V)

D051

D052

V_IN1= V_IN2= V_BIAS

V_ON1= V_ON2= 5 V

V_OUT= Open

V_IN1= V_IN2= V_BIAS

V_ON1= 5 V

V_ON2= 0 V

V_OUT= Open

图 1. Bias Voltage vs Quiescent Current

图 2. Bias Voltage vs Quiescent Current

(Both Channels)

(Single Channel)

TPS22968, TPS22968N

ZHCSCN4F –JANUARY 2014–REVISED JULY 2017

www.ti.com.cn

Typical DC Characteristics (接下页)

1.2

0.12

0.1

-40èC

25èC

-40èC

25èC

85èC

105èC

85èC

105èC

0.8

0.08

0.06

0.04

0.02

0.6

0.4

0.2

2.5 2.7 2.9 3.1 3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9

Bias Voltage (V)

0.5

1.5

2.5

3.5

4.5

Input Voltage (V)

D053

D054

V_IN1= V_IN2= V_BIAS

V_ON1= V_ON2= 0 V

V_OUT= 0 V

V_BIAS= 5 V

V_ON1= V_ON2= 0 V

V_OUT= 0 V

图 3. Bias Voltage vs Shutdown Current

图 4. Input Voltage vs Shutdown Current

(Both Channels)

28.5

27.5

26.5

25.5

24.5

23.5

22.5

21.5

VIN = 5 V

VIN = 3.3 V

VIN = 2.5 V

VIN = 1.8 V

VIN = 1.5 V

VIN = 1.2 V

VIN = 0.8 V

VIN = 2.5 V

VIN = 1.8 V

VIN = 1.5 V

VIN = 1.2 V

VIN = 0.8 V

-40

-20

100

120

-40

-20

100

120

Temperature (èC)

D055

D056

V_BIAS= 2.5 V

V_BIAS= 5 V

I_OUT= –200 mA

图 5. Temperature vs On-Resistance

图 6. Temperature vs On-Resistance

-40èC

25èC

85èC

105èC

-40èC

25èC

85èC

105èC

0.8

1.2

1.4

1.6

1.8

2.2

2.4

2.6

0.8 1.2 1.6

2.4 2.8 3.2 3.6

Input Voltage (V)

4.4 4.8 5.2

Input Voltage (V)

D057

D058

V_BIAS= 2.5 V

V_BIAS= 5 V

I _OUT= –200 mA

I_OUT= –200 mA

图 7. Input Voltage vs On-Resistance

图 8. Input Voltage vs On-Resistance

TPS22968, TPS22968N

www.ti.com.cn

ZHCSCN4F –JANUARY 2014–REVISED JULY 2017

Typical DC Characteristics (接下页)

2.5

280

-40èC

25èC

85èC

105èC

275

270

265

260

1.5

VBIAS = 2.5 V

VBIAS = 3.3 V

VBIAS = 3.6 V

VBIAS = 4.2 V

VBIAS = 5 V

0.5

VBIAS = 5.5 V

2.5

2.9

3.3

3.7

4.1

4.5

4.9

0.5

0.6

0.7

0.8

0.9

1.1

1.2

Input Voltage (V)

ON Voltage (V)

D059

D025

T_A= 25°C

V_IN= 2 V

V_BIAS= 5 V

V_ON= 0 V

I_OUT= 1 mA

图 10. ON Voltage vs Output Voltage

图 9. Input Voltage vs Pulldown Resistance (TPS22968 Only)

(Single Channel)

1200

550

500

450

400

350

300

-40èC

25èC

85èC

105èC

25èC

1100

85èC

105èC

1000

900

800

700

600

500

0.8

1.2

1.4

1.6

1.8

2.2

2.4

2.6

0.8 1.2 1.6

2.4 2.8 3.2 3.6

Input Voltage (V)

4.4 4.8 5.2

Input Voltage (V)

D060

D061

V_BIAS= 2.5 V

CT= 1 nF

V_BIAS= 5 V

CT = 1 nF

图 11. Input Voltage vs Delay Time

图 12. Input Voltage vs Delay Time

2.6

2.5

2.4

2.3

2.2

2.1

2.6

2.5

2.4

2.3

2.2

2.1

-40èC

25èC

85èC

105èC

25èC

85èC

105èC

1.9

1.8

1.7

1.6

1.9

1.8

1.7

1.6

1.5

0.5

1.5

2.5

3.5

4.5

1.5

0.8

Input Voltage (V)

D063

1.2

1.4

1.6

1.8

2.2

2.4

2.6

Input Voltage (V)

V_BIAS= 5 V

CT = 1 nF

D062

V_BIAS= 2.5 V

CT = 1 nF

图 14. Input Voltage vs Fall Time

图 13. Input Voltage vs Fall Time

TPS22968, TPS22968N

ZHCSCN4F –JANUARY 2014–REVISED JULY 2017

www.ti.com.cn

Typical DC Characteristics (接下页)

-40èC

25èC

85èC

105èC

-40èC

25èC

85èC

105èC

0.8

1.2

1.4

1.6

1.8

2.2

2.4

2.6

0.5

1.5

2.5

3.5

4.5

Input Voltage (V)

D064

D065

V_BIAS= 2.5 V

CT = 1 nF

V_BIAS= 5 V

CT = 1 nF

图 15. Input Voltage vs Turnoff Time

图 16. Input Voltage vs Turnoff Time

1900

1800

1700

1600

1500

1400

1300

1200

1100

1000

1200

1150

1100

1050

1000

950

900

850

800

750

-40èC

25èC

85èC

105èC

-40èC

25èC

85èC

105èC

700

650

600

550

500

900

0.8

450

0.5

1.2

1.4

1.6

1.8

2.2

2.4

2.6

1.5

2.5

3.5

4.5

Input Voltage (V)

D066

D067

V_BIAS= 2.5 V

CT = 1 nF

V_BIAS= 5 V

CT = 1 nF

图 17. Input Voltage vs Turnon Time

图 18. Input Voltage vs Turnon Time

1800

1600

1400

1200

1000

800

1600

1400

1200

1000

800

-40èC

25èC

85èC

105èC

-40èC

25èC

85èC

105èC

600

400

600

0.8

200

0.5

1.2

1.4

1.6

1.8

2.2

2.4

2.6

1.5

2.5

3.5

4.5

Input Voltage (V)

D068

D069

V_BIAS= 2.5 V

CT = 1 nF

V_BIAS= 5 V

CT = 1 nF

图 19. Input Voltage vs Rise Time

图 20. Input Voltage vs Rise Time

TPS22968, TPS22968N

www.ti.com.cn

ZHCSCN4F –JANUARY 2014–REVISED JULY 2017

7.9 Typical AC Characteristics

V_IN= 0.8 V

V_BIAS= 2.5 V

C_IN= 1 µF

V_IN= 0.8 V

V_BIAS= 5 V

C_IN= 1 µF

R_L= 10 Ω

C_L= 0.1 µF

R_L= 10 Ω

C_L= 0.1 µF

图 21. Turnon Response Time

图 22. Turnon Response Time

V_IN= 2.5 V

V_BIAS= 2.5 V

C_IN= 1 µF

C_L= 0.1 µF

V_IN= 5 V

V_BIAS= 5 V

C_IN= 1 µF

C_L= 0.1 µF

R_L= 10 Ω

图 23. Turnon Response Time

图 24. Turnon Response Time

V_IN= 0.8 V

V_BIAS= 2.5 V

C_IN= 1 µF

C_L= 0.1 µF

V_IN= 0.8 V

V_BIAS= 5 V

C_IN= 1 µF

C_L= 0.1 µF

R_L= 10 Ω

图 25. TurnOff Response Time

图 26. Turnoff Response Time

TPS22968, TPS22968N

ZHCSCN4F –JANUARY 2014–REVISED JULY 2017

www.ti.com.cn

Typical AC Characteristics (接下页)

V_IN= 2.5 V

V_BIAS= 2.5 V

C_IN= 1 µF

V_IN= 5 V

V_BIAS= 5 V

C_IN= 1 µF

C_L= 0.1 µF

R_L= 10 Ω

C_L= 0.1 µF

R_L= 10 Ω

图 27. Turnoff Response Time

图 28. Turnon Response Time

TPS22968, TPS22968N

www.ti.com.cn

ZHCSCN4F –JANUARY 2014–REVISED JULY 2017

8 Parameter Measurement Information

VIN

VOUT

CT1, 2

C_IN= 1µF

VBIAS

R_L

C_L

(A)

GND

TPS22968x

OFF

GND

Single channel shown for clarity.

TEST CIRCUIT

V_ON

50%

t_R

t_OFF

t_ON

90%

V_OUT

50%

10%

50%

10%

t_D

TIMING DIAGRAMS

A. Rise and fall times of the control signal is 100 ns.

图 29. Test Circuit and Timing Waveforms

TPS22968, TPS22968N

ZHCSCN4F –JANUARY 2014–REVISED JULY 2017

www.ti.com.cn

9 Detailed Description

9.1 Overview

The TPS22968 is a 5.5-V, 4-A, dual-channel ultra-low R_ONload switch with controlled turnon. The device

contains two N-channel MOSFETs. Each channel can support a maximum continuous current of 4 A and is

controlled by an on and off GPIO-compatible input. The ON pin must be connected and cannot be left floating.

The device is designed to control the turnon rate and therefore the inrush current. By controlling the inrush

current, power supply sag can be reduced during turnon. The slew rate for each channel is set by connecting a

capacitor to GND on the CT pins.

The slew rate is proportional to the capacitor on the CT pin. See the Adjustable Rise Time section to determine

the correct CT value for a desired rise time.

The internal circuitry is powered by the VBIAS pin, which supports voltages from 2.5 V to 5.5 V. This circuitry

includes the charge pump, QOD (optional), and control logic. For these internal blocks to function correctly, a

voltage between 2.5 V and 5.5 V must be supplied to VBIAS.

When a voltage is supplied to VBIAS, the ON1 pin goes low, and the ON2 pins go low, the QOD turns on. This

connects VOUT1 and VOUT2 to GND through an on-chip resistor. The typical pulldown resistance (R_PD) is

270 Ω.

9.2 Functional Block Diagram

VIN1

ON1

CT1

Control Logic

VOUT1

Not Present in

TPS22968N

GND

VBIAS

Charge Pump

Not Present in

TPS22968N

VOUT2

CT2

ON2

VIN2

Control Logic

TPS22968, TPS22968N

www.ti.com.cn

ZHCSCN4F –JANUARY 2014–REVISED JULY 2017

9.3 Feature Description

9.3.1 ON and OFF Control

The ON pins control the state of the switch. Asserting ON high enables the switch. ON is active high and has a

low threshold, making it capable of interfacing with low-voltage signals. The ON pin is compatible with standard

GPIO logic threshold. It can be used with any microcontroller with 1.2 V or higher GPIO voltage. This pin cannot

be left floating and must be tied either high or low for proper functionality.

9.3.2 Input Capacitor (Optional)

When the switch turns on into a discharged load capacitor or short-circuit, a capacitor must be placed between

VIN and GND to limit the voltage drop on the input supply caused by transient inrush currents. A 1-µF ceramic

capacitor (C_IN), placed close to the pins, is sufficient. Higher values of C_INcan be used to further reduce the

voltage drop during high-current application. When switching heavy loads, TI recommends having an input

capacitor 10x higher than the output capacitor to avoid excessive voltage drop.

9.3.3 Output Capacitor (Optional)

TI highly recommends a C_INgreater than C_L, because of the integrated body diode in the NMOS switch. A C_L

greater than C_INcan cause the voltage on VOUT to exceed VIN when the system supply is removed. This could

result in current flow through the body diode from VOUT to VIN. TI recommends a C_INto C_Lratio of 10 to 1 for

minimizing V_INdip caused by inrush currents during startup.

9.3.4 QOD (Optional)

The TPS22968 includes a QOD feature. When the switch is disabled, a discharge resistor is connected between

VOUT and GND. This resistor has a typical value of 270 Ω and prevents the output from floating while the switch

is disabled.

9.3.5 VIN and VBIAS Voltage Range

For optimal R_ONperformance, make sure V_IN≤ V_BIAS. The device is still functional if V_IN> V_BIAS, but it exhibits

R_ONgreater than what is listed in the Electrical Characteristics (V_BIAS= 5 V) and Electrical Characteristics (V_BIAS

= 2.5 V) table. See 图 30 for an example of a typical device. Notice the increasing R_ONas V_INexceeds V_BIAS

voltage. Be sure to never exceed the maximum voltage rating for V_INand V_BIAS

VBIAS = 2.5 V

VBIAS = 3.3 V

47.5

VBIAS = 3.6 V

VBIAS = 4.2 V

VBIAS = 5 V

42.5

VBIAS = 5.5 V

37.5

32.5

27.5

22.5

0.8 1.2 1.6

2.4 2.8 3.2 3.6

Input Voltage (V)

4.4 4.8 5.2 5.6

D070

Temperature = 25°C

I_OUT= 200 mA

图 30. On-Resistance vs Input Voltage

TPS22968, TPS22968N

ZHCSCN4F –JANUARY 2014–REVISED JULY 2017

www.ti.com.cn

Feature Description (接下页)

9.3.6 Adjustable Rise Time

A capacitor to GND on the CT pins sets the slew rate for each channel. The capacitor to GND on the CT pins

must be rated for 25 V and above. An approximate formula for the relationship between CT and slew rate with

V_BIAS= 5 V is shown in 公式 1.

SR = 0.32 × CT + 13.7

where

•

SR is the slew rate (in µs/V)

CT is the capacitance value on the CT pin (in pF)

The units for the constant 13.7 is in µs/V.

(1)

Rise time can be calculated by multiplying the input voltage by the slew rate. 表 1 contains rise time values

measured on a typical device.

表 1. Rise Time Table

(1)

Typical values at 25°C with a 25-V X7R 10% ceramic capacitor on CT

CTx (pF)

VIN = 5 V VIN = 3.3 V VIN = 2.5 V VIN = 1.8 V VIN = 1.5 V VIN = 1.2V VIN = 0.8 V

378

131

234

449

991

2213

4600

111

192

372

825

1828

3841

220

253

197

152

470

704

474

363

272

140

273

595

1349

2805

1000

2200

4700

10000

1387

3062

7091

14781

931

717

544

2021

4643

9856

1536

3547

7330

1173

2643

5507

(1) RISE TIME (µs) 10% - 90%, C_L= 0.1 µF, C_IN= 1 µF, R_L= 10 Ω, V_BIAS= 5 V

9.4 Device Functional Modes

表 2 lists the device function table.

表 2. Functional Table

ONx

VINx to VOUTx

VOUTx to GND

Off

TPS22968, TPS22968N

www.ti.com.cn

ZHCSCN4F –JANUARY 2014–REVISED JULY 2017

10 Application and Implementation

注

Information in the following applications sections is not part of the TI component

specification, and TI does not warrant its accuracy or completeness. TI’s customers are

responsible for determining suitability of components for their purposes. Customers should

validate and test their design implementation to confirm system functionality.

10.1 Application Information

This section highlights some of the design considerations for implementing this device in various applications. A

PSPICE model for this device is also available on the product page for additional information.

10.1.1 Parallel Configuration

To increase the current capabilities and lower the R_ONby approximately 50%, both channels can be placed in

parallel as shown in 图 31 (parallel configuration). With this configuration, the CT1 and CT2 pins can be tied

together to use one capacitor, CT, as shown in 图 31. With a single CT capacitor, the rise time is half of the

typical rise-time value. Refer to the 表 1 for typical timing values.

VBIAS

VIN1

ON1

VOUT1

CT1

Power

System

Module

Source

TPS22968

VIN2

ON2

VOUT2

CT2

µC GPIO

GND

图 31. Parallel Configuration

TPS22968, TPS22968N

ZHCSCN4F –JANUARY 2014–REVISED JULY 2017

www.ti.com.cn

Application Information (接下页)

10.1.2 Standby Power Reduction

Any end equipment that is powered from the battery has a need to reduce current consumption to keep the

battery charged for a longer time. TPS22968 helps to accomplish this by turning off the supply to the modules

that are in standby state, and therefore, significantly reduces the leakage current overhead of the standby

modules. See 图 32.

Always ON

Module

VBIAS

VIN1

ON1

VOUT1

CT1

Power

Source

TPS22968

GND

Standby

Module

µC GPIO

Single channel shown for clarity.

图 32. Standby Power Reduction

10.1.3 Power Supply Sequencing Without a GPIO Input

In many end equipments, there is a need to power up various modules in a predetermined manner. The

TPS22968 can solve the problem of power sequencing without adding any complexity to the overall system. See

图 33.

µC GPIO

VBIAS

VIN1

ON1

VOUT1

CT1

Power

Module 1

Source

TPS22968

VIN2

ON2

VOUT2

CT2

Power

Module 2

Source

GND

VIN1 must be greater V_IH

图 33. Power Sequencing Without a GPIO Input

TPS22968, TPS22968N

www.ti.com.cn

ZHCSCN4F –JANUARY 2014–REVISED JULY 2017

Application Information (接下页)

10.1.4 Reverse Current Blocking

In certain applications, it may be desirable to have reverse current blocking. Reverse current blocking prevents

current from flowing from the output to the input of the load switch when the device is disabled. With the following

configuration, the TPS22968 can be converted into a single-channel switch with reverse current blocking. In this

configuration, VIN1 or VIN2 can be used as the input and VIN2 or VIN1 is the output. See 图 34.

VBIAS

VIN1

ON1

VOUT1

CT1

Power

Source

TPS22968

VIN2

ON2

VOUT2

CT2

System

Module

GND

µC GPIO

图 34. Reverse Current Blocking

TPS22968, TPS22968N

ZHCSCN4F –JANUARY 2014–REVISED JULY 2017

www.ti.com.cn

10.2 Typical Application

This application demonstrates how the TPS22968 can be used to power downstream modules with large

capacitances. The example in 图 35 TPS22968 is powering a 100-µF capacitive output load.

V_IN1

ON1

V_BIAS

V_OUT1

CT1

CT2

OFF

Dual Power

Supply

C_IN

C_L

R_L

GND

Dual DC/DC

converter

V_OUT2

OFF

ON2

C_IN

C_L

R_L

GND

TPS22968x

GND

图 35. Typical Application Schematic for Powering a Downstream Module

10.2.1 Design Requirements

For this design example, use the following 表 3 as the input parameters.

表 3. Design Parameters

DESIGN PARAMETER

V_IN

EXAMPLE VALUE

3.3 V

5 V

V_BIAS

Load current

4 A

Output capacitance (C_L)

Allowable inrush current on VOUT

22 µF

0.33 A

10.2.2 Detailed Design Procedure

To begin the design process, the designer must know the following:

•

V_INvoltage

V_BIASvoltage

Load current

Allowable inrush current on VOUT due to C_Lcapacitor

10.2.2.1 VIN to VOUT Voltage Drop

The VIN to VOUT voltage drop in the device is determined by the R_ONof the device and the load current. The

R_ONof the device depends upon the V_INand V_BIASconditions of the device. Refer to the R_ONspecification of the

device in the Electrical Characteristics (V_BIAS= 5 V) and Electrical Characteristics (V_BIAS= 2.5 V) . After the R_ON

of the device is determined based upon the V_INand V_BIASconditions, use 公式 2 to calculate the VIN to VOUT

voltage drop:

DV = I_LOAD´R_ON

where

•

ΔV is the voltage drop from VIN to VOUT

I_LOADis the load current

R_ONis the On-resistance of the device for a specific V_INand V_BIAScombination

(2)

An appropriate I_LOADmust be chosen such that the I_MAXspecification of the device is not violated.

10.2.2.2 Inrush Current

To determine how much inrush current is caused by the C_Lcapacitor, use 公式 3.

dV_OUT

= C_L´

INRUSH

where

TPS22968, TPS22968N

www.ti.com.cn

ZHCSCN4F –JANUARY 2014–REVISED JULY 2017

•

I_INRUSHis the amount of inrush caused by C_L

C_Lis the capacitance on VOUT

dt is the time it takes for change in V_OUTduring the ramp up of VOUT when the device is enabled

dV_OUTis the change in V_OUTduring the ramp up of VOUT when the device is enabled

(3)

The device offers adjustable rise time for VOUT. This feature allows the user to control the inrush current during

turnon through the CTx pins. The appropriate rise time can be calculated using the design requirements and the

inrush current equation ( 公式 3). See 公式 4 and 公式 5.

330 mA = 22 µF × 3.3 V / dt

dt = 220 µs

(4)

(5)

To ensure an inrush current of less than 330 mA, choose a CT based on 表 1 or 公式 1 value that yields a rise

time of more than 220 µs. See the oscilloscope captures in the Application Curves for an example of how the CT

capacitor can be used to reduce inrush current. See 表 1 for correlation between rise times and CT values.

An appropriate C_Lvalue must be placed on VOUT such that the I_MAXand I_PLSspecifications of the device are not

violated.

10.2.2.3 Thermal Considerations

The maximum IC junction temperature must be restricted to 125°C under normal operating conditions. To

calculate the maximum allowable dissipation, P_D(max)for a given output current and ambient temperature, use 公

式 6.

T_J(MAX)- T_A

D(MAX)

R_θJA

where

•

P_D(max)is the maximum allowable power dissipation

T_J(max)is the maximum allowable junction temperature (125°C for the TPS22968)

T_Ais the ambient temperature of the device

R_θJAis the junction to air thermal impedance. See the Thermal Information table. This parameter is highly

dependent upon board layout.

(6)

公式 7 to 公式 10 and 公式 11 to 公式 13 show two examples to determine how to use this information correctly:

For V_BIAS= 5 V, V_IN= 5 V, the maximum ambient temperature with a 4-A load through each channel can be

determined by using 公式 7 to 公式 10:

White Space

P_D= I²× R × 2 (multiplied by 2 because there are two channels)

(7)

White Space

2ìI²ìR =

T_J(MAX)- T_A

R_ꢀJA

(8)

(9)

White Space

T_A= T_J(MAX)– R_θJA× 2 × I²× R

White Space

T_A= 125°C – 62.5°C/W × 2 × (4 A)²× 27 mΩ = 71°C

(10)

White Space

For V_BIAS= 5 V, V_IN= 5 V, the maximum continuous current for an ambient temperature of 85°C with the same

current flowing through each channel can be determined by using 公式 11 to 公式 13:

Space

T_J(MAX)- T_A

2´I²´R =

R_θJA

(11)

Space

TPS22968, TPS22968N

ZHCSCN4F –JANUARY 2014–REVISED JULY 2017

www.ti.com.cn

T_J(MAX)- T_A

I =

2´ R ´ R_θJA

(12)

Space

125°C – 105°C

I =

= 3.44 A per channel

2´ 27mW ´ 62.5°C/ W

(13)

10.2.3 Application Curves

The twp scope captures show the usage of a CT capacitor in conjunction with the device. A higher CT value

results in a slower rise and a lower inrush current.

VBIAS = 5 V

CT = Open

VIN = 3.3 V

T_A= 25°C

VBIAS = 5 V

CT = 220 pF

VIN = 3.3 V

T_A= 25°C

图 36. Inrush Current Without CT Capacitor

图 37. Inrush Current With CT = 220 pF

TPS22968, TPS22968N

www.ti.com.cn

ZHCSCN4F –JANUARY 2014–REVISED JULY 2017

11 Power Supply Recommendations

The device is designed to operate from a V_BIASrange of 2.5 V to 5.5 V and V_INrange of 0.8 V to 5.5 V. This

supply must be well regulated and placed as close to the device pin as possible with the recommended 1-µF

bypass capacitor. If the supply is located more than a few inches from the device pins, additional bulk

capacitance may be required in addition to the ceramic bypass capacitors. If additional bulk capacitance is

required, an electrolytic, tantalum, or ceramic capacitor of 10 µF may be sufficient.

12 Layout

12.1 Layout Guidelines

•

VIN and VOUT traces must be as short and wide as possible to accommodate for high current.

Use vias under the exposed thermal pad for thermal relief for high current operation.

VINx pins must be bypassed to ground with low-ESR ceramic bypass capacitors. The typical recommended

bypass capacitance is 1-µF ceramic with X5R or X7R dielectric. This capacitor must be placed as close to the

device pins as possible.

•

VOUTx pins must be bypassed to ground with low-ESR ceramic bypass capacitors. The typical

recommended bypass capacitance is one-tenth of the VINx bypass capacitor of X5R or X7R dielectric rating.

This capacitor must be placed as close to the device pins as possible.

•

The VBIAS pin must be bypassed to ground with low-ESR ceramic bypass capacitors. The typical

recommended bypass capacitance is 0.1-µF ceramic with X5R or X7R dielectric.

The CTx capacitors must be placed as close to the device pins as possible. The typical recommended CTx

capacitance is a capacitor of X5R or X7R dielectric rating with a rating of 25 V or higher.

12.2 Layout Example

VOUT1 capacitor

CT1 capacitor

VIN1 capacitor

Thermal

relief vias

VIN2 capacitor

CT2 capacitor

VOUT2 capacitor

TPS22968, TPS22968N

ZHCSCN4F –JANUARY 2014–REVISED JULY 2017

www.ti.com.cn

13 器件和文档支持

13.1 器件支持

13.1.1 开发支持

有关 TPS22968 和 TPS22968-Q1 PSpice 瞬态模型，请参阅 SLVMA29。

有关 TPS22968N 和 TPS22968N-Q1 PSpice 瞬态模型，请参阅 SLVMBA9。

13.2 文档支持

13.2.1 相关文档

请参阅如下相关文档：

•

《管理浪涌电流》，SLVA670A

《负载开关功耗之静态电流与关断电流》，SLVA757

《TPS22968EVM-007 双路 4A 负载开关》，SLVUA30

《负载开关热效应注意事项》，SLVUA74

《TPS22968/68N-Q1 双通道 5.5V 4A 27mΩ 负载开关 EVM 用户指南》，SLVUAE2A

《TPS22968NEVM 双路 4A 负载开关》，SLVUAL0

13.3 相关链接

下面的表格列出了快速访问链接。类别包括技术文档、支持与社区资源、工具和软件，以及申请样片或购买产品的

快速链接。

表 4. 相关链接

器件

产品文件夹

请单击此处

样片与购买

请单击此处

技术文档

请单击此处

工具和软件

请单击此处

支持和社区

请单击此处

TPS22968

TPS22968N

13.4 接收文档更新通知

如需接收文档更新通知，请访问 ti.com 上的器件产品文件夹。请单击右上角的通知我进行注册，即可收到任意产

品信息更改每周摘要。有关更改的详细信息，请查看任意已修订文档中包含的修订历史记录。

13.5 社区资源

下列链接提供到 TI 社区资源的连接。链接的内容由各个分销商“按照原样”提供。这些内容并不构成 TI 技术规范，

并且不一定反映 TI 的观点；请参阅 TI 的《使用条款》。

TI E2E™ 在线社区 TI 的工程师对工程师 (E2E) 社区。此社区的创建目的在于促进工程师之间的协作。在

e2e.ti.com 中，您可以咨询问题、分享知识、拓展思路并与同行工程师一道帮助解决问题。

设计支持

TI 参考设计支持可帮助您快速查找有帮助的 E2E 论坛、设计支持工具以及技术支持的联系信息。

13.6 商标

E2E is a trademark of Texas Instruments.

Ultrabook is a trademark of Intel.

13.7 静电放电警告

ESD 可能会损坏该集成电路。德州仪器 (TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理措施和安装程序 , 可

能会损坏集成电路。

ESD 的损坏小至导致微小的性能降级 , 大至整个器件故障。精密的集成电路可能更容易受到损坏 , 这是因为非常细微的参数更改都可

能会导致器件与其发布的规格不相符。

TPS22968, TPS22968N

www.ti.com.cn

ZHCSCN4F –JANUARY 2014–REVISED JULY 2017

13.8 Glossary

SLYZ022 — TI Glossary.

This glossary lists and explains terms, acronyms, and definitions.

14 机械、封装和可订购信息

以下页面包括机械、封装和可订购信息。这些信息是指定器件的最新可用数据。这些数据发生变化时，我们可能不

会另行通知或修订此文档。如欲获取此产品说明书的浏览器版本，请参阅左侧的导航栏。

PACKAGE OPTION ADDENDUM

www.ti.com

10-Dec-2020

PACKAGING INFORMATION

Orderable Device

Status Package Type Package Pins Package

Eco Plan

Lead finish/

Ball material

MSL Peak Temp

Op Temp (°C)

Device Marking

Samples

Drawing

Qty

(1)

(2)

(3)

(4/5)

(6)

TPS22968DPUR

TPS22968DPUT

TPS22968NDPUR

TPS22968NDPUT

ACTIVE

WSON

DPU

3000 RoHS & Green

250 RoHS & Green

3000 RoHS & Green

250 RoHS & Green

NIPDAU

Level-2-260C-1 YEAR

-40 to 105

RB968

NIPDAU

RB968

RB968N

⁽¹⁾The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

⁽²⁾RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance

do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may

reference these types of products as "Pb-Free".

RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.

Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based

flame retardants must also meet the <=1000ppm threshold requirement.

⁽³⁾MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

⁽⁴⁾There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

⁽⁵⁾Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation

of the previous line and the two combined represent the entire Device Marking for that device.

(6)

Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two

lines if the finish value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information

provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

Addendum-Page 1

PACKAGE OPTION ADDENDUM

www.ti.com

10-Dec-2020

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.

TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 2

PACKAGE MATERIALS INFORMATION

www.ti.com

23-Aug-2020

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device

Package Package Pins

Type Drawing

SPQ

Reel

Pin1

Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant

(mm) W1 (mm)

TPS22968DPUR

TPS22968DPUT

TPS22968NDPUR

TPS22968NDPUT

WSON

DPU

3000

250

180.0

8.4

2.25

3.25

1.05

4.0

8.0

3000

250

Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com

23-Aug-2020

*All dimensions are nominal

Device

Package Type Package Drawing Pins

SPQ

Length (mm) Width (mm) Height (mm)

TPS22968DPUR

TPS22968DPUT

TPS22968NDPUR

TPS22968NDPUT

WSON

DPU

3000

250

210.0

185.0

35.0

3000

250

Pack Materials-Page 2

重要声明和免责声明

TI 均以“原样”提供技术性及可靠性数据（包括数据表）、设计资源（包括参考设计）、应用或其他设计建议、网络工具、安全信息和其他资

源，不保证其中不含任何瑕疵，且不做任何明示或暗示的担保，包括但不限于对适销性、适合某特定用途或不侵犯任何第三方知识产权的暗示

担保。

所述资源可供专业开发人员应用TI 产品进行设计使用。您将对以下行为独自承担全部责任：(1) 针对您的应用选择合适的TI 产品；(2) 设计、

验证并测试您的应用；(3) 确保您的应用满足相应标准以及任何其他安全、安保或其他要求。所述资源如有变更，恕不另行通知。TI 对您使用

所述资源的授权仅限于开发资源所涉及TI 产品的相关应用。除此之外不得复制或展示所述资源，也不提供其它TI或任何第三方的知识产权授权

许可。如因使用所述资源而产生任何索赔、赔偿、成本、损失及债务等，TI对此概不负责，并且您须赔偿由此对TI 及其代表造成的损害。

TI 所提供产品均受TI 的销售条款 (http://www.ti.com.cn/zh-cn/legal/termsofsale.html) 以及ti.com.cn上或随附TI产品提供的其他可适用条款的约

束。TI提供所述资源并不扩展或以其他方式更改TI 针对TI 产品所发布的可适用的担保范围或担保免责声明。IMPORTANT NOTICE

邮寄地址：上海市浦东新区世纪大道 1568 号中建大厦 32 楼，邮政编码：200122

TPS22968 [TI]

相关型号：

TPS22968-Q1

TPS22968DPUR

TPS22968DPUT

TPS22968NDPUR

TPS22968NDPUT

TPS22968NQDMGRQ1

TPS22968NQDMGTQ1

TPS22968QDMGRQ1

TPS22968QDMGTQ1

TPS22969

TPS22969DNYR

TPS22969DNYT