TPS2553-Q1 [TI]

PRECISION ADJUSTABLE CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES; 精密可调电流限制的配电开关
TPS2553-Q1
型号: TPS2553-Q1
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

PRECISION ADJUSTABLE CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
精密可调电流限制的配电开关

开关
文件: 总29页 (文件大小:1213K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
TPS2553-Q1  
www.ti.com  
SLVSBD0 NOVEMBER 2012  
PRECISION ADJUSTABLE CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES  
Check for Samples: TPS2553-Q1  
1
FEATURES  
Fast Overcurrent Response - 2-μs (typ)  
85-mHigh-Side MOSFET (DBV Package)  
Reverse Input-Output Voltage Protection  
Operating Range: 2.5 V to 6.5 V  
Built-in Soft-Start  
2
Qualified for Automotive Applications  
AEC-Q100 Qualified With the Following  
Results:  
Device Temperature Grade 1: –40°C to  
125°C Ambient Operating Temperature  
Range  
15 kV ESD Protection per IEC 61000-4-2 (with  
External Capacitance)  
Device HBM ESD Classification Level H2  
Device CDM ESD Classification Level C3B  
UL Listed – File No. E169910 and NEMKO  
IEC60950-1-am1 ed2.0  
Up to 1.5 A Maximum Load Current  
See the TI Switch Portfolio  
±6% Current-Limit Accuracy at 1.7 A (typ)  
Meets USB Current-Limiting Requirements  
Backwards Compatible with TPS2550/51  
Adjustable current-limit, 75 mA–1300 mA (typ)  
Constant-Current (TPS2553-Q1)  
APPLICATIONS  
Automotive  
Power Distribution  
Current Limiting  
DESCRIPTION  
The TPS2553-Q1 power-distribution switches are intended for applications where precision current-limiting is  
required or heavy capacitive loads and short circuits are encountered and provide up to 1.5 A of continuous load  
current. These devices offer a programmable current-limit threshold between 75 mA and 1.7 A (typ) via an  
external resistor. Current-limit accuracy as tight as ±6% can be achieved at the higher current-limit settings. The  
power-switch rise and fall times are controlled to minimize current surges during turn on/off.  
TPS2553-Q1 devices limit the output current to a safe level by using a constant-current mode when the output  
load exceeds the current-limit threshold. An internal reverse- voltage comparator disables the power- switch  
when the output voltage is driven higher than the input to protect devices on the input side of the switch. The  
FAULT output asserts low during overcurrent and reverse-voltage conditions.  
TPS2553-Q1  
DRV PACKAGE  
(TOP VIEW)  
TPS2553-Q1  
DBV PACKAGE  
(TOP VIEW)  
TPS2553-Q1  
5V USB  
Input  
USB Data  
0.1 mF  
USB  
Port  
IN  
OUT  
RFAULT  
100 kW  
6
6
1
2
3
1
2
3
OUT  
ILIM  
IN IN  
GND GND  
OUT  
ILIM  
FAULT  
PAD  
120 mF  
5
4
5
4
ILIM  
EN  
EN  
FAULT  
RILIM  
Fault Signal  
Control Signal  
FAULT  
EN  
USB requirement only*  
20 kW  
GND  
EN = Active Low for the TPS2553-Q1  
EN = Active High for the TPS2553-Q1  
Add -1 to part number for lach-off version  
*USB requirement that downstream  
facing ports are bypassed with at least  
120 mF per hub  
Power Pad  
Figure 1. Typical Application as USB Power Switch  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PowerPAD is a trademark of Texas Instruments.  
2
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2012, Texas Instruments Incorporated  
TPS2553-Q1  
SLVSBD0 NOVEMBER 2012  
www.ti.com  
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with  
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.  
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more  
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.  
ORDERING INFORMATION(1)  
RECOMMENDED  
MAXIMUM  
CONTINUOUS LOAD  
CURRENT(2)  
CURRENT-LIMIT  
PROTECTION  
(2)  
TA  
ENABLE  
ORDERABLE PART NUMBER  
TOP-SIDE MARKING  
TPS2553QDRVRQ1  
TPS2553QDBVRQ1  
Preview  
PYEQ  
–40°C to 125°C  
Active high  
1.5 A  
Constant-Current  
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI  
website at www.ti.com.  
(2) Maximum ambient temperature is a function of device junction temperature and system level considerations, such as load current,  
power dissipation and board layout. See dissipation rating table and recommended operating conditions for specific information related  
to these devices.  
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ABSOLUTE MAXIMUM RATINGS  
over operating free-air temperature range unless otherwise noted(1)  
(2)  
VALUE  
UNIT  
V
Voltage range on IN, OUT, EN or EN, ILIM, FAULT  
Voltage range from IN to OUT  
–0.3 to 7  
–7 to 7  
V
IO  
Continuous output current  
Internally Limited  
Continuous FAULT sink current  
ILIM source current  
25  
1
mA  
mA  
kV  
V
Human Body Model Classification Level H2  
Charged Device Model ESD Classification Level C3B  
IEC system level (contact/air)(3)  
Maximum junction temperature  
Storage temperature  
2
ESD  
Ratings  
750  
8 / 15  
–40 to 150  
–65 to 150  
kV  
°C  
°C  
TJ  
Tstg  
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings  
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating  
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
(2) Voltages are referenced to GND unless otherwise noted.  
(3) Surges per EN61000-4-2. 1999 applied to output terminals of EVM. These are passing test levels, not failure threshold.  
THERMAL INFORMATION  
TPS2553-Q1  
DBV (6 PINS)  
182.6  
TPS2553-Q1  
THERMAL METRIC(1)  
UNIT  
DRV (6 PINS)  
θJA  
Junction-to-ambient thermal resistance  
Junction-to-case (top) thermal resistance  
Junction-to-board thermal resistance  
72  
θJCtop  
θJB  
122.2  
85.3  
41.3  
1.7  
29.4  
°C/W  
ψJT  
Junction-to-top characterization parameter  
Junction-to-board characterization parameter  
Junction-to-case (bottom) thermal resistance  
20.8  
ψJB  
28.9  
41.7  
11.1  
θJCbot  
n/a  
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.  
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RECOMMENDED OPERATING CONDITIONS  
MIN  
2.5  
0
MAX  
6.5  
UNIT  
V
VIN  
VEN  
VIH  
VIL  
Input voltage, IN  
Enable voltage  
6.5  
V
High-level input voltage on EN or EN  
Low-level input voltage on EN or EN  
1.1  
V
A
0.66  
1.2  
1.5  
232  
10  
–40 °C TJ 125 °C  
–40 °C TJ 105 °C  
0
0
IOUT  
Continuous output current, OUT  
RILIM  
IO  
Current-limit threshold resistor range (nominal 1%) from ILIM to GND  
Continuous FAULT sink current  
15  
0
kΩ  
mA  
μF  
Input de-coupling capacitance, IN to GND  
0.1  
–40  
-40  
IOUT 1.2 A  
OUT 1.5 A  
125  
105  
Operating virtual junction  
temperature(1)  
TJ  
°C  
I
(1) See "Dissipation Rating Table" and "Power Dissipation and Junction Temperature" sections for details on how to calculate maximum  
junction temperature for specific applications and packages.  
ELECTRICAL CHARACTERISTICS  
over recommended operating conditions, VEN = 0 V, or VEN = VIN, RFAULT = 10 k(unless otherwise noted)  
PARAMETER  
TEST CONDITIONS(1)  
MIN  
TYP MAX UNIT  
POWER SWITCH  
DBV package, TA = 25°C  
DBV package, –40°C TA 125°C  
rDS(on) Static drain-source on-state resistance DRV package, TA = 25°C  
DRV package, –40°C TA 105°C  
85  
95  
135  
115  
140  
150  
1.5  
1
100  
mΩ  
DRV package, –40°C TA 125°C  
VIN = 6.5 V  
1.1  
0.7  
tr  
tf  
Rise time, output  
Fall time, output  
VIN = 2.5 V  
VIN = 6.5 V  
VIN = 2.5 V  
CL = 1 μF, RL = 100 ,  
(see Figure 2)  
ms  
0.2  
0.2  
0.5  
0.5  
ENABLE INPUT EN OR EN  
Enable pin turn on/off threshold  
Input current  
0.66  
–0.5  
1.1  
0.5  
3
V
IEN  
ton  
toff  
VEN = 0 V or 6.5 V, VEN = 0 V or 6.5 V  
μA  
ms  
ms  
Turnon time  
Turnoff time  
CL = 1 μF, RL = 100 , (see Figure 2)  
3
CURRENT-LIMIT  
RILIM = 15 kΩ  
–40°C TA 105°C  
TA = 25°C  
1610 1700 1800  
1215 1295 1375  
1200 1295 1375  
RILIM = 20 kΩ  
–40°C TA 125°C  
TA = 25°C  
Current-limit threshold (Maximum DC output current IOUT delivered to  
load) and Short-circuit current, OUT connected to GND  
IOS  
490  
475  
100  
50  
520  
520  
130  
75  
550  
565  
150  
100  
mA  
RILIM = 49.9 kΩ  
–40°C TA 125°C  
RILIM = 210 kΩ  
ILIM shorted to IN  
tIOS  
Response time to short circuit  
VIN = 5 V (see Figure 3)  
2
μs  
REVERSE-VOLTAGE PROTECTION  
Reverse-voltage comparator trip point  
95  
3
135  
5
190  
7
mV  
ms  
(VOUT – VIN  
)
Time from reverse-voltage condition to  
MOSFET turn off  
VIN = 5 V  
(1) Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account  
separately.  
4
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ELECTRICAL CHARACTERISTICS (continued)  
over recommended operating conditions, VEN = 0 V, or VEN = VIN, RFAULT = 10 k(unless otherwise noted)  
PARAMETER  
TEST CONDITIONS(1)  
MIN  
TYP MAX UNIT  
SUPPLY CURRENT  
IIN_off Supply current, low-level output  
IIN_on Supply current, high-level output  
VIN = 6.5 V, No load on OUT, VEN = 6.5 V or VEN = 0 V  
0.1  
120  
100  
0.01  
1
140  
120  
1
μA  
μA  
μA  
μA  
RILIM = 20 kΩ  
VIN = 6.5 V, No load on OUT  
RILIM = 210 kΩ  
IREV  
Reverse leakage current  
VOUT = 6.5 V, VIN = 0 V  
TA = 25 °C  
UNDERVOLTAGE LOCKOUT  
UVLO Low-level input voltage, IN  
Hysteresis, IN  
VIN rising  
2.35  
25  
2.45  
V
TA = 25 °C  
mV  
FAULT FLAG  
VOL  
Output low voltage, FAULT  
Off-state leakage  
I/FAULT = 1 mA  
V/FAULT = 6.5 V  
180  
1
mV  
μA  
ms  
ms  
FAULT assertion or de-assertion due to overcurrent condition  
FAULT assertion or de-assertion due to reverse-voltage condition  
5
2
8
4
11  
6
FAULT deglitch  
THERMAL SHUTDOWN  
Thermal shutdown threshold  
155  
135  
°C  
°C  
°C  
Thermal shutdown threshold in  
current-limit  
Hysteresis  
10  
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TPS2553-Q1  
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DEVICE INFORMATION  
Pin Functions  
PIN  
I/O  
DESCRIPTION  
TPS2553-Q1DBV  
NO.  
TPS2553-Q1DRV  
NO.  
NAME  
EN  
3
2
4
5
I
I
Enable input, logic low turns on power switch  
Enable input, logic high turns on power switch  
Ground connection; connect externally to PowerPAD  
EN  
GND  
Input voltage; connect a 0.1 μF or greater ceramic capacitor from  
IN to GND as close to the IC as possible.  
IN  
1
6
I
Active-low open-drain output, asserted during overcurrent,  
overtemperature, or reverse-voltage conditions.  
FAULT  
OUT  
4
6
5
3
1
2
O
O
O
Power-switch output  
External resistor used to set current-limit threshold;  
recommended 15 kΩ ≤ RILIM 232 k.  
ILIM  
Internally connected to GND; used to heat-sink the part to the  
circuit board traces. Connect PowerPAD to GND pin externally.  
PowerPAD™  
PAD  
Add -1 for Latch-Off version  
FUNCTIONAL BLOCK DIAGRAM  
-
Reverse  
Voltage  
Comparator  
+
CS  
OUT  
IN  
Current  
Sense  
Charge  
Pump  
Current  
Limit  
Driver  
EN  
FAULT  
(Note A)  
UVLO  
GND  
ILIM  
Thermal  
Sense  
8-ms Deglitch  
Note A: TPS255x parts enter constant current mode  
during current limit condition; TPS255x-1 parts latch off  
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PARAMETER MEASUREMENT INFORMATION  
OUT  
t
f
t
r
R
C
L
L
90%  
90%  
V
OUT  
%
%
10  
10  
TEST CIRCUIT  
V
%
50  
50%  
V
50%  
EN  
50%  
EN  
t
off  
t
t
on  
off  
t
t
off  
on  
90%  
90%  
V
V
OUT  
OUT  
10%  
%
10  
VOLTAGE WAVEFORMS  
Figure 2. Test Circuit and Voltage Waveforms  
I
OS  
I
OUT  
t
IOS  
Figure 3. Response Time to Short Circuit Waveform  
Decreasing  
Load Resistance  
V
OUT  
Decreasing  
Load Resistance  
I
OUT  
I
OS  
Figure 4. Output Voltage vs. Current-Limit Threshold  
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TYPICAL CHARACTERISTICS  
TPS2553-Q1  
10 mF  
VIN  
VOUT  
IN  
OUT  
R
FAULT  
10 kW  
150 mF  
ILIM  
Fault Signal  
Control Signal  
FAULT  
EN  
R
ILIM  
GND  
Power Pad  
Figure 5. Typical Characteristics Reference Schematic  
Figure 6. Turnon Delay and Rise Time  
Figure 7. Turnoff Delay and Fall Time  
Figure 8. Device Enabled into Short-Circuit  
Figure 9. Full-Load to Short-Circuit Transient Response  
8
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TYPICAL CHARACTERISTICS (continued)  
Figure 10. Short-Circuit to Full-Load Recovery Response  
Figure 11. No-Load to Short-Circuit Transient Response  
Figure 12. Short-Circuit to No-Load Recovery Response  
Figure 13. No Load to 1Transient Response  
Figure 14. 1to No Load Transient Response  
Figure 15. Reverse-Voltage Protection Response  
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TYPICAL CHARACTERISTICS (continued)  
2.40  
R
= 20 kW  
ILIM  
2.39  
2.38  
2.37  
2.36  
2.35  
2.34  
2.33  
2.32  
2.31  
2.30  
UVLO Rising  
UVLO Falling  
-50  
0
50  
100  
150  
T
- Junction Temperature - °C  
J
Figure 16. Reverse-Voltage Protection Recovery  
Figure 17. UVLO – Undervoltage Lockout – V  
0.40  
0.36  
0.32  
150  
135  
120  
105  
90  
R
= 20 kW  
ILIM  
R
= 20 kW  
ILIM  
V
= 6.5 V  
IN  
V
= 5 V  
IN  
0.28  
0.24  
0.20  
0.16  
0.12  
0.08  
V
= 6.5 V  
75  
V
= 3.3 V  
IN  
IN  
V
= 2.5 V  
IN  
60  
45  
30  
V
= 2.5 V  
IN  
0.04  
0
15  
0
-50  
0
50  
- Junction Temperature - °C  
100  
150  
-50  
0
50  
- Junction Temperature - °C  
100  
150  
T
T
J
J
Figure 18. IIN – Supply Current, Output Disabled – μA  
Figure 19. IIN – Supply Current, Output Enabled – μA  
150  
125  
100  
20  
18  
16  
14  
V
R
T
= 5 V,  
IN  
= 20 kW,  
ILIM  
= 25°C  
DRV Package  
A
12  
10  
DBV Package  
75  
50  
8
6
4
25  
0
2
0
-50  
0
50  
100  
150  
0
1.5  
3
4.5  
6
T
- Junction Temperature - °C  
Peak Current - A  
J
Figure 20. current-limit Response – μs  
Figure 21. MOSFET rDS(on) Vs. Junction Temperature  
10  
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TYPICAL CHARACTERISTICS (continued)  
150  
1400  
1300  
1200  
140  
130  
120  
T
= -40°C  
= 25°C  
1100  
1000  
900  
800  
700  
600  
500  
400  
300  
200  
100  
A
T
= 25°C  
T
= -40°C  
A
110  
100  
A
T
= 125°C  
T
A
A
90  
80  
70  
60  
50  
40  
30  
T
= 125°C  
A
V
= 6.5 V,  
V
= 6.5 V,  
IN  
20  
10  
0
IN  
R
= 20 kW  
R
= 200 kW  
ILIM  
ILIM  
0
0
100  
200  
300  
400  
- V  
500  
- 100 mV/div  
OUT  
600  
700  
800  
900  
1000  
0
100  
200  
300  
400  
- V  
500  
- 100 mV/div  
OUT  
600  
700  
800  
900  
1000  
V
V
IN  
IN  
Figure 22. Switch Current Vs. Drain-Source Voltage Across  
Switch  
Figure 23. Switch Current Vs. Drain-Source Voltage Across  
Switch  
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DETAILED DESCRIPTION  
OVERVIEW  
The TPS2553-Q1 is current-limited. Power-distribution switches using N-channel MOSFETs for applications  
where short circuits or heavy capacitive loads will be encountered and provide up to 1.5 A of continuous load  
current. These devices allow the user to program the current-limit threshold between 75 mA and 1.7 A (typ) via  
an external resistor. Additional device shutdown features include overtemperature protection and reverse-voltage  
protection. The device incorporates an internal charge pump and gate drive circuitry necessary to drive the N-  
channel MOSFET. The charge pump supplies power to the driver circuit and provides the necessary voltage to  
pull the gate of the MOSFET above the source. The charge pump operates from input voltages as low as 2.5 V  
and requires little supply current. The driver controls the gate voltage of the power switch. The driver  
incorporates circuitry that controls the rise and fall times of the output voltage to limit large current and voltage  
surges and provides built-in soft-start functionality. The TPS2553-Q1 enters constant-current mode when the  
load exceeds the current-limit threshold.  
OVERCURRENT CONDITIONS  
The TPS2553-Q1 responds to overcurrent conditions by limiting the output current to the IOS levels shown in  
Figure 24. When an overcurrent condition is detected, the device maintains a constant output current and  
reduces the output voltage accordingly. Two possible overload conditions can occur.  
The first condition is when a short circuit or partial short circuit is present when the device is powered-up or  
enabled. The output voltage is held near zero potential with respect to ground and the TPS2553-Q1 ramps the  
output current to IOS. The TPS2553-Q1 device will limit the current to IOS until the overload condition is removed  
or the device begins to thermal cycle. The device will remain off until power is cycled or the device enable is  
toggled.  
The second condition is when a short circuit, partial short circuit, or transient overload occurs while the device is  
enabled and powered on. The device responds to the overcurrent condition within time tIOS (see Figure 3). The  
current-sense amplifier is overdriven during this time and momentarily disables the internal current-limit  
MOSFET. The current-sense amplifier recovers and limits the output current to IOS. Similar to the previous case,  
the TPS2553-Q1 will limit the current to IOS until the overload condition is removed or the device begins to  
thermal cycle.  
The TPS2553-Q1 thermal cycles if an overload condition is present long enough to activate thermal limiting in  
any of the above cases. The device turns off when the junction temperature exceeds 135°C (typ) while in  
current-limit. The device remains off until the junction temperature cools 10°C (typ) and then restarts. The  
TPS2553-Q1 cycles on/off until the overload is removed (see Figure 10 and Figure 12) .  
REVERSE-VOLTAGE PROTECTION  
The reverse-voltage protection feature turns off the N-channel MOSFET whenever the output voltage exceeds  
the input voltage by 135 mV (typ) for 4-ms (typ).A reverse current of (VOUT – VIN)/rDS(on)) will be present when this  
occurs. This prevents damage to devices on the input side of the TPS2553-Q1 by preventing significant current  
from sinking into the input capacitance. The TPS2553-Q1 device allows the N-channel MOSFET to turn on once  
the output voltage goes below the input voltage for the same 4-ms deglitch time.  
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FAULT RESPONSE  
The FAULT open-drain output is asserted (active low) during an overcurrent, overtemperature or reverse-voltage  
condition. The TPS2553-Q1 asserts the FAULT signal until the fault condition is removed and the device  
resumes normal operation. The TPS2553-Q1 is designed to eliminate false FAULT reporting by using an internal  
delay "deglitch" circuit for overcurrent (7.5-ms typ) and reverse-voltage (4-ms typ) conditions without the need for  
external circuitry. This ensures that FAULT is not accidentally asserted due to normal operation such as starting  
into a heavy capacitive load. The deglitch circuitry delays entering and leaving fault conditions. Overtemperature  
conditions are not deglitched and assert the FAULT signal immediately.  
UNDERVOLTAGE LOCKOUT (UVLO)  
The undervoltage lockout (UVLO) circuit disables the power switch until the input voltage reaches the UVLO turn-  
on threshold. Built-in hysteresis prevents unwanted on/off cycling due to input voltage drop from large current  
surges.  
ENABLE (EN OR EN)  
The logic enable controls the power switch, bias for the charge pump, driver, and other circuits to reduce the  
supply current. The supply current is reduced to less than 1-μA when a logic high is present on EN or when a  
logic low is present on EN. A logic low input on EN or a logic high input on EN enables the driver, control circuits,  
and power switch. The enable input is compatible with both TTL and CMOS logic levels.  
THERMAL SENSE  
The TPS2553-Q1 has a self-protection feature using two independent thermal sensing circuits that monitor the  
operating temperature of the power switch. It disables the operation if the temperature exceeds recommended  
operating conditions. The TPS2553-Q1 device operates in constant-current mode during an overcurrent  
condition, which increases the voltage drop across the power-switch. The power dissipation in the package is  
proportional to the voltage drop across the power switch, which increases the junction temperature during an  
overcurrent condition. The first thermal sensor turns off the power switch when the die temperature exceeds  
135°C (min) and the part is in current-limit. Hysteresis is built into the thermal sensor, and the switch turns on  
after the device has cooled approximately 10 °C.  
The TPS2553-Q1 also has a second ambient thermal sensor. The ambient thermal sensor turns off the power-  
switch when the die temperature exceeds 155°C (min) regardless of whether the power switch is in current-limit  
and will turn on the power switch after the device has cooled approximately 10 °C. The TPS2553-Q1 continues  
to cycle off and on until the fault is removed.  
The open-drain fault reporting output FAULT is asserted (active low) immediately during an overtemperature  
shutdown condition.  
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APPLICATION INFORMATION  
INPUT AND OUTPUT CAPACITANCE  
Input and output capacitance improves the performance of the device; the actual capacitance should be  
optimized for the particular application. For all applications, a 0.1μF or greater ceramic bypass capacitor between  
IN and GND is recommended as close to the device as possible for local noise de-coupling. This precaution  
reduces ringing on the input due to power-supply transients. Additional input capacitance may be needed on the  
input to reduce voltage overshoot from exceeding the absolute maximum voltage of the device during heavy  
transient conditions. This is especially important during bench testing when long, inductive cables are used to  
connect the evaluation board to the bench power-supply.  
Placing a high-value electrolytic capacitor on the output pin is recommended when large transient currents are  
expected on the output.  
PROGRAMMING THE CURRENT-LIMIT THRESHOLD  
The overcurrent threshold is user programmable via an external resistor. The TPS2553-Q1 uses an internal  
regulation loop to provide a regulated voltage on the ILIM pin. The current-limit threshold is proportional to the  
current sourced out of ILIM. The recommended 1% resistor range for RILIM is 15 kΩ ≤ RILIM 232 kto ensure  
stability of the internal regulation loop. Many applications require that the minimum current-limit is above a certain  
current level or that the maximum current-limit is below a certain current level, so it is important to consider the  
tolerance of the overcurrent threshold when selecting a value for RILIM. The following equations and Figure 24  
can be used to calculate the resulting overcurrent threshold for a given external resistor value (RILIM). Figure 24  
includes current-limit tolerance due to variations caused by temperature and process. However, the equations do  
not account for tolerance due to external resistor variation, so it is important to account for this tolerance when  
selecting RILIM. The traces routing the RILIM resistor to the TPS2553-Q1 should be as short as possible to reduce  
parasitic effects on the current-limit accuracy.  
RILIM can be selected to provide a current-limit threshold that occurs 1) above a minimum load current or 2)  
below a maximum load current.  
To design above a minimum current-limit threshold, find the intersection of RILIM and the maximum desired load  
current on the IOS(min) curve and choose a value of RILIM below this value. Programming the current-limit above a  
minimum threshold is important to ensure start up into full load or heavy capacitive loads. The resulting maximum  
current-limit threshold is the intersection of the selected value of RILIM and the IOS(max) curve.  
To design below a maximum current-limit threshold, find the intersection of RILIM and the maximum desired load  
current on the IOS(max) curve and choose a value of RILIM above this value. Programming the current-limit below a  
maximum threshold is important to avoid current-limiting upstream power supplies causing the input voltage bus  
to droop. The resulting minimum current-limit threshold is the intersection of the selected value of RILIM and the  
IOS(min) curve.  
Current-Limit Threshold Equations (IOS):  
22980V  
IOSmax (mA) =  
RILIM0.94kW  
23950V  
RILIM0.977kW  
IOSnom(mA) =  
25230V  
RILIM1.016kW  
IOSmin(mA) =  
(1)  
where 15 kΩ ≤ RILIM 232 k.  
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While the maximum recommended value of RILIM is 232 k, there is one additional configuration that allows for  
a lower current-limit threshold. The ILIM pin may be connected directly to IN to provide a 75 mA (typ) current-limit  
threshold. Additional low-ESR ceramic capacitance may be necessary from IN to GND in this configuration to  
prevent unwanted noise from coupling into the sensitive ILIM circuitry.  
1800  
1700  
1600  
1500  
1400  
1300  
1200  
1100  
1000  
900  
I
OS(max)  
800  
700  
600  
I
500  
OS(nom)  
400  
300  
I
200  
100  
OS(min)  
0
15 25 35 45 55 65 75 85 95 105 115 125 135 145 155 165 175 185 195 205 215 225 235  
- Current Limit Resistor - kW  
R
ILIM  
Figure 24. Current-Limit Threshold vs RILIM  
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APPLICATION 1: DESIGNING ABOVE A MINIMUM current-limit  
Some applications require that current-limiting cannot occur below a certain threshold. For this example, assume  
that 1 A must be delivered to the load so that the minimum desired current-limit threshold is 1000 mA. Use the  
IOS equations and Figure 24 to select RILIM  
IOSmin (mA) = 1000mA  
.
25230V  
RILIM1.016kW  
IOSmin (mA) =  
1
æ
ç
ç
ö1.016  
25230V  
mA  
÷
÷
÷
÷
ø
RILIM (kW) =  
ç
ç
è
I
OSmin  
RILIM (kW) = 24kW  
(2)  
Select the closest 1% resistor less than the calculated value: RILIM = 23.7 k. This sets the minimum current-limit  
threshold at 1 A . Use the IOS equations, Figure 24, and the previously calculated value for RILIM to calculate the  
maximum resulting current-limit threshold.  
RILIM(kW) = 23.7kW  
22980V  
RILIM0.94kW  
IOSmax (mA) =  
22980V  
23.70.94kW  
IOSmax (mA) =  
IOSmax (mA) = 1172.4mA  
(3)  
The resulting maximum current-limit threshold is 1172.4 mA with a 23.7 kresistor.  
APPLICATION 2: DESIGNING BELOW A MAXIMUM current-limit  
Some applications require that current-limiting must occur below a certain threshold. For this example, assume  
that the desired upper current-limit threshold must be below 500 mA to protect an up-stream power supply. Use  
the IOS equations and Figure 24 to select RILIM  
IOSmax (mA) = 500mA  
.
22980V  
RILIM0.94kW  
IOSmax (mA) =  
1
æ
ç
ç
ö0.94  
22980V  
÷
÷
÷
÷
ø
RILIM(kW) =  
ç
ç
I
mA  
è OSmax  
RILIM(kW) = 58.7kW  
(4)  
Select the closest 1% resistor greater than the calculated value: RILIM = 59 k. This sets the maximum current-  
limit threshold at 500 mA . Use the IOS equations, Figure 24, and the previously calculated value for RILIM to  
calculate the minimum resulting current-limit threshold.  
RILIM(kW) = 59kW  
25230V  
RILIM1.016kW  
IOSmin(mA) =  
25230V  
591.016kW  
IOSmin(mA) =  
IOSmin(mA) = 400.6mA  
(5)  
The resulting minimum current-limit threshold is 400.6 mA with a 59 kresistor.  
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ACCOUNTING FOR RESISTOR TOLERANCE  
The previous sections described the selection of RILIM given certain application requirements and the importance  
of understanding the current-limit threshold tolerance. The analysis focused only on the TPS2553-Q1  
performance and assumed an exact resistor value. However, resistors sold in quantity are not exact and are  
bounded by an upper and lower tolerance centered around a nominal resistance. The additional RILIM resistance  
tolerance directly affects the current-limit threshold accuracy at a system level. The following table shows a  
process that accounts for worst-case resistor tolerance assuming 1% resistor values. Step one follows the  
selection process outlined in the application examples above. Step two determines the upper and lower  
resistance bounds of the selected resistor. Step three uses the upper and lower resistor bounds in the IOS  
equations to calculate the threshold limits. It is important to use tighter tolerance resistors, e.g. 0.5% or 0.1%,  
when precision current-limiting is desired.  
Table 1. Common RILIM Resistor Selections  
Resistor Tolerance  
Actual Limits  
Ideal  
Resistor  
(k)  
Closest 1%  
Resistor  
(k)  
Desired Nominal  
current-limit (mA)  
IOS MIN  
(mA)  
IOS Nom  
(mA)  
IOS MAX  
(mA)  
1% low (k) 1% high (k)  
75  
SHORT ILIM to IN  
50.0  
101.3  
173.7  
262.1  
351.2  
448.3  
544.3  
630.2  
729.1  
824.7  
908.3  
1023.7  
1106.0  
1215.1  
1310.1  
1412.5  
1512.5  
1594.5  
75.0  
120.0  
201.5  
299.4  
396.7  
501.6  
604.6  
696.0  
800.8  
901.5  
989.1  
1109.7  
1195.4  
1308.5  
1406.7  
1512.4  
1615.2  
1699.3  
100.0  
142.1  
120  
226.1  
134.0  
88.5  
65.9  
52.5  
43.5  
37.2  
32.4  
28.7  
25.8  
23.4  
21.4  
19.7  
18.3  
17.0  
16.0  
15.0  
226  
133  
223.7  
131.7  
87.8  
65.8  
51.8  
42.8  
37.0  
32.1  
28.4  
25.8  
23.0  
21.3  
19.4  
18.0  
16.7  
15.6  
14.9  
228.3  
134.3  
89.6  
67.2  
52.8  
43.6  
37.8  
32.7  
29.0  
26.4  
23.4  
21.7  
19.8  
18.4  
17.1  
16.0  
15.2  
200  
233.9  
300  
88.7  
66.5  
52.3  
43.2  
37.4  
32.4  
28.7  
26.1  
23.2  
21.5  
19.6  
18.2  
16.9  
15.8  
15.0  
342.3  
400  
448.7  
500  
562.4  
600  
673.1  
700  
770.8  
800  
882.1  
900  
988.7  
1000  
1100  
1200  
1300  
1400  
1500  
1600  
1700  
1081.0  
1207.5  
1297.1  
1414.9  
1517.0  
1626.4  
1732.7  
1819.4  
CONSTANT-CURRENT VS. LATCH-OFF OPERATION AND IMPACT ON OUTPUT VOLTAGE  
During normal operation the constant-current device (TPS2553-Q1) has a load current that is less than the  
current-limit threshold and the device is not limiting current. During normal operation the N-channel MOSFET is  
fully enhanced, and VOUT = VIN - (IOUT x rDS(on)). The voltage drop across the MOSFET is relatively small  
compared to VIN, and VOUT VIN.  
During the initial onset of an overcurrent event, the constant-current device (TPS2553-Q1) limits current to the  
programmed current-limit threshold set by RILIM by operating the N-channel MOSFET in the linear mode. During  
current-limit operation, the N-channel MOSFET is no longer fully-enhanced and the resistance of the device  
increases. This allows the device to effectively regulate the current to the current-limit threshold. The effect of  
increasing the resistance of the MOSFET is that the voltage drop across the device is no longer negligible (VIN  
VOUT), and VOUT decreases. The amount that VOUT decreases is proportional to the magnitude of the overload  
condition. The expected VOUT can be calculated by IOS × RLOAD, where IOS is the current-limit threshold and  
RLOAD is the magnitude of the overload condition. For example, if IOS is programmed to 1 A and a 1 overload  
condition is applied, the resulting VOUT is 1 V.  
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The constant-current device (TPS2553-Q1) operates during the initial onset of an overcurrent event, if the  
overcurrent event lasts longer than the internal delay "deglitch" circuit (7.5-ms typ). The constant-current device  
(TPS2553-Q1) asserts the FAULT flag after the deglitch period and continues to regulate the current to the  
current-limit threshold indefinitely. In practical circuits, the power dissipation in the package will increase the die  
temperature above the overtemperature shutdown threshold (135°C min), and the device will turn off until the die  
temperature decreases by the hysteresis of the thermal shutdown circuit (10°C typ). The device will turn on and  
continue to thermal cycle until the overload condition is removed. The constant-current devices resume normal  
operation once the overload condition is removed.  
POWER DISSIPATION AND JUNCTION TEMPERATURE  
The low on-resistance of the N-channel MOSFET allows small surface-mount packages to pass large currents. It  
is good design practice to estimate power dissipation and junction temperature. The below analysis gives an  
approximation for calculating junction temperature based on the power dissipation in the package. However, it is  
important to note that thermal analysis is strongly dependent on additional system level factors. Such factors  
include air flow, board layout, copper thickness and surface area, and proximity to other devices dissipating  
power. Good thermal design practice must include all system level factors in addition to individual component  
analysis.  
Begin by determining the rDS(on) of the N-channel MOSFET relative to the input voltage and operating  
temperature. As an initial estimate, use the highest operating ambient temperature of interest and read rDS(on)  
from the typical characteristics graph. Using this value, the power dissipation can be calculated by:  
2
PD = rDS(on) × IOUT  
Where:  
PD = Total power dissipation (W)  
rDS(on) = Power switch on-resistance ()  
IOUT = Maximum current-limit threshold (A)  
This step calculates the total power dissipation of the N-channel MOSFET.  
Finally, calculate the junction temperature:  
TJ = PD × θJA + TA  
Where:  
TA = Ambient temperature (°C)  
θJA = Thermal resistance (°C/W)  
PD = Total power dissipation (W)  
Compare the calculated junction temperature with the initial estimate. If they are not within a few degrees, repeat  
the calculation using the "refined" rDS(on) from the previous calculation as the new estimate. Two or three  
iterations are generally sufficient to achieve the desired result. The final junction temperature is highly dependent  
on thermal resistance θJA, and thermal resistance is highly dependent on the individual package and board  
layout. The Thermal Information Table provides example thermal resistance for specific packages and board  
layouts.  
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UNIVERSAL SERIAL BUS (USB) POWER-DISTRIBUTION REQUIREMENTS  
One application for this device is for current-limiting in universal serial bus (USB) applications. The original USB  
interface was a 12-Mb/s or 1.5-Mb/s, multiplexed serial bus designed for low-to-medium bandwidth PC  
peripherals (e.g., keyboards, printers, scanners, and mice). As the demand for more bandwidth increased, the  
USB 2.0 standard was introduced increasing the maximum data rate to 480-Mb/s. The four-wire USB interface is  
conceived for dynamic attach-detach (hot plug-unplug) of peripherals. Two lines are provided for differential data,  
and two lines are provided for 5-V power distribution.  
USB data is a 3.3-V level signal, but power is distributed at 5 V to allow for voltage drops in cases where power  
is distributed through more than one hub across long cables. Each function must provide its own regulated 3.3 V  
from the 5-V input or its own internal power supply. The USB specification classifies two different classes of  
devices depending on its maximum current draw. A device classified as low-power can draw up to 100 mA as  
defined by the standard. A device classified as high-power can draw up to 500 mA. It is important that the  
minimum current-limit threshold of the current-limiting power-switch exceed the maximum current-limit draw of  
the intended application. The latest USB standard should always be referenced when considering the current-  
limit threshold  
The USB specification defines two types of devices as hubs and functions. A USB hub is a device that contains  
multiple ports for different USB devices to connect and can be self-powered (SPH) or bus-powered (BPH). A  
function is a USB device that is able to transmit or receive data or control information over the bus. A USB  
function can be embedded in a USB hub. A USB function can be one of three types included in the list below.  
Low-power, bus-powered function  
High-power, bus-powered function  
Self-powered function  
SPHs and BPHs distribute data and power to downstream functions. The TPS2553-Q1 has higher current  
capability than required for a single USB port allowing it to power multiple downstream ports.  
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SELF-POWERED AND BUS-POWERED HUBS  
A SPH has a local power supply that powers embedded functions and downstream ports. This power supply  
must provide between 4.75 V to 5.25 V to downstream facing devices under full-load and no-load conditions.  
SPHs are required to have current-limit protection and must report overcurrent conditions to the USB controller.  
Typical SPHs are desktop PCs, monitors, printers, and stand-alone hubs.  
A BPH obtains all power from an upstream port and often contains an embedded function. It must power up with  
less than 100 mA. The BPH usually has one embedded function, and power is always available to the controller  
of the hub. If the embedded function and hub require more than 100 mA on power up, the power to the  
embedded function may need to be kept off until enumeration is completed. This is accomplished by removing  
power or by shutting off the clock to the embedded function. Power switching the embedded function is not  
necessary if the aggregate power draw for the function and controller is less than 100 mA. The total current  
drawn by the bus-powered device is the sum of the current to the controller, the embedded function, and the  
downstream ports, and it is limited to 500 mA from an upstream port.  
LOW-POWER BUS-POWERED AND HIGH-POWER BUS-POWERED FUNCTIONS  
Both low-power and high-power bus-powered functions obtain all power from upstream ports. Low-power  
functions always draw less than 100 mA; high-power functions must draw less than 100 mA at power up and can  
draw up to 500 mA after enumeration. If the load of the function is more than the parallel combination of 44 Ω  
and 10 μF at power up, the device must implement inrush current-limiting.  
USB POWER-DISTRIBUTION REQUIREMENTS  
USB can be implemented in several ways regardless of the type of USB device being developed. Several power-  
distribution features must be implemented.  
SPHs must:  
current-limit downstream ports  
Report overcurrent conditions  
BPHs must:  
Enable/disable power to downstream ports  
Power up at <100 mA  
Limit inrush current (<44 and 10 μF)  
Functions must:  
Limit inrush currents  
Power up at <100 mA  
The feature set of the TPS2553-Q1 meets each of these requirements. The integrated current-limiting and  
overcurrent reporting is required by self-powered hubs. The logic-level enable and controlled rise times meet the  
need of both input and output ports on bus-powered hubs and the input ports for bus-powered functions.  
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AUTO-RETRY FUNCTIONALITY  
Some applications require that an overcurrent condition disables the part momentarily during a fault condition  
and re-enables after a pre-set time. This auto-retry functionality can be implemented with an external resistor and  
capacitor. During a fault condition, FAULT pulls low disabling the part. The part is disabled when EN is pulled  
low, and FAULT goes high impedance allowing CRETRY to begin charging. The part re-enables when the voltage  
on EN reaches the turnon threshold, and the auto-retry time is determined by the resistor/capacitor time  
constant. The part will continue to cycle in this manner until the fault condition is removed.  
TPS2553-Q1  
0.1 mF  
Input  
Output  
IN  
OUT  
R
R
LOAD  
FAULT  
C
LOAD  
100 kW  
ILIM  
R
ILIM  
FAULT  
EN  
20 kW  
GND  
C
RETRY  
Power Pad  
0.1 mF  
Figure 25. Auto-Retry Functionality  
Some applications require auto-retry functionality and the ability to enable/disable with an external logic signal.  
The figure below shows how an external logic signal can drive EN through RFAULT and maintain auto-retry  
functionality. The resistor/capacitor time constant determines the auto-retry time-out period.  
TPS2553-Q1  
0.1 mF  
Input  
Output  
IN  
OUT  
R
LOAD  
C
LOAD  
ILIM  
External Logic  
Signal & Driver  
R
R
FAULT  
ILIM  
FAULT  
EN  
100 kW  
20 kW  
GND  
C
RETRY  
Power Pad  
0.1 mF  
Figure 26. Auto-Retry Functionality With External EN Signal  
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TWO-LEVEL CURRENT-LIMIT CIRCUIT  
Some applications require different current-limit thresholds depending on external system conditions. Figure 27  
shows an implementation for an externally controlled, two-level current-limit circuit. The current-limit threshold is  
set by the total resistance from ILIM to GND (see the Programming the Current-Limit Threshold section). A logic-  
level input enables/disables MOSFET Q1 and changes the current-limit threshold by modifying the total  
resistance from ILIM to GND. Additional MOSFET/resistor combinations can be used in parallel to Q1/R2 to  
increase the number of additional current-limit levels.  
NOTE  
ILIM should never be driven directly with an external signal.  
Input  
0.1 mF  
Output  
IN  
OUT  
R
R
FAULT  
C
LOAD  
LOAD  
100 kW  
R1  
210 kW  
ILIM  
R2  
22.1 kW  
Fault Signal  
FAULT  
EN  
GND  
Control Signal  
Power Pad  
Q1  
2N7002  
Current Limit  
Control Signal  
Figure 27. Two-Level Current-Limit Circuit  
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PACKAGE OPTION ADDENDUM  
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PACKAGING INFORMATION  
Orderable Device  
Status Package Type Package Pins Package Qty  
Eco Plan Lead/Ball Finish  
MSL Peak Temp  
Op Temp (°C)  
Top-Side Markings  
Samples  
Drawing  
(1)  
(2)  
(3)  
(4)  
TPS2553QDBVRQ1  
ACTIVE  
SOT-23  
DBV  
6
3000  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU  
Level-2-260C-1 YEAR  
PYEQ  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability  
information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that  
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between  
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight  
in homogeneous material)  
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
(4) Only one of markings shown within the brackets will appear on the physical device.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
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OTHER QUALIFIED VERSIONS OF TPS2553-Q1 :  
Catalog: TPS2553  
NOTE: Qualified Version Definitions:  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
24-Jan-2013  
Catalog - TI's standard catalog product  
Addendum-Page 2  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
5-Dec-2012  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
TPS2553QDBVRQ1  
SOT-23  
DBV  
6
3000  
178.0  
9.0  
3.23  
3.17  
1.37  
4.0  
8.0  
Q3  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
5-Dec-2012  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SOT-23 DBV  
SPQ  
Length (mm) Width (mm) Height (mm)  
180.0 180.0 18.0  
TPS2553QDBVRQ1  
6
3000  
Pack Materials-Page 2  
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