TPS2559-Q1 [TI]
高电平有效的汽车类 1.2-4.7A 可调节 ILIMIT、2.5-6.5V、13mΩ USB 电源开关;
| 型号： | TPS2559-Q1 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 高电平有效的汽车类 1.2-4.7A 可调节 ILIMIT、2.5-6.5V、13mΩ USB 电源开关 开关 电源开关 |
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| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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TPS2559-Q1
ZHCSEM7 –DECEMBER 2015
TPS2559-Q1 高精度可调式限流配电开关
1 特性
3 说明
1
•
适用于汽车电子 应用 具有符合 AEC-Q100 标准的
下列结果：
TPS2559-Q1 配电开关专门用于 需要低电阻、高精度
限流开关或使用高容性负载 的应用。TPS2559-Q1 最
高可提供 5.5A 的持续负载电流，通过单个接地电阻即
可实现精确限流。当输出负载超出限流阈值时，可通过
切换至恒流模式使输出电流保持在一个安全的级别。过
载事件期间，输出电流被限制在由 R(ILIM) 设定的级
别。如果出现持续过载，TPS2559-Q1 将进入热关断
模式，从而避免自身发生损坏。
–
器件人体放电模式 (HBM) 静电放电 (ESD) 分类
等级 H2
–
器件组件充电模式 (CDM) ESD 分类等级 C5
•
•
2.5V 至 6.5V 工作电压范围
1.2 至 4.7A 的可调节电流 I(LIMIT)（4.7A 时的限流
精度为 ±4.7%）
•
•
3.5µs 短路关断响应时间（典型值）
对电源开关的上升和下降次数进行控制以最大程度降低
接通或关断期间的电流冲击。在过流或过热情况
下，FAULT 逻辑输出被置为低电平。
13mΩ 高侧金属氧化物半导体场效应晶体管
(MOSFET)
•
•
•
•
•
2μA 最大待机电源电流
内置软启动
器件信息(1)
禁用时提供反向电流阻断
8kV/15kV 系统级静电放电 (ESD) 能力
器件型号
封装
封装尺寸（标称值）
超薄小外形尺寸无引
线 (VSON) (10)
TPS2559-Q1
3.00mm x 3.00mm
具有可湿性侧面的 10 引脚小外形尺寸无引线
(3mm × 3mm) 封装
(1) 要了解所有可用封装，请见数据表末尾的可订购产品附录。
2 应用
•
•
汽车类 USB 端口/集线器
汽车类内部负载开关
LP38690 的
TPS2559-Q1DRC
2.5V-6.5V 0.1mF
VOUT
7/8/9
2/3/4
OUT
IN
RFAULT
COUT
FAULT
Signal
10
FAULT
EN
6
ILIM
Control
Signal
5
Power
PAD
GND
RILIM
1
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
English Data Sheet: SLVSD03
TPS2559-Q1
ZHCSEM7 –DECEMBER 2015
www.ti.com.cn
目录
9.1 Overview ................................................................. 10
9.2 Functional Block Diagram ....................................... 10
9.3 Feature Description................................................. 10
9.4 Device Functional Modes........................................ 11
10 Application and Implementation........................ 12
10.1 Application Information.......................................... 12
10.2 Typical Application ............................................... 12
11 Power Supply Recommendations ..................... 19
12 Layout................................................................... 20
12.1 Layout Guidelines ................................................. 20
12.2 Layout Example .................................................... 20
13 器件和文档支持 ..................................................... 21
13.1 社区资源................................................................ 21
13.2 商标....................................................................... 21
13.3 静电放电警告......................................................... 21
13.4 Glossary................................................................ 21
14 机械、封装和可订购信息....................................... 21
1
2
3
4
5
6
7
特性.......................................................................... 1
应用.......................................................................... 1
说明.......................................................................... 1
修订历史记录 ........................................................... 2
Device Comparison Table..................................... 3
Pin Configuration and Functions......................... 3
Specifications......................................................... 4
7.1 Absolute Maximum Ratings ...................................... 4
7.2 ESD Ratings ............................................................ 4
7.3 Recommended Operating Conditions....................... 4
7.4 Thermal Information.................................................. 4
7.5 Electrical Characteristics........................................... 5
7.6 Timing Requirements ............................................... 6
7.7 Typical Characteristics.............................................. 7
Parameter Measurement Information .................. 9
Detailed Description ............................................ 10
8
9
4 修订历史记录
日期
修订版本
注释
2015 年 12 月
*
首次发布。
2
Copyright © 2015, Texas Instruments Incorporated
TPS2559-Q1
www.ti.com.cn
ZHCSEM7 –DECEMBER 2015
5 Device Comparison Table
Operation
Range (V)
ICONT.
Adj. Range (A)
Device
OCP Mode
RDS(on) (mΩ)
IOS tolerance
Package
TPS2559-Q1
TPS2553-Q1
TPS2556/7-Q1
2.5 - 6.5
2.5 - 6.5
2.5 - 6.5
Auto Retry
Auto Retry
Auto Retry
5.5
1.2
5
13
85 (DBV)
22
±4.7% at 4.7 A
±6.8% at 1.3 A
±6.3% at 4.5 A
DRC (SON-10)
DBV (SOT-23)
DRB (SON-8)
TPS2561A-Q1
(Dual Channels)
2.5 - 6.5
Auto Retry
Auto Retry
2.5
2.5
44
60
2.1 A to 2.5 A
±6.3% at 2.7 A
DRC (SON-10)
DRV (SON-6)
TPS25200-Q1
(With OVP protection)
2.5 - 6.5
(Withstand up to 20V)
6 Pin Configuration and Functions
DRC Package
SON-10 (10 Pins)
Top View
GND
1
2
3
4
10
9
8
7
6
FAULT
OUT
OUT
OUT
ILIM
IN
IN
PAD
IN
EN
5
Pin Functions
PIN
TYPE
DESCRIPTION
NAME
NO.
GND
1
Ground connection, connect externally to PowerPAD
Input voltage, connect a 0.1 μF or greater ceramic capacitor from IN to GND as close to the
IC as possible
IN
2,3,4
I
I
EN
ILIM
5
6
Enable input, logic high turns on power switch.
External resistor used to set current-limit threshold; recommended. 24.9 kΩ ≤ R(ILIM) ≤ 100
kΩ.
O
OUT
7,8,9
10
O
O
Power-switch output
FAULT
Active-low open-drain output, asserted during over-current or overtemperature conditions.
Internally connected to GND; used to heat-sink the part to the circuit board traces. Connect
PowerPAD to GND pin externally.
PowerPAD™
PAD
Copyright © 2015, Texas Instruments Incorporated
3
TPS2559-Q1
ZHCSEM7 –DECEMBER 2015
www.ti.com.cn
7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
(1) (2)
MIN
–0.3
–7
MAX
UNIT
V
Voltage range
IN, OUT, EN, ILIM, FAULT
7
7
IN to OUT
OUT
V
Continuous output current, IOUT
Continuous FAULT sink current
ILIM source current
Internally Limited
mA
mA
mA
°C
20
Internally Limited
Maximum junction temperature, TJ
Storage temperature, Tstg
–40
–65
to OTSD2
150
°C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Voltages are referenced to GND unless otherwise noted.
7.2 ESD Ratings
VALUE
±2000
±750
UNIT
Human body model (HBM), ESD stress voltage, all pins(2)
Charged device model (CDM), ESD stress voltage, all pins(3)
Electrostatic
discharge(1)
V(ESD)
V
Contact discharge
Air discharge
±8000
±15000
(4)
System Level
(1) Electrostatic discharge (ESD) to measure device sensitivity or immunity to damage caused by assembly-line electrostatic discharges
into the device.
(2) The passing level per AEC-Q100 Classification H2.
(3) The passing level per AEC-Q100 Classification C5.
(4) Surges per EN61000-4-2, 1999 applied between USB and output ground of the TPS2559EVM (SLUUB15) evaluation module
(documentation available on the Web.) These were the test levels, not the failure threshold.
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
2.5
0
MAX UNIT
VIN
Input voltage, IN
6.5
6.5
5.5
10
V
V
VEN
IOUT
Input voltage, EN
Continuous output current of OUT
Continuous FAULT sink current
Recommended resistor limit range
Operating junction temperature
A
mA
kΩ
°C
(1)
R(ILIM)
TJ
24.9
-40
100
125
(1) R(ILIM) is the resistor from ILIM pin to GND and ILIM pin can be shorted to GND.
7.4 Thermal Information
TPS2559-Q1
THERMAL METRIC(1)
UNIT
DRC (10 PINS)
RθJA
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
40.6
45.5
15.9
0.4
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
RθJC(top)
RθJB
ψJT
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
ψJB
15.7
2.8
RθJC(bot)
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
4
Copyright © 2015, Texas Instruments Incorporated
TPS2559-Q1
www.ti.com.cn
ZHCSEM7 –DECEMBER 2015
7.5 Electrical Characteristics
Conditions are –40°C ≤ TJ ≤ 125°C, 2.5 V ≤ VIN ≤ 6.5 V, V(EN) = VIN, R(ILIM) = 49.9 kΩ. Positive current are into pins. Typical
value is at 25°C. All voltages are with respect to GND (unless otherwise noted).
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
POWER SWITCH
TJ = 25°C
13
16
21
RDS(on) Input - Output Resistance(1)
mΩ
-40°C ≤ TJ ≤ 125°C
ENABLE INPUT EN
EN turn on/off threshold
Hysteresis
0.66
–1
1.1
1
V
55(2)
mV
µA
I(EN)
Input current
V(EN) = 0 V or V(EN) = 6.5 V
CURRENT LIMIT
R(ILIM) = 24.9 kΩ
4490
2505
2215
1780
1080
5860
4730
2660
2360
1900
1180
6700
4931
2805
2490
2015
1265
7460
R(ILIM) = 44.2kΩ
R(ILIM) = 49.9kΩ
IOS
OUT short circuit current limit
mA
R(ILIM) = 61.9 kΩ
R(ILIM) = 100 kΩ
ILIM pin short to GND (R(ILIM) = 0)
SUPPLY CURRENT
I(IN_OFF) Disabled, IN supply current
V(EN) = 0 V, No load on OUT
0.1
97
2
125
135
µA
µA
R(ILIM) = 100 kΩ, no load on OUT
R(ILIM) = 24.9 kΩ, no load on OUT
I(IN_ON) Enabled, IN supply current
107
VOUT = 6.5 V, VIN = 0 V, TJ = 25°C,
Measure IOUT
I(REV)
Reverse leakage current
0.01
1
µA
UNDERVOLTAGE LOCKOUT
VUVLO
IN rising UVLO threshold voltage
2.36
35(2)
2.45
V
Hysteresis
mV
FAULT
VOL
Output low voltage
Off-state leakage
IFAULT = 1 mA
VFAULT = 6.5 V
180
1
mV
µA
THERMAL SHUTDOWN
OTSD2 Thermal shutdown threshold
OTSD1 Thermal shutdown threshold in current-limit
Hysteresis
155
135
°C
(2)
20
(1) Pulse-testing techniques maintain junction temperature close to ambient temperature. Thermal effects must be taken into account
separately
(2) These parameters are provided for reference only, and don’t constitute part of TI’s published device specifications for purposes of TI’s
product warranty.
Copyright © 2015, Texas Instruments Incorporated
5
TPS2559-Q1
ZHCSEM7 –DECEMBER 2015
www.ti.com.cn
7.6 Timing Requirements
Conditions are –40°C ≤ TJ = ≤ 125°C, 2.5 V ≤ VIN ≤ 6.5 V, V(EN) = VIN, R(ILIM) = 49.9 kΩ. Positive current are into pins. Typical
value is at 25°C. All voltages are with respect to GND (unless otherwise noted).
PARAMETER
POWER SWITCH
TEST CONDITIONS
MIN
TYP
MAX UNIT
VIN = 6.5 V
VIN = 2.5 V
VIN = 6.5 V
VIN = 2.5 V
2.6
1.3
3.44
2.01
0.89
0.58
5.2
tr
tf
OUT voltage rise time
OUT voltage fall time
3.9
ms
1.3
CL = 1 µF, RL = 100 Ω, See Figure 13
0.7
0.42
1.04
ENABLE INPUT EN
ton
toff
OUT voltage turn-on time
OUT voltage turn-off time
15
ms
8
CL = 1 µF, RL = 100 Ω, See Figure 14
CURRENT LIMIT
tIOS
Short-circuit response time(1)
VIN = 5 V, RSHORT = 50 mΩ, See Figure 15
3.5(1)
µs
FAULT
FAULT assertion or de-assertion due to overcurrent
condition
FAULT deglitch
6
9
13
ms
(1) This parameter is provided for reference only and does not constitute part of TI's published device specifications for purposes of TI's
product warranty
6
Copyright © 2015, Texas Instruments Incorporated
TPS2559-Q1
www.ti.com.cn
ZHCSEM7 –DECEMBER 2015
7.7 Typical Characteristics
0.6
0.5
0.4
0.3
0.2
0.1
0.0
2.5
2.4
2.3
2.2
2.1
2.0
Rising
Falling
0
50
100
150
œ50
0
50
100
150
œ50
Junction Temperature (°C)
Junction Temperature (°C)
C002
C001
VIN = 6.5 V
Figure 2. Supply Current, Output Disabled (IIN_OFF) vs
Temperature
Figure 1. Under-voltage Lockout (UVLO) vs Temperature
120
100
80
140
120
100
80
60
60
40
40
20
0
V=2.5 V
V=2.5 V
IN
IN
20
VIN = 6.5 V
VIN = 6.5 V
0
0
50
100
150
0
50
100
150
œ50
œ50
Junction Temperature (°C)
Junction Temperature (°C)
C003
C004
R(ILIM) = 100 KΩ
R(ILIM) = 24.9 KΩ
Figure 3. Supply Current, Output Enabled (IIN_ON) vs
Temperature
Figure 4. Supply Current, Output Enabled (IIN_ON) vs
Temperature
0.7
18
16
14
12
10
8
0.6
0.5
0.4
0.3
0.2
0.1
0.0
œ0.1
0
50
100
150
0
50
100
150
œ50
œ50
Junction Temperature (°C)
Junction Temperature (°C)
C005
C006
VOUT = 6.5 V
VIN = 5 V
Figure 6. Input-Output Resistance (RDS(on)) vs Temperature
Figure 5. Reverse Leakage Current (IREV) v. Temperature
Copyright © 2015, Texas Instruments Incorporated
7
TPS2559-Q1
ZHCSEM7 –DECEMBER 2015
www.ti.com.cn
Typical Characteristics (continued)
8.0
13
12
11
10
9
7.5
7.0
6.5
6.0
5.5
5.0
8
7
6
0
50
100
150
œ50
0
50
100
150
œ50
Junction Temperature (°C)
Junction Temperature (°C)
C007
C008
VIN = 6.5 V
ILIM pin short to GND
V(FAULT) = 2.5 V
Figure 7. Short Circuit Current (IOS) vs Temperature
Figure 8. Deglitch Time (tFAULT) vs Temperature
4.0
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
V=2.5 V
V=2.5V
IN
IN
VIN = 6.5 V
VIN = 6.5 V
0
50
100
150
0
50
100
150
œ50
œ50
Junction Temperature (°C)
R(LOAD) = 100 Ω
Junction Temperature (°C)
R(LOAD) = 100 Ω
C009
C010
COUT = 1 µF
COUT = 1 µF
Figure 9. Output Rise Time (tR) vs Temperature
Figure 10. Output Fall Time (tF) vs Temperature
6
R
= 24.9 kꢀ
ILIM
R
= 44.9 kꢀ
ILIM
5
4
3
2
1
0
R
= 49.9 kꢀ
ILIM
R
= 61.9 kꢀ
ILIM
R
= 100 kꢀ
ILIM
0
50
100
150
œ50
Junction Temperature (°C)
C011
VIN = 6.5 V
Figure 11. Short Circuit Current (IOS) vs Temperature
8
Copyright © 2015, Texas Instruments Incorporated
TPS2559-Q1
www.ti.com.cn
ZHCSEM7 –DECEMBER 2015
8 Parameter Measurement Information
OUT
90%
VOUT
RL
CL
tf
tr
10%
Figure 12. Output Rise/Fall time Test Load
spacer
spacer
Figure 13. Power-On and Off Timing
IOUT
IOS
120% x IOS
50%
ton
50%
VEN
toff
0A
90%
tIOS
VOUT
10%
Figure 14. Enable Timing, Active High Enable
Figure 15. Output Short Circuit Parameters
Copyright © 2015, Texas Instruments Incorporated
9
TPS2559-Q1
ZHCSEM7 –DECEMBER 2015
www.ti.com.cn
9 Detailed Description
9.1 Overview
The TPS2559-Q1 is a current-limited, power-distribution switch using N-channel MOSFETs for applications
where short circuits or heavy capacitive loads will be encountered. This device allows the user to program the
current-limit via an external resistor and the maximum continuous output current up to 5.5 A. This device
incorporates an internal charge pump and the gate drive circuitry necessary to drive the N-channel MOSFET.
The charge pump supplies power to the driver circuit and provides the necessary voltage to pull the gate of the
MOSFET above the source. The charge pump operates from input voltages as low as 2.5 V and requires little
supply current. The driver controls the gate voltage of the power switch. The driver incorporates circuitry that
controls the rise and fall times of the output voltage to limit large current and voltage surges and provides built-in
soft-start functionality. The TPS2559-Q1 limits the output current to the programmed current-limit threshold IOS
during an overcurrent or short-circuit event by reducing the charge pump voltage driving the N-channel MOSFET
and operating it in the linear range of operation. The result of limiting the output current to IOS reduces the output
voltage at OUT because N-channel MOSFET is no longer fully enhanced.
9.2 Functional Block Diagram
2/3/4
CS
7/8/9
IN
OUT
Current
Sense
Charge
Pump
Current
Limit
5
Driver
EN
10
FAULT
UVLO
9-ms
Deglitch
6
1
ILIM
Thermal
Sense
GND
9.3 Feature Description
9.3.1 Thermal Sense
The TPS2559-Q1 self protects by using two independent thermal sensing circuits that monitor the operating
temperature of the power switch and disable operation if the temperature exceeds recommended operating
conditions. The TPS2559-Q1 device operates in constant-current mode during an over-current condition, which
increases the voltage drop across power switch. The power dissipation in the package is proportional to the
voltage drop across the power switch, which increases the junction temperature during an over-current condition.
The first thermal sensor (OTSD1) turns off the power switch when the die temperature exceeds 135°C (min) and
the part is in current limit. Hysteresis is built into the thermal sensor, and the switch turns on after the device has
cooled approximately 20°C.
The TPS2559-Q1 also has a second ambient thermal sensor (OTSD2). The ambient thermal sensor turns off the
power switch when the die temperature exceeds 155°C (min) regardless of whether the power switch is in
current limit and will turn on the power switch after the device has cooled approximately 20°C. The TPS2559-Q1
continues to cycle off and on until the fault is removed.
10
Copyright © 2015, Texas Instruments Incorporated
TPS2559-Q1
www.ti.com.cn
ZHCSEM7 –DECEMBER 2015
Feature Description (continued)
9.3.2 Overcurrent Protection
The TPS2559-Q1 responds to overcurrent conditions by limiting their output current to IOS. When an overload
condition is present, the device maintains a constant output current, with the output voltage determined by (IOS
RLOAD). Two possible overload conditions can occur.
×
The first condition is when a short circuit or partial short circuit is present when the device is powered-up or
enabled. The output voltage is held near zero potential with respect to ground and the TPS2559-Q1 ramps the
output current to IOS. The TPS2559-Q1 limits the current to IOS until the overload condition is removed or the
device begins to thermal cycle (see Figure 24).
The second condition is when a short circuit, partial short circuit, or transient overload occurs while the device is
enabled and powered on. The device responds to the overcurrent condition within time tIOS (see Figure 15). The
response speed and shape will vary with the overload level, input circuit, and rate of application. The current-limit
response will vary between simply settling to IOS, or turnoff and controlled return to IOS. Similar to the previous
case, the TPS2559-Q1 limits the current to IOS until the overload condition is removed or the device begins to
thermal cycle.
The TPS2559-Q1 thermal cycles if an overload condition is present long enough to activate thermal limiting in
any of the above cases. The device turns off when the junction temperature exceeds 135°C (min) while in current
limit. The device remains off until the junction temperature cools 20°C (typ) and then restarts. The TPS2559-Q1
cycles on/off until the overload is removed (see Figure 25).
9.3.3 FAULT Response
The FAULT open-drain output is asserted (active low) during an over-current or over-temperature condition. The
TPS2559-Q1 asserts the FAULT signal until the fault condition is removed and the device resumes normal
operation. The TPS2559-Q1 is designed to eliminate false FAULT reporting by using an internal delay "deglitch"
circuit for over-current (9-ms typ.) conditions without the need for external circuitry. This ensures that FAULT is
not accidentally asserted due to normal operation such as starting into a heavy capacitive load. The deglitch
circuitry delays entering and leaving current-limit induced fault conditions. The FAULT signal is not deglitched
when the MOSFET is disabled due to an over-temperature condition but is deglitched after the device has cooled
and begins to turn on. This unidirectional deglitch prevents FAULT oscillation during an over-temperature event.
9.4 Device Functional Modes
9.4.1 Operation with VIN Undervoltage Lockout (UVLO) Control
The undervoltage lockout (UVLO) circuit disables the power switch until the input voltage reaches the UVLO turn-
on threshold. Built-in hysteresis prevents unwanted on/off cycling due to input voltage droop during turn on.
9.4.2 Operation with EN Control
The logic enable controls the power switch and device supply current. The supply current is reduced to less than
2-μA when a logic low is present on EN. A logic high input on EN enables the driver, control circuits, and power
switch. The enable input is compatible with both TTL and CMOS logic levels.
Copyright © 2015, Texas Instruments Incorporated
11
TPS2559-Q1
ZHCSEM7 –DECEMBER 2015
www.ti.com.cn
10 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
10.1 Application Information
The TPS2559-Q1 current limited power switch uses N-channel MOSFETs in applications requiring up to 5.5 A of
continuous load current. The device enters constant-current mode when the load exceeds the current limit
threshold.
The TPS2559-Q1 power switch is used to protect the up-stream power supply when the output is overloaded.
10.2 Typical Application
TPS2559-Q1
5 V
0.1mF
VOUT
7/8/9
2/3/4
OUT
IN
150µF
10kΩ
Fault
Signal
10
FAULT
EN
6
ILIM
Control
Signal
5
Power
Pad
*
GND
RILIM
1
Figure 16. Typical TPS2559-Q1 Power Switch
Use the IOS in the Electrical Characteristics table or IOS in Equation 1 to select the RILIM
.
10.2.1 Design Requirements
For this design example, use the following as the input parameters.
DESIGN PARAMETERS
Input Operation Voltage
Rating Current
EXAMPLE VALUE
5 V
3A or 4.5A
3A
Minimum Current Limit
Maximum Current Limit
5A
When choose power switch, there are some several general steps:
1. What is the power rail, 3.3 V or 5 V, and then choose the operation range of power switch can cover the
power rail.
2. What is the normal operation current, for example, the maximum allowable current drawn by portable
equipment for USB 2.0 port is 500mA, so the normal operation current is 500mA and the minimum current
limit of power switch must exceed 500 mA to avoid false trigger during normal operation.
3. What is the maximum allowable current provided by up-stream power, and then decide the maximum current
limit of power switch that must lower it to ensure power switch can protect the up-stream power when over-
load is encountered at the output of power switch.
12
Copyright © 2015, Texas Instruments Incorporated
TPS2559-Q1
www.ti.com.cn
ZHCSEM7 –DECEMBER 2015
NOTE
Choosing power switch with tighter current limit tolerance can loosen the up-stream power
supply design.
10.2.2 Detailed Design Procedure
10.2.2.1 Step by Step Design Procedure
To begin the design process a few parameters must be decided upon. The designer needs to know the following:
•
•
•
•
Normal Input Operation Voltage
Rating Current
Minimum Current Limit
Maximum Current Limit
10.2.2.2 Input and Output Capacitance
Input and output capacitance improves the performance of the device; the actual capacitance should be
optimized for the particular application. For all applications, a 0.1μF or greater ceramic bypass capacitor between
IN and GND is recommended as close to the device as possible for local noise decoupling. This precaution
reduces ringing on the input due to power-supply transients. Additional input capacitance may be needed on the
input to reduce voltage undershoot from exceeding the UVLO of other load share one power rail with TPS2559-
Q1 or overshoot from exceeding the absolute-maximum voltage of the device during heavy transient conditions.
This is especially important during bench testing when long, inductive cables are used to connect the evaluation
board to the bench power supply.
Output capacitance is not required, but placing a high-value electrolytic capacitor on the output pin is
recommended when large transient currents are expected on the output to reduce the undershoot, which caused
by the inductance of the output power bus just after a short has occurred and the TPS2559-Q1 has abruptly
reduced OUT current. Energy stored in the inductance will drive the OUT voltage down and potentially negative
as it discharges.
10.2.2.3 Programming the Current-Limit Threshold
The overcurrent threshold is user programmable via an external resistor. The TPS2559-Q1 uses an internal
regulation loop to provide a regulated voltage on the ILIM pin. The current-limit threshold is proportional to the
current sourced out of ILIM. The recommended 1% resistor range for R(ILIM) is 24.9 kΩ ≤ R(ILIM) ≤ 100 kΩ to
ensure stability of the internal regulation loop.
When ILIM pin short to GND (single point failure), maximum current limit is less than 8 A over temperature and
process variation.
Many applications require that the minimum current limit is above a certain current level or that the maximum
current limit is below a certain current level, so it is important to consider the tolerance of the overcurrent
threshold when selecting a value for R(ILIM). The equations and the graph below can be used to estimate the
minimum and maximum variation of the current-limit threshold for a predefined resistor value within R(ILIM) is 24.9
kΩ ≤ R(ILIM) ≤ 100 kΩ. This variation is an approximation only and does not take into account, for example, the
resistor tolerance. For examples of more-precise variation of IOS refer to the current-limit section of the Electrical
Characteristics table.
118848 V
R(ILIM)0.9918kW
IOSmax (mA) =
IOSnom(mA) =
IOSmin(mA) =
+ 30
118079 V
R(ILIM)1.0008kW
113325 V
- 47
R(ILIM)1.0010kW
(1)
13
24.9 kΩ ≤ R(ILIM) ≤ 100 kΩ
Copyright © 2015, Texas Instruments Incorporated
TPS2559-Q1
ZHCSEM7 –DECEMBER 2015
www.ti.com.cn
6000
5500
5000
4500
4000
3500
3000
2500
2000
1500
1000
500
IOS (Min)
IOS (Typ)
IOS (Max)
0
20
30
40
50
60
70
80
90
100
Current Limit Resistor (kꢀ)
C012
Figure 17. Current-Limit vs R(ILIM)
10.2.2.4 Design Above a Minimum Current Limit
Some applications require that current limiting cannot occur below a certain threshold. For this example, assume
that 3 A must be delivered to the load so that the minimum desired current-limit threshold is 3000 mA. Use the
IOS equations and Figure 17 to select R(ILIM)
.
IOSmin(mA) = 3000 mA
113325 V
R(ILIM)1.0010kW
I
(mA) =
- 47
OSmin
1
1
1.0010
æ
ö
÷
÷
ø
113325
113325 1.0010
æ
ö
R(ILIM)(kW) = ç
=
= 37.06 kW
ç
÷
ç
è
IOS(min) + 47
3000 + 47
è
ø
(2)
Select the closest 1% resistor less than the calculated value: R(ILIM) = 36.5 kΩ. This sets the minimum current-
limit threshold at 3016 A.
113325 V
R(ILIM)1.0010kW
113325
36.5´1.01 1.0010
IOSmin(mA) =
- 47 =
- 47 = 3016 mA
(
)
(3)
Use the IOS equations, Figure 17, and the previously calculated value for R(ILIM) to calculate the maximum
resulting current-limit threshold.
118848
118848
(36.5´0.99)0.9918
IOSmax (mA) =
+ 30 =
+ 30 = 3417 mA
0.9918
R(ILIM)
(4)
The resulting maximum current-limit threshold minimum is 3016 mA and maximum is 3417 mA with a 36.5 kΩ ±
1%.
10.2.2.5 Design Below a Maximum Current Limit
Some applications require that current limiting must occur below a certain threshold. For this example, assume
that 5A must be delivered to the load so that the minimum desired current-limit threshold is 5000 mA. Use the IOS
equations and Figure 17 to select R(ILIM)
.
IOSmax (mA) = 5000 mA
118848
R(ILIM)0.9918kW
IOSmax (mA) =
+ 30
1
1
0.9918
æ
ö
÷
÷
ø
118848
118848 0.9918
æ
ö
R(ILIM)(kW) = ç
=
= 24.55 kW
ç
÷
ç
è
IOS(max) - 30
5000 - 30
è
ø
(5)
14
Copyright © 2015, Texas Instruments Incorporated
TPS2559-Q1
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ZHCSEM7 –DECEMBER 2015
Select the closest 1% resistor less than the calculated value: RILIM = 24.9 kΩ. This sets the maximum current-
limit threshold at 4950 A.
118848
R(ILIM)0.9918kW
118848
IOSmax (mA) =
+ 30 =
+ 30 = 4980 mA
0.9918
24.9´0.99
(
)
(6)
Use the IOS equations, Figure 17, and the previously calculated value for R(ILIM) to calculate the minimum
resulting current-limit threshold.
113325
113325
(24.9´1.01)1.0010
IOSmin(mA) =
- 47 =
- 47 = 4445 mA
1.0010
R(ILIM)
(7)
The resulting minimum current-limit threshold minimum is 4445 mA and maximum is 4980 mA with a 24.9 kΩ ±
1%.
10.2.2.6 Accounting for Resistor Tolerance
The previous sections described the selection of R(ILIM) given certain application requirements and the
importance of understanding the current-limit threshold tolerance. The analysis focused only on the TPS2559-Q1
is bounded by an upper and lower tolerance centered on a nominal resistance. The additional RILIM resistance
tolerance directly affects the current-limit threshold accuracy at a system level. Table 1 shows a process that
accounts for worst-case resistor tolerance assuming 1% resistor values.
Step one follows the selection process outlined in the application examples above.
Step two determines the upper and lower resistance bounds of the selected resistor.
Step three uses the upper and lower resistor bounds in the IOS equations to calculate the threshold limits.
It is important to use tighter tolerance resistors, that is, 0.5% or 0.1%, when precision current limiting is desired.
Table 1. Common R(ILIM) Resistor Selections
RESISTOR TOLERANCE
ACTUAL LIMITS
DESIRED NOMINAL
CURRENT LIMIT
(mA)
CLOSEST 1%
RESISTOR
(kΩ)
IDEAL
RESISTOR
(kΩ)
1% LOW
1% HIGH
IOS MIN
(mA)
IOS NOM
(mA)
IOS MAX
(mA)
(kΩ)
(kΩ)
1250
1500
1750
2000
2250
2500
2750
3000
3250
3500
3750
4000
4250
4500
4750
94.1
78.4
67.2
58.8
52.3
47.1
42.8
39.2
36.2
33.6
31.4
29.4
27.7
26.2
24.8
93.1
78.7
66.5
59
92.2
77.9
65.8
58.4
51.8
47
94
1152.7
1372.5
1633.2
1847
1263.7
1495.1
1769.7
1994.8
2550.6
2478.2
2725.1
3003.4
3225.7
3463.1
3726.4
4005.4
4205.9
4512.3
4729.9
1368.2
1610.9
1893.3
2133.7
2400.9
2638.4
2895.8
3185.7
3417.2
3664.1
3937.8
4227.7
4435.8
4753.9
4979.6
79.5
67.2
59.6
52.8
48
52.3
47.5
43.2
39.2
36.5
34
2089.9
2306
42.8
38.8
36.1
33.7
31.3
29.1
27.7
25.8
24.7
43.6
39.6
36.9
34.3
31.9
29.7
28.3
26.4
25.1
2540.5
2804.8
3016
3241.4
3491.5
3756.5
3946.9
4237.9
4444.6
31.6
29.4
28
26.1
24.9
Copyright © 2015, Texas Instruments Incorporated
15
TPS2559-Q1
ZHCSEM7 –DECEMBER 2015
www.ti.com.cn
10.2.2.7 Power Dissipation and Junction Temperature
The low on-resistance of the N-channel MOSFET allows small surface-mount packages to pass large currents. It
is good design practice to estimate power dissipation and junction temperature. The below analysis gives an
approximation for calculating junction temperature based on the power dissipation in the package. However, it is
important to note that thermal analysis is strongly dependent on additional system level factors. Such factors
include air flow, board layout, copper thickness and surface area, and proximity to other devices dissipating
power. Good thermal design practice must include all system level factors in addition to individual component
analysis. Begin by determining the rDS(on) of the N-channel MOSFET relative to the input voltage and operating
temperature. As an initial estimate, use the highest operating ambient temperature of interest and read rDS(on)
from the typical characteristics graph. Using this value, the power dissipation can be calculated using Equation 8:
2
PD = rDS(on) × IOUT
(8)
Where:
PD = Total power dissipation (W)
rDS(on) = Power switch on-resistance (Ω)
IOUT = Maximum current-limit threshold (A)
This step calculates the total power dissipation of the N-channel MOSFET.
Finally, calculate the junction temperature:
TJ = PD × θJA + TA
(9)
Where:
TA = Ambient temperature (°C)
θJA = Thermal resistance (°C/W)
PD = Total power dissipation (W)
Compare the calculated junction temperature with the initial estimate. If they are not within a few degrees, repeat
the calculation using the "refined" rDS(on) from the previous calculation as the new estimate. Two or three
iterations are generally sufficient to achieve the desired result. The final junction temperature is highly dependent
on thermal resistance θJA and thermal resistance is highly dependent on the individual package and board
layout.
10.2.2.8 Auto-Retry
Some applications require that an overcurrent condition disables the part momentarily during a fault condition
and re-enables after a pre-set time. This auto-retry functionality can be implemented with an external resistor and
capacitor. During a fault condition, FAULT pulls low EN. The part is disabled when EN is pulled below the turn-off
threshold, and FAULT goes high impedance allowing C(RETRY) to begin charging. The part re-enables when the
voltage on EN reaches the turn-on threshold. The part will continue to cycle in this manner until the fault
condition is removed. The auto-retry cycling time is determined by the resistor/capacitor time constant, TPS2559-
Q1 turn on time and FAULT deglitch time (see Figure 28).
TPS2559-Q1
VIN
0.1mF
VOUT
7/8/9
2/3/4
OUT
IN
COUT
RFAULT
100kW
10
FAULT
EN
6
ILIM
5
CRETRY
2.2mF
Power
Pad
GND
100kΩ
1
Figure 18. Auto-Retry Circuit
16
Copyright © 2015, Texas Instruments Incorporated
TPS2559-Q1
www.ti.com.cn
ZHCSEM7 –DECEMBER 2015
Some applications require auto-retry functionality and the ability to enable/disable with an external logic signal.
Figure 19 shows how an external logic signal can drive EN through R(FAULT) and maintain auto-retry functionality.
The resistor/capacitor time constant determines the auto-retry time-out period.
TPS2559-Q1
VIN
0.1mF
VOUT
7/8/9
2/3/4
OUT
IN
COUT
10
FAULT
EN
RFAULT
External Logic
Signal and Driver 100 kW
6
ILIM
5
Power
Pad
CRETRY
2.2 mF
GND
100kΩ
1
Figure 19. Auto-Retry Circuit with External EN Signal
If need to implement latch-off, refer to application report (SLVA282A).
10.2.2.9 Two-level Current-limit
Some applications require different current-limit thresholds depending on external system conditions. Figure 20
shows an implementation for an externally-controlled, two-level current-limit circuit. The current-limit threshold is
set by the total resistance from ILIM to GND (see previously discussed Programming the Current-Limit Threshold
section). A logic-level input enables/disables MOSFET Q1 and changes the current-limit threshold by modifying
the total resistance from ILIM to GND (see Figure 29 and Figure 30). Additional MOSFET/resistor combinations
can be used in parallel to Q1/R2 to increase the number of additional current-limit levels.
NOTE
ILIM should never be driven directly with an external signal.
TPS2559-Q1
5 V
0.1mF
VOUT
7/8/9
2/3/4
OUT
IN
10kΩ
COUT
10
R1
100 kΩ
FAULT
EN
6
ILIM
Control
Signal
R2
100 kΩ
5
Current Limit
Control Signal
Power
Pad
GND
1
Q1
Figure 20. Two-Level Current-Limit Circuit
Copyright © 2015, Texas Instruments Incorporated
17
TPS2559-Q1
ZHCSEM7 –DECEMBER 2015
www.ti.com.cn
10.2.3 Application Curves
6
5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
œ0.5
6
5
3.0
VEN
VOUT
IOUT
2.5
2.0
1.5
1.0
0.5
0.0
œ0.5
4
4
3
3
2
2
1
1
V
EN
0
0
VOUT
IOUT
œ1
œ1
0
4
8
12
16
0
4
8
12
16
œ4
œ4
Time (ms)
Time (ms)
C013
C014
Figure 21. Output Rise with 150µF // 5Ω
Figure 22. Output Fall with 150µF // 5Ω
6
5
6
5
4
5
VEN
VFAULT
V
V
I
OUT
OUT
FAULT
5
4
I
OUT
4
4
3
3
3
3
2
2
2
2
1
1
1
1
0
0
0
0
œ1
œ1
œ1
œ1
0
20
40
60
80 100 120 140 160
œ40 œ20
0
8
16
Time (ms)
24
32
œ8
Time (ms)
C016
C015
Figure 24. Full Load to Output Short Transient Response
Figure 23. Enable into Output Short
6
5
6
6
5
6
VOUT
V
V
I
OUT
OUT
FAULT
I
OUT
5
5
4
4
4
4
3
3
3
3
2
2
2
2
1
1
1
1
0
0
0
0
œ1
œ1
œ1
œ1
0
20
0
2
4
6
8
œ80
œ60
œ40
œ20
œ2
Time (ms)
Time (ms)
C017
C019
Figure 25. Output Short to Full Load Recovery Response
Figure 26. 50mΩ Hot-Short
18
Copyright © 2015, Texas Instruments Incorporated
TPS2559-Q1
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ZHCSEM7 –DECEMBER 2015
6
5
60
50
40
30
20
10
0
3.0
2.5
2.0
1.5
1.0
0.5
0.0
œ0.5
1.2
1.0
0.8
0.6
0.4
0.2
0.0
VOUT
I
OUT
4
3
2
1
0
œ1
œ10
œ20
V
I
OUT
V
OUT
FAULT
œ2
œ5
œ0.2
0
1
2
3
4
5
œ4
œ3
œ2
œ1
œ40
0
40
80 120 160 200 240 280 320 360
Time (ms)
Time (ꢀs)
C020
C021
Figure 27. 50mΩ Hot-Short Response Time
Figure 28. Auto-Retry Cycle
5
4
2.5
2.0
1.5
1.0
0.5
0.0
œ0.5
6
5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
œ0.5
V
V
GATE
V
FAULT
I
OUT
OUT
4
3
3
2
2
1
1
0
0
V
V
GATE
I
OUT
OUT
VFAULT
œ1
œ1
0.0
0.5
1.0
1.5
2.0
0.0 0.1 0.2 0.3 0.4 0.5
œ0.5 œ0.4 œ0.3 œ0.2 œ0.1
Time (s)
œ2.0 œ1.5 œ1.0 œ0.5
Time (s)
C022
C023
Figure 29. Two Level Current Limit with RLOAD = 2.5 Ω
Figure 30. Two Level Current Limit with RLOAD = 1Ω
11 Power Supply Recommendations
Design of the devices is for operation from an input voltage supply range of 2.5 V to 6.5 V. The current capability
of the power supply should exceed the maximum current limit of the power switch.
Copyright © 2015, Texas Instruments Incorporated
19
TPS2559-Q1
ZHCSEM7 –DECEMBER 2015
www.ti.com.cn
12 Layout
12.1 Layout Guidelines
•
•
•
•
Place the 100-nF bypass capacitor near the IN and GND pins, and make the connections using a low-
inductance trace.
Placing a high-value electrolytic capacitor and a 100-nF bypass capacitor on the output pin is recommended
when large transient currents are expected on the output.
The traces routing the RILIM resistor to the device should be as short as possible to reduce parasitic effects on
the current limit accuracy.
The PowerPAD should be directly connected to PCB ground plane using wide and short copper trace.
12.2 Layout Example
VIA to Power Ground Plane
Power Ground
FAULT
1
2
3
4
5
10
9
High Frequency
Bypass Capacitor
IN
OUT
8
7
ILIM
6
Figure 31. TPS2559-Q1 Board Layout
20
版权 © 2015, Texas Instruments Incorporated
TPS2559-Q1
www.ti.com.cn
ZHCSEM7 –DECEMBER 2015
13 器件和文档支持
13.1 社区资源
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
13.2 商标
PowerPAD, E2E are trademarks of Texas Instruments.
All other trademarks are the property of their respective owners.
13.3 静电放电警告
这些装置包含有限的内置 ESD 保护。 存储或装卸时，应将导线一起截短或将装置放置于导电泡棉中，以防止 MOS 门极遭受静电损
伤。
13.4 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
14 机械、封装和可订购信息
以下页中包括机械、封装和可订购信息。这些信息是针对指定器件可提供的最新数据。这些数据会在无通知且不对
本文档进行修订的情况下发生改变。欲获得该数据表的浏览器版本，请查阅左侧的导航栏。
版权 © 2015, Texas Instruments Incorporated
21
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Copyright © 2016, 德州仪器半导体技术（上海）有限公司
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
TPS2559QWDRCRQ1
TPS2559QWDRCTQ1
ACTIVE
ACTIVE
VSON
VSON
DRC
DRC
10
10
3000 RoHS & Green
250 RoHS & Green
SN
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
-40 to 125
-40 to 125
2559Q
2559Q
SN
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
Addendum-Page 2
GENERIC PACKAGE VIEW
DRC 10
3 x 3, 0.5 mm pitch
VSON - 1 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
This image is a representation of the package family, actual package may vary.
Refer to the product data sheet for package details.
4226193/A
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PACKAGE OUTLINE
DRC0010K
VSON - 1 mm max height
SCALE 4.000
PLASTIC SMALL OUTLINE - NO LEAD
3.1
2.9
B
A
PIN 1 INDEX AREA
3.1
2.9
0.1 MIN
(0.05)
S
C
A
L
E
3
0
.
A
SECTION A-A
TYPICAL
C
1 MAX
SEATING PLANE
0.08 C
0.05
0.00
(0.2) TYP
EXPOSED
THERMAL PAD
1.65 0.1
5
6
A
A
2X
2
2.4 0.1
10
1
8X 0.5
0.3
0.2
10X
PIN 1 ID
0.5
0.3
0.1
C A B
C
10X
(OPTIONAL)
0.05
4222059/B 02/2018
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance.
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EXAMPLE BOARD LAYOUT
DRC0010K
VSON - 1 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
(1.65)
SYMM
10X (0.6)
1
10
10X (0.25)
(2.4)
8X (0.5)
(0.95)
(R0.05) TYP
5
6
(0.575)
(2.8)
(
0.2) VIA
TYP
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:20X
0.07 MIN
ALL AROUND
0.07 MAX
ALL AROUND
EXPOSED METAL
EXPOSED METAL
SOLDER MASK
OPENING
METAL EDGE
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
NON SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4222059/B 02/2018
NOTES: (continued)
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
number SLUA271 (www.ti.com/lit/slua271).
www.ti.com
EXAMPLE STENCIL DESIGN
DRC0010K
VSON - 1 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
10X (0.6)
10X (0.25)
METAL
TYP
SYMM
1
10
(0.635)
8X (0.5)
(1.07)
6
5
(R0.05) TYP
(1.5)
(2.8)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
EXPOSED PAD
81% PRINTED SOLDER COVERAGE BY AREA
SCALE:25X
4222059/B 02/2018
NOTES: (continued)
5. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
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