TPS2561AQDRCTQ1 [TI]
高电平有效的汽车类双通道 0.25-2.8A 可调节ILIMIT（可实现 2.3±0.2A 设置）、2.5-6.5V、44mΩ USB 电源开关 | DRC | 10 | -40 to 125;
| 型号： | TPS2561AQDRCTQ1 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 高电平有效的汽车类双通道 0.25-2.8A 可调节ILIMIT（可实现 2.3±0.2A 设置）、2.5-6.5V、44mΩ USB 电源开关 | DRC | 10 | -40 to 125 开关 电源开关 |
| 文件： | 总28页 (文件大小：1543K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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TPS2561A-Q1
ZHCSC59A –MARCH 2014–REVISED JUNE 2014
TPS2561A-Q1 双通道精密汽车用可调
限流电源开关
1 特性
3 说明
1
•
符合 AEC-Q100
TPS2561A-Q1是一款双通道配电开关，此开关用于对
电流限制精度有要求或者会遇到重电容负载和短路的汽
车应用。 这些器件通过一个外部电阻器为每个通道提
供一个 250mA 至 2.8A 之间（典型值）的可编程电流
限制阀值。 对电源开关的上升和下降次数进行控制以
最大限度地降低接通/关闭期间的电流浪涌。
–
器件人体模型 (HBM) 静电放电 (ESD) 分类等级
H2
–
器件充电器件模型 (CDM) ESD 分类等级 C5
•
•
•
•
•
•
2 个独立的电流限制通道
满足 USB 电流限制要求
可调电流限值，250mA-2.8A（典型值）
精确的 2.1A（最小值）/2.5A（最大值）设置
快速短路响应 - 3.5μs（典型值）
当输出负载超过电流限制阀值时，通过切换至恒定电流
模式，TPS2561A-Q1 器件的每个通道将输出电流限制
到一个安全水平上。 在过流和过热条件下，每个通道
的 FAULTx 逻辑输出单独置位为低电平。
2 个 44mΩ 高侧金属氧化物半导体场效应晶体管
(MOSFET)
与 TPS2511-Q 或 TPS2513A-Q1 一同使用，提供一个
低损耗，符合汽车应用需要，USB 充电端口解决方
案，此解决方案能够为目前普遍的手机和平板电脑充
电。
•
•
•
•
工作范围：2.5V 至 6.5V
最大待机电源电流 2μA
内置软启动
15 kV/8kV 系统级静电放电 (ESD) 能力
器件信息
2 应用范围
部件号
封装
封装尺寸（标称值）
汽车 USB 充电端口
TPS2561A-Q1
SON (10)
3.00mm x 3.00mm
空白
空白
作为双端口汽车 USB 充电端口解决方案的典型应用范围
USB
Connector1
5VOUT
0.1F
VBUS
D-
D+
OUT1
OUT2
IN
IN
100k
100k
TPS2561A-Q1
RILIM
GND
FAULT2
ILIM
CUSB
FAULT1
EN1
EN2
Control Signal
Control Signal
GND
PowerPad
DC to DC
Controller or converter
(LM25117-Q1,
USB
Connector2
VBUS
COUT
VIN
DM1
DP1
TPS40170-Q1)
D-
D+
TPS2513A-Q1
DM2
GND
GND
DP2
CUSB
1
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
English Data Sheet: SLVSCC6
TPS2561A-Q1
ZHCSC59A –MARCH 2014–REVISED JUNE 2014
www.ti.com.cn
目录
9.1 Overview ................................................................... 9
9.2 Functional Block Diagram ......................................... 9
9.3 Feature Description................................................... 9
9.4 Device Functional Mode ......................................... 10
10 Application and Implementation........................ 11
10.1 Application Information.......................................... 11
10.2 Typical Application ................................................ 11
11 Power Supply Requirements ............................. 17
12 Layout................................................................... 18
12.1 Layout Guidelines ................................................. 18
12.2 Layout Example .................................................... 18
13 器件和文档支持 ..................................................... 19
13.1 商标....................................................................... 19
13.2 静电放电警告......................................................... 19
13.3 Glossary................................................................ 19
14 机械封装和可订购信息 .......................................... 19
1
2
3
4
5
6
7
特性.......................................................................... 1
应用范围................................................................... 1
说明.......................................................................... 1
修订历史记录 ........................................................... 2
Device Comparison Table..................................... 3
Pin Functions and Configurations....................... 3
Specifications......................................................... 4
7.1 Absolute Maximum Ratings ...................................... 4
7.2 Handling Ratings....................................................... 4
7.3 Recommended Operating Conditions....................... 4
7.4 Thermal Information.................................................. 4
7.5 Electrical Characteristics........................................... 5
7.6 Typical Characteristics.............................................. 6
Parameter Measurement Information .................. 7
Detailed Description .............................................. 9
8
9
4 修订历史记录
Changes from Original (March 2014) to Revision A
Page
•
已将特性从：精确的 2.1A（最小值）/2.5A（最大值）设置（包括电阻器）更改为：精确的 2.1A（最小值）/2.5A（最
大值）设置.............................................................................................................................................................................. 1
•
•
•
•
Changed IOS, Current-limit. to include additional RILIM values. .............................................................................................. 5
Changed Equation 1 ............................................................................................................................................................ 11
Changed the Designing Above a Minimum Current Limit section........................................................................................ 12
Changed the Designing Below a Maximum Current Limit section ....................................................................................... 13
2
Copyright © 2014, Texas Instruments Incorporated
TPS2561A-Q1
www.ti.com.cn
ZHCSC59A –MARCH 2014–REVISED JUNE 2014
5 Device Comparison Table
MAXIMUM OPERATING
DEVICE
OUTPUTS
ENABLES
TYPICAL RDS(on) (mΩ)
PACKAGE
CURRENT (A)
TPS2556-Q1
TPS2557-Q1
TPS2561A-Q1
5
5
1
1
2
Active-low
Active-high
Active-high
22
22
44
SON-8 (DRB)
SON-8 (DRB)
SON-10 (DRC)
2.5
6 Pin Functions and Configurations
DRC PACKAGE
(TOP VIEW)
10
9
1
2
3
4
5
GND
IN
IN
FAULT1
OUT1
OUT2
ILIM
PAD
8
7
6
EN1
EN2
FAULT2
Pin Functions
PIN
I/O
DESCRIPTION
NAME
NUMBER
EN1
EN2
GND
IN
4
5
I
I
Enable input, logic high turns on channel one power switch
Enable input, logic high turns on channel two power switch
Ground connection; connect externally to PowerPAD
1
2, 3
I
Input voltage; connect a 0.1 μF or greater ceramic capacitor from IN to GND
as close to the IC as possible.
FAULT1
FAULT2
10
6
O
O
Active-low open-drain output, asserted during overcurrent or overtemperature
condition on channel one.
Active-low open-drain output, asserted during overcurrent or overtemperature
condition on channel two
OUT1
OUT2
ILIM
9
8
7
O
O
O
Power-switch output for channel one
Power-switch output for channel two
External resistor used to set current-limit threshold; recommended 20 kΩ ≤
RILIM ≤ 187 kΩ.
Internally connected to GND; used to heat-sink the part to the circuit board
traces. Connect PowerPAD to GND pin externally.
PowerPAD™
PAD
Copyright © 2014, Texas Instruments Incorporated
3
TPS2561A-Q1
ZHCSC59A –MARCH 2014–REVISED JUNE 2014
www.ti.com.cn
7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range unless otherwise noted(1)
(2)
MIN
–0.3
–7
MAX
UNIT
V
Voltage range on IN, OUTx, ENx, ILIM, FAULTx
Voltage range from IN to OUTx
Continuous output current
7
7
V
Internally Limited
25
Internally Limited
Continuous FAULTx sink current
ILIM source current
mA
mA
Internally
Limited
TJ
Maximum junction temperature
–40
°C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Voltages are referenced to GND unless otherwise noted.
7.2 Handling Ratings
MIN
MAX
150
UNIT
°C
TSTG
Storage temperature range
Human Body Model (HBM)
Charged Device Model (CDM)
System level (contact/air)
-65
AEC-Q100 Classification Level H2
AEC-Q100 Classification Level C5
2
kV
(1)
VESD
750
V
8/15(2)
kV
(1) Electrostatic discharge (ESD) to measure device sensitivity and immunity to damage caused by assembly line electrostatic discharges in
to the device.
(2) Surges per EN61000-4-2, 1999 applied between USB connection for VBUS and GND of the TPS2560EVM (HPA424, replacing TPS2560
with TPS2561A-Q1) evaluation module (documentation available on the Web.) These were the test level, no the failure threshold.
7.3 Recommended Operating Conditions
MIN
2.5
0
MAX
6.5
UNIT
V
VIN
Input voltage, IN
VENx
VIH
Enable voltage
6.5
V
High-level input voltage on ENx
Low-level input voltage on ENx
Continuous output current per channel, OUTx
Continuous FAULTx sink current
Operating junction temperature
Recommended resistor limit range
1.1
V
VIL
0.66
2.5
IOUTx
0
0
A
10
mA
°C
TJ
–40
20
125
187
RILIM
kΩ
7.4 Thermal Information(1)
TPS2561A-Q1
THERMAL METRIC
UNIT
DRC (10 TERMINALS)
θJA
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
38.1
40.5
13.6
0.6
θJCtop
θJB
Junction-to-board thermal resistance
°C/W
ψJT
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
ψJB
13.7
3.4
θJCbot
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
4
Copyright © 2014, Texas Instruments Incorporated
TPS2561A-Q1
www.ti.com.cn
ZHCSC59A –MARCH 2014–REVISED JUNE 2014
7.5 Electrical Characteristics
over recommended operating conditions, VENx = VIN (unless otherwise noted)
PARAMETER
TEST CONDITIONS(1)
MIN
TYP MAX UNIT
POWER SWITCH
TJ = 25°C
44
50
70
4
Static drain-source on-state
resistance per channel, IN to OUTx
rDS(on)
mΩ
–40°C ≤TJ ≤125 °C
VIN = 6.5 V
1.5
0.5
0.5
0.3
3
2
tr
tf
Rise time, output
Fall time, output
VIN = 2.5 V
3
CLx = 1 μF, RLx = 100 Ω,
(see Figure 9)
ms
VIN = 6.5 V
0.8
0.6
1.0
0.8
VIN = 2.5 V
ENABLE INPUT EN
Enable pin turn on/off threshold
0.66
–0.5
1.1
V
Hysteresis
55(2)
mV
μA
ms
ms
IEN
ton
toff
Input current
Turnon time
Turnoff time
VENx = 0 V or 6.5 V
0.5
9
CLx = 1 μF, RLx = 100 Ω, (see Figure 9)
6
CURRENT LIMIT
RILIM = 20 kΩ
2560 2750 2980
2100 2250 2500
RILIM = 24.3 kΩ
RILIM = 61.9 kΩ
RILIM = 100 kΩ
RILIM = 47.5 kΩ
OUTx connected to GND
IOS
Current-limit (see Figure 11)
800
470
900 1005
560 645
mA
OUT1 and OUT2 connected to GND
VIN = 5 V (see Figure 10)
2100 2300 2500
3.5(2)
tIOS
Response time to short circuit
μs
SUPPLY CURRENT
IIN(off)
IIN(on)
IREV
Supply current, low-level output
VIN = 6.5 V, No load on OUTx, VENx = 0 V
0.1
100
85
2.0
125
110
1.0
μA
μA
μA
μA
RILIM = 20 kΩ
Supply current, high-level output
Reverse leakage current
VIN = 6.5 V, No load on OUT
VOUTx = 6.5 V, VIN = 0 V
RILIM = 100 kΩ
TJ = 25°C
0.01
UNDERVOLTAGE LOCKOUT
VUVLO Low-level input voltage, IN
Hysteresis, IN
FAULTx FLAG
VOL Output low voltage, FAULTx
VIN rising
TJ = 25°C
2.35
35(2)
2.45
V
mV
I FAULTx = 1 mA
V FAULTx = 6.5 V
180
1
mV
μA
ms
Off-state leakage
FAULTx deglitch
FAULTx assertion or de-assertion due to overcurrent condition
6
9
13
THERMAL SHUTDOWN
Thermal shutdown threshold, OTSD2
155
135
°C
°C
°C
Thermal shutdown threshold in current-limit, OTSD
Hysteresis
20(2)
(1) Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account
separately.
(2) These parameters are provided for reference only, and do not constitute part of TI's published specifications for purposes of TI's product
warranty.
Copyright © 2014, Texas Instruments Incorporated
5
TPS2561A-Q1
ZHCSC59A –MARCH 2014–REVISED JUNE 2014
www.ti.com.cn
7.6 Typical Characteristics
2.335
2.33
700
600
2.325
500
400
300
200
100
UVLO Rising
2.32
V
= 6.5 V
2.315
2.31
IN
2.305
V
= 2.5 V
IN
UVLO Falling
2.3
0
2.295
2.29
-50
-100
-50
0
50
- Junction Temperature - °C
100
150
0
50
100
150
T
T
- Junction Temperature - °C
J
J
Figure 2. IIN – Supply Current, Output Disabled – nA
Figure 1. UVLO – Undervoltage Lockout – V
120
120
V
= 6.5 V
V
= 5 V
IN
IN
TJ = 125°C
100
80
110
100
V
= 3.3 V
V
= 2.5 V
IN
IN
60
40
90
80
TJ = -40°C
TJ = 25°C
20
0
70
60
-50
0
50
- Junction Temperature - °C
100
150
2
3
4
5
6
7
T
Input Voltage - V
J
RLIM = 20 kΩ
RLIM = 20 kΩ
Figure 4. IIN – Supply Current, Output Enabled – µA
0.6
Figure 3. IIN – Supply Current, Output Enabled – µA
70
60
0.5
0.4
T
= -40°C
= 25°C
A
50
40
T
A
T
= 125°C
0.3
0.2
A
30
20
10
0
0.1
0
0
50
100
150
200
-50
0
50
100
150
V
- V
- mV/div
OUT
T
- Junction Temperature - °C
IN
J
RLIM = 100 kΩ
Figure 6. Switch Current Vs. Drain-Source Voltage Across
Switch
Figure 5. MOSFET rDS(on) Vs. Junction Temperature
6
Copyright © 2014, Texas Instruments Incorporated
TPS2561A-Q1
www.ti.com.cn
ZHCSC59A –MARCH 2014–REVISED JUNE 2014
Typical Characteristics (continued)
1.0
0.9
0.8
0.7
3.0
2.5
2.0
TJ = -40°C
TJ = 25°C
T
= -40°C
= 25°C
A
0.6
0.5
0.4
0.3
T
A
1.5
T
= 125°C
A
1.0
0.5
0
TJ = 125°C
0.2
0.1
0
0
20
40
60
80
100
- mV/div
120
140
160
0
50
100
150
200
V
- V
OUT
VIN-VOUT - mV
IN
RLIM = 61.9 kΩ
RLIM = 20 kΩ
Figure 7. Switch Current Vs. Drain-Source Voltage Across
Switch
Figure 8. Switch Current vs. Drain-Source Voltage Across
Switch
8 Parameter Measurement Information
OUTx
tr
tf
RLx
CLx
90%
10%
VOUTx
90%
10%
TEST CIRCUIT
VENx
50%
50%
50%
ton
50%
VENx
toff
ton
toff
90%
90%
VOUTx
VOUTx
10%
10%
VOLTAGE WAVEFORMS
Figure 9. Test Circuit and Voltage Waveforms
IOS
IOUTx
tIOS
Figure 10. Response Time to Short Circuit Waveform
Copyright © 2014, Texas Instruments Incorporated
7
TPS2561A-Q1
ZHCSC59A –MARCH 2014–REVISED JUNE 2014
www.ti.com.cn
Parameter Measurement Information (continued)
Decreasing
Load Resistance
V
OUTx
Decreasing
Load Resistance
I
OUTx
I
OS
Figure 11. Output Voltage vs. Current-Limit Threshold
8
Copyright © 2014, Texas Instruments Incorporated
TPS2561A-Q1
www.ti.com.cn
ZHCSC59A –MARCH 2014–REVISED JUNE 2014
9 Detailed Description
9.1 Overview
The TPS2561A-Q1 is a dual-channel, current-limited power-distribution switch using N-channel MOSFETs for
automotive applications where short circuits or heavy capacitive loads will be encountered. This device allows
the user to program the current-limit threshold between 250 mA and 2.8 A (typ) per channel via an external
resistor. This device incorporates an internal charge pump and gate drive circuitry necessary to drive the N-
channel MOSFETs. The charge pump supplies power to the driver circuit for each channel and provides the
necessary voltage to pull the gate of the MOSFET above the source. The charge pump operates from input
voltages as low as 2.5 V and requires little supply current. The driver controls the gate voltage of the power
switch. The driver incorporates circuitry that controls the rise and fall times of the output voltage to limit large
current and voltage surges and provides built-in soft-start functionality. Each channel of the TPS2561A-Q1 limits
the output current to the programmed current-limit threshold IOS during an overcurrent or short-circuit event by
reducing the charge pump voltage driving the N-channel MOSFET and operating it in the linear range of
operation. The result of limiting the output current to IOS reduces the output voltage at OUTx because the N-
channel MOSFET is no longer fully enhanced.
9.2 Functional Block Diagram
Current
Sense
CS
IN
OUT1
FAULT1
9-ms Deglitch
Thermal
Sense
Charge
Pump
Current
Limit
EN1
EN2
Driver
ILIM
FAULT2
UVLO
Thermal
Sense
9-ms Deglitch
GND
CS
OUT2
Current
Sense
9.3 Feature Description
9.3.1 Overcurrent Conditions
The TPS2561A-Q1 responds to overcurrent conditions by limiting the output current per channel to IOS. When an
overcurrent condition is detected, the device maintains a constant output current and reduces the output voltage
accordingly. Two possible overload conditions can occur.
The first condition is when a short circuit or partial short circuit is present when the device is powered-up or
enabled. The output voltage is held near zero potential with respect to ground and the TPS2561A-Q1 ramps the
output current to IOS. The TPS2561A-Q1 devices will limit the current to IOS until the overload condition is
removed or the device begins to thermal cycle.
The second condition is when a short circuit, partial short circuit, or transient overload occurs while the device is
enabled and powered on. The device responds to the overcurrent condition within time tIOS (see Figure 10). The
current-sense amplifier is overdriven during this time and momentarily disables the internal current-limit
MOSFET. The current-sense amplifier recovers and ramps the output current to IOS. Similar to the previous case,
the TPS2561A-Q1 will limit the current to IOS until the overload condition is removed or the device begins to
thermal cycle.
Copyright © 2014, Texas Instruments Incorporated
9
TPS2561A-Q1
ZHCSC59A –MARCH 2014–REVISED JUNE 2014
www.ti.com.cn
Feature Description (continued)
The TPS2561A-Q1 thermal cycles if an overload condition is present long enough to activate thermal limiting in
any of the above cases. The device turns off when the junction temperature exceeds 135°C (min) while in current
limit. The device remains off until the junction temperature cools 20°C (typ) and then restarts. The TPS2561A-Q1
cycles on/off until the overload is removed (see Figure 20) .
9.3.2 FAULTx Response
The FAULTx open-drain outputs are asserted (active low) on an individual channel during an overcurrent or
overtemperature condition. The TPS2561A-Q1 asserts the FAULTx signal until the fault condition is removed and
the device resumes normal operation on that channel. The TPS2561A-Q1 is designed to eliminate false FAULTx
reporting by using an internal delay "deglitch" circuit (9-ms typ) for overcurrent conditions without the need for
external circuitry. This ensures that FAULTx is not accidentally asserted due to normal operation such as starting
into a heavy capacitive load. The deglitch circuitry delays entering and leaving current-limited induced fault
conditions. The FAULTx signal is not deglitched when the MOSFET is disabled due to an overtemperature
condition but is deglitched after the device has cooled and begins to turn on. This unidrectional deglitch prevents
FAULTx oscillation during an overtemperature event.
9.3.3 Thermal Sense
The TPS2561A-Q1 self protects by using two independent thermal sensing circuits that monitor the operating
temperature of the power switch and disable operation if the temperature exceeds recommended operating
conditions. Each channel of the TPS2561A-Q1 operates in constant-current mode during an overcurrent
conditions, which increases the voltage drop across the power switch. The power dissipation in the package is
proportional to the voltage drop across the power switch, which increases the junction temperature during an
overcurrent condition. The first thermal sensor (OTSD) turns off the individual power switch channel when the die
temperature exceeds 135°C (min) and the channel is in current limit. Hysteresis is built into the thermal sensor,
and the switch turns on after the device has cooled approximately 20°C.
The TPS2561A-Q1 also has a second ambient thermal sensor (OTSD2). The ambient thermal sensor turns off
both power switch channels when the die temperature exceeds 155°C (min) regardless of whether the power
switch channels are in current limit and will turn on the power switches after the device has cooled approximately
20°C. The TPS2561A-Q1 continues to cycle off and on until the fault is removed.
9.4 Device Functional Mode
9.4.1 Undervoltage Lockout (UVLO)
The undervoltage lockout (UVLO) circuit disables the power switch until the input voltage reaches the UVLO turn-
on threshold. Built-in hysteresis prevents unwanted on/off cycling due to input voltage droop during turn on.
9.4.2 Enable (ENx)
The logic enables control the power switches and device supply current. The supply current is reduced to less
than 2-μA when a logic low is present on ENx. A logic high input on ENx enables the driver, control circuits, and
power switches. The enable inputs are compatible with both TTL and CMOS logic levels.
10
Copyright © 2014, Texas Instruments Incorporated
TPS2561A-Q1
www.ti.com.cn
ZHCSC59A –MARCH 2014–REVISED JUNE 2014
10 Application and Implementation
10.1 Application Information
The device is current-limited, power-distribution switch. It would limit the output current to IOS when short circuits
or heavy capacitive loads are encountered.
10.2 Typical Application
10.2.1 Design Current Limit
TPS2561A-Q1
VIN = 5V
0.1 uF
VOUT1
IN
IN
OUT1
OUT2
2x RFAULT
100 kΩ
VOUT2
24.9kΩ
2x 150 µF
ILIM
FAULT 1
FAULT 2
EN1
Faultx Signals
Control Signals
GND
EN2
Power Pad
Figure 12. Typical Characteristics Reference Schematic
10.2.1.1 Design Requirements
For this design example, use the following as the input parameters.
Table 1. Design Parameters
DESIGN PARAMTER
Input voltage
EXAMPLE VALUE
5V
2A
1A
Minimum current limit
Maximum current limit
10.2.1.2 Detailed Design Procedure
10.2.1.2.1 Determine Design Parameters
Beginning the design process requires deciding on a few parameters. The designer must know the following:
•
•
•
Input voltage
Minimum current limit
Maximum current limit
10.2.1.2.2 Programming the Current-Limit Threshold
The overcurrent threshold is user programmable via an external resistor, RILIM. RILIM sets the current-limit
threshold for both channels. The TPS2561A-Q1 use an internal regulation loop to provide a regulated voltage on
the ILIM pin. The current-limit threshold is proportional to the current sourced out of ILIM. The recommended 1%
resistor range for RILIM is 20 kΩ ≤ RILIM ≤ 187 kΩ to ensure stability of the internal regulation loop. Many
applications require that the minimum current limit is above a certain current level or that the maximum current
limit is below a certain current level, so it is important to consider the tolerance of the overcurrent threshold when
selecting a value for RILIM. The following equations calculates the resulting overcurrent threshold for a given
external resistor value (RILIM). The traces routing the RILIM resistor to the TPS2561A-Q1 should be as short as
possible to reduce parasitic effects on the current-limit accuracy.
Copyright © 2014, Texas Instruments Incorporated
11
TPS2561A-Q1
ZHCSC59A –MARCH 2014–REVISED JUNE 2014
www.ti.com.cn
49497V
R(ILIM)0.933kW
IOSmax (mA) =
IOSnom(mA) =
IOSmin(mA) =
- 37
53098V
R(ILIM)0.989kW
50576V
R(ILIM)0.987kW
- 64
(1)
3000
2750
2500
2250
2000
1750
1500
1250
1000
750
IOS(max)
IOS(typ)
500
IOS(min)
250
0
20
30
40
50
60
70
80
90
100
110
RILIM – Current Limit Resistor – kΩ
120
130
140
150
Figure 13. Current-Limit Threshold vs. RILIM
10.2.1.2.3 Designing Above a Minimum Current Limit
Some applications require that current limiting cannot occur below a certain threshold. For this example, assume
that 2 A must be delivered to the load so that the minimum desired current-limit threshold is 2000 mA. Use the
IOS equations and Figure 13 to select RILIM
.
IOSmin(mA) = 2000 mA
50576V
R(ILIM)0.987kW
IOSmin(mA) =
- 64
1
1
0.987
æ
ö
÷
÷
ø
50576
50576
0.987
æ
ö
R(ILIM)(kW) = ç
=
= 25.56kW
ç
÷
ç
è
IOS(min) + 64
2000 + 64
è
ø
(2)
Select the closest 1% resistor less than the calculated value: RILIM = 25.5 kΩ. This sets the minimum current-limit
threshold at 2005 mA .
50576
R(ILIM)0.987kW
50576
(25.5)0.987
IOSmin(mA) =
- 64 =
- 64 = 2005 mA
(3)
Use the IOS equations, Figure 13, and the previously calculated value for RILIM to calculate the maximum resulting
current-limit threshold at 2374 mA.
49497
49497
(25.5)0.933
IOSmax (mA) =
- 37 =
- 37 = 2374 mA
0.933
R(ILIM)
(4)
12
Copyright © 2014, Texas Instruments Incorporated
TPS2561A-Q1
www.ti.com.cn
ZHCSC59A –MARCH 2014–REVISED JUNE 2014
10.2.1.2.4 Designing Below a Maximum Current Limit
Some applications require that current limiting must occur below a certain threshold. For this example, assume
that 1 A must be delivered to the load so that the minimum desired current-limit threshold is 1000 mA. Use the
IOS equations and Figure 13 to select RILIM
.
IOSmax (mA) = 1000 mA
49497
R(ILIM)0.933kW
IOSmax (mA) =
- 37
1
1
0.933
æ
ö
÷
÷
ø
49497
49497
0.933
æ
ö
R(ILIM)(kW) = ç
=
ç
= 63kW
÷
ç
è
IOS(max)
1000 + 37
è
ø
(5)
Select the closest 1% resistor greater than the calculated value: RILIM = 63.4 kΩ. This sets the maximum current-
limit threshold at 994 A.
49497
R(ILIM)0.933kW
49497
(63.4)0.933
IOSmax (mA) =
- 37 =
- 37 = 994 mA
(6)
Use the IOS equations, Figure 13, and the previously calculated value for RILIM to calculate the minimum resulting
current-limit threshold at 778 mA.
50576
50576
(63.4)0.987
IOSmin(mA) =
- 64 =
- 64 = 778 mA
0.987
R(ILIM)
(7)
10.2.1.2.5 Accounting for Resistor Tolerance
The previous sections described the selection of RILIM given certain application requirements and the importance
of understanding the current-limit threshold tolerance. The analysis focused only on the TPS2561A-Q1
performance and assumed an exact resistor value. However, resistors sold in quantity are not exact and are
bounded by an upper and lower tolerance centered around a nominal resistance. The additional RILIM resistance
tolerance directly affects the current-limit threshold accuracy at a system level. The following table shows a
process that accounts for worst-case resistor tolerance assuming 1% resistor values. Step one follows the
selection process outlined in the application examples above. Step two determines the upper and lower
resistance bounds of the selected resistor. Step three uses the upper and lower resistor bounds in the IOS
equations to calculate the threshold limits. It is important to use tighter tolerance resistors, that is, 0.5% or 0.1%,
when precision current limiting is desired.
Table 2. Common RILIM Resistor Selections
Desired
Nominal
Current Limit
(mA)
Resistor Tolerance
Actual Limits
IOS Nom (mA)
Ideal Resistor
Closest 1%
Resistor (kΩ)
(kΩ)
1% low (kΩ)
1% high (kΩ)
IOS MIN (mA)
IOS MAX (mA)
300
550
187.5
101.6
69.5
52.8
42.6
35.6
30.6
26.9
23.9
21.5
19.6
187
102
185.1
101.0
69.1
51.8
41.8
35.3
30.6
26.4
23.5
21.3
19.4
188.9
103.0
70.5
52.8
42.6
36.1
31.2
27.0
23.9
21.7
19.8
223
457
301
548
342
631
800
69.8
52.3
42.2
35.7
30.9
26.7
23.7
21.5
19.6
694
797
914
1050
1300
1550
1800
2050
2300
2550
2800
944
1060
1311
1547
1784
2062
2320
2554
2799
1208
1484
1741
1998
2295
2569
2817
3075
1182
1406
1631
1894
2138
2360
2592
Copyright © 2014, Texas Instruments Incorporated
13
TPS2561A-Q1
ZHCSC59A –MARCH 2014–REVISED JUNE 2014
www.ti.com.cn
10.2.1.2.6 Power Dissipation and Junction Temperature
The low on-resistance of the N-channel MOSFET allows small surface-mount packages to pass large currents. It
is good design practice to estimate power dissipation and junction temperature. The below analysis gives an
approximation for calculating junction temperature based on the power dissipation in the package. However, it is
important to note that thermal analysis is strongly dependent on additional system level factors. Such factors
include air flow, board layout, copper thickness and surface area, and proximity to other devices dissipating
power. Good thermal design practice must include all system level factors in addition to individual component
analysis.
Begin by determining the rDS(on) of the N-channel MOSFET relative to the input voltage and operating
temperature. As an initial estimate, use the highest operating ambient temperature of interest and read RDS(on)
from the typical characteristics graph. Using this value, the power dissipation can be calculated by:
2
PD = (RDS(on) × IOUT1 2) +(RDS(on) × IOUT2
)
Where:
PD = Total power dissipation (W)
rDS(on) = Power switch on-resistance of one channel (Ω)
IOUTx = Maximum current-limit threshold set by RILIM(A)
This step calculates the total power dissipation of the N-channel MOSFET.
Finally, calculate the junction temperature:
TJ = PD × θJA + TA
Where:
TA = Ambient temperature (°C)
θJA = Thermal resistance (°C/W)
PD = Total power dissipation (W)
Compare the calculated junction temperature with the initial estimate. If they are not within a few degrees, repeat
the calculation using the "refined" RDS(on) from the previous calculation as the new estimate. Two or three
iterations are generally sufficient to achieve the desired result. The final junction temperature is highly dependent
on thermal resistance θJA, and thermal resistance is highly dependent on the individual package and board
layout. The Thermal Characteristics Table provides example thermal resistances for specific packages and board
layouts.
14
Copyright © 2014, Texas Instruments Incorporated
TPS2561A-Q1
www.ti.com.cn
ZHCSC59A –MARCH 2014–REVISED JUNE 2014
10.2.1.2.7 Auto-Retry Functionality
Some applications require that an overcurrent condition disables the part momentarily during a fault condition
and re-enables after a pre-set time. This auto-retry functionality can be implemented with an external resistor and
capacitor. During a fault condition, FAULTx pulls ENx low disabling the part. The part is disabled when ENx is
pulled below the turn-off threshold, and FAULTx goes high impedance allowing CRETRY to begin charging. The
part re-enables when the voltage on ENx reaches the turn-on threshold, and the auto-retry time is determined by
the resistor, capacitor time constant. The part will continue to cycle in this manner until the fault condition is
removed.
TPS2561A-Q1
Input
0.1 μF
VOUT1
VOUT2
OUT1
OUT2
IN
RFAULT
2x 100 kΩ
2x CLOAD
ILIM
RILIM
20 kΩ
FAULT1
EN1
GND
FAULT2
EN2
CRETRY
2x 0.22 µF
Power Pad
Figure 14. Auto-Retry Functionality
Some applications require auto-retry functionality and the ability to enable/disable with an external logic signal.
The figure below shows how an external logic signal can drive EN through RFAULT and maintain auto-retry
functionality. The resistor/capacitor time constant determines the auto-retry time-out period.
TPS2561A-Q1
Input
0.1 μF
OUT1
OUT2
VOUT1
VOUT2
IN
External Logic
Signal & Drivers
2x CLOAD
RFAULT
2x 100 kΩ
ILIM
RILIM
20 kΩ
FAULT1
EN1
GND
FAULT2
EN2
CRETRY
2x 0.22 µF
Power Pad
Figure 15. Auto-Retry Functionality With External EN Signal
Copyright © 2014, Texas Instruments Incorporated
15
TPS2561A-Q1
ZHCSC59A –MARCH 2014–REVISED JUNE 2014
www.ti.com.cn
10.2.1.2.8 Two-Level Current-Limit Circuit
Some applications require different current-limit thresholds depending on external system conditions. Figure 16
shows an implementation for an externally controlled, two-level current-limit circuit. The current-limit threshold is
set by the total resistance from ILIM to GND (see previously discussed Programming the Current-Limit Threshold
section). A logic-level input enables/disables MOSFET Q1 and changes the current-limit threshold by modifying
the total resistance from ILIM to GND. Additional MOSFET/resistor combinations can be used in parallel to
Q1/R2 to increase the number of additional current-limit levels.
NOTE
ILIM should never be driven directly with an external signal.
TPS2561A-Q1
0.1 μF
2.5V – 6.5V
VOUT1
IN
IN
OUT1
OUT2
2x RFAULT
100 kΩ
VOUT2
2x CLOAD
R1
187 kΩ
Fault Signal
FAULT1
FAULT2
EN1
ILIM
Fault Signal
Control Signal
Control Signal
R2
22.1 kΩ
GND
EN2
Power Pad
Q1
Current Limit
Control Signal
Figure 16. Two-Level Current-Limit Circuit
16
Copyright © 2014, Texas Instruments Incorporated
TPS2561A-Q1
www.ti.com.cn
ZHCSC59A –MARCH 2014–REVISED JUNE 2014
10.2.2 Application Curves
V
V
OUT1
OUT1
5 V/div
5 V/div
V
OUT2
V
OUT2
5 V/div
5 V/div
VEN1 = VEN2
5 V/div
VEN1 = VEN2
5 V/div
I
I
IN
IN
2 A/div
2 A/div
t - Time - 2 ms/div
t - Time - 2 ms/div
Figure 17. Turn-on Delay and Rise Time
Figure 18. Turn-off Delay and Fall Time
V
V
OUT1
5 V/div
OUT1
5 V/div
V
OUT2
5 V/div
V
OUT2
5 V/div
FAULT2_bar
5 V/div
FAULT2_bar
5 V/div
I
I
IN
2 A/div
IN
2 A/div
t - Time - 20 ms/div
t - Time - 20 ms/div
Figure 19. Full-Load to Short-Circuit Transient Response
Figure 20. Short-Circuit to Full-Load Recovery Response
11 Power Supply Requirements
The device is designed to operate from an input voltage supply range of 2.5 V to 6.5 V. The current capability of
upper power should exceed the max current limit of the power switch.
Copyright © 2014, Texas Instruments Incorporated
17
TPS2561A-Q1
ZHCSC59A –MARCH 2014–REVISED JUNE 2014
www.ti.com.cn
12 Layout
12.1 Layout Guidelines
For all applications, a 0.1-µF or greater ceramic bypass capacitor between IN and GND is recommended as
close to the device as possible for local noise decoupling. This precaution reduces ringing on the input due to
power-supply transients. Additional input capacitance may be needed on the input to reduce voltage overshoot
form exceeding the absolute-maximum voltage of the device during heavy transient conditions.
•
•
•
Output capacitance is not required, but placing a high-value electrolytic capacitor on the output pin is
recommended when large transient currents are expected on the output.
The traces routing the RILIM resistor to the device should be as short as possible to reduce parasitic effects on
the current limit accuracy.
The PowerPAD™ should be directly connected to PCB ground plane using wide and short copper trace.
12.2 Layout Example
VIA to Power Ground Plane
Power Ground
FAULT1
10
9
1
2
3
4
OUT1
OUT2
High Frequency
Bypass Capacitor
IN
8
7
6
ILIM
5
FAULT2
18
版权 © 2014, Texas Instruments Incorporated
TPS2561A-Q1
www.ti.com.cn
ZHCSC59A –MARCH 2014–REVISED JUNE 2014
13 器件和文档支持
13.1 商标
PowerPAD is a trademark of Texas Instruments.
13.2 静电放电警告
这些装置包含有限的内置 ESD 保护。 存储或装卸时，应将导线一起截短或将装置放置于导电泡棉中，以防止 MOS 门极遭受静电损
伤。
13.3 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms and definitions.
14 机械封装和可订购信息
以下页中包括机械封装和可订购信息。 这些信息是针对指定器件可提供的最新数据。 这些数据会在无通知且不对
本文档进行修订的情况下发生改变。 欲获得该数据表的浏览器版本，请查阅左侧的导航栏。
版权 © 2014, Texas Instruments Incorporated
19
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
TPS2561AQDRCRQ1
TPS2561AQDRCTQ1
ACTIVE
ACTIVE
VSON
VSON
DRC
DRC
10
10
3000 RoHS & Green
250 RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
-40 to 125
-40 to 125
2561AQ
2561AQ
NIPDAU
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
20-Apr-2023
TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
K0
P1
W
B0
Reel
Diameter
Cavity
A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
Overall width of the carrier tape
W
P1 Pitch between successive cavity centers
Reel Width (W1)
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2
Q3 Q4
Q1 Q2
Q3 Q4
User Direction of Feed
Pocket Quadrants
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TPS2561AQDRCRQ1
TPS2561AQDRCTQ1
VSON
VSON
DRC
DRC
10
10
3000
250
330.0
180.0
12.4
12.4
3.3
3.3
3.3
3.3
1.1
1.1
8.0
8.0
12.0
12.0
Q2
Q2
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
20-Apr-2023
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W
L
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TPS2561AQDRCRQ1
TPS2561AQDRCTQ1
VSON
VSON
DRC
DRC
10
10
3000
250
346.0
210.0
346.0
185.0
33.0
35.0
Pack Materials-Page 2
GENERIC PACKAGE VIEW
DRC 10
3 x 3, 0.5 mm pitch
VSON - 1 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
This image is a representation of the package family, actual package may vary.
Refer to the product data sheet for package details.
4226193/A
www.ti.com
PACKAGE OUTLINE
DRC0010J
VSON - 1 mm max height
SCALE 4.000
PLASTIC SMALL OUTLINE - NO LEAD
3.1
2.9
B
A
PIN 1 INDEX AREA
3.1
2.9
1.0
0.8
C
SEATING PLANE
0.08 C
0.05
0.00
1.65 0.1
2X (0.5)
(0.2) TYP
EXPOSED
THERMAL PAD
4X (0.25)
5
6
2X
2
11
SYMM
2.4 0.1
10
1
8X 0.5
0.30
0.18
10X
SYMM
PIN 1 ID
0.1
C A B
C
(OPTIONAL)
0.05
0.5
0.3
10X
4218878/B 07/2018
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. The package thermal pad must be soldered to the printed circuit board for optimal thermal and mechanical performance.
www.ti.com
EXAMPLE BOARD LAYOUT
DRC0010J
VSON - 1 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
(1.65)
(0.5)
10X (0.6)
1
10
10X (0.24)
11
(2.4)
(3.4)
SYMM
(0.95)
8X (0.5)
6
5
(R0.05) TYP
(
0.2) VIA
TYP
(0.25)
(0.575)
SYMM
(2.8)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:20X
0.07 MIN
ALL AROUND
0.07 MAX
ALL AROUND
EXPOSED METAL
EXPOSED METAL
SOLDER MASK
OPENING
METAL
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
NON SOLDER MASK
SOLDER MASK
DEFINED
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4218878/B 07/2018
NOTES: (continued)
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
number SLUA271 (www.ti.com/lit/slua271).
5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown
on this view. It is recommended that vias under paste be filled, plugged or tented.
www.ti.com
EXAMPLE STENCIL DESIGN
DRC0010J
VSON - 1 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
2X (1.5)
(0.5)
SYMM
EXPOSED METAL
TYP
11
10X (0.6)
1
10
(1.53)
10X (0.24)
2X
(1.06)
SYMM
(0.63)
8X (0.5)
6
5
(R0.05) TYP
4X (0.34)
4X (0.25)
(2.8)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
EXPOSED PAD 11:
80% PRINTED SOLDER COVERAGE BY AREA
SCALE:25X
4218878/B 07/2018
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
www.ti.com
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