TPS25961DRVR [TI]
具有过压、过流和短路保护功能的 2.7V 至 19V、100mΩ 电子保险丝 | DRV | 6 | -40 to 125;
| 型号： | TPS25961DRVR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 具有过压、过流和短路保护功能的 2.7V 至 19V、100mΩ 电子保险丝 | DRV | 6 | -40 to 125 电子 |
| 文件： | 总35页 (文件大小：4339K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TPS25961
ZHCSQ76 –DECEMBER 2022
TPS25961 具有可调节电流限值和短路保护功能的2.7V 至19V、106mΩ 电子保
险丝
1 特性
3 说明
• 宽输入电压范围：2.7V 至19V
TPS25961 电子保险丝（集成式 FET 热插拔器件）是
采用小型封装且高度集成的电路保护和电源管理解决方
案。此类器件只需很少的外部元件即可提供多种保护模
式，能够非常有效地抵御过载、短路、电压浪涌和过多
浪涌电流。输出电流限制级别可通过单个外部电阻设
定。浪涌电流在内部使用输出转换率控制进行管理。为
了保护输入过压情况，该器件提供了一个选项，可以在
外部设置用户定义的过压截止阈值或使用固定内部阈
值。
– 绝对最大值为21V
• 低导通电阻：Ron = 106mΩ（典型值）
• 具有可调节欠压锁定(UVLO) 功能的高电平有效使
能输入
• 快速过压保护钳位，响应时间为1.3µs（典型值）
– 固定内部阈值：5.98 V（典型值）
– 可使用外部电阻分压器调节阈值
• 过流保护：
这些器件的额定工作结温范围为–40°C 至+125°C。
– 可调节电流限制阈值：0.1A 至2A
– 电流限制准确度：
器件信息
器件型号(1)
封装尺寸（标称值）
• 整个电流范围内为±20%（典型值）
• 1.45A 电流限值下为±18%（最大值），TA =
25°C
封装
TPS25961DRV
SON (6)
2.00mm × 2.00mm
(1) 如需了解所有可用封装，请参阅数据表末尾的可订购产品附
录。
• 短路保护，响应时间为5μs（典型值）
• 输出压摆率控制(dVdt)：5.17 V/ms（典型值）
• 提供过热保护(OTP)
• 故障后自动重试
• 低静态电流：130μA（典型值）
• UL2367 认证（正在申请中）
• IEC 62368 CB 认证（正在申请中）
• 小尺寸：2mm × 2mm SON 封装
2 应用
• 适配器输入保护
• 能量计
• 智能扬声器
• 无线耳塞充电器
• 机顶盒
• IP 网络摄像头
Power
Supply
TPS25961
IN
OUT
R1
R2
EN/UVLO
CIN
COUT
ROUT
OVLO
ILIM
GND
R3
RLIM
简化原理图
本文档旨在为方便起见，提供有关TI 产品中文版本的信息，以确认产品的概要。有关适用的官方英文版本的最新信息，请访问
www.ti.com，其内容始终优先。TI 不保证翻译的准确性和有效性。在实际设计之前，请务必参考最新版本的英文版本。
English Data Sheet: SLVSGT8
TPS25961
ZHCSQ76 –DECEMBER 2022
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Table of Contents
7.3 Feature Description...................................................14
7.4 Device Functional Modes..........................................19
8 Application and Implementation..................................20
8.1 Application Information............................................. 20
8.2 典型应用....................................................................20
8.3 Application Example................................................. 23
8.4 Power Supply Recommendations.............................25
8.5 Layout....................................................................... 27
9 Device and Documentation Support............................29
9.1 Documentation Support............................................ 29
9.2 接收文档更新通知..................................................... 29
9.3 支持资源....................................................................29
9.4 商标...........................................................................29
9.5 Electrostatic Discharge Caution................................29
9.6 术语表....................................................................... 29
10 Mechanical, Packaging, and Orderable
1 特性................................................................................... 1
2 应用................................................................................... 1
3 说明................................................................................... 1
4 Revision History.............................................................. 2
5 Pin Configuration and Functions...................................3
6 Specifications.................................................................. 4
6.1 Absolute Maximum Ratings........................................ 4
6.2 ESD Ratings............................................................... 4
6.3 Recommended Operating Conditions.........................4
6.4 Thermal Information....................................................5
6.5 Electrical Characteristics.............................................6
6.6 Timing Requirements..................................................7
6.7 Switching Characteristics............................................7
6.8 典型特性......................................................................8
7 Detailed Description......................................................14
7.1 Overview...................................................................14
7.2 Functional Block Diagram.........................................14
Information.................................................................... 29
4 Revision History
注：以前版本的页码可能与当前版本的页码不同
DATE
REVISION
NOTES
December 2022
*
Initial Release
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5 Pin Configuration and Functions
IN
OUT
GND
EN/UVLO
GND
OVLO
ILIM
Thermal
Pad
图5-1. DRV Package, 6-Pin SON (Top View)
表5-1. Pin Functions
PIN
I/O
Power
DESCRIPTION
NAME
NO.
OUT
1
Power output.
An external resistor divider from supply rail can be used to adjust the overvoltage lockout
OVLO
2
Analog Input threshold. Connect to GND directly to use internal fixed overvoltage lockout threshold. Do
not leave floating.
Analog
Output
An external resistor from this pin to GND sets the output current limit threshold. Leave it
open to set the current limit threshold to minimum value.
ILIM
3
4
5
6
GND
EN/UVLO
IN
Ground
Analog Input
Power
Connect to system electrical ground.
Active High Enable for the device. A resistor divider from supply rail can be used to adjust
the undervoltage lockout threshold. Do not leave floating.
Power input.
Thermal/
Ground
The exposed pad is used primarily for heat dissipation and must be connected to GND plane
on the PCB.
GND
PAD
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
Parameter
Pin
MIN
–0.3
–0.3
–0.3
–0.3
MAX
21
UNIT
VIN
IN
V
Maximum input voltage range, –40℃≤TJ ≤125℃
Maximum output voltage range, –40℃≤TJ ≤125℃
Maximum EN/UVLO pin voltage range
Maximum OVLO pin voltage range
Maximum ILIM pin voltage range
Maximum continuous switch current
Junction temperature
VOUT
VEN/UVLO
VOV
OUT
VIN + 0.3
20
EN/UVLO
OVLO
V
V
6.5
VILIM
IMAX
TJ
ILIM
Internally limited
Internally limited
Internally limited
V
IN to OUT
A
°C
°C
°C
TLEAD
Tstg
Maximum lead temperature
300
150
Storage temperature
–65
(1) Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply
functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If
used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully
functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime.
6.2 ESD Ratings
VALUE
UNIT
Human body model (HBM), per ANSI/ESDA/JEDEC
JS-001(1)
±2000
V(ESD)
Electrostatic discharge
V
Charged device model (CDM), per ANSI/ESDA/JEDEC
JS-002(2)
±500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
Parameter
Pin
MIN
MAX
19
UNIT
V
VIN
Input voltage range
IN
2.7
VOUT
VEN/UVLO
VOV
Output voltage range
OUT
VIN
5(1)
1.5
V
EN/UVLO pin voltage range
OVLO pin voltage range
ILIM pin resistance to GND
EN/UVLO
OVLO
V
0.5
25
V
RILIM
IMAX
TJ
ILIM
kΩ
A
IN to OUT
2
Continuous switch current, TJ ≤125℃
Junction temperature
125
°C
–40
(1) For supply voltages below 5V, it is okay to pull up the EN pin to IN directly. For supply voltages greater than 5V , it is recommended
to use a resistor divider with minimum pull-up resistor value of 350 kΩ.
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6.4 Thermal Information
TPS25961
DRV (SON)
6 PINS
74.1
THERMAL METRIC (1) (2)
UNIT
RθJA
RθJCtop
RθJCbot
RθJB
ΨJT
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-case (bottom) thermal resistance
Junction-to-board thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
80.4
16.8
39.0
Junction-to-top characterization parameter
Junction-to-board characterization parameter
4.9
38.8
ΨJB
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
(2) Based on simulations conducted with the device mounted on a custom 4-layer PCB (2s2p)
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6.5 Electrical Characteristics
(Test conditions unless otherwise noted) –40°C ≤TJ ≤125°C, VIN = 12 V, OUT = Open, VEN/UVLO = 2 V, VOVLO = 1 V, ILIM
= Open. All voltages referenced to GND.
Test
Parameter
Description
MIN
TYP
MAX
UNITS
INPUT SUPPLY (IN)
IQ(ON)
IQ(OFF)
ISD
IN supply quiescent current
130
144
0.6
165
230
1.5
µA
µA
µA
V
IN supply OFF state current (VSD(F) < VEN < VUVLO(F)
)
IN supply shutdown current (VEN < VSD(F)
)
VUVP(R)
VUVP(F)
IN supply UVP rising threshold
2.46
2.31
2.54
2.42
2.61
2.54
IN supply UVP falling threshold
V
VIN fixed overvoltage rising threshold, OVLO = GND, TJ =
25℃
VOVP(R)
VOVPHys
5.55
85
5.98
111
6.5
V
VIN fixed overvoltage hysteresis, OVLO = GND
135
mV
OVERCURRENT PROTECTION (OUT)
Overcurrent threshold, ILIM = Open, TJ = 25℃
0.116
0.212
0.516
0.856
1.45
A
A
A
A
A
A
A
Overcurrent threshold, RILIM = 250 kΩ, TJ = 25℃
Overcurrent threshold, RILIM = 100 kΩ, TJ = 25℃
Overcurrent threshold, RILIM = 62.5 kΩ, TJ = 25℃
Overcurrent threshold, RILIM = 34.48 kΩ, TJ = 25℃
Overcurrent threshold, RILIM = 25 kΩ, TJ = 25℃
Fast-trip threshold
ILIM
1.189
1.711
2.36
ISC
ON RESISTANCE (IN - OUT)
2.7 ≤VIN < 4.5 V, IOUT = 1 A, RILIM = 34.48 kΩ
8.25
132
106
243
195
455
367
833
702
240
177
mΩ
mΩ
mΩ
mΩ
mΩ
mΩ
mΩ
mΩ
4.5 ≤VIN ≤19 V, IOUT = 1 A, RILIM = 34.48 kΩ
2.7 ≤VIN < 4.5 V, IOUT = 0.1 A, RILIM = 100 kΩ, TJ = 25℃
4.5 ≤VIN ≤19 V, IOUT = 0.1 A, RILIM = 100 kΩ, TJ = 25℃
2.7 ≤VIN < 4.5 V, IOUT = 0.1 A, RILIM = 250 kΩ, TJ = 25℃
4.5 ≤VIN ≤19 V, IOUT = 0.1 A, RILIM = 250 kΩ, TJ = 25℃
2.7 ≤VIN < 4.5 V, IOUT = 0.05 A, ILIM = Open, TJ = 25℃
4.5 ≤VIN ≤19 V, IOUT = 0.05 A, ILIM = Open, TJ = 25℃
RON
ENABLE/UNDERVOLTAGE LOCKOUT (EN/UVLO)
VUVLO(R)
VUVLO(F)
VSD(F)
EN/UVLO rising threshold
1.2
1.1
1.24
1.27
1.16
V
V
EN/UVLO falling threshold
1.132
EN/UVLO falling threshold for lowest shutdown current
EN/UVLO pin leakage current
0.6
V
IENLKG
-0.1
0.1
µA
OVERVOLTAGE LOCKOUT (OVLO)
VOVLO(R)
VOVLO(F)
IOVLKG
OVLO rising threshold
OVLO falling threshold
OVLO pin leakage current
1.2
1.1
1.24
1.13
1.27
1.161
0.1
V
V
-0.1
µA
OVERTEMPERATURE PROTECTION (OTP)
TSD
170
30
°C
°C
Thermal Shutdown rising threshold, TJ↑
Thermal Shutdown hysteresis, TJ↓
TSDHYS
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6.6 Timing Requirements
PARAMETER
TEST CONDITIONS
MIN TYP MAX
UNIT
µs
tOVLO
tLIM
Overvoltage lock-out response time
1.3
30
5
VOVLO > VOV(R) to VOUT
↓
Current limit response time
IOUT > 1.5 × ILIM to IOUT within 5% of ILIM
IOUT > ISC to output current cut off
Device enabled and TJ < TSD –TSDHYS
µs
tSC
Short-circuit response time
µs
tTSD,RST
Thermal Shutdown auto-retry Interval
110
ms
6.7 Switching Characteristics
The output rising slew rate is internally controlled and constant across the entire operating voltage range to ensure the turn
on timing is not affected by the load conditions. The rising slew rate can be adjusted by adding capacitance from the dVdt pin
to ground. As CdVdt is increased it will slow the rising slew rate (SR). See Slew Rate and Inrush Current Control (dVdt)
section for more details. The Turn-Off Delay and Fall Time, however, are dependent on the RC time constant of the load
capacitance (COUT) and Load Resistance (RL). The Switching Characteristics are only valid for the power-up
sequence where the supply is available in steady state condition and the load voltage is completely discharged before the
device is enabled. Typical values are taken at TJ = 25°C unless specifically noted otherwise. RL = 100 Ω, COUT = 1 µF.
PARAMETER
VIN
Typ
UNITS
3.3 V
12 V
18 V
3.3 V
12 V
18 V
3.3 V
12 V
18 V
3.3 V
12 V
18 V
3.3 V
12 V
18 V
4.43
5.17
5.19
2.14
2.37
2.50
0.58
1.83
2.67
2.71
4.2
SRON
tD,ON
tR
Output rising slew rate
V/ms
Turn on delay
Rise time
ms
ms
ms
µs
tON
Turn on time
Turn off delay
5.17
15.00
14.22
12.44
tD,OFF
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6.8 典型特性
COUT = 22μF，ROUT = 6Ω，IN 热插拔至12V
VIN = 12V，COUT = 22μF，EN 引脚从0V 升压至1.5V
图6-1. 输入热插拔响应
图6-2. 通过使能引脚上电
COUT = 22μF，EN 引脚保持高电平，VIN 上升至12V
图6-3. 通过输入电源上电
OVLO 阈值使用从VIN 到GND 的电阻梯设置为16V，COUT
470μF，ROUT = 12Ω，VIN 从10V 增加到17V
=
图6-4. 过压锁定响应- 可调节阈值
OVLO 引脚短接到GND，COUT = 470μF，ROUT = 3.3Ω，VIN
从2.7V 增加到7.5V
VIN = 12V，RILIM = 25kΩ，负载电流逐渐上升至2.5A 以上
图6-6. 电流限制后跟热关断
图6-5. 过压锁定响应- 内部固定阈值
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6.8 典型特性(continued)
VIN = 12V，COUT = 6400μF，ROUT = 开路，RILIM = 开路，
EN 引脚从低电平切换至高电平
VIN = 12V，COUT = 2200μF，ROUT = 开路，RILIM = 25kΩ，
EN 引脚从低电平切换至高电平
图6-7. 使用低电流限制设置为大电容器充电
图6-8. 使用高电流限制设置为大电容器充电- 断续模式
VIN = 12V，RILM = 25kΩ，OUT 引脚短接至GND
图6-9. 导通时输出短路
VIN = 12V，RILM = 25kΩ，OUT 引脚短接至GND
图6-10. 导通时短路（放大图）
190
VIN (V)
180
2.7
12
19
170
160
150
140
130
120
110
100
90
-40
-20
0
20
40
60
80
100 120 140
TA (C)
EN/UVLO 引脚电压> VUVLO(R)
图6-12. 稳态静态电流与温度间的关系
VIN = 12V，RILM = 25kΩ，EN 引脚从低电平切换到高电平，
OUT 引脚短接至GND
图6-11. 上电至短路
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6.8 典型特性(continued)
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
190
180
170
160
150
140
130
120
110
100
90
VIN (V)
2.7
12
19
VIN (V)
2.7
12
19
-0.1
-40
-20
0
20
40
60
80
100 120 140
-40
-20
0
20
40
60
80
100 120 140
TA (C)
TA (C)
EN/UVLO 引脚电压< VSD(F)
VSD(F) < EN/UVLO 引脚电压< VUVLO(F)
图6-14. 关断状态电流与温度间的关系
图6-13. 关断电流与温度间的关系
2.58
2.56
2.54
2.52
2.5
1.26
1.24
1.22
1.2
Rising
Falling
Rising
Falling
2.48
2.46
2.44
2.42
2.4
1.18
1.16
1.14
1.12
2.38
-40
-20
0
20
40
60
80
100 120 140
-40
-20
0
20
40
60
80
100 120 140
TA (C)
TA (C)
图6-15. IN 电源欠压阈值与温度间的关系
图6-16. FET 开/关控制的EN/UVLO 引脚阈值与温度间的关系
0.96
0.94
0.92
0.9
1.26
Rising
Falling
1.24
1.22
1.2
Rising
Falling
0.88
0.86
0.84
0.82
0.8
1.18
1.16
1.14
1.12
-40
-20
0
20
40
60
80
100 120 140
-40
-20
0
20
40
60
80
100 120 140
TA (C)
TA (C)
图6-17. 最低关断电流的EN/UVLO 引脚阈值与温度间的关系
图6-18. OVLO 引脚阈值与温度间的关系
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6.8 典型特性(continued)
6.02
6
2.5
2.25
2
Rising
Falling
5.98
5.96
5.94
5.92
5.9
1.75
1.5
1.25
1
0.75
0.5
0.25
0
5.88
5.86
5.84
5.82
0
50000
100000
150000
200000
250000
-40
-20
0
20
40
TA (C)
60
80
100 120 140
RILIM ()
适用于ILIM > 0.2A，请参阅此部分了解更多注意事项。
图6-20. 电流限制阈值与ILIM 电阻器间的关系
图6-19. 内部固定过压阈值与温度间的关系
128
126
124
122
120
118
116
114
112
110
219
218
217
216
215
214
213
212
211
210
209
-40
-20
0
20
40
60
80
100 120 140
-40
-20
0
20
40
60
80
100 120 140
TA (C)
TA (C)
ILIM 引脚开路
图6-21. 电流限制阈值与温度间的关系
RILIM = 250kΩ
图6-22. 电流限制阈值与温度间的关系
545
540
535
530
525
520
515
510
505
910
900
890
880
870
860
850
840
830
820
-40
-20
0
20
40
60
80
100 120 140
-40
-20
0
20
40
60
80
100 120 140
TA (C)
TA (C)
RILIM = 100kΩ
图6-23. 电流限制阈值与温度间的关系
RILIM = 62.5kΩ
图6-24. 电流限制阈值与温度间的关系
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6.8 典型特性(continued)
1580
1560
1540
1520
1500
1480
1460
1440
1420
1400
1380
2370
2340
2310
2280
2250
2220
2190
2160
2130
2100
2070
2040
-40
-20
0
20
40
60
80
100 120 140
-40
-20
0
20
40
60
80
100 120 140
TA (C)
TA (C)
RILIM = 34.48kΩ
图6-25. 电流限制阈值与温度间的关系
RILIM = 25kΩ
图6-26. 电流限制阈值与温度间的关系
220
200
180
160
140
120
100
80
0.4
0.375
0.35
VIN (V)
VIN (V)
2.7
12
19
19
12
4.5
3.3
2.7
0.325
0.3
0.275
0.25
0.225
0.2
0.175
0.15
-40
-20
0
20
40
60
80
100 120 140
-40
-20
0
20
40
60
80
100 120 140
TA (C)
TA (C)
66.7kΩ< RILIM < 111kΩ
图6-28. 导通电阻与温度间的关系
RILIM < 58.8kΩ
图6-27. 导通电阻与温度间的关系
0.75
0.7
1300
1250 VIN (V)
1200
1150
1100
1050
1000
950
900
850
800
750
700
650
600
550
500
VIN (V)
2.7
19
12
4.5
3.3
12
19
0.65
0.6
2.7
0.55
0.5
0.45
0.4
0.35
0.3
0.25
-40
-20
0
20
40
60
80
100 120 140
-40
-20
0
20
40
60
80
100 120 140
TA (C)
TA (C)
RILIM > 500kΩ
图6-30. 导通电阻与温度间的关系
142kΩ< RILIM < 250kΩ
图6-29. 导通电阻与温度间的关系
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6.8 典型特性(continued)
200
100
50
TA (C)
-40
25
125
30
20
10
5
3
2
1
0.5
0.3
0.2
0
5
10
15
20
25
30
35
40
PD (W)
图6-31. 热关断时间与功率耗散间的关系
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7 Detailed Description
7.1 Overview
The TPS25961 is an integrated eFuse device that is used to manage load voltage and load current. The device
provides various factory programmed settings and user manageable settings, which allow device configuration
for handling different transient and steady state supply and load fault conditions, thereby protecting the input
supply and the downstream circuits connected to the device. The device also uses an in-built thermal shutdown
mechanism to protect itself during these fault events.
7.2 Functional Block Diagram
TPS25961
FET Temperature Sense &
TSD
Overtemperature Protection
OUT
IN
6
1
UVPb
2.54 V
2.42 V
Charge
Pump
Soft start
5.98 V
5.87 V
SWEN
Gate control
SCP
VINT
0.1 V
Current Limit Amplifier
GHI
OVLO
2
5
ILIM
3
1.24 V
1.13 V
OVPb
EN/UVLO
UVLOb
1.24 V
1.13 V
Retry Timer
& Counter
RETRY
UVPb
R
S
Q
FLT
0.6 V
SD
GND
4
/Q
TSD
FLTb
7.3 Feature Description
7.3.1 欠压保护(UVP) 和欠压锁定(UVLO)
TPS25961 持续监控输入电源，以确保仅当电压处于足够的水平时才为负载加电。在启动条件期间，器件会等待
输入电源上升到高于内部固定阈值 VUVP(R)，然后再继续开启 FET。同样，在导通条件下，如果输入电源低于
UVP 阈值 VUVP(F)，FET 将关闭。UVP 上升和下降阈值略有不同，从而提供一些迟滞并确保在阈值电压附近稳定
运行。
TPS25961 还提供用户可调节的 UVLO 机制，以确保仅当电压达到特定系统要求的足够水平时才为负载上电。这
可以通过对输入电源进行分频并将其馈送到 EN/UVLO 引脚来实现。每当 EN/UVLO 引脚上的电压降至阈值
V
UVLO(F) 以下时，器件都会关断 FET。当电压上升到阈值VUVLO(R) 以上时，FET 再次导通。该引脚上的上升和下
降阈值略有不同，从而提供一些迟滞并确保在阈值电压附近稳定运行。
用户必须适当地选择电阻分压器值，以将所需的输入欠压电平映射到器件的UVLO 阈值。
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Power
Supply
IN
R1
EN/UVLO
R2
GND
图7-1. 可调节欠压锁定
下面的公式显示了用于设置给定电压电源的UVLO 设置点的电阻分压器值的计算结果。
R1 + R2
VIN(UV) = VUVLO(F) ×
R2
(1)
7.3.2 Overvoltage Protection
The TPS25961 implements Overvoltage Protection on VIN in case the applied voltage becomes too high for the
system or device to properly operate. The Overvoltage Protection has a default lockout threshold of VOVP , which
is achieved by connecting the OVLO pin to GND.
Input Overvoltage Event
Input Overvoltage Removed
VOVP(R)
VOVP(F)
IN
0
tOVLO
VIN
OUT
0
Time
图7-2. TPS25961 Fixed Overvoltage Lockout Response
It’s possible to override the default OVLO threshold and adjust it to an user defined value as per the system
requirements. This can be achieved by dividing the input supply and feeding it to the OVLO pin. Whenever the
voltage at the OVLO pin rises above a threshold VOVLO(R), the device turns OFF the FET. When the voltage at
the OVLO pin falls below the threshold VOVLO(F), the FET is turned ON again. The rising and falling thresholds on
this pin are slightly different, thereby providing some hysteresis and ensuring stable operation around the
threshold voltage.
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Input Overvoltage Event
Input Overvoltage Removed
IN
0
VOVLO(R)
VOVLO(F)
OVLO
0
tOVLO
VIN
OUT
0
Time
图7-3. TPS25961 Adjustable Overvoltage Lockout Response
The user should choose the resistor divider values appropriately to map the desired input overvoltage level to
the OVLO threshold of the part.
Power
Supply
IN
R1
OVLO
R2
GND
图7-4. TPS25961 Adjustable Overvoltage Lockout
The equation below shows the calculations for the resistor divider values to be used to set the OVLO set-point
for a given voltage supply.
R1 + R2
R2
VIN(OV) = VOVLO(F) ×
(2)
7.3.3 Inrush Current, Overcurrent and Short Circuit Protection
The TPS25961 incorporates three levels of protection against overcurrent:
• Fixed slew rate for inrush current control (dVdt)
• Active current limiting with adjustable limit (ILIM) for overcurrent protection
• Fast short-circuit response to protect against hard short-circuits
7.3.3.1 Slew Rate and Inrush Current Control (dVdt)
The inrush current during turn on is directly proportional to the load capacitance and rising slew rate.
IINRUSH = COUT × SRON
(3)
TPS25961 provides a controlled turn on at a fixed slew rate (SRON) which helps to minimize the inrush current.
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7.3.3.2 Active Current Limiting
The device responds to output overcurrent conditions by actively limiting the current.
Transient overload followed by current limit
Overload removed Persistent overload followed by current limit
Thermal shutdown
Retry timer expired
Retry timer starts
Overload removed
ILIM
IOUT
0
VIN
OUT
0
TSD
TSDHYS
TJ
Time
图7-5. TPS25961 Overcurrent Response
In the current limiting state, the output voltage drops resulting in increased power dissipation in the internal FET
leading to thermal shutdown if the condition persists for an extended period of time. In this case, the device
performs 3 auto-retry attempts to allow the system to recover and then latches-off if the fault persists. See Fault
response section for more details on device response after a fault.
The current limit threshold can be adjusted by pinstrapping the ILIM pin.
Use equation below to calculate the RILIM value for overcurrent thresholds < 200 mA.
50000
ILIM ‐ 0.000002
RILIM =
(4)
(5)
Use equation below to calculate the RILIM value for overcurrent thresholds ≥200 mA.
50000
RILIM =
ILIM
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备注
1. Leaving the ILIM pin open sets the current limit to its minimum value.
2. The device scales the FET ON resistance in discrete steps according to the RILIM setting to
provide optimum performance for the desired current level. At higher ILIM settings, the ON
resistance is lower and at lower ILIM settings, the ON resistance is higher. However, for certain
RILIM resistor values, the device may select an incorrect ON resistance scaling which is too high
for the target load current leading to excessive voltage drop and power dissipation. To avoid this
situation, it's recommended to avoid certain RILIM values as per 表7-1.
表7-1. RILIM Values to Avoid
ILIM Resistor Value
Device ON Resistance
Undefined
Undefined
Undefined
250 kΩ< RILIM < 500 kΩ
111 kΩ< RILIM < 142 kΩ
58.8 kΩ< RILIM < 66.7 kΩ
7.3.3.3 Short-Circuit Protection
The current through the device increases very rapidly during an output short-circuit event. In this event, the
device engages a fast current clamping circuit to regulate down the current faster (tSCP) as compared to the
nominal overcurrent response time (tLIM). Instead of completely turning off the power FET, the device tries to
actively limit the current to ensure uninterrupted power in the event of transient overcurrents or supply transients.
The device stops limiting the current once the load current falls below the programmed ILIM threshold.
The output voltage drops in the current limiting state, resulting in increased power dissipation in the internal FET
and might lead to thermal shutdown if the condition persists for an extended period of time. In this case, the
device performs 3 auto-retry attempts to allow the system to recover and then latches-off if the fault persists. See
Fault response section for more details on device response after a fault.
Persistent short from OUT to GND
Retry timer expired
Device power cycled
or reset using Enable
Temporary short-circuit
Fast-trip response
Current limited restart into short
Fast-trip response
Thermal shutdown
Retry timer starts
Thermal shutdown followed by Latch-off
due to 4 consecutive faults
Short-circuit removed
Device recovers to reach steady-state
ISC
IOUT
ILIM
0
VIN
OUT
0
tSC
tSC
TSD
TSDHYS
TJ
Time
图7-6. TPS25961 Short Circuit Response
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7.3.4 Overtemperature Protection (OTP)
Thermal Shutdown occurs when the junction temperature (TJ) exceeds the thermal shutdown threshold (TSD).
When the TPS25961 detects thermal overload, it shut downs and remains off until it has cooled down sufficiently.
Once the TPS25961 junction has cooled down below TSD - TSDHYS, it remains off for an additional delay of
tTSD,RST after which it automatically retries to turn on. The device performs 3 auto-retry attempts to allow the
system to recover before it latches-off if the fault persists. See Fault response section for more details on device
response after a fault.
表7-2. TPS25961 Thermal Shutdown
Enter TSD
Exit TSD
TJ < TSD - TSDHYS and tTSD,RST timer expired
TJ ≥TSD
7.3.5 Fault Response
表7-3 summarizes the protection response to various fault conditions.
表7-3. Fault Response
Event / Fault
Protection Response
Fault Latched Internally
Steady-state
N/A
N/A
Overtemperature
Undervoltage
Overvoltage
Overcurrent
Shutdown
Cut-off
Yes
No
No
No
No
Cut-off
Current Limit
Current Limit
Short-circuit
Once the device turns off due to a latched fault, power cycling the part or pulling the EN/UVLO pin voltage below
VSD(F) clears the fault. Pulling the EN/UVLO just below the UVLO threshold has no impact on the device in this
condition.
At the end of the tTSD,RST timer after a latched fault, the device will attempt to automatically restart 3 times. If the
fault was caused by a transient condition which goes away and the device is able to recover and reach steady
state, it clears the fault counter.
If the fault is persistent, the device will eventually shut down completely after 3 attempts and then remain
latched-off till it's power cycled.
7.4 Device Functional Modes
The features of the device depend on the operating mode.
表7-4. Overvoltage protection modes
OVLO pin
OVLO threshold
Fixed 5.98 V
Adjustable
< 0.1 V or connected to GND
Resistor ladder from IN
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8 Application and Implementation
备注
Information in the following applications sections is not part of the TI component specification, and TI
does not warrant its accuracy or completeness. TI’s customers are responsible for determining
suitability of components for their purposes, as well as validating and testing their design
implementation to confirm system functionality.
8.1 Application Information
The TPS25961 device is an integrated eFuse that is typically used for input hot-swap and power rail protection
applications for systems such as energy meters, set-top boxes, building automation and adapter input protection.
The device operates from 2.7-V to 19-V with adjustable current limit, overvoltage and undervoltage protection.
The device aids in controlling the inrush current and provides current limiting during overload conditions.
The design procedure explained in the subsequent sections can be used to select the supporting component
values based on the application requirement. Additionally, a spreadsheet design tool, TPS25961 Design
Calculator, is available in the web product folder.
8.2 典型应用
8.2.1 Adapter input protection for set-top boxes
TPS25961 can be used for input power protection in set-top boxes. Operating voltage is generally around 12-V
and can vary from 10-V to 14-V. During event like input voltage overshoot, TPS25961 overvoltage protection
acts to cut off the path and protect downstream load from overvoltage. Also inrush current control and
configurable current limit feature helps in preventing power supply from collapsing during events like hotplug and
overload.
VOUT
VIN = 12 V
TPS25961
IN
OUT
R1
470 k
EN/UVLO
OVLO
CIN
0.1 µF
*
D1
*
COUT
1 µF
R2
24.9 k
D2
ILIM
GND
R3
RLIM
42.2 k
23.2 k
图8-1. Typical Application Schematic
* Optional circuit components needed for transient protection depending on input and output inductance. Please
refer to Transient Protection section for details.
8.2.2 Design Requirements
表8-1. Design Parameters
DESIGN PARAMETER
Input voltage , VIN
EXAMPLE VALUE
12 V
Undervoltage lockout set point, VUV
9 V
15.5 V
2 A
Overvoltage protection set point , VOV
Current limit, ILIM
Load capacitance, COUT
1 µF
Maximum ambient temperature, TA
85°C
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8.2.3 Detailed Design Procedure
8.2.3.1 Programming the Current-Limit Threshold: RILM Selection
The RILM resistor at the ILM pin sets the over load current limit. Since required current limit of 2 A is greater than
200 mA, below 方程式6 for current limit can be used for calculating RILIM
.
50000
RILIM =
ILIM
(6)
Closest standard value resistor is 25.5 kΩ with 1% tolerance. It is recommended that final RILM selected does
not lie in the ranges mentioned in 表 7-1. Final value of 25.5 kΩdoes not lie in those non-recommended ranges
and is fine to use in design.
8.2.3.2 欠压和过压锁定设定点
电源欠压和过压阈值通过电阻器R1、R2 和R3 进行设置，这些电阻器的值可通过公式10 和公式11 进行计算：
VUVLO(R) x (R1 + R2 + R3)
VIN(UV) =
VIN(OV) =
(7)
(8)
R2 + R3
VOVLO(R) x (R1 + R2 + R3)
R3
其中VUVLO(R) 是EN/UVLO 引脚上升阈值，VOVLO(R) 是OVLO 引脚上升阈值。由于R1、R2 和R3 泄漏来自输入
电源VIN 的电流，因此必须根据来自输入电源VIN 的可接受漏电流来选择这些电阻器。R1、R2 和R3 从电源汲
取的电流为IR123 = VIN/(R1 + R2 + R3)。但是，由于连接到电阻器串的外部有源元件而产生的漏电流会增加这些
计算的误差。因此，电阻串电流IR123 必须选择为EN/UVLO 和OVLO 引脚上预期漏电流的20 倍。根据器件电
气规格，EN/UVLO 和OVLO 漏电流均为0.1μA（最大值）、VOVLO(R) = 1.24V 且VUVLO(R) = 1.24V。根据设计
要求，VIN(OV) = 15.5V 且VIN(UV) = 9V。要求解，请先选择R1 = 470kΩ，并使用上面的公式计算R2 =
31.5kΩ、R3 = 43.6kΩ。使用最接近的标准1% 电阻器值，我们得到R1 = 470kΩ、R2 = 31.6kΩ且R3 =
44.2kΩ。
8.2.3.3 Output Voltage Rise Time (tR)
For a successful design, the junction temperature of device must be kept below the absolute maximum rating
during both dynamic (start-up) and steady-state conditions. Dynamic power stresses often are an order of
magnitude greater than the static stresses, so it is important to to determine that power dissipation is below a
certain limit to avoid thermal shutdown during start-up.
Slew rate is 5 V/ms typically for TPS25961. The inrush current can be calculated as:
IINRUSH mA = SR (V/ms) x COUT µF = 5 x 1 = 5 mA
(9)
The average power dissipation inside the part during inrush can be calculated as:
IINRUSH A x VIN V
2
0.005 x 12
2
PDINRUSH W =
=
= 0.03 W
(10)
For the given power dissipation, the thermal shutdown time of the device must be greater than the ramp-up time
tR to avoid start-up failure. 图 8-2 shows the thermal shutdown limit, for 0.03 W of power, the shutdown time is
very large as compared to tR = 2.4 ms. Therefore this application will have successful startup.
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200
100
50
TA (C)
-40
25
125
30
20
10
5
3
2
1
0.5
0.3
0.2
0
5
10
15
20
25
30
35
40
PD (W)
图8-2. Time to Thermal Shutdown vs Power Dissipation
8.2.4 Application Curves
图8-3. Output Ramp
图8-4. Overvoltage Protection (OVLO)
图8-5. Overcurrent Protection
图8-6. Short at Output Protection
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图8-7. Wakeup in Short Protection
8.3 Application Example
TPS25961 can also be used as a low cost current limiter device replacing discrete PTC for memory card port
protection in end equipments like IP camera, Laptop etc. Typical SD cards operate at 3.3-V and draw current
less than 100 mA. TPS25961 can be configured for protection in this application without the need for many
external components. Keeping OVLO pin grounded and ILIM pin open would set fixed overvoltage protection
thresold of 5.98 V and current limit of 115 mA. EN pin can be tied to VIN pin through a pullup resistor. 图 8-9
shows example layout for TPS25961 for above mentioned configuration, achieved on a single layer board with
minimum components.
VOUT
VIN = 3.3 V
TPS25961
IN
OUT
47 kΩ
EN/UVLO
OVLO
CIN
0.1 µF
COUT
1 µF
ILIM
GND
图8-8. SD card port protection using TPS25961
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OUT
IN
GND
图8-9. TPS25961 layout example for SD card port protection application
8.3.1 Application Curves
图8-10. Output Ramp
图8-11. Overvoltage protection
图8-12. Overcurrent Protection
图8-13. Short at Output Protection
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图8-14. Wake up into Short Protection
8.4 Power Supply Recommendations
The TPS25961 devices are designed for a supply voltage range of 2.7-V ≤VIN ≤19-V. An input ceramic
bypass capacitor higher than 0.1 μF is recommended if the input supply is located more than a few inches from
the device. The power supply must be rated higher than the set current limit to avoid voltage droops during
overcurrent and short-circuit conditions.
8.4.1 瞬态保护
在短路和过载电流限制情况下，当器件中断电流时，输入电感在输入端产生正电压尖峰，输出电感在输出端产生
负电压尖峰。电压尖峰（瞬变）的峰值振幅取决于与器件输入或输出串联的电感值。如果未采取措施解决此问
题，此类瞬变可能会超过器件的绝对最大额定值。解决瞬变的典型方法包括：
• 更大限度减少进出器件的引线长度和电感。
• 使用较大的PCB GND 平面。
• 在输出端使用肖特基二极管来吸收负尖峰。
• 使用低值陶瓷电容器CIN = 0.1μF 来吸收能量并抑制瞬变。输入电容的近似值可通过以下公式进行估算：
LIN
CIN
V峰值（绝对） = VIN +I负载 ×
(11)
其中
• VIN 是标称电源电压
• ILOAD 是负载电流
• LIN 等于在源中观察到的有效电感
• CIN 是输入端存在的电容
备注
注：需要通过 IEC 61000-4-4 电气快速瞬变 (EFT) 抗扰度测试的系统应使用至少 2.2μF 的 CIN，以确
保TPS25961 在EFT 突发期间不会关闭。
某些应用可能需要添加瞬态电压抑制器 (TVS)，以防止瞬变超过器件的绝对最大额定值。采用可选保护元件（陶
瓷电容器、TVS 和肖特基二极管）的电路实现如图8-15 所示。
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VOUT
VIN = 2.7 to 19 V
TPS25961
IN
OUT
ILIM
R1
R2
EN/UVLO
OVLO
CIN
0.1 µF
*
D1
*
COUT
1 µF
D2
RLOAD
GND
R3
RLIM
图8-15. 带有可选保护元件的电路实现
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8.4.2 Output Short-Circuit Measurements
It is difficult to obtain repeatable and similar short-circuit testing results. The following contribute to variation in
results:
• Source bypassing
• Input leads
• Circuit layout
• Component selection
• Output shorting method
• Relative location of the short
• Instrumentation
The actual short exhibits a certain degree of randomness because it microscopically bounces and arcs. Ensure
that configuration and methods are used to obtain realistic results. Do not expect to see waveforms exactly like
those in this data sheet because every setup is different.
8.5 Layout
8.5.1 Layout Guidelines
• For all applications, a ceramic decoupling capacitor of 0.1 μF or greater is recommended between the IN
terminal and GND terminal. For hot-plug applications, where input power-path inductance is negligible, this
capacitor can be eliminated or minimized.
• The optimal placement of the decoupling capacitor is closest to the IN and GND terminals of the device. Care
must be taken to minimize the loop area formed by the bypass-capacitor connection, the IN terminal, and the
GND terminal of the IC.
• High current-carrying power-path connections must be as short as possible and must be sized to carry at
least twice the full-load current.
• The GND terminal must be tied to the PCB ground plane at the terminal of the IC. The PCB ground must be a
copper plane or island on the board.
• Locate the following support components close to their connection pins:
– RILIM
– Resistor network for the EN/UVLO pin
– Resistor network for the OVLO pin
Connect the other end of the component to the GND pin of the device with shortest trace length. The trace
routing from the components to the device pins must be as short as possible to reduce parasitic effects on
the current limit and overvoltage response. These traces must not have any coupling to switching signals on
the board.
• Protection devices such as TVS, snubbers, capacitors, or diodes must be placed physically close to the
device they are intended to protect. These protection devices must be routed with short traces to reduce
inductance. For example, a protection Schottky diode is recommended to address negative transients due to
switching of inductive loads, and it must be physically close to the OUT pins.
• Obtaining acceptable performance with alternate layout schemes is possible. The example shown in 节8.5.2
has been shown to produce good results and is intended as a guideline.
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8.5.2 Layout Example
Inner GND layer
Top Power layer
IN
OUT
Bottom Power layer
图8-16. TPS25961 Layout Example
Copyright © 2022 Texas Instruments Incorporated
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9 Device and Documentation Support
9.1 Documentation Support
9.1.1 Related Documentation
For related documentation see the following:
• TPS25961 Design Calculator
• TPS25961EVM eFuse Evaluation Board
• Basics of eFuses
9.2 接收文档更新通知
要接收文档更新通知，请导航至 ti.com 上的器件产品文件夹。点击订阅更新 进行注册，即可每周接收产品信息更
改摘要。有关更改的详细信息，请查看任何已修订文档中包含的修订历史记录。
9.3 支持资源
TI E2E™ 支持论坛是工程师的重要参考资料，可直接从专家获得快速、经过验证的解答和设计帮助。搜索现有解
答或提出自己的问题可获得所需的快速设计帮助。
链接的内容由各个贡献者“按原样”提供。这些内容并不构成 TI 技术规范，并且不一定反映 TI 的观点；请参阅
TI 的《使用条款》。
9.4 商标
TI E2E™ is a trademark of Texas Instruments.
所有商标均为其各自所有者的财产。
9.5 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
9.6 术语表
TI 术语表
本术语表列出并解释了术语、首字母缩略词和定义。
10 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
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14-Dec-2022
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
TPS25961DRVR
ACTIVE
WSON
DRV
6
3000 RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
T961
Samples
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
GENERIC PACKAGE VIEW
DRV 6
WSON - 0.8 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
Images above are just a representation of the package family, actual package may vary.
Refer to the product data sheet for package details.
4206925/F
PACKAGE OUTLINE
DRV0006A
WSON - 0.8 mm max height
SCALE 5.500
PLASTIC SMALL OUTLINE - NO LEAD
2.1
1.9
A
B
PIN 1 INDEX AREA
2.1
1.9
0.8
0.7
C
SEATING PLANE
0.08 C
(0.2) TYP
0.05
0.00
1
0.1
EXPOSED
THERMAL PAD
3
4
6
2X
7
1.3
1.6 0.1
1
4X 0.65
0.35
0.25
6X
PIN 1 ID
(OPTIONAL)
0.3
0.2
6X
0.1
C A
C
B
0.05
4222173/B 04/2018
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance.
www.ti.com
EXAMPLE BOARD LAYOUT
DRV0006A
WSON - 0.8 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
6X (0.45)
6X (0.3)
(1)
1
7
6
SYMM
(1.6)
(1.1)
4X (0.65)
4
3
SYMM
(1.95)
(R0.05) TYP
(
0.2) VIA
TYP
LAND PATTERN EXAMPLE
SCALE:25X
0.07 MIN
ALL AROUND
0.07 MAX
ALL AROUND
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
SOLDER MASK
OPENING
NON SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4222173/B 04/2018
NOTES: (continued)
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
number SLUA271 (www.ti.com/lit/slua271).
5. Vias are optional depending on application, refer to device data sheet. If some or all are implemented, recommended via locations are shown.
www.ti.com
EXAMPLE STENCIL DESIGN
DRV0006A
WSON - 0.8 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
SYMM
7
6X (0.45)
METAL
1
6
6X (0.3)
(0.45)
SYMM
4X (0.65)
(0.7)
4
3
(R0.05) TYP
(1)
(1.95)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
EXPOSED PAD #7
88% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE
SCALE:30X
4222173/B 04/2018
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
www.ti.com
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Copyright © 2022，德州仪器 (TI) 公司
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