TPS2831PWP [TI]
FAST SYNCHRONOUS-BUCK MOSFET DRIVERS WITH DEADTIME CONTROL; 快速同步降压MOSFET带死区控制驱动器型号: | TPS2831PWP |
厂家: | TEXAS INSTRUMENTS |
描述: | FAST SYNCHRONOUS-BUCK MOSFET DRIVERS WITH DEADTIME CONTROL |
文件: | 总15页 (文件大小:201K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
TPS2830, TPS2831
FAST SYNCHRONOUS-BUCK MOSFET DRIVERS
WITH DEADTIME CONTROL
SLVS196B – JANUARY1999 – REVISED SEPTEMBER 1999
D OR PWP PACKAGE
(TOP VIEW)
Floating Bootstrap or Ground-Reference
High-Side Driver
Active Deadtime Control
1
2
3
4
5
6
7
14
13
12
11
10
9
ENABLE
IN
CROWBAR
NC
BOOT
NC
HIGHDR
BOOTLO
LOWDR
NC
50-ns Max Rise/Fall Times and 100-ns Max
Propagation Delay — 3-nF Load
Ideal for High-Current Single or Mutiphase
Applications
SYNC
DT
PGND
2.4-A Typ Peak Output Current
4.5-V to 15-V Supply Voltage Range
Internal Schottky Bootstrap Diode
8
V
CC
NC – No internal connection
SYNC Control for Synchronous or
Nonsynchronous Operation
CROWBAR for OVP, Protects Against
Faulted High-Side Power FETs
Low Supply Current . . . 3-mA Typ
–40°C to 125°C Junction-Temperature
Operating Range
description
The TPS2830 and TPS2831 are MOSFET drivers for synchronous-buck power stages. These devices are ideal
for designing a high-performance power supply using a switching controller that does not include suitable
MOSFETdrivers on the chip. The drivers are designed to deliver 2.4-A peak currents into large capacitive loads.
Higher currents can be controlled by using multiple drivers in a multiphase configuration. The high-side driver
can be configured as a ground-reference driver or as a floating bootstrap driver. An adaptive dead-time control
circuit eliminates shoot-through currents through the main power FETs during switching transitions, and
provides high efficiency for the buck regulator. The TPS2830/31 drivers have additional control functions:
ENABLE, SYNC, and CROWBAR. Both drivers are off when ENABLE is low. The driver is configured as a
nonsynchronous-buck driver when SYNC is low. The CROWBAR function turns on the low-side power FET,
overriding the IN signal, for over-voltage protection against faulted high-side power FETs.
The TPS2830 has a noninverting input. The TPS2831 has an inverting input. The TPS2830/31 drivers are
available in 14-terminal SOIC and TSSOP packages and operate over a junction temperature range of –40°C
to 125°C.
AVAILABLE OPTIONS
PACKAGED DEVICES
T
J
SOIC
(D)
TSSOP
(PWP)
TPS2830D
TPS2831D
TPS2830PWP
TPS2831PWP
–40°C to 125°C
The D and PWP packages are available taped and reeled. Add R
suffix to device type (e.g., TPS2830DR)
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 1999, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2830, TPS2831
FAST SYNCHRONOUS-BUCK MOSFET DRIVERS
WITH DEADTIME CONTROL
SLVS196B – JANUARY1999 – REVISED SEPTEMBER 1999
functional block diagram
8
V
CC
14
BOOT
(TPS2830 Only)
12
11
HIGHDR
BOOTLO
2
IN
V
CC
(TPS2831 Only)
10
7
LOWDR
PGND
6
DT
1
5
3
ENABLE
SYNC
CROWBAR
Terminal Functions
TERMINAL
NAME
BOOT
I/O
DESCRIPTION
NO.
14
I
Bootstrap terminal. A ceramic capacitor is connected between BOOT and BOOTLO terminals to develop
the floating bootstrap voltage for the high-side MOSFET. The capacitor value is typically between 0.1 µF
and 1 µF. A 1-MΩ resistor should be connected across the bootstrap capacitor to provide a discharge path
when the driver has been powered down.
BOOTLO
11
3
O
I
This terminal connects to the junction of the high-side and low-side MOSFETs.
CROWBAR
CROWBAR can to be driven by an external OVP circuit to protect against a short across the high-side
MOSFET. If CROWBAR is driven low, the low-side driver will be turned on and the high-side driver will be
turned off, independent of the status of all other control terminals.
DT
6
I
I
Deadtime control terminal. Connect DT to the junction of the high-side and low-side MOSFETs.
If ENABLE is low, both drivers are off.
ENABLE
HIGHDR
IN
1
12
O
I
Output drive for the high-side power MOSFET
2
Input signal to the MOSFET drivers (noninverting input for the TPS2830; inverting input for the TPS2831).
Output drive for the low-side power MOSFET
LOWDR
NC
10
O
4, 9, 13
PGND
SYNC
7
5
Power ground. Connect to the FET power ground
I
I
Synchronous Rectifier Enable terminal. If SYNC is low, the low-side driver is always off; If SYNC is high,
the low-side driver provides gate drive to the low-side MOSFET.
V
CC
8
Input supply. Recommended that a 1-µF capacitor be connected from V
to PGND.
CC
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2830, TPS2831
FAST SYNCHRONOUS-BUCK MOSFET DRIVERS
WITH DEADTIME CONTROL
SLVS196B – JANUARY1999 – REVISED SEPTEMBER 1999
detailed description
low-side driver
The low-side driver is designed to drive low Rds(on) N-channel MOSFETs. The current rating of the driver is
2 A, source and sink.
high-side driver
The high-side driver is designed to drive low Rds(on) N-channel MOSFETs. The current rating of the driver is
2A, sourceandsink. Thehigh-sidedrivercanbeconfiguredasaGND-referencedriverorasafloatingbootstrap
driver. The internal bootstrap diode is a Schottky, for improved drive efficiency. The maximum voltage that can
be applied from BOOT to ground is 30 V.
†
deadtime (DT) control
Deadtime control prevents shoot through current from flowing through the main power FETs during switching
transitions by controlling the turn-on times of the MOSFET drivers. The high-side driver is not allowed to turn
on until the gate drive voltage to the low-side FET is low, and the low-side driver is not allowed to turn on until
the voltage at the junction of the power FETs (Vdrn) is low; the DT terminal connects to the junction of the power
FETs.
†
ENABLE
The ENABLE terminal enables the drivers. When enable is low, the output drivers are low.
†
IN
The IN terminal is the input control signal for the drivers. The TPS2830 has a noninverting input; the TPS2831
has an inverting input.
†
SYNC
The SYNC terminal controls whether the drivers operate in synchronous or nonsynchronous mode. In
synchronous mode, the low-side FET is operated as a synchronous rectifier. In nonsynchronous mode, the
low-side FET is always off.
†
CROWBAR
The CROWBAR terminal overrides the normal operation of the driver. When the CROWBAR terminal is low,
the low-side FET turns on to act as a clamp, protecting the output voltage of the dc/dc converter against over
voltages due to a short across the high-side FET. V should be fused to protect the low-side FET.
IN
†
High-level input voltages on ENABLE, SYNC, CROWBAR, IN, and DT must be greater than or equal to V
.
CC
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2830, TPS2831
FAST SYNCHRONOUS-BUCK MOSFET DRIVERS
WITH DEADTIME CONTROL
SLVS196B – JANUARY1999 – REVISED SEPTEMBER 1999
†
absolute maximum ratings over operating free-air temperature (unless otherwise noted)
Supply voltage range, V
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 16 V
CC
Input voltage range:BOOT to PGND (high-side driver ON) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 30 V
BOOTLO to PGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 16 V
BOOT to BOOTLO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 16 V
ENABLE, SYNC, and CROWBAR (see Note 2) . . . . . . . . . . . . . . . . . . . . . –0.3 V to 16 V
IN (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 16 V
DT (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 30 V
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Operating virtual junction temperature range, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to 125°C
J
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
Lead temperature soldering 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . 260°C
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. Unless otherwise specified, all voltages are with respect to PGND.
2. High-level input voltages on the ENABLE, SYNC, CROWBAR, IN, and DT terminals must be greater than or equal to V
.
CC
DISSIPATION RATING TABLE
T
≤ 25°C
DERATING FACTOR
T
= 70°C
T = 85°C
A
A
A
PACKAGE
POWER RATING
ABOVE T = 25°C
POWER RATING POWER RATING
A
D
760 mW
7.6 mW/°C
25 mW/°C
420 mW
305 mW
900 mW
PWP
2400 mW
1275 mW
recommended operating conditions
MIN NOM
MAX
15
UNIT
V
Supply voltage, V
Input voltage
4.5
4.5
CC
BOOT to PGND
28
V
electrical characteristics over recommended operating virtual junction temperature range,
= 6.5 V, ENABLE = High, C = 3.3 nF (unless otherwise noted)
V
CC
L
supply current
PARAMETER
Supply voltage range
TEST CONDITIONS
MIN
TYP
MAX
15
UNIT
V
V
V
4.5
CC
V
V
V
= LOW,
= HIGH,
= HIGH,
V
V
V
=15 V
=15 V
=12 V,
100
µA
ENABLE
ENABLE
ENABLE
CC
CC
CC
0.1
3
Quiescent current
CC
mA
f
C
= 200 kHz,
BOOTLO grounded,
C = 50 pF,
LOWDR
SWX
= 50 pF,
HIGHDR
See Note 3
NOTE 3: Ensured by design, not production tested.
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2830, TPS2831
FAST SYNCHRONOUS-BUCK MOSFET DRIVERS
WITH DEADTIME CONTROL
SLVS196B – JANUARY1999 – REVISED SEPTEMBER 1999
electrical characteristics over recommended operating virtual junction temperature range,
V
= 6.5 V, ENABLE = High, C = 3.3 nF (unless otherwise noted) (continued)
CC
L
output drivers
PARAMETER
TEST CONDITIONS
MIN
0.7
1.1
2
TYP
1.1
1.5
2.4
1.4
1.6
2.7
1.8
2.5
3.5
1.7
2.4
3
MAX
UNIT
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
– V
– V
– V
– V
– V
– V
= 4.5 V, V
= 4 V
BOOT
BOOT
BOOT
BOOT
BOOT
BOOT
BOOTLO
BOOTLO
BOOTLO
BOOTLO
BOOTLO
BOOTLO
HIGHDR
HIGHDR
HIGHDR
HIGHDR
HIGHDR
HIGHDR
LOWDR
LOWDR
LOWDR
LOWDR
LOWDR
LOWDR
HIGHDR
HIGHDR
HIGHDR
HIGHDR
HIGHDR
HIGHDR
LOWDR
LOWDR
LOWDR
LOWDR
LOWDR
LOWDR
Duty cycle < 2%,
< 100 µs
(see Note 3)
High-side sink
(see Note 4)
= 6.5 V, V
= 5 V
A
t
pw
= 12 V, V
= 10.5 V
= 0.5V
= 1.5 V
= 1.5 V
= 4 V
= 4.5 V, V
1.2
1.3
2.3
1.3
2
High-side
source
(see Note 4)
Duty cycle < 2%,
= 6.5 V, V
A
A
A
Ω
Ω
Ω
Ω
t
< 100 µs
pw
(see Note 3)
= 12 V, V
Peak output-
current
= 4.5 V,
= 6.5 V,
= 12 V,
= 4.5 V,
= 6.5 V,
= 12 V,
V
CC
Duty cycle < 2%,
Low-side sink
(see Note 4)
V
= 5 V
t
< 100 µs
CC
pw
(see Note 3)
V
= 10.5 V
= 0.5V
= 1.5 V
= 1.5 V
= 0.5 V
= 0.5 V
= 0.5 V
= 4 V
3
CC
V
1.4
2
CC
Low-side
source
(see Note 4)
Duty cycle < 2%,
V
t
< 100 µs
CC
pw
(see Note 3)
V
2.5
CC
– V
– V
– V
– V
– V
– V
= 4.5 V, V
5
5
BOOT
BOOT
BOOT
BOOT
BOOT
BOOT
BOOTLO
BOOTLO
BOOTLO
BOOTLO
BOOTLO
BOOTLO
High-side sink (see Note 4)
High-side source (see Note 4)
Low-side sink (see Note 4)
Low-side source (see Note 4)
= 6.5 V, V
= 12 V, V
5
= 4.5 V, V
45
45
45
9
= 6.5 V, V
= 6 V
= 12 V, V
=11.5 V
= 0.5 V
= 0.5 V
= 0.5 V
= 4 V
Output
resistance
= 4.5 V,
= 6.5 V
= 12 V,
= 4.5 V,
= 6.5 V,
= 12 V,
V
V
V
V
V
V
DRV
DRV
DRV
DRV
DRV
DRV
7.5
6
45
45
45
= 6 V
= 11.5 V
NOTES: 3. Ensured by design, not production tested.
4. The pullup/pulldown circuits of the drivers are bipolar and MOSFET transistors in parallel. The peak output current rating is the
combined current from the bipolar and MOSFET transistors. The output resistance is the Rds(on) of the MOSFET transistor when
the voltage on the driver output is less than the saturation voltage of the bipolar transistor.
deatime control
PARAMETER
High-level input voltage
Low-level input voltage
TEST CONDITIONS
MIN
TYP
MAX
UNIT
2
V
V
V
V
LOWDR
DT
Over the V
Over the V
range (see Note 3)
range
CC
CC
1
1
High-level input voltage
Low-level input voltage
2
NOTE 3: Ensured by design, not production tested.
digital control terminals
PARAMETER
TEST CONDITIONS
Over the V range
MIN
TYP
MAX
UNIT
V
High-level input voltage
Low-level input voltage
2
CC
1
V
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2830, TPS2831
FAST SYNCHRONOUS-BUCK MOSFET DRIVERS
WITH DEADTIME CONTROL
SLVS196B – JANUARY1999 – REVISED SEPTEMBER 1999
switching characteristics over recommended operating virtual junction temperature range,
ENABLE = High, C = 3.3 nF (unless otherwise noted)
L
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
60
UNIT
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
= 4.5 V,
= 6.5 V,
= 12 V,
V
V
V
= 0 V
= 0 V
= 0 V
BOOT
BOOT
BOOT
BOOTLO
BOOTLO
BOOTLO
HIGHDR output
(see Note 3)
50
ns
50
Rise time
= 4.5 V
40
CC
CC
CC
LOWDR output
(see Note 3)
= 6.5 V
= 12 V
30
ns
ns
ns
ns
ns
ns
ns
30
= 4.5 V,
= 6.5 V,
= 12 V,
V
= 0 V
= 0 V
= 0 V
60
BOOT
BOOT
BOOT
BOOTLO
BOOTLO
BOOTLO
HIGHDR output
(see Note 3)
V
V
50
50
Fall time
= 4.5 V
40
CC
CC
CC
LOWDR output
(see Note 3)
= 6.5 V
= 12 V
30
30
= 4.5 V,
= 6.5 V,
= 12 V,
= 4.5 V,
= 6.5 V,
= 12 V,
V
V
V
V
V
V
= 0 V
= 0 V
= 0 V
= 0 V
= 0 V
= 0 V
130
100
75
BOOT
BOOT
BOOT
BOOT
BOOT
BOOT
BOOTLO
BOOTLO
BOOTLO
BOOTLO
BOOTLO
BOOTLO
HIGHDR going low
(excluding deadtime)
(see Note 3)
Propagation delay time
80
LOWDR going high
(excluding deadtime)
(see Note 3)
70
60
= 4.5 V
80
CC
CC
CC
CC
CC
CC
LOWDR going low
(excluding deadtime)
(see Note 3)
Propagation delay time
Driver nonoverlap time
= 6.5 V
70
= 12 V
= 4.5 V
= 6.5 V
= 12 V
60
40
25
15
170
135
85
DT to LOWDR and
LOWDR to HIGHDR
(see Note 3)
NOTE 3: Ensured by design, not production tested.
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2830, TPS2831
FAST SYNCHRONOUS-BUCK MOSFET DRIVERS
WITH DEADTIME CONTROL
SLVS196B – JANUARY1999 – REVISED SEPTEMBER 1999
TYPICAL CHARACTERISTICS
FALL TIME
vs
RISE TIME
vs
SUPPLY VOLTAGE
SUPPLY VOLTAGE
50
45
40
50
45
40
C
T
= 3.3 nF
= 25 °C
C
T
= 3.3 nF
= 25 °C
L
J
L
J
High Side
Low Side
35
30
35
30
High Side
Low Side
25
20
25
20
15
10
15
10
4
5
6
7
8
9
10 11 12 13 14 15
4
5
6
7
8
9
10 11 12 13 14 15
V
CC
– Supply Voltage – V
V
CC
– Supply Voltage – V
Figure 1
Figure 2
RISE TIME
vs
JUNCTION TEMPERATURE
FALL TIME
vs
JUNCTION TEMPERATURE
50
45
40
50
45
40
V
C
= 6.5 V
= 3.3 nF
CC
L
V
C
= 6.5 V
= 3.3 nF
CC
L
High Side
High Side
Low Side
35
30
35
30
Low Side
25
20
25
20
15
10
15
10
–50
–25
0
25
50
75
100
125
0
25
50
75
100
125
–50
–25
T
J
– Junction Temperature – °C
T
J
– Junction Temperature – °C
Figure 3
Figure 4
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2830, TPS2831
FAST SYNCHRONOUS-BUCK MOSFET DRIVERS
WITH DEADTIME CONTROL
SLVS196B – JANUARY1999 – REVISED SEPTEMBER 1999
TYPICAL CHARACTERISTICS
HIGH-TO-LOW PROPAGATION DELAY TIME
LOW-TO-HIGH PROPAGATION DELAY TIME
vs
vs
SUPPLY VOLTAGE, HIGH TO LOW LEVEL
SUPPLY VOLTAGE, LOW TO HIGH LEVEL
150
150
140
130
C
T
= 3.3 nF
= 25 °C
C
T
= 3.3 nF
= 25 °C
L
J
140
130
L
J
120
110
100
120
110
100
90
80
90
80
High Side
Low Side
High Side
Low Side
70
60
50
40
70
60
50
40
30
20
30
20
4
5
6
7
8
9
10 11 12 13 14 15
4
5
6
7
8
9
10 11 12 13 14 15
V
CC
– Supply Voltage – V
V
CC
– Supply Voltage – V
Figure 5
Figure 6
LOW-TO-HIGH PROPAGATION DELAY TIME
HIGH-TO-LOW PROPAGATION DELAY TIME
vs
vs
JUNCTION TEMPERATURE
JUNCTION TEMPERATURE
150
150
140
130
V
C
= 6.5 V
= 3.3 nF
V
C
= 6.5 V
CC
L
CC
140
130
= 3.3 nF
L
120
110
100
120
110
100
High Side
90
80
90
80
High Side
70
60
50
40
70
60
50
40
Low Side
Low Side
30
20
30
20
–50
–50
–25
0
25
50
75
100
125
–25
0
25
50
75
100
125
T
J
– Junction Temperature – °C
T
J
– Junction Temperature – °C
Figure 7
Figure 8
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2830, TPS2831
FAST SYNCHRONOUS-BUCK MOSFET DRIVERS
WITH DEADTIME CONTROL
SLVS196B – JANUARY1999 – REVISED SEPTEMBER 1999
TYPICAL CHARACTERISTICS
FALL TIME
vs
RISE TIME
vs
LOAD CAPACITANCE
LOAD CAPACITANCE
1000
1000
V
T
= 6.5 V
V
T
= 6.5 V
= 25 °C
CC
= 25 °C
CC
J
J
100
10
100
10
High Side
High Side
Low Side
Low Side
1
1
0.1
1
10
100
0.1
1
10
100
C
– Load Capacitance – nF
C
– Load Capacitance – nF
L
L
Figure 9
Figure 10
SUPPLY CURRENT
vs
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
SUPPLY VOLTAGE
25
6000
5500
5000
4500
4000
T
C
= 25 °C
= 50 pF
T
C
= 25 °C
= 50 pF
J
L
J
L
20
15
500 kHz
2 MHz
300 kHz
200 kHz
3500
3000
2500
2000
1500
1000
100 kHz
50 kHz
25 kHz
10
5
1 MHz
500
0
0
4
6
8
10
12
14
16
4
6
8
10
12
14
16
V
CC
– Supply Voltage – V
V
CC
– Supply Voltage – V
Figure 11
Figure 12
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2830, TPS2831
FAST SYNCHRONOUS-BUCK MOSFET DRIVERS
WITH DEADTIME CONTROL
SLVS196B – JANUARY1999 – REVISED SEPTEMBER 1999
TYPICAL CHARACTERISTICS
PEAK SOURCE CURRENT
PEAK SINK CURRENT
vs
vs
DRIVE VOLTAGE
DRIVE VOLTAGE
4
3.5
3
4
3.5
3
T
J
= 25 °C
T = 25 °C
J
Low Side
Low Side
2.5
2
2.5
2
High Side
High Side
1.5
1
1.5
1
0.5
0
0.5
0
4
6
8
10
12
14
16
4
6
8
10
– Supply Voltage – V
CC
12
14
16
V
– Supply Voltage – V
V
CC
Figure 13
Figure 14
INPUT THRESHOLD VOLTAGE
vs
SUPPLY VOLTAGE
9
T
J
= 25 °C
8
7
6
5
4
3
2
1
0
4
6
8
10
12
14
16
V
CC
– Supply Voltage – V
Figure 15
10
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2830, TPS2831
FAST SYNCHRONOUS-BUCK MOSFET DRIVERS
WITH DEADTIME CONTROL
SLVS196B – JANUARY1999 – REVISED SEPTEMBER 1999
APPLICATION INFORMATION
Figure 15 shows the circuit schematic of a 100-kHz synchronous-buck converter implemented with a TL5001A
pulse-width-modulation (PWM) controller and a TPS2831 driver. The converter operates over an input range from
4.5 V to 12 V and has a 3.3-V output. The circuit can supply 3 A continuous load. The converter achieves an efficiency
of 94% for V = 5 V, I
=1 A, and 93% for V = 5 V, I = 3 A.
IN
load
in load
V
IN
+
C10
C5
100 µF
100 µF
+
C11
0.47 µF
U1
TPS2831
R5
0 Ω
R1
1 kΩ
1
2
3
4
5
6
7
14
ENABLE BOOT
IN
CROWBAR HIGHDR
R6
1 MΩ
13
12
11
10
9
C15
1.0 µF
NC
Q1
Si4410
L1
27 µH
NC
BOOTLO
3.3 V
SYNC
DT
LOWDR
NC
C13
R7
3.3 Ω
10 µF
R11
4.7 Ω
8
PGND
V
CC
C7
100 µF
+
C12
100 µF
+
Q2
C14
Si4410
C6
1 µF
1000 pF
RTN
GND
C8
0.1 µF
C3
0.0022 µF
U2
TL5001A
C2
0.033 µF
2
C4
0.022 µF
R3
180 Ω
V
CC
R2
1.6 kΩ
3
1
6
COMP
OUT
DTC
4
7
FB
RT
R4
2.32 kΩ
C9
0.22 µF
5
SCP
R8
121 kΩ
GND
8
R9
90.9 kΩ
R10
1.0 kΩ
C1
1 µF
Figure 16. 3.3-V 3-A Synchronous-Buck Converter Circuit
11
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2830, TPS2831
FAST SYNCHRONOUS-BUCK MOSFET DRIVERS
WITH DEADTIME CONTROL
SLVS196B – JANUARY1999 – REVISED SEPTEMBER 1999
APPLICATION INFORMATION
Great care should be taken when laying out the pc board. The power-processing section is the most critical and
will generate large amounts of EMI if not properly configured. The junction of Q1, Q2, and L1 should be very
tight. The connection from Q1 drain to the positive sides of C5, C10, and C11 and the connection from Q2 source
to the negative sides of C5, C10, and C11 should be as short as possible. The negative terminals of C7 and
C12 should also be connected to Q2 source.
Next, thetracesfromtheMOSFETdrivertothepowerswitchesshouldbeconsidered. TheBOOTLOsignalfrom
the junction of Q1 and Q2 carries the large gate drive current pulses and should be as heavy as the gate drive
traces. The bypass capacitor (C14) should be tied directly across V
and PGND.
CC
The next most sensitive node is the FB node on the controller (terminal 4 on the TL5001A) This node is very
sensitive to noise pick up and should be isolated from the high-current power stage and be as short as possible.
Thegroundaroundthecontrollerandlow-levelcircuitryshouldbetiedtothepowergroundastheoutput. Ifthese
three areas are properly laid out, the rest of the circuit should not have any other EMI problems and the power
supply will be relatively free of noise.
12
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2830, TPS2831
FAST SYNCHRONOUS-BUCK MOSFET DRIVERS
WITH DEADTIME CONTROL
SLVS196B – JANUARY1999 – REVISED SEPTEMBER 1999
MECHANICAL DATA
D (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PIN SHOWN
0.050 (1,27)
0.020 (0,51)
0.014 (0,35)
0.010 (0,25)
M
14
8
0.008 (0,20) NOM
0.244 (6,20)
0.228 (5,80)
0.157 (4,00)
0.150 (3,81)
Gage Plane
0.010 (0,25)
1
7
0°–8°
0.044 (1,12)
A
0.016 (0,40)
Seating Plane
0.004 (0,10)
0.010 (0,25)
0.004 (0,10)
0.069 (1,75) MAX
PINS **
8
14
16
DIM
0.197
(5,00)
0.344
(8,75)
0.394
(10,00)
A MAX
0.189
(4,80)
0.337
(8,55)
0.386
(9,80)
A MIN
4040047/D 10/96
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15).
D. Falls within JEDEC MS-012
13
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2830, TPS2831
FAST SYNCHRONOUS-BUCK MOSFET DRIVERS
WITH DEADTIME CONTROL
SLVS196B – JANUARY1999 – REVISED SEPTEMBER 1999
MECHANICAL DATA
PWP (R-PDSO-G**)
PowerPAD PLASTIC SMALL-OUTLINE PACKAGE
20-PIN SHOWN
0,30
0,19
0,65
20
M
0,10
11
Thermal Pad
(See Note D)
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
1
10
0,25
A
0°–8°
0,75
0,50
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
14
16
20
24
28
DIM
5,10
4,90
5,10
4,90
6,60
6,40
7,90
7,70
9,80
9,60
A MAX
A MIN
4073225/E 03/97
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusions.
D. Thepackagethermalperformancemaybeenhancedbybondingthethermalpadtoanexternalthermalplane.Thispadiselectrically
and thermally connected to the backside of the die and possibly selected leads.
E. Falls within JEDEC MO-153
PowerPAD is a trademark of Texas Instruments Incorporated.
14
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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