TPS62735DRY [TI]
Step Down Converter with Bypass Mode for Ultra Low Power Wireless; 降压转换器,具有旁路模式的超低功耗无线型号: | TPS62735DRY |
厂家: | TEXAS INSTRUMENTS |
描述: | Step Down Converter with Bypass Mode for Ultra Low Power Wireless |
文件: | 总25页 (文件大小:4537K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
TPS62730
www.ti.com
SLVSAC3 –MAY 2011
Step Down Converter with Bypass Mode for Ultra Low Power Wireless Applications
Check for Samples: TPS62730
1
FEATURES
DESCRIPTION
The TPS62730 is a high frequency synchronous step
down DC-DC converter optimized for ultra low power
wireless applications. The device is optimized to
supply TI's Low Power Wireless sub 1GHz and
•
•
•
•
•
•
Input Voltage Range VIN from 1.9V to 3.9V
Typ. 30nA Ultra Low Power Bypass Mode
Typ. 25 μA DC/DC Quiescent Current
Internal Feedback Divider Disconnect
Typ. 2.1Ω Bypass Switch between VIN and VOUT
2.4GHz
RF
transceivers
and
System-On-Chip-solutions. The TPS62730 reduces
the current consumption drawn from the battery
during TX and RX mode by a high efficient step down
voltage conversion. It provides up to 100mA output
current and allows the use of tiny and low cost chip
inductors and capacitors. With an input voltage range
of 1.9V to 3.9V the device supports Li-primary battery
chemistries such as Li-SOCl2, Li-SO2, Li-MnO2 and
also two cell alkaline batteries.
Automatic Transition from DC/DC to Bypass
Mode
•
•
•
•
•
•
Up To 3MHz switch frequency
Up to 95% DC/DC Efficiency
Open Drain Status Output STAT
Output Peak Current up to 100mA
Fixed Output Voltage 2.1V
Small External Output Filter Components
2.2μH/ 2.2μF
Optimized For Low Output Ripple Voltage
Small 1 × 1.5 × 0.6mm3 SON Package
12 mm2 Minimum Solution Size
The TPS62730 features an Ultra Low Power bypass
mode with typical 30nA current consumption to
support sleep and low power modes of TI's CC2540
Bluetooth Low Energy and CC430 System-On-Chip
solutions. In this bypass mode, the output capacitor
of the DC/DC converter is connected via an
integrated typ. 2.1Ω Bypass switch to the battery.
•
•
•
APPLICATIONS
In DC/DC operation mode the device provides a
regulated output voltage of 2.1V to the system. With a
switch frequency up to 3MHz, the TPS62730 features
low output ripple voltage and low noise even with a
small 2.2uF output capacitor. The automatic transition
into bypass mode during DC/DC operation prevents
an increase of output ripple voltage and noise once
the DC/DC converter operates close to 100% duty
cycle. The device automatically enters bypass mode
once the battery voltage falls below the transition
threshold VIT BYP . The TPS62730 is available in a 1 ×
1.5mm2 6 pin QFN package.
•
CC2540 Bluetooth Low Energy
System-On-Chip Solution
Low Power Wireless Applications
RF4CE, Metering
•
•
29
IBAT NO TPS62730
27
25
Battery Current
Reduction @
CC2540
23
21
19
17
15
0dBm CW TX
Power
VOUT
2.1V
VIN
2.2V - 3.9V*
TPS62730
L 2.2mH
VIN
SW
IBAT With TPS62730
VOUT
GND
COUT
2.2µF
Rpullup
CIN
2.2µF
ON
BYP
Battery Current Reduction of CC2540
2.4GHz Bluetooth Low Energy
System-On-Chip Solution
ON/BYP STAT
* At VIN < 2.2V, VOUT tracks VIN
2
2.2 2.4 2.6 2.8
3
3.2 3.4 3.6 3.8
Battery Voltage - VBAT
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2011, Texas Instruments Incorporated
TPS62730
SLVSAC3 –MAY 2011
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION
Automatic Bypass Mode Transition
Thresholds VIT BYP
PACKAGE
MARKING
PART
OUTPUT VOLTAGE
[V](2)
TA
ORDERING
NUMBER(1)
VIT BYP [V]
rising VIN
VIT BYP [V]
falling VIN
VIT BYP [mV]
hysteresis
TPS62730
2.10
2.05
1.90
2.10
2.10
2.25
2.2
2.20
2.15
2.05
2.23
2.23
50
50
TPS62730DRY
TPS62731DRY
TPS62732DRY
TPS62734DRY
TPS62735DRY
RP
RQ
RR
SL
TPS62731 (2)
TPS62732 (2)
TPS62734 (2)
TPS62735 (2)
–40°C to
85°C
2.10
2.28
2.33
50
50
100
SM
(1) The DRY package is available in tape on reel. Add R suffix to order quantities of 3000 parts per reel, T suffix for 250 parts per reel.
(2) Device status is product preview, contact TI for more details
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)(1)
MIN
–0.3
–0.3
–40
–65
MAX
UNIT
V
Voltage range(2)
Temperature range
ESD rating(3)
VIN, SW, VOUT
4.2
ON/BYP, STAT
VIN +0.3, ≤4.2
V
Operating junction temperature, TJ
Storage, Tstg
125
150
2
°C
°C
kV
V
Human Body Model - (HBM)
Machine Model (MM)
Charge Device Model - (CDM)
150
1
kV
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages are with respect to network ground terminal.
(3) ESD testing is performed according to the respective JESD22 JEDEC standard.
THERMAL INFORMATION
THERMAL METRIC(1)
DRY / 6 PINS
293.8
UNITS
θJA
Junction-to-ambient thermal resistance
θJCtop
θJB
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
165.1
160.8
°C/W
ψJT
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
27.3
ψJB
159.6
θJCbot
65.8
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
RECOMMENDED OPERATING CONDITIONS
operating ambient temperature TA = –40 to 85°C (unless otherwise noted)
MIN
1.9
1.5
1.0
–40
-40
NOM
MAX UNIT
Supply voltage VIN
3.9
3
V
Effective inductance
2.2
μH
μF
°C
Effective output capacitance connected to VOUT
Operating junction temperature range, TJ
TA Operating free air temperature range
10
125
85
2
Copyright © 2011, Texas Instruments Incorporated
TPS62730
www.ti.com
SLVSAC3 –MAY 2011
ELECTRICAL CHARACTERISTICS
VIN = 3.0V, VOUT = 2.1V, ON/BYP = VIN, TA = –40°C to 85°C typical values are at TA = 25°C (unless otherwise noted), CIN
2.2μF, L = 2.2μH, COUT = 2.2μF, see parameter measurement information
=
PARAMETER
TEST CONDITIONS
MIN TYP MAX UNIT
SUPPLY
VIN
Input voltage range
1.9
3.9
40
V
ON/BYP = high, IOUT = 0mA. VIN = 3V
device not switching
25
34
23
IOUT = 0mA. device switching, VIN = 3.0V,
VOUT = 2.1V
IQ
Operating quiescent current
μA
ON/BYP = high, Bypass switch active, VIN
VOUT = 2.1V
=
(1)
ISD
Shutdown current, Bypass Switch Activated
ON/BYP = GND, leakage current into VIN
30 550
110
nA
ON/BYP = GND, leakage current into VIN
,
TA = 60°C(1)
ON/BYP
VIH TH
VIL TH
IIN
Threshold for detecting high ON/BYP
Threshold for detecting low ON/BYP
Input bias Current
1.9 V ≤ VIN ≤ 3.9V , rising edge
1.9 V ≤ VIN ≤ 3.9V , falling edge
0.8
1
V
V
0.4
0.6
0
50
nA
POWER SWITCH
High side MOSFET on-resistance
600
350
410
410
RDS(ON)
VIN = 3.0V
mΩ
Low Side MOSFET on-resistance
Forward current limit MOSFET high-side
Forward current limit MOSFET low side
mA
mA
ILIMF
VIN = 3.0V, open loop
BYPASS SWITCH
RDS(ON) Bypass Switch on-resistance
VIN = 2.1V, IOUT = 20mA, TJmax = 85°C
2.9
2.1
3.8
2.3
Ω
VIN = 3V
VIT BYP Automatic Bypass Switch Transition
Threshold (Activation / Deactivation)
ON/BYP = TPS62730 (2.1V)
high
ON / falling VIN
OFF/ rising VIN
ON / falling VIN
OFF / rising VIN
ON / falling VIN
OFF / rising VIN
ON / falling VIN
OFF / rising VIN
ON / falling VIN
OFF / rising VIN
2.14 2.20
2.19 2.25 2.35
TPS62731 (2.05V)
TPS62732 (1.9V)
TPS62734 (2.1V)
TPS62735 (2.3V)
2.15
2.20
2.05
2.10
2.23
2.28
2.23
2.33
V
STAT Status Output (Open Drain)
VTSTAT Threshold level for STAT OUTPUT in % from VOUT
ON/BYP = high and regulator is ready, VIN
falling
95
98
%
ON/BYP = high and regulator is ready, VIN
rising
VOL
VOH
ILKG
Output Low Voltage
Output High Voltage
Leakage into STAT pin
Current into STAT pin I = 500μA, VIN = 2.3V
Open drain output, external pullup resistor
ON/BYP = GND, VIN = VOUT = 3V
0.4
VIN
V
0
50
nA
REGULATOR
tONmin
Minimum ON time
VIN = 3.0V, VOUT = 2.1V, IOUT = 0 mA
VIN = 2.3V
180
50
ns
ns
μs
tOFFmin Minimum OFF time
tStart
Regulator start up time from transition ON/BYP = high VIN = 3.0V, VOUT = 3.0V
to STAT = low
50
(1) Shutdown current into VIN pin, includes internal leakage
Copyright © 2011, Texas Instruments Incorporated
3
TPS62730
SLVSAC3 –MAY 2011
www.ti.com
ELECTRICAL CHARACTERISTICS (continued)
VIN = 3.0V, VOUT = 2.1V, ON/BYP = VIN, TA = –40°C to 85°C typical values are at TA = 25°C (unless otherwise noted), CIN
2.2μF, L = 2.2μH, COUT = 2.2μF, see parameter measurement information
=
PARAMETER
TEST CONDITIONS
MIN TYP MAX UNIT
OUTPUT
VREF
Internal Reference Voltage
0.70
0
V
VIN = 3.0V
TA = 25°C
–1.5
–2.5
1.5
2.5
%
VOUT Feedback Voltage Comparator Threshold
Accuracy
TA = –40°C to 85°C
0
VVOUT
DC output voltage load regulation
IOUT = 1mA to 50mA VIN = 3.0V, VOUT = 2.1
V
-0.01
%/mA
DC output voltage line regulation
Leakage current into SW pin
IOUT = 20 mA, 2.4V ≤ VIN ≤ 3.9V
0.01
%/V
nA
ILK_SW
VIN = VOUT = VSW = 3.0 V, ON/Byp= GND
0.0 100
(2)
(2) The internal resistor divider network is disconnected from VOUT pin.
STAT
VOUT
ON/BYP
PIN FUNCTIONS
PIN
I/O
DESCRIPTION
NAME
NO
VIN
3
PWR VIN power supply pin. Connect this pin close to the VIN terminal of the input capacitor. A ceramic capacitor
of 2.2µF is required.
GND
4
5
PWR GND supply pin. Connect this pin close to the GND terminal of the input and output capacitor.
ON/BYP
IN
This is the mode selection pin of the device. Pulling this pin to low forces the device into ultra low power
bypass mode. The output of the DC/DC converter is connected to VIN via an internal bypass switch.
Pulling this pin to high enables the DC/DC converter operation. This pin must be terminated and is
controlled by the system. In case of CC2540, connect this to the power down signal which is output on one
of the P1.x ports (see CC2540 user guide).
SW
2
6
1
OUT
IN
This is the switch pin and is connected to the internal MOSFET switches. Connect the inductor to this
terminal.
VOUT
STAT
Feedback Pin for the internal feedback divider network and regulation loop. The internal bypass switch is
connected between this pin and VIN. Connect this pin directly to the output capacitor with short trace.
OUT
This is the open drain status output with active low level. An internal comparator drives this output. The pin
is high impedance with ON/BYP = low. With ON/BYP set to high the device and the internal VOUT
comparator becomes active. The STAT pin is set to low once the output voltage is higher than 93% of
nominal VOUT and high impedance once it is below this threshold. If not used, this pin can be left open.
4
Copyright © 2011, Texas Instruments Incorporated
TPS62730
www.ti.com
SLVSAC3 –MAY 2011
FUNCTIONAL BLOCK DIAGRAM
VIN
Automatic
Bypass
Transition
VREF
Undervoltage
Lockout
Bandgap
Current
0.70 V
/BYPASS
Softstart
/BYPASS
Limit Comparator
VIT BYP
-
Limit
High Side
VIN
+
VOUT
PMOS
ON/BYP
VIN
FB
Gate Driver
Anti
Shoot-Through
Min. On Time
Control
Logic
SW
Min. OFF Time
VREF
NMOS
VOUT
Limit
Low Side
GND
STAT
Integrated
Feed Back
Network
Error
Comparator
Zero/Negative
Current Limit Comparator
ON/BYP
VTSTAT
-
ON/BYP
+
Copyright © 2011, Texas Instruments Incorporated
5
TPS62730
SLVSAC3 –MAY 2011
www.ti.com
PARAMETER MEASUREMENT INFORMATION
VIN
1.9V - 3.9V
Additional Decoupling
capacitor bank
TPS6273x
L 2.2mH
VOUT
VIN
SW
4x100nF
1x 1uF
1x 2.2uF
RSTAT
10k
VOUT
GND
COUT
2.2µF
CIN
2.2µF
ON
BYP
CDEC
ON/BYP STAT
C
C
,
Load
C
: Murata GRM155R60J225ME15D 2.2 mF 0402 size
IN OUT
:
4 x Murata GRM155R61A104KA01D 100nF
1 x 2.2 mF GRM155R60J225ME15D
1 x 1mF GRM155R61A105KE15D
L: Murata LQM21PN2R2NGC 2.2 mH, FDK MIPSZ2012 2R2
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
η
η
Efficiency
Efficiency
vs Output current
vs Input voltage
vs Output current
vs Input voltage
1
2
Output voltage
Output Voltage
3
VOUT
4
ISD
IQ
Shutdown current bypass mode
Operating quiescent current
Bypass Drain-source on-state resistance
PMOS Static drain-source on-state resistance
NMOS Static drain-source on-state resistance
Automatic transition into bypass
Automatic transition into bypass
Switching frequency
vs Input voltage
vs Input voltage
5
6
vs Input voltage and ambient temperature
7
rDS(ON)
vs Input voltage and ambient temperature
8
vs Input voltage and ambient temperature
Falling VIN
9
10
11
12
13
14
15
16
17
18
19
Rising VIN
vs IOUT vs VIN
vs IOUT vs VIN
vs Frequency
vs Frequency
IOUT = 10 mA
VOUT
Output ripple voltage
PSRR
Noise Density
IOUT = 1 mA
DC/DC mode operation
IOUT = 18 mA
IOUT = 50 mA
DC/DC mode operation line and load transient
performance
20
Automatic bypass transition with falling/rising input
voltage
21
22
23
DC/DC mode VOUT AC load regulation performance
Bypass mode operation VOUT AC behavior ON/BYP
= GND
Startup behavior
24
25
26
27
Spurious output noise
Battery current reduction
Mode transition ON/BYP behavior
vs Battery voltage
6
Copyright © 2011, Texas Instruments Incorporated
TPS62730
www.ti.com
SLVSAC3 –MAY 2011
TYPICAL CHARACTERISTICS (continued)
100
IOUT = 50 mA
100
95
90
85
80
75
70
65
60
55
V
= 2.1 V
95
90
85
IOUT = 25 mA
IN
Bypass
IOUT = 100 mA
V
= 2.3 V
IN
IOUT = 10 mA
V
= 2.7 V
80
75
70
65
60
IOUT = 1 mA
IN
V
= 3 V
IN
TPS62730
= 2.1 V,
V
= 3.6 V
IN
V
OUT
ON/BYP = High,
L = 2.2 mH,
C
= 2.2 mF
IOUT = 100 mA
OUT
TPS62730
V
= 2.1 V,
OUT
ON/BYP = High,
L = 2.2 mH,
C
55
50
= 2.2 mF
OUT
50
0.1
1
10
- Output Current - mA
100
2.1 2.3 2.5 2.7 2.9 3.1 3.3 3.5 3.7 3.9
I
O
V
IN
- Input Voltage - V
Figure 1. Efficiency vs Output Current
Figure 2. Efficiency vs Input Voltage
2.142
2.121
2.1
2.226
2.205
2.184
2.163
2.142
2.121
2.1
TPS62730
= 2.1 V,
TPS62730
V
V
OUT
ON/BYP = High,
= 2.1 V,
OUT
ON/BYP = High,
L = 2.2 mH,
I
= 1 mA
L = 2.2 mH,
C
OUT
I
= 10 mA
= 2.2 mF
OUT
OUT
C
V
= 2.2 mF,
OUT
rising
I
= 19 mA
= 25 mA
OUT
IN
V
= 3 V
IN
I
OUT
V
= 3.3 V
IN
V
= 3.6 V
IN
V
= 2.3 V
IN
V
= 2.7 V
IN
2.079
I
= 50 mA
OUT
2.079
I
= 100 mA
OUT
V
= 2.1 V
IN
2.058
2.037
2.058
0
0.1
I
1
10
100
1.9 2.1 2.3 2.5 2.7 2.9 3.1 3.3 3.5 3.7 3.9
- Input Voltage - V
- Output Current - mA
V
OUT
IN
Figure 3. Output Voltage vs Output Current
Figure 4. Output Voltage vs Input Voltage
Copyright © 2011, Texas Instruments Incorporated
7
TPS62730
SLVSAC3 –MAY 2011
www.ti.com
TYPICAL CHARACTERISTICS (continued)
35
1k
100
10
T
= 85°C
T
= 60°C
T = 70°C
A
A
A
T
= 85°C
T
A
30
25
20
15
10
5
T
= 50°C
A
= 70°C
A
T
= 60°C
A
T = -40°C
A
T
= 25°C
T
A
T
= -20°C
A
= 0°C
A
T
= 50°C
A
T
= 25°C
A
T
= -40°C
A
0
1.9 2.1 2.3 2.5 2.7 2.9 3.1 3.3 3.5 3.7 3.9
1.9 2.1 2.3 2.5 2.7 2.9 3.1 3.3 3.5 3.7 3.9
V
- Input Voltage - V
V
- Input Voltage - V
IN
IN
Figure 5. Shutdown Current Bypass Mode vs Input
Voltage
Figure 6. Operating Quiescent Current vs Input Voltage
4
3.5
3
1.6
1.4
1.2
1
T
= 85°C
T
T
= 85°C
A
A
= 70°C
T
A
= 70°C
A
T
= 60°C
A
T
A
= 60°C
T
A
= 50°C
T
A
= 50°C
T
= 25°C
T
= 25°C
A
A
2.5
2
T
A
= 0°C
0.8
0.6
0.4
0.2
0
T
= 0°C
A
T
= -20°C
1.5
1
A
T
= -20°C
A
T
= -40°C
A
T
A
= -40°C
0.5
0
1.9 2.1 2.3 2.5 2.7 2.9 3.1 3.3 3.5 3.7 3.9
1.9 2.1 2.3 2.5 2.7 2.9 3.1 3.3 3.5 3.7 3.9
V
- Input Voltage - V
V
- Input Voltage - V
IN
IN
Figure 7. rDS(ON) Bypass vs Input Voltage
Figure 8. rDS(ON) PMOS vs Input Voltage
8
Copyright © 2011, Texas Instruments Incorporated
TPS62730
www.ti.com
SLVSAC3 –MAY 2011
TYPICAL CHARACTERISTICS (continued)
2.3
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
T
= 85°C
T
ON/BYP = high
A
automatic transition
into bypass mode
falling VIN
= 70°C
T
A
I
= 1 mA -40ºC
= 1 mA 25ºC
OUT
2.25
2.2
2.15
2.1
2.05
2
= 60°C
A
I
T
A
= 50°C
T
OUT
= 25°C
A
I
= 1 mA 85ºC
OUT
I
= 20 mA -40ºC
OUT
I
= 20 mA 25ºC
= 20 mA 85ºC
OUT
T
= 0°C
I
A
OUT
T
A
= -20°C
T
= -40°C
A
bypass
mode
DC/DC
mode
1.9
2
2.1
2.2
2.3
2.4
2.5
1.9 2.1 2.3 2.5 2.7 2.9 3.1 3.3 3.5 3.7 3.9
V
- Input Voltage - V
V
- Input Voltage - V
IN
IN
Figure 9. rDS(ON) NMOS vs Input Voltage
Figure 10. Automatic Transition into Bypass Mode -
Falling VIN
2.3
2.25
2.2
3500
ON/BYP = high
I
= 1 mA -40ºC
= 1 mA 25ºC
OUT
L = 2.2 mH Murata LQM21PN2R2,
= 2.2 mF,
automatic transition
into bypass mode
rising VIN
C
OUT
ON/BYP = VIN
I
3000
2500
2000
1500
1000
OUT
V
= 3 V
IN
I
= 1 mA 85ºC
OUT
V
= 2.7 V
IN
I
= 20 mA -40ºC
= 20 mA
OUT
V
= 2.5 V
IN
I
OUT
2.15
2.1
I
= 20 mA 85ºC
OUT
V
= 3.6 V
IN
2.05
2
V
= 2.3 V
IN
V
= 3.3 V
500
0
IN
bypass mode
2.2
DC/DC mode
1.9
2
2.1
2.3
2.4
2.5
0
10
20
30
40
50
V
- Input Voltage - V
I
- Output Current - mA
IN
OUT
Figure 11. Automatic Transition into Bypass Mode - Rising
VIN
Figure 12. Switching Frequency vs IOUT vs VIN
Copyright © 2011, Texas Instruments Incorporated
9
TPS62730
SLVSAC3 –MAY 2011
www.ti.com
TYPICAL CHARACTERISTICS (continued)
100
30
V
I
= 2.7 V,
IN
TPS62730
VOUT = 2.1V
ON/BYP = VIN
90
= 25 mA,
V
= 3.6 V
OUT
IN
25
20
15
10
5
C
= 2.2 mF,
80
OUT
V
= 3.3 V
IN
L = 2.2mH
COUT = 2.2mF
L = 2.2 mH
V
= 3 V
IN
70
60
50
40
30
V
= 2.5 V
V
= 2.3 V
IN
IN
V
= 2.7 V
IN
20
10
0
0
0
10
100
1k
10k
100k
1M
10M
10
20
30
40
50
f - Frequency - Hz
I
- Output Current - mA
OUT
Figure 13. VOUT vs IOUT vs VIN
Figure 14. PSRR vs Frequency
5
4.5
4
IOUT = 10mA
L = 2.2 mH
TPS62730
V
I
= 2.7 V,
IN
VOUT = 2.1 V
ON/BYP = VIN
= 25 mA (R
= 84W),
LOAD
COUT = 2.2 mF
OUT
C
= 2.2 mF,
OUT
L = 2.2 mF
3.5
3
2.5
2
1.5
1
0.5
0
100
1k
10k
100k
1M
f - Frequency - Hz
Figure 15. Noise Density vs Frequency
Figure 16. DC/DC Mode Operation IOUT = 10mA
10
Copyright © 2011, Texas Instruments Incorporated
TPS62730
www.ti.com
SLVSAC3 –MAY 2011
TYPICAL CHARACTERISTICS (continued)
TPS62730
IOUT = 1mA
L = 2.2 mH
COUT = 2.2 mF
IOUT = 18mA
L = 2.2 mH
TPS62730
VOUT = 2.1 V
VIN = 3.0 V
VOUT = 2.1 V
VIN = 3.0 V
COUT = 2.2 mF
CLoad = 3.6mF
ON/BYP = VIN
ON/BYP = VIN
CLoad = 3.6mF
VOUT
VOUT
SW
SW
IL
IL
Figure 17. DC/DC Mode Operation IOUT = 1mA
Figure 18. DC/DC Mode Operation IOUT = 18mA
IOUT = 50mA
TPS62730
VOUT = 2.1 V
VIN = 3.0 V
TPS62730
VOUT = 2.1 V
L = 2.2 mH
COUT = 2.2 mF
CLoad = 3.6mF
VIN = 2.3V to 2.7V
VOUT
ON/BYP = VIN
ON/BYP = VIN
SW
IOUT = 20mA to1mA
L = 2.2 mH
IL
COUT = 2.2 mF
CLoad = 3.6mF
Figure 19. DC/DC Mode Operation IOUT = 50mA
Figure 20. DC/DC Mode Operation Line and Load
Transient Performance
Copyright © 2011, Texas Instruments Incorporated
11
TPS62730
SLVSAC3 –MAY 2011
www.ti.com
TYPICAL CHARACTERISTICS (continued)
TPS62730
IOUT = 1mA to 50mA
L = 2.2 mH
VOUT = 2.1 V
VIN = 3.0V
ON/BYP = VIN
Automatic Bypass Mode
COUT = 2.2 mF
CLoad = 3.6mF
2.1V
1.9V
TPS62730
VOUT = 2.1 V
VIN = 1.9V to 2.6V
ON/BYP = VIN
IOUT = 30mA
L = 2.2 mH
50mA/Div
COUT = 2.2 mF
CLoad = 3.6mF
Status Output
Status Output
Figure 21. Automatic Bypass Transition with Falling /
Rising Input Voltage VIN
Figure 22. DC/DC Mode VOUT AC Load Regulation
Performance
TPS62730
VOUT = 2.1 V
IN = 0V to 3.0 V
ON/BYP = VIN
RLoad = 120W
L = 2.2 mH
CLoad = 3.6mF
Source resistance = 1W
V
COUT = 2.2 mF
50mA/Div
IBAT 1A/Div
Status Output
TPS62730
VIN = 3.0V
ON/BYP = GND
IOUT = 1mA to 50mA
L = 2.2 mH
COUT = 2.2 mF
CLoad = 3.6mF
Figure 23. Bypass Mode Operation VOUT AC Behavior
ON/BYP = GND
Figure 24. Startup Behavior
12
Copyright © 2011, Texas Instruments Incorporated
TPS62730
www.ti.com
SLVSAC3 –MAY 2011
TYPICAL CHARACTERISTICS (continued)
29
1m
Ref. Lev. 1mV
TPS62730
VOUT = 2.1 V
ON/BYP = VIN
900m
IBAT NO TPS62730
RBW 30kHz
VBW 20kHz
SWT 42ms
27
25
23
21
19
17
15
800m
700m
600m
RLoad = 82W
IOUT = 26mA
L = 2.2 mH
COUT = 2.2 mF
Battery Current
Reduction @
CC2540
0dBm CW TX
Power
VIN = 2.3V
500m
400m
300m
200m
100m
10n
VIN = 3.6V
VIN = 3.0V
IBAT With TPS62730
VIN = 2.7V
Battery Current Reduction of CC2540
2.4GHz Bluetooth Low Energy
System-On-Chip Solution
Stop 10 MHz
Start 0Hz
1MHz/Div
Frequency
2
2.2 2.4 2.6 2.8
3
3.2 3.4 3.6 3.8
Battery Voltage - VBAT
Figure 25. Spurious Output Noise TPS62730 IOUT 26mA
Figure 26. Battery Current Reduction vs Battery Voltage
DC/DC Operation
Bypass Operation
ON/BYP
TPS62730
VIN = 2.3V
IOUT = 1mA to 50mA
L = 2.2 mH
COUT = 2.2 mF
CLoad = 3.6mF
50mA/Div
Status Output
Figure 27. Mode Transition ON/BYP Behavior
Copyright © 2011, Texas Instruments Incorporated
13
TPS62730
SLVSAC3 –MAY 2011
www.ti.com
DETAILED DESCRIPTION
The TPS62730 combines a synchronous buck converter for high efficient voltage conversion and an integrated
ultra low power bypass switch to support low power modes of modern micro controllers and RF IC's. The
synchronous buck converter includes TI's DCS-Control™, an advanced regulation topology, that combines the
advantages of hysteretic and voltage mode control architectures. While a comparator stage provides excellent
load transient response, an additional voltage feedback loop ensures high DC accuracy as well. The
DCS-Control™ enables switch frequencies up to 3MHz, excellent transient and AC load regulation as well as
operation with small and cost competitive external components. The TPS6273x devices offer fixed output voltage
options featuring smallest solution size by using only three external components. Furthermore this step down
converter provides excellent low output voltage ripple over the entire load range which makes this part ideal for
RF applications. In the ultra low power bypass mode, the output of the device VOUT is directly connected to the
input VIN via the internal bypass switch. In this mode, the buck converter is shut down and consumes only 30nA
typical input current. Once the device is turned from ultra low power bypass mode into buck converter operation
for a RF transmission, all the internal circuits of the regulator are activated within a start up time tStart of typ.
50µs. During this time the bypass switch is still turned on and maintains the output VOUT connected to the input
VIN. Once the DC/DC converter is settled and ready to operate, the internal bypass switch is turned off and the
system is supplied by the output capacitor and the other decoupling capacitors. The buck converter kicks in once
the capacitors connected to VOUT are discharged to the level of the nominal buck converter output voltage.
Once the output voltage falls below the threshold of the internal error comparator, a switch pulse is initiated, and
the high side switch of the DC/DC converter is turned on. It remains turned on until a minimum on time of tONmin
expires and the output voltage trips the threshold of the error comparator or the inductor current reaches the high
side switch current limit. Once the high side switch turns off, the low side switch rectifier is turned on and the
inductor current ramps down until the high side switch turns on again or the inductor current reaches zero. The
converter operates in the PFM (Pulse Frequency Modulation) mode during light loads, which maintains high
efficiency over a wide load current range. In PFM Mode, the device starts to skip switch pulses and generates
only single pulses with an on time of tONmin. The PFM mode of TPS62730 is optimized for low output ripple
voltage if small external components are used.
The on time tONmin can be estimated to:
VOUT
tONmin
=
´ 260 ns
V
IN
(1)
(2)
Therefore, the peak inductor current in PFM mode is approximately:
(V - VOUT
IN
)
ILPFMpeak
=
´ tONmin
L
With
tONmin: High side switch on time [ns]
VIN: Input voltage [V]
VOUT: Output voltage [V]
L : Inductance [μH]
ILPFMpeak : PFM inductor peak current [mA]
ON/BYP MODE SELECTION
The DC/DC converter is activated when ON/BYP is set high. For proper operation, the ON/BYP pin must be
terminated and may not be left floating. This pin is controlled by the RF transceiver or micro controller for proper
mode selection. Pulling the ON/BYP pin low activates the Ultra Low Power Bypass Mode with typical 30nA
current consumption. In this mode, the internal bypass switch is turned on and the output of the DC/DC converter
is connected to the battery VIN. All other circuits like the entire internal-control circuitry, the High Side and Low
Side MOSFET's of the DC/DC output stage are turned off as well the internal resistor feedback divider is
disconnected. The ON/BYP need to be controlled by a Micro controller for proper mode selection.
14
Copyright © 2011, Texas Instruments Incorporated
TPS62730
www.ti.com
SLVSAC3 –MAY 2011
START UP
Once the device is supplied with a battery voltage, the bypass switch is activated. If the ON/BYP pin is set to
high, the device operates in bypass mode until the DC/DC converter has settled and can kick in. During start up,
high peak currents can flow over the bypass switch to charge up the output capacitor and the additional
decoupling capacitors in the system.
AUTOMATIC TRANSITION FROM DC/DC TO BYPASS OPERATION
With pin ON/BYP set to high, the TPS62730 features an automatic transition between DC/DC and bypass mode
to reduce the output ripple voltage to zero. Once the input voltage comes close to the output voltage of the
DC/DC converter, the DC/DC converters operates close to 100% duty cycle operation. At this operating
condition, the switch frequency would start to drop and would lead to increased output ripple voltage. The internal
bypass switch is turned on once the battery voltage at VIN trips the Automatic Bypass Transition Threshold VIT
BYP for falling VIN. The DC/DC regulator is turned off and therefore it generates no output ripple voltage. Due to
the output is connected via the bypass switch to the input, the output voltage follows the input voltage minus the
voltage drop across the internal bypass switch. In this mode the current consumption of the DC/DC converter is
reduced to typically 23µA. Once the input voltage increases and trips the bypass deactivation threshold VIT BYP
for rising VIN, the DC/DC regulator turns on and the bypass switch is turned off.
INTERNAL CURRENT LIMIT
The TPS62730 integrates a High Side and Low Side MOSFET current limit to protect the device against heavy
load or short circuit when the DC/DC converter is active. The current in the switches is monitored by current limit
comparators. When the current in the High Side MOSFET reaches its current limit, the High Side MOSFET is
turned off and the Low Side MOSFET is turned on to ramp down the current in the inductor. The High Side
MOSFET switch can only turn on again, once the current in the Low Side MOSFET switch has decreased below
the threshold of its current limit comparator. The bypass switch doesn't feature a current limit to support lowest
current consumption.
Battery
Voltage
VIT BYP rising
VIT BYP falling
ON/BYP
DC/DC
Stepdown
Mode
Bypass
Operation
Figure 28. Operation Mode Diagram with ON/BYP = High
Copyright © 2011, Texas Instruments Incorporated
15
TPS62730
SLVSAC3 –MAY 2011
www.ti.com
ON/BYP
VOUT
Discharge
COUT
VBAT
by system
DC/DC
kick in
bypass mode
VOUT DC/DC
VTSTAT
STAT
tStart
Figure 29. Signal Status Diagram ON/BYP, VOUT, STAT
16
Copyright © 2011, Texas Instruments Incorporated
TPS62730
www.ti.com
SLVSAC3 –MAY 2011
APPLICATION INFORMATION
VOUT
2.1V
VIN
2.2V - 3.9V*
TPS62730
L 2.2mH
VIN
SW
VOUT
GND
COUT
2.2µF
Rpullup
CIN
2.2µF
ON
BYP
ON/BYP STAT
* At VIN < 2.2V, VOUT tracks VIN
Figure 30. Typical Application
TPS62730
L 2.2mH VCC2540
VIN
SW
VOUT
CIN
2.2µF
2.1V
CBUF
GND
COUT
2.2µF
3V
Battery
ON/BYP STAT
Power Down Signal
P1.2 PMUX
DVDD 1
DVDD 2
AVDD 6
AVDD 5
AVDD 3
AVDD 1,2,4
L BEAD
1000W
@100MHz
VCC2540
DCOUPL
CC2540
2.2µF 1µF
CC2540 power supply decoupling capacitors
Figure 31. Application Example CC2540
1µF
5x 100nF
Copyright © 2011, Texas Instruments Incorporated
17
TPS62730
SLVSAC3 –MAY 2011
www.ti.com
TPS62730
L 2.2mH VCC430
VIN
SW
VOUT
CIN
2.2µF
2.1V
CBUF
GND
COUT
2.2µF
3V
Battery
ON/BYP STAT
CC430
P1.1
Power Down Signal
P1.2
VCC430
DVCC 1,2,3
3 x
2 x
100nF
1µF
L BEAD
VCC430
AVCC_RF/Guard
1,2,3,4
12nH
5 x
100nF
2 x
2pF
AVCC
VCC430
1 x
1µF
1 x
100nF
CC430 power supply decoupling capacitors
Figure 32. Application Example CC430
18
Copyright © 2011, Texas Instruments Incorporated
TPS62730
www.ti.com
SLVSAC3 –MAY 2011
OUTPUT FILTER DESIGN (INDUCTOR AND OUTPUT CAPACITOR)
The TPS62730 is optimized to operate with effective inductance values in the range of 1.5μH to 3μH and with
effective output capacitance in the range of 1.0μF to 10μF. The internal compensation is optimized to operate
with an output filter of L = 2.2μH and COUT = 2.2μF, which gives and LC output filter corner frequency of:
1
fC =
= 72kHz
2´p ´ (2.2mH ´ 2.2mF)
(3)
INDUCTOR SELECTION
The inductor value affects its peak-to-peak ripple current, the PWM-to-PFM transition point, the output voltage
ripple and the efficiency. The selected inductor has to be rated for its dc resistance and saturation current. The
inductor ripple current (ΔIL) decreases with higher inductance and increases with higher VI N or VO UT. Equation 4
calculates the maximum inductor current under static load conditions. The saturation current of the inductor
should be rated higher than the maximum inductor current as calculated with Equation 5
Vout
1-
Vin
DIL = Vout ´
L ´ ¦
(4)
DI
L
I
= I
+
Lmax
outmax
2
(5)
With:
f = Switching Frequency
L = Inductor Value
ΔIL= Peak to Peak inductor ripple current
ILmax = Maximum Inductor current
In high-frequency converter applications, the efficiency is essentially affected by the inductor AC resistance (i.e.,
quality factor) and to a smaller extent by the inductor DCR value. To achieve high efficiency operation, care
should be taken in selecting inductors featuring a quality factor above 25 at the switching frequency. Increasing
the inductor value produces lower RMS currents, but degrades transient response. For a given physical inductor
size, increased inductance usually results in an inductor with lower saturation current.
The total losses of the coil consist of both the losses in the DC resistance, R(DC), and the following
frequency-dependent components:
•
•
•
•
The losses in the core material (magnetic hysteresis loss, especially at high switching frequencies)
Additional losses in the conductor from the skin effect (current displacement at high frequencies)
Magnetic field losses of the neighboring windings (proximity effect)
Radiation losses
The following inductor series from different suppliers have been used with the TPS62730 converters.
Table 1. List of inductors
INDUCTANCE
DIMENSIONS
[mm3]
INDUCTOR TYPE
SUPPLIER
[μH]
2.2
2.2
2.0 × 1.2 × 1.0
2.0 × 1.2 × 1.0
LQM21PN2R2NGC
MIPSZ2012
Murata
FDK
DC/DC OUTPUT CAPACITOR SELECTION
The DCS-Control™ scheme of the TPS62730 allows the use of tiny ceramic capacitors. Ceramic capacitors with
low ESR values have the lowest output voltage ripple and are recommended. The output capacitor requires
either an X7R or X5R dielectric. Y5V and Z5U dielectric capacitors, aside from their wide variation in capacitance
over temperature, become resistive at high frequencies. At light load currents the converter operate in Power
Save Mode and the output voltage ripple is dependent on the output capacitor value and the PFM peak inductor
current.
Copyright © 2011, Texas Instruments Incorporated
19
TPS62730
SLVSAC3 –MAY 2011
www.ti.com
ADDITIONAL DECOUPLING CAPACITORS
In addition to the output capacitor there are further decoupling capacitors connected to the output of the
TPS62730. These decoupling capacitor are placed closely at the RF transmitter or micro controller. The total
capacitance of these decoupling capacitors should be kept to a minimum and should not exceed the values given
in the reference designs, see Figure 31 and Figure 32. During mode transition from DC/DC operation to bypass
mode the capacitors on the output VOUT are charged up to the battery voltage VIN via the internal bypass
switch. During mode transition from bypass mode to DC/DC operation, these capacitors need to be discharged
by the system supply current to the nominal output voltage threshold until the DC/DC will kick in. The charge
change in the output and decoupling capacitors can be calculated according to Equation 6. The energy loss due
to charge/discharge of the output and decoupling capacitors can be calculated according to Equation 7
(
dQCOUT _ CDEC = CCOUT _ CDEC ´ VIN -VOUT _ DC _ DC
)
(6)
(7)
2
VIN -VOUT _ DC _ DC
2
1
2
ECh arg e _ Loss = ´CCOUT _ CDEC
´
(
)
with
dQCOUT_CDEC : Charge change needed to charge up / discharge the output and decoupling capacitors from
VOUT_DC_DC to VIN and vice versa
CCOUT_CDEC: Total capacitance on the VOUT pin of the device, includes output and decoupling capacitors
VIN: Input (battery) voltage
VOUT_DC_DC: nominal DC/DC output voltage VOUT
INPUT CAPACITOR SELECTION
Because of the nature of the buck converter having a pulsating input current, a low ESR input capacitor is
required for best input voltage filtering to ensure proper function of the device and to minimize input voltage
spikes. For most applications a 2.2µF to 4.7µF ceramic capacitor is recommended. The input capacitor can be
increased without any limit for better input voltage filtering.
Table 2 shows a list of tested input/output capacitors.
INPUT BUFFER CAPACITOR SELECTION
In addition to the small ceramic input capacitor a larger buffer capacitor CBuf is recommended to reduce voltage
drops and ripple voltage. When using battery chemistries like Li-SOCl2, Li-SO2, Li-MnO2, the impedance of the
battery has to be considered. These battery types tend to increase their impedance depending on discharge
status and often can support output currents of only a few mA. Therefore a buffer capacitor is recommended to
stabilize the battery voltage during DC/DC operations e.g. for a RF transmission. A voltage drop on the input of
the TPS62730 during DC/DC operation impacts the advantage of the step down conversion for system power
reduction. Furthermore the voltage drops can fall below the minimum recommended operating voltage of the
device and leads to an early system cut off. Both impacts effects reduce the battery life time. To achieve best
performance and to extract most energy out of the battery a good procedure is to design the select the buffer
capacitor value for an voltage drop below 50mVpp during DC/DC operation. The capacitor value strongly
depends on the used battery type, as well the current consumption during a RF transmission as well the duration
of the transmission.
Table 2. List of Capacitor
CAPACITANCE [μF]
SIZE
CAPACITOR TYPE
SUPPLIER
2.2
0402
GRM155R60J225
Murata
CHECKING LOOP STABILITY
The first step of circuit and stability evaluation is to look from a steady-state perspective at the following signals:
•
•
•
Switching node, SW
Inductor current, IL
Output ripple voltage, VOUT(AC)
20
Copyright © 2011, Texas Instruments Incorporated
TPS62730
www.ti.com
SLVSAC3 –MAY 2011
These are the basic signals that need to be measured when evaluating a switching converter. When the
switching waveform shows large duty cycle jitter or the output voltage or inductor current shows oscillations, the
regulation loop may be unstable. This is often a result of board layout and/or L-C combination.
As a next step in the evaluation of the regulation loop, the load transient response is tested. The time between
the application of the load transient and the turn on of the High Side MOSFET, the output capacitor must supply
all of the current required by the load. VOUT immediately shifts by an amount equal to ΔI(LOAD) x ESR, where ESR
is the effective series resistance of COUT. ΔI(LOAD) begins to charge or discharge CO generating a feedback error
signal used by the regulator to return VOUT to its steady-state value. The results are most easily interpreted when
the device operates in PWM mode.
During this recovery time, VOUT can be monitored for settling time, overshoot or ringing that helps judge the
converter’s stability. Without any ringing, the loop has usually more than 45° of phase margin.
Because the damping factor of the circuitry is directly related to several resistive parameters (e.g., MOSFET
rDS(on)) that are temperature dependant, the loop stability analysis has to be done over the input voltage range,
load current range, and temperature range.
LAYOUT CONSIDERATIONS
As for all switching power supplies, the layout is an important step in the design. Especially RF designs demand
careful attention to the PCB layout. Care must be taken in board layout to get the specified performance. If the
layout is not carefully done, the regulator could show poor line and/or load regulation, stability issues as well as
EMI problems and interference with RF circuits. It is critical to provide a low inductance, impedance ground path.
Therefore, use wide and short traces for the main current paths. The input capacitor should be placed as close
as possible to the IC pins as well as the inductor and output capacitor. Use a common Power GND node and a
different node for the Signal GND to minimize the effects of ground noise. Keep the common path to the GND
PIN, which returns the small signal components and the high current of the output capacitors as short as
possible to avoid ground noise. The VOUT line should be connected to the output capacitor and routed away
from noisy components and traces (e.g. SW line).
Total area
L1
is less than
12mm²
V IN
C
1
C2
GND
VOUT
Figure 33. Recommended PCB Layout for TPS62730
Copyright © 2011, Texas Instruments Incorporated
21
PACKAGE OPTION ADDENDUM
www.ti.com
9-Jun-2011
PACKAGING INFORMATION
Status (1)
Eco Plan (2)
MSL Peak Temp (3)
Samples
Orderable Device
Package Type Package
Drawing
Pins
Package Qty
Lead/
Ball Finish
(Requires Login)
TPS62730DRYR
TPS62730DRYT
ACTIVE
ACTIVE
SON
SON
DRY
DRY
6
6
5000
250
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
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