TPS63020QDSJRQ1 [TI]
具有 4A 开关的高效汽车类单传感器降压/升压转换器 | DSJ | 14 | -40 to 125;
| 型号： | TPS63020QDSJRQ1 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 具有 4A 开关的高效汽车类单传感器降压/升压转换器 | DSJ | 14 | -40 to 125 升压转换器 开关 光电二极管 传感器 |
| 文件： | 总27页 (文件大小：1621K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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TPS63020-Q1
ZHCSEB8 –OCTOBER 2015
TPS63020-Q1 具有 4A 开关电流的高效单电感升压/降压转换器
1 特性
2 应用范围
1
•
•
符合汽车应用要求
具有符合 AEC-Q100 的下列结果：
•
•
信息娱乐
远程信息处理/紧急呼叫 (eCall)
–
–
–
器件温度等级：运行结温范围为 -40°C 至
125°C
3 说明
TPS63020-Q1 器件是一款电源解决方案，广泛应用于
由 2-3 节碱性电池、镍镉 (NiCd) 电池、镍氢 (NiMH)
电池以及单节锂离子电池或锂聚合物电池供电的产品。
当使用单节锂离子电池或锂聚合物电池供电时，该器件
提供高达 3A 的输出电流并可对电池进行放电，使其电
压降至 2.5V 或更低水平。 此升压/降压转换器基于一
个频率固定的脉宽调制 (PWM) 控制器。该控制器可通
过同步整流实现效率最大化。 在负载电流较低的情况
下，该转换器会进入节能模式，以在宽负载电流范围内
保持高效率。 禁用省电模式则会强制转换器以固定开
关频率运行。 开关的最大平均电流为 4A（典型值）。
输出电压可通过外部电阻分频器进行编程。 转换器可
被禁用以最大限度地减少电池消耗。 在关机期间，负
载从电池上断开。 该器件采用 3mm × 4mm 14 引脚
VSON PowerPAD™ 封装 (DSJ)。
器件人体放电模型 (HBM) 静电放电 (ESD) 分类
等级 H1B
器件充电器件模型 (CDM) ESD 分类等级 C4B
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
输入电压范围：1.8V 至 5.5V
效率高达 96%
3.3V 降压模式下的输出电流为 3A (VIN > 3.6V)
3.3V 升压模式下的输出电流高于 2A (VIN > 2.5V)
在降压和升压模式之间实现自动转换
动态输入电流限制
器件的静态电流小于 50μA
可调节输出电压范围：1.2V 至 5.5V
用于改进低输出功率效率的节能模式
2.4MHz 强制固定运行频率并可实现同步
智能电源正常状态输出
关机期间负载断开
过温保护
器件信息(1)
过压保护
部件号
封装
VSON (14)
封装尺寸（标称值）
采用 3mm × 4mm 超薄小外形尺寸无引线 (VSON)-
14 封装
TPS63020-Q1
3.00mm x 4.00mm
(1) 要了解所有可用封装，请见数据表末尾的可订购产品附录。
4 典型应用电路原理图
效率与输出电流间的关系
100
L
1 1µH
90
80
70
60
50
40
VOUT
VIN
L1
L2
3.3V2A
C2
2.5 V to 5.5V
VIN
VINA
EN
VOUT
FB
R1
R3
1MΩ
C1
2X10µF
1MΩ
4X22µF
C3
0.1µF
PS/SYNC
R2
180kΩ
PG
GND
PGND
Power Good
Output
TPS63020
30
VIN = 1.8V, VOUT = 2.5V
VIN = 3.6V, VOUT = 2.5V
VIN = 2.4V, VOUT = 4.5V
20
VIN = 3.6V, VOUT = 4.5V
10
TPS63020, Power Save Enabled
0
100m
1m
10m
100m
1
4
Output Current (A)
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
English Data Sheet: SLVSD52
TPS63020-Q1
ZHCSEB8 –OCTOBER 2015
www.ti.com.cn
目录
9.4 Device Functional Modes.......................................... 9
10 Application and Implementation........................ 12
10.1 Application Information.......................................... 12
10.2 Typical Application ................................................ 12
10.3 System Examples ................................................. 17
11 Power Supply Recommendations ..................... 18
12 Layout................................................................... 18
12.1 Layout Guidelines ................................................. 18
12.2 Layout Example .................................................... 18
12.3 Thermal Considerations........................................ 19
13 器件和文档支持 ..................................................... 20
13.1 器件支持................................................................ 20
13.2 文档支持................................................................ 20
13.3 社区资源................................................................ 20
13.4 商标....................................................................... 20
13.5 静电放电警告......................................................... 20
13.6 Glossary................................................................ 20
14 机械、封装和可订购信息....................................... 20
1
2
3
4
5
6
7
8
特性.......................................................................... 1
应用范围................................................................... 1
说明.......................................................................... 1
典型应用电路原理图................................................. 1
修订历史记录 ........................................................... 2
Device Comparison Table..................................... 3
Pin Configuration and Functions......................... 3
Specifications......................................................... 4
8.1 Absolute Maximum Ratings ...................................... 4
8.2 ESD Ratings ............................................................ 4
8.3 Recommended Operating Conditions....................... 4
8.4 Thermal Information ................................................. 4
8.5 Electrical Characteristics........................................... 5
8.6 Typical Characteristics.............................................. 6
Detailed Description .............................................. 7
9.1 Overview ................................................................... 7
9.2 Functional Block Diagram ......................................... 7
9.3 Feature Description................................................... 7
9
5 修订历史记录
日期
修订版本
注释
2015 年 10 月
*
最初发布版本。
2
Copyright © 2015, Texas Instruments Incorporated
TPS63020-Q1
www.ti.com.cn
ZHCSEB8 –OCTOBER 2015
6 Device Comparison Table
PART NUMBER
VOUT
Adjustable
TPS63020-Q1
7 Pin Configuration and Functions
DSJ Package
14-Pin VSON (QFN)
(Top View)
VINA
GND
FB
PG
PS/SYNC
EN
Exposed
Thermal
Pad *)
VOUT
VOUT
L2
VIN
VIN
L1
L2
L1
NOTE: *) The exposed thermal pad is connected to PGND.
See TPS63020-Q1 Pin FMEA Application Report SLVA736
Pin Functions
PIN
I/O
DESCRIPTION
NAME
EN
NO.
12
3
I
I
Enable input (1 enabled, 0 disabled), must not be left open
Voltage feedback of adjustable versions.
Control/logic ground
FB
GND
L1
2
8, 9
6, 7
14
I
I
Connection for inductor
L2
Connection for inductor
PG
O
Output power good (1 good, 0 failure; open drain)
Power ground
PGND
PS/SYNC
13
I
Enable/disable power save mode (1 disabled, 0 enabled, clock signal for synchronization), must not
be left open
VIN
10, 11
1
I
I
Supply voltage for power stage
VINA
Supply voltage for control stage
VOUT
Exposed
4, 5
O
Buck-boost converter output
The exposed thermal pad is connected to PGND.
Thermal Pad
Copyright © 2015, Texas Instruments Incorporated
3
TPS63020-Q1
ZHCSEB8 –OCTOBER 2015
www.ti.com.cn
8 Specifications
8.1 Absolute Maximum Ratings
Over operating junction temperature range (unless otherwise noted)(1)
MIN
–0.3
–40
–65
MAX
7
UNIT
V
(2)
Voltage
VIN, VINA, L1, L2, VOUT, PS/SYNC, EN, FB, PG
Operating junction temperature, TJ
Storage temperature, Tstg
150
150
°C
°C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages are with respect to network ground terminal.
8.2 ESD Ratings
Value
±1000
±500
UNIT
Human body model (HBM), per AEC Q100-002(2)
Charged device model (CDM), per AEC Q100-011
V(ESD)
Electrostatic discharge(1)
V
(1) Electrostatic discharge (ESD) measures device sensitivity and immunity to damage caused by assembly line electrostatic discharges
(2) JAEC Q100-002 indicates HBM stressing is done in accordance with the ANSI/ESDA/JEDEC JS-001 specification
8.3 Recommended Operating Conditions
Over operating junction temperature range (unless otherwise noted)
MIN
1.8
NOM
MAX
5.5
UNIT
V
Supply voltage at VIN, VINA
Operating junction temperature range, TJ
–40
125
°C
8.4 Thermal Information
TPS63020-Q1
THERMAL METRIC(1)
DSJ (VSON)
UNIT
14 PINS
41.8
47
RθJA
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
RθJC(top)
RθJB
17
ψJT
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
0.9
ψJB
16.8
3.6
RθJC(bot)
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
4
Copyright © 2015, Texas Instruments Incorporated
TPS63020-Q1
www.ti.com.cn
ZHCSEB8 –OCTOBER 2015
8.5 Electrical Characteristics
VIN = 1.8 V to 5.5 V, TJ = –40°C to 125°C, typical values are at TA = 25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
DC/DC STAGE
Input voltage range
1.8
1.5
5.5
1.9
2.0
5.5
V
V
V
V
VIN
Minimum input voltage for startup
Minimum input voltage for startup
TPS63020 output voltage range
Duty cycle in step down conversion
TPS63020 feedback voltage
TPS63020 feedback voltage
Maximum line regulation
0°C ≤ TA ≤ 85°C
1.8
1.8
1.5
VOUT
1.2
20%
495
0.6%
VFB
VFB
PS/SYNC = VIN
500
505
5%
mV
PS/SYNC = GND referenced to 500 mV
0.5%
0.5%
2400
2400
4000
50
Maximum load regulation
f
Oscillator frequency
2200
2200
3500
2600
2600
4500
kHz
kHz
mA
mΩ
mΩ
μA
Frequency range for synchronization
Average switch current limit
High side switch on resistance
Low side switch on resistance
2.0 V ≤ VIN ≤ 5.5 V
ISW
VIN = VINA = 3.6 V, TJ = 25°C
VIN = VINA = 3.6 V
VIN = VINA = 3.6 V
50
VIN and VINA
VOUT
25
50
10
Quiescent
current
IO = 0 mA, VEN = VIN = VINA = 3.6 V,
VOUT = 3.3 V, -40°C ≤ TJ ≤ 85°C
Iq
5
μA
VEN = 0 V, VIN = VINA = 3.6 V, –40°C ≤ TJ
≤ 85°C
IS
Shutdown current
0.1
1
μA
CONTROL STAGE
Under voltage lockout threshold
VINA voltage decreasing
1.4
1.2
1.5
1.6
0.4
V
mV
V
UVLO
Under voltage lockout hysteresis
EN, PS/SYNC input low voltage
EN, PS/SYNC input high voltage
EN, PS/SYNC input current
PG output low voltage
200
VIL
VIH
V
Clamped to GND or VINA
0.01
0.04
0.01
0.2
0.4
0.1
7
μA
V
VOUT = 3.3 V, IPGL = 10 μA
PG output leakage current
Output overvoltage protection
Overtemperature protection
Overtemperature hysteresis
μA
V
5.5
140
20
°C
°C
Copyright © 2015, Texas Instruments Incorporated
5
TPS63020-Q1
ZHCSEB8 –OCTOBER 2015
www.ti.com.cn
8.6 Typical Characteristics
4.5
4
3.5
3
2.5
2
1.5
1
VOUT = 3.3 V
VOUT = 3.8 V
VOUT = 5 V
0.5
0
1.8
2.2
2.6
3
3.4
3.8
4.2
4.6
5
5.4
Input Voltage (V)
D001
Figure 1. Output Current vs Input Voltage at TJ= 125 °C
6
Copyright © 2015, Texas Instruments Incorporated
TPS63020-Q1
www.ti.com.cn
ZHCSEB8 –OCTOBER 2015
9 Detailed Description
9.1 Overview
The controller circuit of the device is based on an average current mode topology. The controller also uses input
and output voltage feedforward. Changes of input and output voltage are monitored and immediately can change
the duty cycle in the modulator to achieve a fast response to those errors. The voltage error amplifier gets its
feedback input from the FB pin. At adjustable output voltages, a resistive voltage divider must be connected to
that pin. At fixed output voltages, FB must be connected to the output voltage to directly sense the voltage. Fixed
output voltage versions use a trimmed internal resistive divider. The feedback voltage will be compared with the
internal reference voltage to generate a stable and accurate output voltage.
The device uses 4 internal N-channel MOSFETs to maintain synchronous power conversion at all possible
operating conditions. This enables the device to keep high efficiency over a wide input voltage and output power
range. To avoid ground shift problems due to the high currents in the switches, two separate ground pins GND
and PGND are used. The reference for all control functions is the GND pin. The power switches are connected to
PGND. Both grounds must be connected on the PCB at only one point, ideally, close to the GND pin. Due to the
4-switch topology, the load is always disconnected from the input during shutdown of the converter. To protect
the device from overheating an internal temperature sensor is implemented.
9.2 Functional Block Diagram
L1
L2
VIN
VOUT
Current
Sensor
VINA
PGND
PGND
VIN
Gate
Control
VOUT
_
+
VINA
+
_
Modulator
Oscillator
FB
PG
+
-
VREF
Device
Control
PS/SYNC
EN
Temperature
Control
PGND
GND
PGND
9.3 Feature Description
9.3.1 Dynamic Voltage Positioning
As detailed in Figure 3, the output voltage is typically 3% above the nominal output voltage at light load currents,
as the device is in power save mode. This gives additional headroom for the voltage drop during a load transient
from light load to full load. This allows the converter to operate with a small output capacitor and still have a low
absolute voltage drop during heavy load transient changes. See Figure 3 for detailed operation of the power
save mode.
Copyright © 2015, Texas Instruments Incorporated
7
TPS63020-Q1
ZHCSEB8 –OCTOBER 2015
www.ti.com.cn
Feature Description (continued)
9.3.2 Dynamic Current Limit
To protect the device and the application, the average inductor current is limited internally on the IC. At nominal
operating conditions, this current limit is constant. The current limit value can be found in the electrical
characteristics table. If the supply voltage at VIN drops below 2.3 V, the current limit is reduced. This can happen
when the input power source becomes weak. Increasing output impedance, when the batteries are almost
discharged, or an additional heavy pulse load is connected to the battery can cause the VIN voltage to drop. The
dynamic current limit has its lowest value when reaching the minimum recommended supply voltage at VIN. At
this voltage, the device is forced into burst mode operation trying to stay active as long as possible even with a
weak input power source.
If the die temperature increases above the recommended maximum temperature, the dynamic current limit
becomes active. Similar to the behavior when the input voltage at VIN drops, the current limit is reduced with
temperature increasing.
9.3.2.1 Device Enable
The device is put into operation when EN is set high. It is put into a shutdown mode when EN is set to GND. In
shutdown mode, the regulator stops switching, all internal control circuitry is switched off, and the load is
disconnected from the input. This means that the output voltage can drop below the input voltage during
shutdown. During start-up of the converter, the duty cycle and the peak current are limited in order to avoid high
peak currents flowing from the input.
9.3.2.2 Power Good
The device has a built in power good function to indicate whether the output voltage is regulated properly. As
soon as the average inductor current gets limited to a value below the current the voltage regulator demands for
maintaining the output voltage the power good output gets low impedance. The output is open drain, so its logic
function can be adjusted to any voltage level the connected logic is using, by connecting a pull up resistor to the
supply voltage of the logic. By monitoring the status of the current control loop, the power good output provides
the earliest indication possible for an output voltage break down and leaves the connected application a
maximum time to safely react.
9.3.2.3 Overvoltage Protection
If, for any reason, the output voltage is not fed back properly to the input of the voltage amplifier, control of the
output voltage will not work anymore. Therefore overvoltage protection is implemented to avoid the output
voltage exceeding critical values for the device and possibly for the system it is supplying. The implemented
overvoltage protection circuit monitors the output voltage internally as well. In case it reaches the overvoltage
threshold the voltage amplifier regulates the output voltage to this value.
9.3.2.4 Undervoltage Lockout
An undervoltage lockout function prevents device start-up if the supply voltage at VINA is lower than
approximately its threshold (see electrical characteristics table). When in operation, the device automatically
enters the shutdown mode if the voltage at VINA drops below the undervoltage lockout threshold. The device
automatically restarts if the input voltage recovers to the minimum operating input voltage.
9.3.2.5 Overtemperature Protection
The device has a built-in temperature sensor which monitors the internal IC temperature. If the temperature
exceeds the programmed threshold (see electrical characteristics table) the device stops operating. As soon as
the IC temperature has decreased below the programmed threshold, it starts operating again. There is a built-in
hysteresis to avoid unstable operation at IC temperatures at the overtemperature threshold.
8
Copyright © 2015, Texas Instruments Incorporated
TPS63020-Q1
www.ti.com.cn
ZHCSEB8 –OCTOBER 2015
9.4 Device Functional Modes
9.4.1 Softstart and Short Circuit Protection
After being enabled, the device starts operating. The average current limit ramps up from an initial 400 mA
following the output voltage increasing. At an output voltage of about 1.2 V, the current limit is at its nominal
value. If the output voltage does not increase, the current limit will not increase. There is no timer implemented.
Thus, the output voltage overshoot at startup, as well as the inrush current, is kept at a minimum. The device
ramps up the output voltage in a controlled manner even if a large capacitor is connected at the output. When
the output voltage does not increase above 1.2 V, the device assumes a short circuit at the output, and keeps
the current limit low to protect itself and the application. At a short on the output during operation, the current limit
also is decreased accordingly.
9.4.2 Buck-Boost Operation
To regulate the output voltage at all possible input voltage conditions, the device automatically switches from
step down operation to boost operation and back as required by the configuration. It always uses one active
switch, one rectifying switch, one switch permanently on, and one switch permanently off. Therefore, it operates
as a step down converter (buck) when the input voltage is higher than the output voltage, and as a boost
converter when the input voltage is lower than the output voltage. There is no mode of operation in which all 4
switches are permanently switching. Controlling the switches this way allows the converter to maintain high
efficiency at the most important point of operation, when input voltage is close to the output voltage. The RMS
current through the switches and the inductor is kept at a minimum, to minimize switching and conduction losses.
For the remaining 2 switches, one is kept permanently on and the other is kept permanently off, thus causing no
switching losses.
9.4.3 Control Loop
The controller circuit of the device is based on an average current mode topology. The average inductor current
is regulated by a fast current regulator loop which is controlled by a voltage control loop. Figure 2 shows the
control loop.
The non inverting input of the transconductance amplifier, gmv, is assumed to be constant. The output of gmv
defines the average inductor current. The inductor current is reconstructed by measuring the current through the
high side buck MOSFET. This current corresponds exactly to the inductor current in boost mode. In buck mode
the current is measured during the on time of the same MOSFET. During the off time, the current is
reconstructed internally starting from the peak value at the end of the on time cycle. The average current and the
feedback from the error amplifier gmv forms the correction signal gmc. This correction signal is compared to the
buck and the boost sawtooth ramp giving the PWM signal. Depending on which of the two ramps the gmc output
crosses either the Buck or the Boost stage is initiated. When the input voltage is close to the output voltage, one
buck cycle is always followed by a boost cycle. In this condition, no more than three cycles in a row of the same
mode are allowed. This control method in the buck-boost region ensures a robust control and the highest
efficiency.
The Buck-Boost Overlap ControlTM makes sure that the classical buck-boost function, which would cause two
switches to be on every half a cycle, is avoided. Thanks to this block whenever all switches becomes active
during one clock cycle, the two ramps are shifted away from each other, on the other hand when there is no
switching activities because there is a gap between the ramps, the ramps are moved closer together. As a result
the number of classical buck-boost cycles or no switching is reduced to a minimum and high efficiency values
has been achieved.
Copyright © 2015, Texas Instruments Incorporated
9
TPS63020-Q1
ZHCSEB8 –OCTOBER 2015
www.ti.com.cn
Device Functional Modes (continued)
TM
Figure 2. Average Current Mode Control
9.4.4 Power Save Mode and Synchronization
The PS/SYNC pin can be used to select different operation modes. Power save mode is used to improve
efficiency at light load. To enable power-save, PS/SYNC must be set low. If PS/SYNC is set low then power save
mode is entered when the average inductor current gets lower then about 100 mA. At this point the converter
operates with reduced switching frequency and with a minimum quiescent current to maintain high efficiency.
During the power save mode, the output voltage is monitored with a comparator by the threshold comp low and
comp high. When the device enters power save mode, the converter stops operating and the output voltage
drops. The slope of the output voltage depends on the load and the value of output capacitance. As the output
voltage falls below the comp low threshold set to 2.5% typical above VOUT, the device ramps up the output
voltage again, by starting operation using a programmed average inductor current higher than required by the
current load condition. Operation can last one or several pulses. The converter continues these pulses until the
comp high threshold, set to typically 3.5% above VOUT nominal, is reached and the average inductance current
gets lower than about 100 mA. When the load increases above the minimum forced inductor current of about 100
mA, the device will automatically switch to PWM mode.
The power save mode can be disabled by programming high at the PS/SYNC. Connecting a clock signal at
PS/SYNC forces the device to synchronize to the connected clock frequency.
Synchronization is done by a PLL, so synchronizing to lower and higher frequencies compared to the internal
clock works without any issues. The PLL can also tolerate missing clock pulses without the converter
malfunctioning. The PS/SYNC input supports standard logic thresholds.
10
Copyright © 2015, Texas Instruments Incorporated
TPS63020-Q1
www.ti.com.cn
ZHCSEB8 –OCTOBER 2015
Device Functional Modes (continued)
Heavy Load transient step
PFM mode at light load
current
3.5%
Comparator High
3%
2.5%
Comparator low
Vo
PWM mode
Absolute Voltage drop
with positioning
Figure 3. Power Save Mode Thresholds and Dynamic Voltage Positioning
Copyright © 2015, Texas Instruments Incorporated
11
TPS63020-Q1
ZHCSEB8 –OCTOBER 2015
www.ti.com.cn
10 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
10.1 Application Information
The TPS63020-Q1 is a high efficiency, low quiescent current buck-boost converter suitable for applications
where the input voltage is higher or lower than the output voltage. Continuous output current can go as high
as 2 A in boost mode and as high as 4 A in buck mode. The maximum average current in the switches is
limited to a typical value of 4 A.
10.2 Typical Application
L
1 1.5µH
VOUT
VIN
L1
L2
3.3V1.5A
C2
2.5 V to 5.5V
VIN
VINA
EN
VOUT
FB
R1
R3
1MΩ
C1
2X10µF
1MΩ
3X22µF
C3
0.1µF
PS/SYNC
R2
180kΩ
PG
GND
PGND
Power Good
Output
TPS63020
Figure 4. Application Circuit
10.2.1 Design Requirements
The design guidelines provide a component selection to operate the device within the operating conditions
specified on the Application Circuit schematic.
Table 1 shows the list of components for the Application Characteristic Curves.
Table 1. List of Components
REFERENCE
DESCRIPTION
MANUFACTURER
TPS63020
Texas Instruments
L1
1.5 μH, 4 mm x 4 mm x 2 mm
2 × 10 μF 6.3V, 0603, X5R ceramic
3 × 22 μF 6.3V, 0603, X5R ceramic
0.1 μF, X5R or X7R ceramic
XFL4020-152ML, Coilcraft
GRM188R60J106ME84D, Murata
GRM188R60J226MEAOL Murata
C1
C2
C3
R1
R2
R3
Depending on the output voltage at TPS63020
Depending on the output voltage at TPS63020
1 MΩ
12
Copyright © 2015, Texas Instruments Incorporated
TPS63020-Q1
www.ti.com.cn
ZHCSEB8 –OCTOBER 2015
10.2.2 Detailed Design Procedure
The TPS63020-Q1 series of buck-boost converter has internal loop compensation. Therefore, the external L-C
filter has to be selected to work with the internal compensation. As a general rule of thumb, the product L x C
should not move over a wide range when selecting a different output filter. However, when selecting the output
filter a low limit for the inductor value exists to avoid subharmonic oscillation which could be caused by a far too
fast ramp up of the amplified inductor current. For the TPS63020-Q1 series the minimum inductor value should
be kept at 1 uH.
In particular either 1 µH or 1.5 µH is recommended working at output current between 1.5 A and 2 A. If operating
with lower load current is also possible to use 2.2 µH.
Selecting a larger output capacitor value is less critical because the corner frequency moves to lower
frequencies.
10.2.2.1 Inductor Selection
For high efficiencies, the inductor should have a low dc resistance to minimize conduction losses. Especially at
high-switching frequencies, the core material has a high impact on efficiency. When using small chip inductors,
the efficiency is reduced mainly due to higher inductor core losses. This needs to be considered when selecting
the appropriate inductor. The inductor value determines the inductor ripple current. The larger the inductor value,
the smaller the inductor ripple current and the lower the conduction losses of the converter. Conversely, larger
inductor values cause a slower load transient response. To avoid saturation of the inductor, the peak current for
the inductor in steady state operation is calculated using Equation 6. Only the equation which defines the switch
current in boost mode is shown, because this provides the highest value of current and represents the critical
current value for selecting the right inductor.
V
- V
OUT
V
IN
Duty Cycle Boost
D =
OUT
(1)
Iout
η ´ (1 - D)
Vin ´ D
IPEAK
=
+
2 ´ f ´ L
where
•
•
•
•
•
D =Duty Cycle in Boost mode
f = Converter switching frequency (typical 2.5MHz)
L = Inductor value
η = Estimated converter efficiency (use the number from the efficiency curves or 0.90 as an assumption)
Note: The calculation must be done for the minimum input voltage possible in boost mode
(2)
Calculating the maximum inductor current using the actual operating conditions gives the minimum saturation
current of the inductor needed. It's recommended to choose an inductor with a saturation current 20% higher
than the value calculated using Equation 2. Possible inductors are listed in Table 2.
(1)
Table 2. Inductor Selection
VENDOR
Coilcraft
Toko
INDUCTOR SERIES
XFL4020
FDV0530S
(1) See Third-party Products Disclaimer
10.2.2.2 Capacitor Selection
10.2.2.2.1 Input Capacitor
At least a 10 μF input capacitor is recommended to improve transient behavior of the regulator and EMI behavior
of the total power supply circuit. A ceramic capacitor placed as close as possible to the VIN and PGND pins of
the IC is recommended.
Copyright © 2015, Texas Instruments Incorporated
13
TPS63020-Q1
ZHCSEB8 –OCTOBER 2015
www.ti.com.cn
10.2.2.2.2 Output Capacitor
For the output capacitor, use of a small ceramic capacitors placed as close as possible to the VOUT and PGND
pins of the IC is recommended. If, for any reason, the application requires the use of large capacitors which can
not be placed close to the IC, use a smaller ceramic capacitor in parallel to the large capacitor. The small
capacitor should be placed as close as possible to the VOUT and PGND pins of the IC. The recommended
typical output capacitor value is 30 µF with a variance that depends on the specific application requirements.
There is also no upper limit for the output capacitance value. Larger capacitors will cause lower output voltage
ripple as well as lower output voltage drop during load transients.
When choosing input and output capacitors, it needs to be kept in mind, that the value of capacitance
experiences significant losses from their rated value depending on the operating temperature and the operating
DC voltage. It is not uncommon for a small surface mount ceramic capacitor to lose 50% and more of its rated
capacitance. For this reason it could be important to use a larger value of capacitance or a capacitor with higher
voltage rating in order to ensure the required capacitance at the full operating voltage.
10.2.2.2.3 Bypass Capacitor
To make sure that the internal control circuits are supplied with a stable low noise supply voltage, a capacitor can
be connected between VINA and GND. Using a ceramic capacitor with a value of 0.1 μF is recommended. The
value of this capacitor should not be higher than 0.22 μF.
10.2.2.3 Setting the Output Voltage
The feedback resistor divider must be connected between VOUT, FB and GND. When the output voltage is
regulated, the typical value of the voltage at the FB pin is 500 mV. The maximum recommended value for the
output voltage is 8 V. The current through the resistive divider should be about 100 times greater than the current
into the FB pin. The typical current into the FB pin is 0.01 μA, and the voltage across the resistor between FB
and GND, R2, is typically 500 mV. Based on these two values, the recommended value for R2 should be lower
than 500 kΩ, in order to set the divider current at 1 μA or higher. It is recommended to keep the value for this
resistor in the range of 200 kΩ. From that, the value of the resistor connected between VOUT and FB, R1,
depending on the needed output voltage (VOUT), can be calculated using Equation 3:
æ
ç
è
ö
VOUT
VFB
R1 = R2 ×
- 1
÷
ø
(3)
14
Copyright © 2015, Texas Instruments Incorporated
TPS63020-Q1
www.ti.com.cn
ZHCSEB8 –OCTOBER 2015
10.2.3 Application Curves
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
VIN = 1.8V, VOUT = 2.5V
VIN = 3.6V, VOUT = 2.5V
VIN = 2.4V, VOUT = 4.5V
VIN = 3.6V, VOUT = 4.5V
VIN = 1.8V, VOUT = 2.5V
VIN = 3.6V, VOUT = 2.5V
VIN = 2.4V, VOUT = 4.5V
VIN = 3.6V, VOUT = 4.5V
TPS63020, Power Save Enabled
TPS63020, Power Save Disabled
100m
1m
10m
100m
1
4
100m
1m
10m
100m
1
4
Output Current (A)
Output Current (A)
PS/SYNC = Low
VOUT = 2.5 V, 4.5 V
PS/SYNC = High
VOUT = 2.5 V, 4.5 V
Figure 5. Efficiency vs Output Current,
Power Save Enabled
Figure 6. Efficiency vs Output Current,
Power Save Disabled
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
IOUT = 10mA
IOUT = 500mA
IOUT = 1A
IOUT = 10mA
IOUT = 500mA
IOUT = 1A
IOUT = 2A
IOUT = 2A
TPS63020, VOUT = 2.5V, Power Save Enabled
TPS63020, VOUT = 4.5V, Power Save Enabled
1.8
2.2
2.6
3
3.4
3.8
4.2
4.6
5
5.4
1.8
2.2
2.6
3
3.4
3.8
4.2
4.6
5
5.4
Input Voltage (V)
Input Voltage (V)
PS/SYNC = Low
VOUT = 2.5 V
PS/SYNC = Low
VOUT = 4.5 V
Figure 7. Efficiency vs Input Voltage,
Power Save Enabled
Figure 8. Efficiency vs Input Voltage,
Power Save Enabled
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
IOUT = 10mA
IOUT = 500mA
IOUT = 1A
IOUT = 10mA
IOUT = 500mA
IOUT = 1A
IOUT = 2A
IOUT = 2A
TPS63020, VOUT = 2.5V, Power Save Disabled
TPS63020, VOUT = 4.5V, Power Save Disabled
1.8
2.2
2.6
3
3.4
3.8
4.2
4.6
5
5.4
1.8
2.2
2.6
3
3.4
3.8
4.2
4.6
5
5.4
Input Voltage (V)
Input Voltage (V)
PS/SYNC = High
VOUT = 2.5 V
PS/SYNC = High
VOUT = 4.5 V
Figure 9. Efficiency vs Input Voltage,
Power Save Disabled
Figure 10. Efficiency vs Input Voltage,
Power Save Disabled
Copyright © 2015, Texas Instruments Incorporated
15
TPS63020-Q1
ZHCSEB8 –OCTOBER 2015
www.ti.com.cn
100
90
80
70
60
50
40
30
20
10
0
2.6
2.55
2.5
VIN = 3.6V
IOUT = 10mA
IOUT = 500mA
IOUT = 1A
2.45
IOUT = 2A
TPS63021, Power Save Disabled
TPS63020, Power Save Disabled
2.4
1.8
2.2
2.6
3
3.4
3.8
4.2
4.6
5
5.4
100m
1m
10m
100m
1
5
Input Voltage (V)
Output Current (A)
PS/SYNC = High
VOUT = 2.5 V, 4.5 V
PS/SYNC = High
VOUT = 2.5 V
Figure 11. Efficiency vs Input Voltage,
Power Save Disabled
Figure 12. Load Transient Response
4.6
4.55
4.5
VIN = 3.6V
Output Voltage
50 mV/div, AC
Output Current
500 mA/div, DC
4.45
TPS63020, Power Save Disabled
4.4
100m
TPS63020
V
= 2.4 V, I = 500 mA to 1500 mA
OUT
IN
1m
10m
100m
1
5
Output Current (A)
Time 2 ms/div
PS/SYNC = High
VOUT = 4.5 V
PS/SYNC = High
VOUT = 3.3V
Figure 13. Load Transient Response
Figure 14. Load Transient Response
Output Voltage
50 mV/div, AC
Output Voltage
50 mV/div, AC
Output Current
500 mA/div, DC
Input Voltage
500 mV/div, AC
TPS63020
V
= 3.0 V to 3.7 V, I
OUT
= 1500 mA
TPS63020
V
= 4.2 V, I = 500 mA to 1500 mA
OUT
IN
IN
Time 2 ms/div
Time 2 ms/div
PS/SYNC = High
VOUT = 3.3V
PS/SYNC = High
VOUT = 3.3V
Figure 15. Load Transient Response
Figure 16. Line Transient Response
16
Copyright © 2015, Texas Instruments Incorporated
TPS63020-Q1
www.ti.com.cn
ZHCSEB8 –OCTOBER 2015
Enable
2 V/div, DC
Enable
2 V/div, DC
Output Voltage
1 V/div, DC
Output Voltage
1 V/div, DC
Inductor Current
500 mA/div, DC
Inductor Current
1 A/div, DC
Voltage at L1
5 V/div, DC
Voltage at L2
5 V/div, DC
TPS63020
V
= 2.4 V, V
OUT
= 3.3 V
R = 2.2 W
L
TPS63020
V
= 4.2 V, V
OUT
= 3.3 V
R
= 2.2 W
L
IN
IN
Time 100 ms/div
Time 40 ms/div
PS/SYNC = High
VOUT = 3.3V
Figure 17. Startup After Enable
PS/SYNC = High
VOUT = 3.3V
Figure 18. Startup After Enable
10.3 System Examples
10.3.1 2-A Load Current
L
1 1µH
VOUT
VIN
L1
L2
3.3V2A
2.5 V to 5.5V
VIN
VINA
EN
VOUT
FB
R1
R3
1MΩ
R1
C1
2X10µF
C3
C2
300kΩ
68kΩ
C4
4.7pF
4X22µF
0.1µF
PS/SYNC
R2
53kΩ
PG
GND
PGND
Power Good
Output
TPS63020
Figure 19. Application Circuit for 2A Load Current
Capacitor C4 and resistor R1 are added for improved load transient performance..
Copyright © 2015, Texas Instruments Incorporated
17
TPS63020-Q1
ZHCSEB8 –OCTOBER 2015
www.ti.com.cn
11 Power Supply Recommendations
The TPS63020-Q1 device has no special requirements for its input power supply.
The output current of the power supply must be rated according to the supply voltage, output voltage and output
current of the TPS63020-Q1.
12 Layout
12.1 Layout Guidelines
For all switching power supplies, the layout is an important step in the design, especially at high peak currents
and high switching frequencies. If the layout is not carefully done, the regulator could show stability problems as
well as EMI problems. Therefore, use wide and short traces for the main current path and for the power ground
tracks. The input capacitor, output capacitor, and the inductor should be placed as close as possible to the IC.
Use a common ground node for power ground and a different one for control ground to minimize the effects of
ground noise. Connect these ground nodes at any place close to one of the ground pins of the IC.
The feedback divider should be placed as close as possible to the control ground pin of the IC. To lay out the
control ground, short traces are recommended as well, separation from the power ground traces. This avoids
ground shift problems, which can occur due to superimposition of power ground current and control ground
current.
12.2 Layout Example
L1
GND
VIN
GND
C1
C2
U1
VOUT
R1
R2
C3
GND
Figure 20. PCB Layout Suggestion
18
Copyright © 2015, Texas Instruments Incorporated
TPS63020-Q1
www.ti.com.cn
ZHCSEB8 –OCTOBER 2015
12.3 Thermal Considerations
Implementation of integrated circuits in low-profile and fine-pitch surface-mount packages typically requires
special attention to power dissipation. Many system-dependent issues such as thermal coupling, airflow, added
heat sinks and convection surfaces, and the presence of other heat-generating components affect the power-
dissipation limits of a given component.
Three basic approaches for enhancing thermal performance are listed below:
•
•
•
Improving the power dissipation capability of the PCB design
Improving the thermal coupling of the component to the PCB by soldering the exposed thermal pad
Introducing airflow in the system
For more details on how to use the thermal parameters, see the application notes: Thermal Characteristics
Application Note (SZZA017), and Semiconductor and IC Package Thermal Metrics Application Note (SPRA953).
版权 © 2015, Texas Instruments Incorporated
19
TPS63020-Q1
ZHCSEB8 –OCTOBER 2015
www.ti.com.cn
13 器件和文档支持
13.1 器件支持
13.1.1 Third-Party Products Disclaimer
TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT
CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES
OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER
ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.
13.2 文档支持
13.2.1 相关文档ꢀ
相关文档请参见以下部分：
•
•
《散热特性数据应用手册》（文献编号：SZZA017）
《IC 封装热指标应用手册》（文献编号：SPRA953）
13.3 社区资源
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
13.4 商标
PowerPAD, E2E are trademarks of Texas Instruments.
All other trademarks are the property of their respective owners.
13.5 静电放电警告
这些装置包含有限的内置 ESD 保护。 存储或装卸时，应将导线一起截短或将装置放置于导电泡棉中，以防止 MOS 门极遭受静电损
伤。
13.6 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
14 机械、封装和可订购信息
以下页中包括机械、封装和可订购信息。 这些信息是针对指定器件可提供的最新数据。 这些数据会在无通知且不
对本文档进行修订的情况下发生改变。 欲获得该数据表的浏览器版本，请查阅左侧的导航栏。
20
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Copyright © 2015, 德州仪器半导体技术（上海）有限公司
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
TPS63020QDSJRQ1
TPS63020QDSJTQ1
ACTIVE
ACTIVE
VSON
VSON
DSJ
DSJ
14
14
3000 RoHS & Green
250 RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
-40 to 125
-40 to 125
63020Q
63020Q
NIPDAU
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
Addendum-Page 2
www.ti.com
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