TPS630701RNMR [TI]
宽输入电压（2V 至 16V）降压/升压转换器 | RNM | 15 | -40 to 125;
| 型号： | TPS630701RNMR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 宽输入电压（2V 至 16V）降压/升压转换器 | RNM | 15 | -40 to 125 升压转换器 PC 开关 |
| 文件： | 总41页 (文件大小：1928K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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TPS63070
ZHCSFB9B –JUNE 2016–REVISED MARCH 2019
TPS63070 具有 3.6A 开关电流的 2V 至 16V 降压-升压转换器
1 特性
2 应用
1
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输入电压范围：2.0V 至 16V
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双节锂离子 应用
输出电压范围：2.5V 至 9V
工业计量设备
效率高达 95%
数码相机 (DSC) 和便携式摄像机
笔记本电脑
脉宽调制 (PWM) 模式下的直流精度为 +/-1%
脉频调制 (PFM) 模式下的直流精度为 +3%/-1%
降压模式下的输出电流为 2A
超便携移动个人计算机和移动互联网器件
个人医疗产品
升压模式下的输出电流为 2A
（VIN = 4V；Vout = 5V）
3 说明
TPS6307x 是一款具有低静态电流的高效降压-升压转
换器，适用于 那些 输入电压可能高于或低于输出电压
的应用。在升压或降压模式下,输出电流可高达 2A。此
降压-升压转换器基于一个固定频率、脉宽调制 (PWM)
控制器，此控制器通过使用同步整流来获得最高效率。
在低负载电流情况下，此转换器进入省电模式以在宽负
载电流范围内保持高效率。转换器可被禁用以最大限度
地减少电池消耗。在关断期间，负载从电池上断开。此
器件采用 2.5mm x 3mm QFN 封装。
•
精密使能输入可实现
–
–
用户定义的欠压闭锁
准确排序
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在降压和升压模式之间实现自动转换
器件静态电流典型值：50μA
具有固定和可调输出电压选项
具有输出放电选项
省电模式可提高低输出功率时的效率
2.4MHz 强制固定运行频率和同步选项
电源正常输出
器件信息(1)
可通过 VSEL 轻松更改输出电压
关断期间负载断开
器件号
TPS63070
封装
封装尺寸（标称值）
2.5mm x 3mm
VQFN
VQFN
VQFN
过热保护
TPS630701
TPS630702
2.5mm x 3mm
输入/输出过压保护
2.5mm x 3mm
采用四方扁平无引线 (QFN) 封装
(1) 如需了解所有可用封装，请参阅数据表末尾的可订购产品附
录。
简化原理图
效率与输出电流间的关系；Vo = 5V
L
100%
90%
80%
70%
60%
50%
1.5 µH
L1
L2
TPS63070
VOUT = 2.5 V to 9 V
COUT
C4
10 µF
0603
VIN = 2.0 V to 16 V
VOUT
C1
10 µF
0603
VIN
R1
CIN
3x22 µF
2x10 µF
0805
0805
R4
100 kΩ
FB
R2
VSEL
R5
FB2
10 kΩ
40%
3 V
4.2 V
5 V
7 V
9 V
EN
PG
30%
20%
10%
0
PGND
PS/SYNC
VAUX
GND
CVAUX
100 nF
12 V
Copyright
© 2016, Texas Instruments Incorporated
100m
1m
10m
100m
1
2
Output Current (A)
D001
1
本文档旨在为方便起见，提供有关 TI 产品中文版本的信息，以确认产品的概要。 有关适用的官方英文版本的最新信息，请访问 www.ti.com，其内容始终优先。 TI 不保证翻译的准确
性和有效性。 在实际设计之前，请务必参考最新版本的英文版本。
English Data Sheet: SLVSC58
TPS63070
ZHCSFB9B –JUNE 2016–REVISED MARCH 2019
www.ti.com.cn
目录
1
2
3
4
5
6
7
特性.......................................................................... 1
应用.......................................................................... 1
说明.......................................................................... 1
修订历史记录 ........................................................... 2
Device Comparison Table..................................... 3
Pin Configuration and Functions......................... 3
Specifications......................................................... 4
7.1 Absolute Maximum Ratings ...................................... 4
7.2 ESD Ratings ............................................................ 4
7.3 Recommended Operating Conditions....................... 4
7.4 Thermal Information ................................................. 5
7.5 Electrical Characteristics........................................... 6
7.6 Typical Characteristics.............................................. 8
Detailed Description .............................................. 9
8.1 Overview ................................................................... 9
8.2 Functional Block Diagram TPS63070....................... 9
8.3 Functional Block Diagram TPS630701................... 10
8.4 Feature Description................................................. 10
8.5 Device Functional Modes........................................ 14
9
Application and Implementation ........................ 16
9.1 Application Information............................................ 16
9.2 Typical Application for adjustable version .............. 16
9.3 Typical Application for Fixed Voltage Version ....... 26
10 Power Supply Recommendations ..................... 31
10.1 Thermal Information.............................................. 31
11 Layout................................................................... 32
11.1 Layout Guidelines ................................................. 32
11.2 Layout Example .................................................... 32
12 器件和文档支持 ..................................................... 33
12.1 器件支持 ............................................................... 33
12.2 相关链接................................................................ 33
12.3 接收文档更新通知 ................................................. 33
12.4 社区资源................................................................ 33
12.5 商标....................................................................... 33
12.6 静电放电警告......................................................... 33
12.7 术语表 ................................................................... 33
13 机械、封装和可订购信息....................................... 33
8
4 修订历史记录
注：之前版本的页码可能与当前版本有所不同。
Changes from Revision A (August 2016) to Revision B
Page
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已添加 添加了多处微小的编辑更新和更正.............................................................................................................................. 1
已添加 添加了“TPS630702 型号” ........................................................................................................................................... 1
Added TPS630702 Variant with "output discharge=on" option .............................................................................................. 3
Added TPS630702 VOUT info ............................................................................................................................................... 7
Added TPS630702 VFB info at 3 instances........................................................................................................................... 7
Added Parameter Name ROD to output discharge resistance row........................................................................................ 7
Added Link to TechNote SLVAE62 ...................................................................................................................................... 13
Added more descriptive text for better understanding.......................................................................................................... 15
Changed Description of Discharge Feature, reflecting TPS630702..................................................................................... 15
Changed description of output voltage programming to match EC table............................................................................. 17
Added table of content for application curves ...................................................................................................................... 20
已添加 添加了“TPS630702 型号” ......................................................................................................................................... 33
Changes from Original (June 2016) to Revision A
Page
•
已添加 完整版量产数据数据表................................................................................................................................................ 1
2
Copyright © 2016–2019, Texas Instruments Incorporated
TPS63070
www.ti.com.cn
ZHCSFB9B –JUNE 2016–REVISED MARCH 2019
5 Device Comparison Table
Device Number
TPS63070
Features
Output Voltage
adjustable
Marking
3070
output discharge = off
output discharge = off
output discharge = on
TPS630701
TPS630702
fixed 5 V
0701
adjustable
0702
6 Pin Configuration and Functions
QFN PACKAGE
Bottom View
Top View
12
13
VOUT 8
8
7
VOUT
VIN
12
13
VIN
7
11
9
11
9
14
15
6 FB2
EN
EN
14
15
FB2
FB
6
5
10
10
5
VSEL
VSEL
FB
3
2
1
3
4
1
2
4
Pin Functions
PIN
I/O
DESCRIPTION
NAME
EN
NO.
14
5
I
I
Enable input. Pull high to enable the device, pull low to disable the device.
FB
Voltage feedback of adjustable versions, must be connected to VOUT on fixed output voltage
versions
GND
L1
4
11
9
Control / logic ground
Connection for Inductor
Connection for Inductor
I
I
I
L2
PS/SYNC
1
Pull to low for forced PWM, pull high for PWM/PFM (power save) mode. Apply a clock signal to
synchronize to an external frequency.
PG
2
10
O
Open drain power good output
PGND
VIN
Power ground
12, 13
7,8
3
I
Supply voltage for power stage
VOUT
VAUX
VSEL
FB2
O
O
I
Buck-boost converter output
Connection for Capacitor of internal voltage regulator. This pin must not be loaded externally.
Voltage scaling input. A high level on this pin enables a transistor which pulls pin FB2 to GND.
15
6
O
Voltage scaling output. Connect a resistor from FB to FB2 to change the voltage divider ratio on the
feedback pin. A logic high level on VSEL will change the output voltage to a higher value. Leave the
pin open or connect to GND if not used.
Copyright © 2016–2019, Texas Instruments Incorporated
3
TPS63070
ZHCSFB9B –JUNE 2016–REVISED MARCH 2019
www.ti.com.cn
7 Specifications
7.1 Absolute Maximum Ratings
over operating junction temperature range (unless otherwise noted)
(1)
MIN
–0.3
–0.3
–3
MAX
20
20
25
12
15
7
UNIT
V
VIN, PS/SYNC, EN, VSEL
L1
L1 (transient for t<10ns)(2)
V
V
Voltage range
L2, PG, VOUT, FB
L2 (transient for t<10ns)(2)
–0.3
–3
V
V
AUX
FB2
–0.3
–0.3
–40
V
3
V
Operating junction
temperature, Tj
150
°C
Storage temperature
range, Tstg
°C
–65
150
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) While switching
7.2 ESD Ratings
VALUE
±2000
±500
UNIT
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1)
V(ESD)
Electrostatic discharge
V
Charged device model (CDM), per JEDEC specification JESD22-C101,
all pins(2)
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
over operating junction temperature range (unless otherwise noted)
MIN
2.0
2.5
0.7
4.7
NOM
MAX
16
UNIT
V
Supply voltage at VIN
Output Voltage
9
V
Effective Inductance
1.5
10
2.8
µH
µF
nF
µF
%
Capacitance connected to VIN pin
Capacitance connected to VAUX pin
Total capacitance connected to VOUT pin
100
47
(1)
15
30
20
470
duty cycle in buck mode over recommended operating conditions
duty cycle in buck mode over recommended operating conditions but effective
%
output capacitance Cout,eff ≥ 40uF; effective inductance L,eff = 0.7µH to 1.8uH
Operating junction temperature range, TJ
–40
125
°C
(1) Due to the dc bias effect of ceramic capacitors, the effective capacitance is lower than the nominal value when a voltage is applied. This
is why the capacitance is specified to allow the selection of the minimal capacitor required with the dc bias effect for this type of
capacitor in mind. The capacitance range given above is for the nominal inductance of 1.5 µH. Please also see the detailed design
procedure in the application section about the ratio of inductance and minimum output capacitance.
4
Copyright © 2016–2019, Texas Instruments Incorporated
TPS63070
www.ti.com.cn
ZHCSFB9B –JUNE 2016–REVISED MARCH 2019
7.4 Thermal Information
TPS63070x
THERMAL METRIC(1)
VQFN
13 PINS
63
UNIT
RθJA
Junction-to-ambient thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
RθJC(top)
RθJB
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
42
13
ψJT
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
2.4
ψJB
13
RθJC(bot)
n/a
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
Copyright © 2016–2019, Texas Instruments Incorporated
5
TPS63070
ZHCSFB9B –JUNE 2016–REVISED MARCH 2019
www.ti.com.cn
7.5 Electrical Characteristics
over VIN = 2V to 16V; Tj = -40°C to 125°C; typical values are at Tj = 25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SUPPLY
VIN
Input voltage range
Input voltage range
once started; Vout ≥ 3.0 V
2.0
3.0
16
16
V
V
VIN
for start-up; Vout < 3.0 V
during operation with either
VIN ≥ 4.5 V or VOUT ≥ 4.5 V
and the boost factor
IOUT
Output current
2
A
(VOUT/VIN) ≤ 1
into VIN; IOUT= 0 mA,
IQ
IQ
IQ
Quiescent current
Quiescent current
Quiescent current
VEN = VIN = 6 V, PFM
VOUT = 5 V; Tj = -40°C to 85°C
54
103
133
9
μA
μA
μA
into VIN; IOUT= 0 mA,
VEN = VIN = 6 V, PFM
VOUT = 5 V; Tj = -40°C to 125°C
into VOUT; IOUT= 0 mA,
VEN = VIN = 6 V, VOUT = 5 V, PFM
Tj = -40°C to 85°C
5
2
into VOUT; IOUT= 0 mA,
VEN = VIN = 6 V, VOUT = 5 V, PFM
Tj = -40°C to 125°C
IQ
Quiescent current
Shutdown current
17
12
μA
μA
VEN = 0 V; Tj = -40°C to 85°C;
VIN = 5V
ISD
ISD
Shutdown current
VEN = 0 V; Tj = -40°C to 85°C
VIN voltage falling
26
μA
V
VUVLO
VUVLO,TH
TSD
Undervoltage lockout threshold
Undervoltage lockout hysteresis
Thermal shutdown
1.7
1.85
850
160
20
1.95
VIN voltage rising
525
mV
°C
°C
TSD
Thermal shutdown hysteresis
LOGIC SIGNALS: EN, PS/SYNC, PG, VSEL
Threshold Voltage rising edge for
VTHR
VTHF
VIL
EN pin and PS/SYNC used for
PWM/PFM mode change
0.77
0.67
0.8
0.7
0.83
0.73
0.3
V
V
V
V
Threshold Voltage falling edge for
EN pin and PS/SYNC used for
PWM/PFM mode change
VSEL low level input voltage;
PS/SYNC low level input voltage
when used for synchronization
VSEL high level input voltage;
PS/SYNC high level input voltage
when used for synchronization
1.1
VIH
EN, PS/SYNC, VSEL input current
PG output low voltage
0.2
0.4
0.2
1
μA
V
VOL
ILKG
IPG
IPG = -1 mA
PG output leakage current
PG sink current
PG pin high impedance; VPG = 5 V
μA
mA
Power Good Threshold Voltage,
rising Vout
VTH_PG
VTH_PG
94.5
90
96
92
98.5
94.5
%
%
Power Good Threshold Voltage,
falling Vout
6
Copyright © 2016–2019, Texas Instruments Incorporated
TPS63070
www.ti.com.cn
ZHCSFB9B –JUNE 2016–REVISED MARCH 2019
Electrical Characteristics (continued)
over VIN = 2V to 16V; Tj = -40°C to 125°C; typical values are at Tj = 25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
OUTPUT
VOUT
VOUT
VFB
TPS63070/TPS630702 output
voltage range(1)
2.5
9
V
V
TPS630701 output voltage
5.0
800
1.5
TPS63070/TPS630702 feedback
voltage
PS/SYNC = VIN
mV
feedback impedance
feedback leakage
for fixed voltage versions
MΩ
for adjustable version; VFB = 0.8V
100
1
nA
TPS63070/TPS630702 feedback
voltage accuracy
VFB
PS/SYNC = GND (PWM mode)
-1
-1
-1
%
%
%
VOUT
VFB
TPS630701 output voltage accuracy PS/SYNC = GND (PWM mode)
1
TPS63070/TPS630702 feedback
voltage accuracy
PS/SYNC = VIN (PFM mode);
VIN ≥ 3V
3
PS/SYNC = VIN (PFM mode);
VIN ≥ 3V
VOUT
fSW
TPS630701 output voltage accuracy
-1
3
%
Oscillator frequency
2100
2100
2400
2700
2800
kHz
kHz
Frequency range for synchronization
VIN = 5.0V; VOUT = 6.5V;
Tj = 0°C to 125°C
IIN,max
IIN,max
Average, positive input current limit
Average, negative input current limit
3050
1100
3600
1800
4150
mA
mA
VIN = 5.0V; VOUT = 6.5V;
Tj = 0°C to 125°C
High side switch on resistance
Low side switch on resistance
High side switch on resistance
Low side switch on resistance
VIN = 5 V
VIN = 5 V
VIN = 5 V
VIN = 5 V
50
100
40
80
160
70
mΩ
mΩ
mΩ
mΩ
RDS(ON)-
BUCK
RDS(ON)-
BOOST
80
125
RDS(ON)-
FB2
FB2 resistance to GND
with VSEL = high
25
100
Ω
Input leakage current into FB2
with VSEL=low
ILKG
VFB = VFB2 = 0.8V
100
100
nA
FB2 sink current
Line regulation
Load regulation
μA
%/V
%/A
V
Power Save Mode disabled
Power Save Mode disabled
VIN ≥ VOUT; VIN < 6V
VIN < VOUT
0.07
0.2
VIN - 0.3
7
7
VAUX
ROD
Maximum bias voltage
VOUT -
0.3
V
Ω
Output discharge resistance (only in VIN = 5 V; VOUT = 5V
TPS630702)
200
70
time from EN = VIH to device starts
switching
tdelay
Start-up delay
μs
time to ramp from 5% to 95% of
Vout; buck mode; VIN = 7.2 V,
Vout = 3.3 V, Iout = 500 mA
400
850
μs
μs
tSS
soft-start time
time to ramp from 5% to 95% of
Vout; boost mode; VIN = 3.0 V,
Vout = 3.3 V, Iout = 250 mA
(1) Please observe the minimum duty cycle in buck mode
Copyright © 2016–2019, Texas Instruments Incorporated
7
TPS63070
ZHCSFB9B –JUNE 2016–REVISED MARCH 2019
7.6 Typical Characteristics
www.ti.com.cn
90
60
55
50
45
40
35
30
25
20
-40
30
85
125
-40
30
80
80
125
70
60
50
40
30
20
0
5
10
15
20
0
5
10
15
20
VIN [V]
VIN [V]
D019
D020
Vout = 5V
I = 1A
Vout = 5V
I = 1A
Figure 1. Rds(on) of High-side Buck Switch
Figure 2. Rds(on) of High-side Boost Switch
120
150
140
130
120
110
100
90
-40
30
85
-40
30
85
125
110
100
90
125
80
80
70
70
60
60
50
50
0
5
10
15
20
0
5
10
15
20
VIN [V]
VIN [V]
D021
D022
Vout = 5V
I = 1A
Vout = 5V
I = 1A
Figure 3. Rds(on) of Low-side Boost Switch
Figure 4. Rds(on) of Low-side Buck Switch
8
Copyright © 2016–2019, Texas Instruments Incorporated
TPS63070
www.ti.com.cn
ZHCSFB9B –JUNE 2016–REVISED MARCH 2019
8 Detailed Description
8.1 Overview
The TPS6307x use 4 internal N-channel MOSFETs to maintain synchronous power conversion at all possible
operating conditions. This enables the device to keep high efficiency over a wide input voltage and output power
range. To regulate the output voltage at all possible input voltage conditions, the device automatically switches
from buck operation to boost operation and back as required by the configuration. It always uses one active
switch, one rectifying switch, one switch on, and one switch held off. Therefore, it operates as a buck converter
when the input voltage is higher than the output voltage, and as a boost converter when the input voltage is
lower than the output voltage. There is no mode of operation in which all 4 switches are switching. The RMS
current through the switches and the inductor is kept at a minimum, to minimize switching and conduction losses.
For the remaining 2 switches, one is kept on and the other is kept off, thus causing no switching losses.
Controlling the switches this way allows the converter to always keep high efficiency over the complete input
voltage range. The device provides a seamless transition from buck to boost or from boost to buck operation.
8.2 Functional Block Diagram TPS63070
L1
L2
VIN
VOUT
VIN
VOUT
Current
Sensor
Bias
Regulator
VIN
PGND
PGND
VAUX
VAUX
VOUT
Gate
Control
_
+
VAUX
_
+
Modulator
Oscillator
FB
PG
+
VREF
-
Device
Control
PS/SYNC
EN
FB2
VSEL
PGND
Temperature
Protection
GND
PGND
Copyright © 2016, Texas Instruments Incorporated
Figure 5. Functional Block Diagram
Copyright © 2016–2019, Texas Instruments Incorporated
9
TPS63070
ZHCSFB9B –JUNE 2016–REVISED MARCH 2019
8.3 Functional Block Diagram TPS630701
www.ti.com.cn
L1
L2
VIN
VOUT
VIN
VOUT
Current
Sensor
Bias
Regulator
VIN
PGND
PGND
VAUX
VAUX
VOUT
Gate
Control
FB
_
+
VAUX
_
+
Modulator
Oscillator
PG
+
-
Device
Control
VREF
PS/SYNC
EN
FB2
VSEL
PGND
Temperature
Protection
GND
PGND
Copyright © 2016, Texas Instruments Incorporated
Figure 6. Functional Block Diagram
8.4 Feature Description
8.4.1 Control Loop Description
The controller circuit of the device is based on an average current mode topology. The average inductor current
is regulated by a fast current regulator loop which is controlled by a voltage control loop.
The non inverting input of the transconductance amplifier gmv can be assumed to be constant. The output of
gmv defines the average inductor current. The inductor current is reconstructed by measuring the current through
the high side buck MOSFET. This current corresponds exactly to the inductor current in boost mode. In buck
mode, the current is measured during the on-time of the same MOSFET. During the off-time, the current is
reconstructed internally starting from the peak value reached at the end of the on-time cycle. The average
current is then compared to the desired value and the difference, or current error, is amplified and compared to
the sawtooth ramp of either the Buck or the Boost. Depending on which of the two ramps is crossed by the
signal, either the Buck MOSFETs or the Boost MOSFETs are activated. When the input voltage is close to the
output voltage, one buck cycle is followed by a boost cycle. In this condition, not more than three cycle in a row
of the same mode are allowed. This control method in the buck-boost region ensures a robust control and the
highest efficiency.
For an input voltage above 9 V, and Vout below 2.2 V, the switching frequency is reduced by a factor of 2 to
keep the minimum on-time at a reasonable value. For short circuit protection, at an output voltage below 1.2V,
the low side input FET and the high side output FET are not actively switched but their back-gate diode used for
conduction.
TPS6307x also contains a negative current limit. This allows the inductor current to reverse and flow from the
output to the input. This is required for forced PWM operation at low output current but also for applications that
require a fairly high current from the output to the input like TEC (thermo electric cooling) applications where the
TEC cell is placed between input and output of the converter,
10
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Feature Description (continued)
L2
L1
Vin
Vout
Boost
Drive
Buck
Drive
PWM
PWM
Boost
Ramp
Rs
Buck
Ramp
gmc
gmv
FB
Vref
0.8V
Ramp Generator
Copyright © 2016, Texas Instruments Incorporated
Figure 7. Average Current Mode Control
8.4.2 Precise Enable
The enable pin of the TPS63070 is not just a simple digital input but compares the voltage applied to a fixed
threshold of 0.8V for a rising voltage. This allows to drive the pin by a slowly changing voltage and enables the
use of an external RC network to achieve a precise power-up delay. The enable input threshold for a falling edge
is typically 100mV lower than the rising edge threshold. The TPS63070 starts operation when the rising threshold
is exceeded. For proper operation, the EN pin must be terminated and must not be left floating. Pulling the EN
pin low forces the device into shutdown. In this mode, the internal high side and low side MOSFETs are turned
off and the entire internal-control circuitry is switched off. The enable pin can also be used with an external
voltage divider to set a user-defined minimum supply voltage.
It is recommended to not connect EN directly to VIN but use a resistor in series in the range of 1kΩ to 1MΩ. If
several inputs like EN and PS/SYNC are connected to VIN, the resistor can be shared. No resistor is required if
the pin is driven from an analog or digital signal rather than a supply voltage.
8.4.3 Power Good
The device has a built in power good output that indicates whether the output voltage has reached its nominal
value. The PG signal is generated based on the status of the output voltage monitor. The power good circuit
operates as long as the converter is enabled and VIN is above the undervoltage lockout threshold.
If the output voltage has not reached the regulated condition, the PG pin is held low. When the regulated
condition is reached, PG is high impedance.
The PG output needs an external pull-up resistor. This resistor can be pulled to any voltage up to the maximum
output voltage rating.
Table 1. Power Good Status
EN
low
output voltage status
PG
low
output off
high
output voltage above power good
threshold
high impedance
high
output voltage below power good
threshold, in thermal shutdown or input /
output overvoltage protection active
low
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www.ti.com.cn
8.4.4 Soft Start
To minimize inrush current during start up, the device has a soft start. When the EN pin is set high, after a
thermal shutdown or after the undervoltage lockout threshold is exceeded, a soft-start cycle is started and the
input current is ramped until the output voltage reaches regulation. The device ramps up the output voltage in a
controlled manner, even if a large capacitor is connected at the output. During soft-start, as long as the output
voltage is below the power good threshold, the input current limit is reduced to typically 1A. The soft-start time is
defined by the current limit during the soft-start phase along with the load current, output capacitance and the
input to output voltage ratio.
8.4.5 PS/SYNC
The PS/SYNC pin has two functions:
•
•
switching between forced PWM mode and power save mode
synchronizing to an external clock applied at pin PS/SYNC
When PS/SYNC is set high, the device operates in power save mode at low output current. For an average
inductor current above a certain threshold the device switches to forced PWM mode. The automatic switch-over
from PFM to PWM and vice versa is done such that the efficiency is kept at the maximum possible level. It is not
based on a fixed threshold but at a current that depends on input voltage and output voltage to keep the
efficiency at the maximum possible level.
The power save mode is disabled when PS/SYNC is set low. The device then operates in forced fixed frequency
PWM mode independent of the output current.
TPS6307x can be synchronized to an external clock applied at pin PS/SYNC. Details about the voltage level and
frequency range can be found in the electrical characteristics. When an external clock is detected, TPS6307x
switches from internal clock or power save mode to fixed frequency operation based on the external clock
frequency. When the external clock is removed, TPS6307x switches back to internal clock or power save mode
depending on the average inductor current and status of the PS/SYNC pin. The PS/SYNC pin has two parallel
input stages, a slow one with the precise threshold for PWM/PFM mode change and a fast digital input stage for
an external clock signal for synchronization.
It is recommended to not connect PS/SYNC directly to VIN but use a resistor in series in the range of 1kΩ to
1MΩ. If several inputs like EN and PS/SYNC are connected to VIN, the resistor can be shared. No resistor is
required if the pin is driven from an analog or digital signal rather than a supply voltage.
8.4.6 Short Circuit Protection
The TPS6307x provides short circuit protection to protect itself and the application. When the output voltage is
below 1.2 V, the back-gate diodes of the low side input FET and high side output FET are used for rectification.
For an input voltage above 9 V and an output voltage below 2.2 V, the switching frequency is scaled to ½ of its
nominal value.
12
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8.4.7 VSEL and FB2 pins
The VSEL pin allows to dynamically select between two different output voltages on the adjustable version. The
voltage is set by a resistor that is connected between the FB and the FB2 pin. FB2 is connected to GND if VSEL
= high. FB2 is high impedance if VSEL= low. The transition speed during a voltage change is defined by the loop
bandwidth of the device and can be adjusted by adding a feed-forward capacitor in parallel to R1.
1.5 µH
TPS63070
L1
L2
VIN = 2.0 V to 16 V
VOUT = Vo1 / Vo2
VOUT
VIN
10 µF
10 µF
0603
2x10 µF
R1
R2
0603
3x22 µF
0805
FB
PS/SYNC
EN
R3
10 kΩ
FB2
VSEL
PG
PGND
GND
VAUX
100 nF
Copyright © 2016, Texas Instruments Incorporated
Figure 8. Typical Application using VSEL
The resistor values for the feedback divider and FB2 are in the 50-500kΩ range. R3 is calculated as follows:
(1)
For more details on how to use VSEL see Technote SLVAE62.
8.4.8 Overvoltage Protection
TPS6307x has a built in over-voltage protection which limits the output voltage. The voltage is internally sensed
on the VOUT pin. In case the voltage on the feedback pin is not set correctly or the connection is open, this limits
the output voltage to a value that protects the output stage from a too high voltage by limiting it to a internally set
value.
Input over-voltage protection forces PFM mode to make sure the device is protected against boosting from the
output to the input. This may happen if there is a large capacitor charged above the nominal voltage on the
output and the supply on the input is removed. In PWM mode, the device is able to provide current from the
output to the input causing a rise in the input voltage. In PFM mode, the current to the input is blocked so the
input voltage can not rise. The input over-voltage protection does not protect the device from a too high voltage
applied to the input but just from operating such that the device itself causes a rise of the input voltage above
critical levels. Both over-voltage sensors are de-glitched by approximately 1µs.
8.4.9 Undervoltage Lockout
When the input voltage drops, the undervoltage lockout prevents mis-operation by switching off the device. The
converter starts operation when the input voltage exceeds the threshold by a hysteresis of typically 850 mV. This
relatively large hysteresis is needed to allow operation down to 2-V of supply voltage for the case when the
output voltage is up at 3-V or above but restrict start-up for the case when the output voltage is zero. For start-up
when the output voltage has not yet ramped, the rising UVLO threshold was set to a level that allows to start
TPS63070 at a supply voltage where the load does not demand much load current.
8.4.10 Overtemperature Protection
The junction temperature (Tj) of the device is monitored by an internal temperature sensor. When Tj exceeds the
thermal shutdown temperature, the device goes into thermal shutdown. The power stage is turned off and PG
goes low. When Tj decreases below the hysteresis amount, the converter resumes normal operation, beginning
with a Soft Start cycle. To avoid unstable conditions, a hysteresis of typically 20°C is implemented on the thermal
shutdown temperature. In addition, the thermal shutdown is debounced by approximately 10 µs.
Copyright © 2016–2019, Texas Instruments Incorporated
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TPS63070
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8.5 Device Functional Modes
8.5.1 Power Save Mode
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Depending on the load current, in order to provide the best efficiency over the complete load range, the device
works in PWM mode at an inductor current of approximately 650 mA or higher. At lighter load, the device
switches automatically in to Power Save Mode to reduce power consumption and extend battery life. The
PFM/PWM pin can be used to select between the two different operation modes. To enable Power Save Mode,
the PFM/PWM pin must be set high.
During Power Save Mode, the part operates with a reduced switching frequency and supply current to maintain
high efficiency. The output voltage is monitored by a comparator for the threshold "comp low" and "comp high" at
every clock cycle. When the device enters Power Save Mode, the converter stops operating and the output
voltage drops. The slope of the output voltage depends on the load and the output capacitance. When the output
voltage reaches the comp low threshold, at the next clock cycle the device ramps up the output voltage again by
starting operation. Operation can last for one or several pulses until the "comp high" threshold is reached. At the
next PFM cycle, if the inductor current is still lower than about 650 mA, the device switches off again and the
same operation is repeated. Instead, if at the next PFM cycle, the inductor current is above approximately 650
mA , the device automatically switches to PWM mode.
In order to keep high efficiency in PFM mode, there is only a comparator active to keep the output voltage
regulated. The AC ripple in this condition is increased, compared to the voltage in PWM mode. The amplitude of
this voltage ripple typically is 50 mV pk-pk, with 22 µF effective capacitance. In order to avoid a critical voltage
drop when switching from 0 A to full load, the output voltage in PFM is typically 1 % above the nominal value in
PWM. This allows the converter to operate with a small output capacitor and still have a low absolute voltage
drop during heavy load transients.
Power Save Mode can be disabled by programming the PFM/PWM pin low.
Heavy Load transient step
PFM mode at light load
current
Comparator high
50mV ripple in PFM
+1%*Vo
Comparator low
Vo
PWM mode
Absolute Voltage drop
with positioning
Figure 9. Dynamic Voltage Positioning
8.5.2 Current Limit
it is possible to calculate the output current in the different conditions in boost mode using Equation 2 and
Equation 3 and in buck mode using Equation 4 and Equation 5.
V
- V
OUT
V
IN
Duty Cycle Boost
D =
OUT
(2)
(3)
Output Current Boost
IOUT = 0 x IIN (1-D)
V
OUT
V
Duty Cycle Buck
D =
IN
IOUT = ( 0 x IIN ) / D
(4)
(5)
Output Current Buck
14
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TPS63070
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ZHCSFB9B –JUNE 2016–REVISED MARCH 2019
Device Functional Modes (continued)
With,
η = Estimated converter efficiency (use the number from the efficiency curves or 0.90 as an assumption)
IIN = Minimum average input current
The maximum output current TPS63070 can provide, can directly be seen from the graphs "Maximum Load
Current vs Input Voltage" for different output voltages at (Figure 43, Figure 20 and Figure 22 ). The start-up
current is lower because the current limit is set to typically 1A to limit the inrush current at start-up as long as
the power good signal is low. Please see the typical start-up current graphs at Figure 42, Figure 19 and
Figure 21. Once the power good comparator indicates "power good", the current limit is set to its nominal
value as given in the electrical characteristics.
8.5.3 Output Discharge Function (TPS630702 only)
To make sure the load applied at TPS630702 is powered up from 0 V once TPS630702 is enabled, the device
features an internal discharge resistor for the output capacitor. The discharge function is enabled as soon as the
device is disabled, in thermal shutdown or in undervoltage lockout. The minimum supply voltage required for the
discharge function to remain active when enabled is approximately 2 V. The discharge function is only active
after the device has been enabled at least once after supply voltage was applied. This feature is only enabled in
TPS630702 and it is the only difference between TPS63070 and TPS630702.
Copyright © 2016–2019, Texas Instruments Incorporated
15
TPS63070
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www.ti.com.cn
9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The TPS6307x is a high efficiency, low quiescent current buck-boost converter suitable for applications where
the input voltage can be higher or lower than the output voltage. The TPS63070 is internally supplied from the
higher of the input voltage or output voltage. For proper operation either one or both need to have a voltage of
3.0 V or above but must not exceed their maximum rating.
9.2 Typical Application for adjustable version
L
1.5 µH
L1
L2
TPS63070
VOUT = 2.5 V to 9 V
COUT
C4
10 µF
0603
VIN = 2.0 V to 16 V
VOUT
C1
10 µF
0603
VIN
R1
CIN
3x22 µF
0805
2x10 µF
0805
R4
100 kΩ
FB
R2
VSEL
R5
FB2
10 kΩ
EN
PG
PGND
PS/SYNC
VAUX
GND
CVAUX
100 nF
Copyright © 2016, Texas Instruments Incorporated
Figure 10. Typical Application For Adjustable Version
9.2.1 Design Requirements
The design guidelines provide a component selection to operate the device within the recommended operating
conditions. The input and output capacitors have been split into a small 0603 size capacitor close to the device
pins and 0805 size capacitors to get the required capacitance.
Table 2. Bill of Materials
REFERENCE
DESCRIPTION
TPS63070RNM
XFL4020-152ME
VALUE
MANUFACTURER
Texas Instruments
Coilcraft
IC
L
1.5 µH
2 x 10 µF / 25 V /
X7S / 0805
CIN
C1
GRM21BC71E106ME11L
TMK107BBJ106MA-T
GRM21BC81C226ME44L
TMK107BBJ106MA-T
Murata
Taiyo Yuden
Murata
10 µF / 25 V / X5R /
0603
3 x 22 µF / 16 V /
X6S / 0805
COUT
C4
10 µF / 25 V / X5R /
0603
Taiyo Yuden
16
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TPS63070
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ZHCSFB9B –JUNE 2016–REVISED MARCH 2019
Table 2. Bill of Materials (continued)
REFERENCE
DESCRIPTION
VALUE
MANUFACTURER
100 nF / 25V / X7R /
0402
CVAUX
TMK105B7104MV-FR
Taiyo Yuden
depending on desired
output voltage
R1, R2
R4
Metal Film Resistor ; 1%
Metal Film Resistor ; 1%
100 kΩ
9.2.2 Detailed Design Procedure
The TPS6307x series of buck-boost converter has internal loop compensation. Therefore, the external L-C filter
has to be selected according to the internal compensation. It's important to consider that the effective inductance,
due to inductor tolerance and current derating can vary between 20% and -30%. The same for the capacitance
of the output filter: the effective capacitance can vary between +20% and -80% of the specified datasheet value,
due to capacitor tolerance and bias voltage. For this reason, Output Filter Selection shows the nominal
capacitance and inductance value allowed. The effective capacitance of the adjustable version TPS63070 on the
output (in µF) needs to be at least 10 times higher than the effective inductance (in µH) to ensure a good
transient response and stable operation.
Table 3. Output Filter Selection
OUTPUT CAPACITOR VALUE [µF](2)
INDUCTOR
VALUE [µH](1)
22
47
68
√
100
√
1.0
1.5
2.2
√
(3)
√
√
√
√
√
(1) Inductor tolerance and current de-rating is anticipated. The effective inductance can vary by +20% and
–30%.
(2) Capacitance tolerance and bias voltage de-rating of +20% and -50% is anticipated. For capacitors with
larger dc bias effect, a larger nominal value needs to be selected.
(3) Typical application. Other check marks indicates recommended filter combinations
9.2.2.1 Programming The Output Voltage
While the output voltage of the TPS63070 is adjustable, the TPS630701 is set to a fixed voltage. For fixed output
versions, the FB pin must be connected to the output directly. The adjustable version can be programmed for
output voltages from 2.5V to 9V by using a resistive divider from VOUT to GND. The voltage at the FB pin
(VREF)is regulated to 800mV. The value of the output voltage is set by the selection of the resistive divider from
Equation 6 . It is recommended to choose resistor values which allow a current of at least 2uA, meaning the
value of R2 shouldn't exceed 400kΩ. Lower resistor values are recommended for highest accuracy and most
robust design.
V
æ
ö
OUT
R1 = R2
-1
÷
ç
0.8V
è
ø
(6)
Table 4. Typical Resistor Values
Output Voltage
3.3 V
R1
R2
470 kΩ
680 kΩ
560 kΩ
300 kΩ
360 kΩ
402 kΩ
150 kΩ
130 kΩ
100 kΩ
51 kΩ
51 kΩ
39 kΩ
5.0 V
5.3 V
5.5 V
6.5 V
9 V
Copyright © 2016–2019, Texas Instruments Incorporated
17
TPS63070
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www.ti.com.cn
9.2.2.2 Inductor Selection
For high efficiencies, the inductor should have a low dc resistance to minimize conduction losses. Especially at
high switching frequencies, the core material has a higher impact on efficiency. When using small chip inductors,
the efficiency is reduced mainly due to higher inductor core losses. This needs to be considered when selecting
the appropriate inductor. The inductor value determines the inductor ripple current. The larger the inductor value,
the smaller the inductor ripple current and the lower the conduction losses of the converter. Conversely, larger
inductor values cause a slower load transient response. To avoid saturation of the inductor, the peak current for
the inductor in steady state operation is calculated using Equation 8. Only the equation which defines the switch
current in boost mode is shown, because this provides the highest value of current and represents the critical
current value for selecting the right inductor.
V
- V
OUT
V
IN
Duty Cycle Boost
D =
OUT
(7)
(8)
Iout
η ´ (1 - D)
Vin ´ D
IPEAK
Where,
=
+
2 ´ f ´ L
D =Duty Cycle in Boost mode
f = Converter switching frequency (typical 2.4MHz)
L = Selected inductor value
η = Estimated converter efficiency (use the number from the efficiency curves or 0.90 as an assumption)
Note: The calculation must be done for the minimum input voltage which is possible to have in boost mode
Calculating the maximum inductor current using the actual operating conditions gives the minimum saturation
current of the inductor needed. It is recommended to choose an inductor with a saturation current 20% higher
than the value calculated from Equation 8. The following inductors are recommended for use:
Table 5. Inductor Selection
INDUCTOR VALUE
1.2 µH
COMPONENT SUPPLIER(1)
Coilcraft, XFL4015-122ME
Coilcraft, XFL4020-152ME
Coilcraft, XFL4020-102ME
Murata, 1277AS-H-1R0M
SIZE (LxWxH /mm)
4 x 4 x 1.5
Isat/DCR
4.5 A / 18.8 mΩ
4.6 A / 14.4 mΩ
5.4 A / 10.8 mΩ
3.7 A / 45 mΩ
1.5 µH
4 x 4 x 2.1
1.0 µH
4 x 4 x 2.1
1 µH
3.2 x 2.5 x 1.2
(1) See Third-party Products Disclaimer
The inductor value also affects the stability of the feedback loop. In particular the boost transfer function exhibits
a right half-plane zero. The frequency of the right half plane zero is inverse proportional to the inductor value and
the load current. This means the higher the value of the inductance and load current, the more the right half
plane zero is moved to a lower frequency. This degrades the phase margin of the feedback loop. It is
recommended to choose the inductor's value in order to have the frequency of the right half plane zero >400
kHz. The frequency of the RHPZ is calculated using Equation 9.
(1 - D)2 ´ Vout
f
RHPZ
=
2p ´Iout ´ L
(9)
With,
D =Duty Cycle in Boost mode
Note: The calculation must be done for the minimum input voltage which is possible to have in boost mode
If the operating conditions results in a frequency of the RHPZ of less than 400kHz, more output capacitance
should be added to reduce the cross over frequency. The RHPZ moves to lowest frequency at lowest input
voltage (highest boost factor) and largest output current. Device stability should therefore be observed mainly
under these worst case operating conditions.
18
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9.2.2.3 Capacitor Selection
9.2.2.3.1 Input Capacitor
It is recommended to use a combination of capacitors on the input. A small size ceramic capacitor as close as
possible from the VIN pin to GND to block high frequency noise and a larger one in parallel for the required
capacitance on for good transient behavior of the regulator. X5R or X7R ceramic capacitor are recommended.
The input capacitor needs to be large enough to avoid supply voltage dips shorter than 5us as the undervoltage
lockout circuitry needs time to react.
9.2.2.3.2 Output Capacitor
Same as the input, the output capacitor should be a combination of capacitors optimized for suppressing high
frequency noise and a larger capacitor for low output voltage ripple and stable operation. The use of small X5R
or X7R ceramic capacitors placed as close as possible to the VOUT and GND pins of the IC is recommended. A
0603 size capacitor close to the pins of the IC and as many 0805 capacitors as required to get the capacitance
given the output voltage and dc bias effect of the ceramic capacitors is best. The recommended typical output
capacitor values are outlined in Output Filter Selection. Please also see the Recommended Operating Conditions
for the minimum and maximum capacitance at the output.
Larger capacitors will cause lower output voltage ripple as well as lower output voltage drop during load
transients.
Table 6. Typical Capacitors
VALUE
PART NUMBER
COMPONENT
SUPPLIER(1)
COMMENT
SIZE (LxWxH mm)
22 µF
22 µF
10 µF
EMK212BBJ226MG-T
TMK316BBJ226ML
TMK107BBJ106MA-T
Taiyo Yuden
Taiyo Yuden
Taiyo Yuden
input capacitor for Vin ≤ 8 V
2 x 1.25 x 1.25
3.2 x 1.6 x 1.6
1.6 x 0.8 x 0.8
input capacitor
bypass capacitor directly at
device pins on VIN to GND
and VOUT to GND
10 µF
22 µF
GRM21BC71E106ME11
GRM21BC81C226ME44
Murata
Murata
small body size; 2 parts
required if used at VIN > 6V
2 x 1.25 x 1.25
2 x 1.25 x 1.25
small body size; 3 parts
required if used at Vo > 5V;
otherwise 2 parts
(1) See Third-party Products Disclaimer
Copyright © 2016–2019, Texas Instruments Incorporated
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9.2.3 Application Curves
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Table 7. Typical Application Curves for Adjustable Version
Parameter
Conditions
Figure
Efficiency
VIN = 3 V, 4.2 V, 5 V, 7 V, 9 V, 12 V, VOUT
7 V , PS/SYNC = Low
=
=
=
=
Efficiency vs Output Current (PFM/PWM)
Efficiency vs Output Current (PWM only)
Efficiency vs Output Current (PFM/PWM)
Figure 11
Figure 12
Figure 13
Figure 14
VIN = 3 V, 4.2 V, 5 V, 7 V, 9 V, 12 V, VOUT
7 V , PS/SYNC = High
VIN = 3 V, 4.2 V, 5 V, 7 V, 9 V, 12 V, VOUT
9 V , PS/SYNC = Low
VIN = 3 V, 4.2 V, 5 V, 7 V, 9 V, 12 V, VOUT
9 V , PS/SYNC = High
Efficiency vs Output Current (PWM only)
Load Regulation
VIN = 3 V, 4.2 V, 5 V, 7 V, 9 V, 12 V, VOUT
7 V , PS/SYNC = Low
=
=
=
=
Load Regulation, PFM/PWM Operation
Figure 15
Figure 16
Figure 17
Figure 18
VIN = 3 V, 4.2 V, 5 V, 7 V, 9 V, 12 V, VOUT
7 V , PS/SYNC = High
Load Regulation, PWM Operation
VIN = 3 V, 4.2 V, 5 V, 7 V, 9 V, 12 V, VOUT
9 V , PS/SYNC = Low
Load Regulation, PFM/PWM Operation
VIN = 3 V, 4.2 V, 5 V, 7 V, 9 V, 12 V, VOUT
9 V , PS/SYNC = High
Load Regulation, PWM Operation
Output Current
VOUT = 7 V, TJ = -40 °C, 25 °C, 85 °C, 125
°C
Typical Start-up Current vs Input Voltage
Figure 19
Figure 20
Figure 21
Figure 22
VOUT = 7 V, TJ = -40 °C, 25 °C, 85 °C, 125
°C, PG = high
Maximum Load Current vs Input Voltage
Typical Start-up Current vs Input Voltage
VOUT = 9 V, TJ = -40 °C, 25 °C, 85 °C, 125
°C
VOUT = 9V, TJ = -40 °C, 25 °C, 85 °C, 125
°C, PG = high
Maximum Load Current vs Input Voltage
Regulation Accuracy
VIN = 4.2 V, VOUT = 7 V, Load = 100 mA to 1
A, PS/SYNC = Low
Load Transient, PFM/PWM Boost Operation
Figure 23
Figure 24
Figure 25
Figure 26
Figure 27
Figure 28
VIN = 12 V, VOUT = 7 V, Load = 200 mA to
1.8 A, PS/SYNC = Low
Load Transient, PFM/PWM Buck Operation
Load Transient, PFM/PWM Boost Operation
Load Transient, PFM/PWM Buck Operation
Line Transient, PFM/PWM Operation
VIN = 4.2 V, VOUT = 9 V, Load = 100 mA to 1
A, PS/SYNC = Low
VIN = 12 V, VOUT = 9 V, Load = 200 mA to
1.8 A, PS/SYNC = Low
VIN = 5 V to 9 V, VOUT = 7 V, Load = 1 A,
PS/SYNC = Low
VIN = 8 V to 12 V, VOUT = 9 V, Load = 1 A,
PS/SYNC = Low
Line Transient, PFM/PWM Operation
Output Voltage Ripple
VIN = 5 V, VOUT = 7 V, Load = 0.3 A,
PS/SYNC = Low
Output Voltage Ripple, PFM/PWM Operation
Figure 29
Figure 30
Figure 31
Figure 32
Figure 33
Figure 34
VIN = 5 V, VOUT = 7 V, Load = 1 A,
PS/SYNC = high
Output Voltage Ripple, PWM Operation
Output Voltage Ripple, PFM/PWM Operation
Output Voltage Ripple, PFM/PWM Operation
Output Voltage Ripple, PWM Operation
Output Voltage Ripple, PFM/PWM Operation
VIN = 12 V, VOUT = 7 V, Load = 0.3 A,
PS/SYNC = Low
VIN = 5 V, VOUT = 9 V, Load = 0.1 A,
PS/SYNC = Low
VIN = 5 V, VOUT = 9 V, Load = 0.5 A,
PS/SYNC = high
VIN = 12 V, VOUT = 9 V, Load = 0.1 A,
PS/SYNC = Low
20
Copyright © 2016–2019, Texas Instruments Incorporated
TPS63070
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Startup
ZHCSFB9B –JUNE 2016–REVISED MARCH 2019
Table 7. Typical Application Curves for Adjustable Version (continued)
Parameter
Conditions
Figure
Start-up Behavior from Rising Enable, PFM/PWM
Operation
VIN = 4.5 V, VOUT = 7 V, Load = 0.5 A,
PS/SYNC = Low
Figure 35
Figure 36
Start-up Behavior from Rising Enable, PFM/PWM
Operation
VIN = 7 V, VOUT = 9 V, Load = 0.5 A,
PS/SYNC = Low
100%
90%
80%
70%
60%
50%
40%
100%
90%
80%
70%
60%
50%
40%
30%
20%
10%
0
VIN = 3 V
VIN = 3 V
VIN = 4.2 V
VIN = 5 V
VIN = 7 V
VIN = 9 V
VIN = 12 V
30%
20%
10%
0
VIN = 4.2 V
VIN = 5 V
VIN = 7 V
VIN = 9 V
VIN = 12 V
100m
1m
10m
100m
1
2
100m
1m
10m
100m
1
Output Current (A)
Output Current (A)
D003
D004
Vout = 7 V
PFM
T = 25 °C
Vout = 7 V
PWM
T = 25 °C
Figure 11. Efficiency vs Output Current
Figure 12. Efficiency vs Output Current
100%
100%
90%
80%
70%
60%
50%
40%
30%
20%
10%
0
90%
80%
70%
60%
50%
40%
30%
20%
10%
0
VIN = 3 V
VIN = 4.2 V
VIN = 5 V
VIN = 7 V
VIN = 9 V
VIN = 12 V
VIN = 3 V
VIN = 4.2 V
VIN = 5 V
VIN = 7 V
VIN = 9 V
VIN = 12 V
100m
1m
10m
100m
1
2
100m
1m
10m
100m
1
2
Output Current (A)
Output Current (A)
D005
D006
Vout = 9 V
PFM
T = 25 °C
Vout = 9 V
PWM
T = 25 °C
Figure 13. Efficiency vs Output Current
Figure 14. Efficiency vs Output Current
7.28
7.21
7.14
7.07
7
7.28
7.21
7.14
7.07
7
VIN = 3 V
VIN = 3 V
VIN = 4.2 V
VIN = 5 V
VIN = 7 V
VIN = 9 V
VIN = 12 V
VIN = 4.2 V
VIN = 5 V
VIN = 7 V
VIN = 9 V
VIN = 12 V
6.93
6.86
6.79
6.93
6.86
6.79
100μ
1m
10m 100m
Output Current (A)
1
2
100µ
1m
10m 100m
Output Current (A)
1
2
D009
D010
Vout = 7 V
PFM
T = 25 °C
Vout = 7 V
PWM
T = 25 °C
Figure 15. Output Voltage vs Output Current
Figure 16. Output Voltage vs Output Current
Copyright © 2016–2019, Texas Instruments Incorporated
21
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9.36
9.27
9.18
9.09
9
9.36
9.27
9.18
9.09
9
VIN = 3 V
VIN = 4.2 V
VIN = 5 V
VIN = 7 V
VIN = 9 V
VIN = 12 V
VIN = 3 V
VIN = 4.2 V
VIN = 5 V
VIN = 7 V
VIN = 9 V
VIN = 12 V
8.91
8.82
8.73
8.91
8.82
8.73
100µ
1m
10m 100m
Output Current (A)
1
2
100µ
1m
10m 100m
Output Current (A)
1
2
D011
D012
Vout = 9 V
PFM
T = 25 °C
Vout = 9 V
PWM
T = 25 °C
Figure 17. Output Voltage vs Output Current
Figure 18. Output Voltage vs Output Current
1
4.5
4
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
3.5
3
2.5
2
1.5
1
-40èC
25èC
-40èC
25èC
85èC
85èC
0.5
0
125èC
125èC
3
4
5
6
7
8
9
10 11 12 13 14 15 16
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16
Input Voltage (V)
Input Voltage (V)
D014
D017
after start-up with
PG = high
Vout = 7 V
resistive load
Vout = 7 V
Figure 19. Typical Start-up Current
Figure 20. Maximum Load Current vs Input Voltage
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
4.5
4
3.5
3
2.5
2
1.5
1
-40èC
25èC
-40èC
25èC
85èC
85èC
0.5
0
125èC
125èC
3
4
5
6
7
8
9
10 11 12 13 14 15 16
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16
Input Voltage (V)
Input Voltage (V)
D015
D018
after start-up with
PG = high
Vout = 9 V
resistive load
Vout = 9 V
Figure 21. Typical Start-up Current
Figure 22. Maximum Load Current vs Input Voltage
22
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TPS63070
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ZHCSFB9B –JUNE 2016–REVISED MARCH 2019
Vout = 7 V
PFM
Vin = 4.2V
Vin = 4.2V
Io = 1A
Vout = 7 V
PFM
Vin = 12V
Vin = 12V
Io = 1A
Figure 23. Load Transient Response
Figure 24. Load Transient Response
Vout = 9 V
PFM
Vout = 9 V
PFM
Figure 25. Load Transient Response
Figure 26. Load Transient Response
Vout = 7 V
PFM
Vout = 9 V
PFM
Figure 27. Line Transient Response
Figure 28. Line Transient Response
Copyright © 2016–2019, Texas Instruments Incorporated
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Vin = 5V; Vout = 7 V
PFM
Io = 0.3A
Io = 0.3A
Io = 0.5A
Vin = 5V; Vout = 7 V
PWM
Io = 1A
Figure 29. Output Voltage Ripple
Figure 30. Output Voltage Ripple
Vin = 12V; Vout = 7 V
PFM
Vin = 5V; Vout = 9 V
PFM
Io = 0.1A
Figure 31. Output Voltage Ripple
Figure 32. Output Voltage Ripple
Vin = 5V; Vout = 9 V
PWM
Vin = 12V; Vout = 9 V
PFM
Io = 0.1A
Figure 33. Output Voltage Ripple
Figure 34. Output Voltage Ripple
24
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ZHCSFB9B –JUNE 2016–REVISED MARCH 2019
Vin = 7V; Vout = 9 V
PFM
Io = 0.5A
Vin = 4.5V; Vout = 7 V
PFM
Io = 0.5A
Figure 36. Start-up Timing
Figure 35. Start-up Timing
Copyright © 2016–2019, Texas Instruments Incorporated
25
TPS63070
ZHCSFB9B –JUNE 2016–REVISED MARCH 2019
9.3 Typical Application for Fixed Voltage Version
www.ti.com.cn
L
1.5 µH
TPS630701
L1
L2
VOUT = 5 V
C4
10 µF
0603
VIN = 2.0 V to 16 V
VOUT
C1
10 µF
0603
COUT
3x22 µF
0805
VIN
CIN
2x10 µF
0805
R4
100 kΩ
FB
VSEL
FB2
R5
10 kΩ
EN
PG
PGND
PS/SYNC
VAUX
GND
CVAUX
100 nF
Copyright © 2016, Texas Instruments Incorporated
Figure 37. Typical Application For Fixed Voltage Version With Minimum External Part Count And
Minimum Soft Start Time
9.3.1 Design Requirements
The design guidelines provide a component selection to operate the device within the recommended operating
conditions. The input and output capacitors have been split into a small 0603 size capacitor close to the device
pins and 0805 size capacitors to get the required capacitance.
Table 8. Bill of Materials
REFERENCE
DESCRIPTION
TPS630701RNM
XFL4020-1.5µH
VALUE
MANUFACTURER
Texas Instruments
Coilcraft
IC
L
1.5 µH
2 x 10 µF / 25 V /
X7S / 0805
CIN
C1
GRM21BC71E106ME11L
TMK107BBJ106MA-T
GRM21BC81C226ME44L
TMK107BBJ106MA-T
Murata
Taiyo Yuden
Murata
10 µF / 25 V / X5R /
0603
3 x 22 µF / 16 V /
X6S / 0805
COUT
C4
10 µF / 25 V / X5R /
0603
Taiyo Yuden
100 nF / 25V / X7R /
0402
CVAUX
R4
TMK105B7104MV-FR
Taiyo Yuden
-
Metal Film Resistor ; 1%
100 kΩ
26
Copyright © 2016–2019, Texas Instruments Incorporated
TPS63070
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ZHCSFB9B –JUNE 2016–REVISED MARCH 2019
9.3.2 Detailed Design Procedure
The TPS6307x series of buck-boost converter has internal loop compensation. Therefore, the external L-C filter
has to be selected according to the internal compensation. It's important to consider that the effective inductance,
due to inductor tolerance and current derating can vary between 20% and -30%. The same for the capacitance
of the output filter: the effective capacitance can vary between +20% and -80% of the specified datasheet value,
due to capacitor tolerance and bias voltage. For this reason, Output Filter Selection shows the nominal
capacitance and inductance value allowed. For the fixed voltage version TPS630701, the effective capacitance
on the output (in µF) needs to be at least 15 times higher than the effective inductance (in µH) to ensure a good
transient response and stable operation.
9.3.3 Application Curves
Table 9. Typical Application Curves for Fixed Voltage Version
Parameter
Conditions
Figure
Efficiency
VIN = 3 V, 4.2 V, 5 V, 7 V, 9 V, 12 V, VOUT
5 V , PS/SYNC = Low
=
=
Efficiency vs Output Current (PFM/PWM)
Figure 38
Figure 39
VIN = 3 V, 4.2 V, 5 V, 7 V, 9 V, 12 V, VOUT
5 V , PS/SYNC = High
Efficiency vs Output Current (PWM only)
Load Regulation
VIN = 3 V, 4.2 V, 5 V, 7 V, 9 V, 12 V, VOUT
5 V , PS/SYNC = Low
=
=
Load Regulation, PFM/PWM Operation
Figure 40
Figure 41
VIN = 3 V, 4.2 V, 5 V, 7 V, 9 V, 12 V, VOUT
5 V , PS/SYNC = High
Load Regulation, PWM Operation
Output Current
VOUT = 5 V, TJ = -40 °C, 25 °C, 85 °C, 125
°C
Typical Start-up Current vs Input Voltage
Figure 42
Figure 43
VOUT = 5 V, TJ = -40 °C, 25 °C, 85 °C, 125
°C, PG = high
Maximum Load Current vs Input Voltage
Regulation Accuracy
VIN = 4.2 V, VOUT = 5 V, Load = 100 mA to 1
A, PS/SYNC = Low
Load Transient, PFM/PWM Boost Operation
Figure 44
Figure 45
Figure 46
VIN = 12 V, VOUT = 5 V, Load = 200 mA to
1.8 A, PS/SYNC = Low
Load Transient, PFM/PWM Buck Operation
VIN = 4.2 V to 7 V, VOUT = 5 V, Load = 1 A,
PS/SYNC = Low
Line Transient, PFM/PWM Operation
Output Voltage Ripple
VIN = 4.2 V, VOUT = 5 V, Load = 0.3 A,
PS/SYNC = Low
Output Voltage Ripple, PFM/PWM Operation
Figure 47
Figure 48
Figure 49
VIN = 4.2 V, VOUT = 5 V, Load = 1 A,
PS/SYNC = high
Output Voltage Ripple, PWM Operation
VIN = 7.2 V, VOUT = 5 V, Load = 0.3 A,
PS/SYNC = Low
Output Voltage Ripple, PFM/PWM Operation
Startup
Start-up Behavior from Rising Enable, PFM/PWM
Operation
VIN = 4.5 V, VOUT = 5 V, Load = 0.5 A,
PS/SYNC = Low
Figure 50
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TPS63070
ZHCSFB9B –JUNE 2016–REVISED MARCH 2019
www.ti.com.cn
100%
90%
80%
70%
60%
50%
40%
30%
20%
10%
0
100%
90%
80%
70%
60%
50%
40%
30%
20%
10%
0
3 V
4.2 V
5 V
7 V
9 V
3 V
4.2 V
5 V
7 V
9 V
12 V
12 V
100m
1m
10m
100m
1
2
100m
1m
10m
100m
1
2
Output Current (A)
Output Current (A)
D001
D002
Vout = 5 V
PFM
T = 25 °C
Vout = 5 V
PWM
T = 25 °C
Figure 38. Efficiency vs Output Current
Figure 39. Efficiency vs Output Current
5.25
5.2
5.15
5.1
3 V
4.2 V
5 V
7 V
9 V
3 V
4.2 V
5 V
7 V
9 V
5.2
5.15
5.1
12 V
12 V
5.05
5
5.05
5
4.95
4.9
4.95
4.9
4.85
4.85
100m
1m
10m
100m
1
2
100m
1m
10m
100m
1
2
Output Current (A)
Output Current (A)
D007
D008
Vout = 5 V
PFM
T = 25 °C
Vout = 5 V
PWM
T = 25 °C
Figure 40. Output Voltage vs Output Current
Figure 41. Output Voltage vs Output Current
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
4.5
4
3.5
3
2.5
2
1.5
1
-40èC
25èC
-40èC
25èC
85èC
85èC
0.5
0
125èC
125èC
3
4
5
6
7
8
9
10 11 12 13 14 15 16
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16
Input Voltage (V)
Input Voltage (V)
D013
D016
after start-up with
PG = high
Vout = 5 V
resistive load
Vout = 5 V
Figure 42. Typical Start-up Current
Figure 43. Maximum Load Current vs Input Voltage
28
Copyright © 2016–2019, Texas Instruments Incorporated
TPS63070
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ZHCSFB9B –JUNE 2016–REVISED MARCH 2019
Vout = 5 V
PFM
Vin = 4.2V
Vout = 5 V
PFM
Vin = 12V
Io = 0.3A
Io = 0.3A
Figure 44. Load Transient Response
Figure 45. Load Transient Response
Vout = 5 V
PFM
Io = 1A
Vin = 4.2V; Vout = 5 V
PFM
Figure 46. Line Transient Response
Figure 47. Output Voltage Ripple
Vin = 4.2V; Vout = 5 V
PWM
Io = 1A
Vin = 7.2V; Vout = 5 V
PFM
Figure 48. Output Voltage Ripple
Figure 49. Output Voltage Ripple
Copyright © 2016–2019, Texas Instruments Incorporated
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TPS63070
ZHCSFB9B –JUNE 2016–REVISED MARCH 2019
www.ti.com.cn
Vin = 4.5V; Vout = 5 V
PFM
Io = 0.5A
Figure 50. Start-up Timing
30
Copyright © 2016–2019, Texas Instruments Incorporated
TPS63070
www.ti.com.cn
ZHCSFB9B –JUNE 2016–REVISED MARCH 2019
10 Power Supply Recommendations
The TPS63070 device family has no special requirements for its power supply. The power supply output current
needs to be rated according to the supply voltage, output voltage and output current of TPS63070. Please see
the layout guidelines about the placement of the external components.
10.1 Thermal Information
Implementation of integrated circuits in low-profile and fine-pitch surface-mount packages typically requires
special attention to power dissipation. Many system-dependent issues such as thermal coupling, airflow, added
heat sinks and convection surfaces, and the presence of other heat-generating components affect the power-
dissipation limits of a given component.
Three basic approaches for enhancing thermal performance are listed below.
•
•
•
Improving the power dissipation capability of the PCB design
Improving the thermal coupling of the component to the PCB by soldering the PowerPAD™
Introducing airflow in the system
For more details on how to use the thermal parameters in the dissipation ratings table please check the Thermal
Characteristics Application Note (SZZA017) and the IC Package Thermal Metrics Application Note (SPRA953).
Copyright © 2016–2019, Texas Instruments Incorporated
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TPS63070
ZHCSFB9B –JUNE 2016–REVISED MARCH 2019
www.ti.com.cn
11 Layout
11.1 Layout Guidelines
For all switching power supplies, the layout is an important step in the design, especially at high peak currents
and high switching frequencies. If the layout is not carefully done, the regulator could show stability problems as
well as EMI problems. Therefore, use wide and short traces for the main current path and for the power ground
connection. The input capacitor, output capacitor, and the inductor should be placed as close as possible to the
IC. Use a common ground node for power ground and a different one for control ground to minimize the effects
of ground noise. Connect these ground nodes at any place close to one of the ground pin of the IC.
A ceramic capacitor each, as close as possible from the VIN pin to GND and one from the VOUT pin to GND,
shown as C1 and C4 in the layout proposal are used to suppress high frequency noise. The case size should be
0603 or smaller for good high frequency performance. Additional 0805 size input and output capacitors are used
to get the required capacitance on the input and output depending on the supply voltage range and the output
voltage.
The feedback divider should be placed as close as possible to the feedback pin of the IC. To lay out the control
ground, short traces are recommended as well, separation from the power ground traces. This avoids ground
shift problems, which can occur due to superimposition of power ground current and control ground current.
In case any of the digital inputs EN, VSEL or PS/SYNC need to be tied to the input supply voltage VIN, a 10k
resistor must be used in series. One common resistor for all digital inputs that are tied to VIN is sufficient.
11.2 Layout Example
L1
GND
COUT
GND
CIN
C1
C4
VOUT
VIN
EN
FB2
FB
R3
VSEL
VIN
VOUT
R1
R2
C
VAUX
Figure 51. EVM Layout
32
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ZHCSFB9B –JUNE 2016–REVISED MARCH 2019
12 器件和文档支持
12.1 器件支持
12.1.1 第三方产品免责声明
TI 发布的与第三方产品或服务有关的信息，不能构成与此类产品或服务或保修的适用性有关的认可，不能构成此类
产品或服务单独或与任何 TI 产品或服务一起的表示或认可。
12.2 相关链接
下表列出了快速访问链接。类别包括技术文档、支持和社区资源、工具和软件，以及立即订购快速访问。
表 10. 相关链接
器件
产品文件夹
单击此处
单击此处
单击此处
立即订购
单击此处
单击此处
单击此处
技术文档
单击此处
单击此处
单击此处
工具与软件
单击此处
单击此处
单击此处
支持和社区
单击此处
单击此处
单击此处
TPS63070
TPS630701
TPS630702
12.3 接收文档更新通知
要接收文档更新通知，请导航至 TI.com.cn 上的器件产品文件夹。单击右上角的通知我 进行注册，即可每周接收产
品信息更改摘要。有关更改的详细信息，请查看任何已修订文档中包含的修订历史记录。
12.4 社区资源
下列链接提供到 TI 社区资源的连接。链接的内容由各个分销商“按照原样”提供。这些内容并不构成 TI 技术规范，
并且不一定反映 TI 的观点；请参阅 TI 的 《使用条款》。
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
12.5 商标
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
12.6 静电放电警告
ESD 可能会损坏该集成电路。德州仪器 (TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理措施和安装程序 , 可
能会损坏集成电路。
ESD 的损坏小至导致微小的性能降级 , 大至整个器件故障。 精密的集成电路可能更容易受到损坏 , 这是因为非常细微的参数更改都可
能会导致器件与其发布的规格不相符。
12.7 术语表
SLYZ022 — TI 术语表。
这份术语表列出并解释术语、缩写和定义。
13 机械、封装和可订购信息
以下页面包含机械、封装和可订购信息。这些信息是指定器件的最新可用数据。数据如有变更，恕不另行通知，且
不会对此文档进行修订。如需获取此数据表的浏览器版本，请查阅左侧的导航栏。
版权 © 2016–2019, Texas Instruments Incorporated
33
PACKAGE OPTION ADDENDUM
www.ti.com
12-May-2023
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
TPS630701RNMR
TPS630701RNMT
TPS630702RNMR
TPS630702RNMT
TPS63070RNMR
TPS63070RNMT
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
VQFN-HR
VQFN-HR
VQFN-HR
VQFN-HR
VQFN-HR
VQFN-HR
RNM
RNM
RNM
RNM
RNM
RNM
15
15
15
15
15
15
3000 RoHS & Green
250 RoHS & Green
3000 RoHS & Green
250 RoHS & Green
3000 RoHS & Green
250 RoHS & Green
NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
0701
0701
0702
0702
3070
3070
Samples
Samples
Samples
Samples
Samples
Samples
NIPDAU
NIPDAU
NIPDAU
NIPDAU | SN
NIPDAU | SN
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
12-May-2023
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
20-Apr-2023
TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
K0
P1
W
B0
Reel
Diameter
Cavity
A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
Overall width of the carrier tape
W
P1 Pitch between successive cavity centers
Reel Width (W1)
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2
Q3 Q4
Q1 Q2
Q3 Q4
User Direction of Feed
Pocket Quadrants
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TPS630701RNMR
TPS630701RNMT
TPS630702RNMR
TPS630702RNMT
TPS63070RNMR
TPS63070RNMR
TPS63070RNMT
TPS63070RNMT
VQFN-
HR
RNM
RNM
RNM
RNM
RNM
RNM
RNM
RNM
15
15
15
15
15
15
15
15
3000
250
330.0
180.0
330.0
180.0
330.0
180.0
180.0
180.0
12.4
12.4
12.4
12.4
12.4
12.4
12.4
12.4
2.8
2.8
2.8
2.8
2.8
2.8
2.8
2.8
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
1.2
1.2
1.2
1.2
1.2
1.1
1.2
1.1
8.0
8.0
8.0
8.0
8.0
4.0
8.0
4.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
VQFN-
HR
VQFN-
HR
3000
250
VQFN-
HR
VQFN-
HR
3000
3000
250
VQFN-
HR
VQFN-
HR
VQFN-
HR
250
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
20-Apr-2023
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W
L
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TPS630701RNMR
TPS630701RNMT
TPS630702RNMR
TPS630702RNMT
TPS63070RNMR
TPS63070RNMR
TPS63070RNMT
TPS63070RNMT
VQFN-HR
VQFN-HR
VQFN-HR
VQFN-HR
VQFN-HR
VQFN-HR
VQFN-HR
VQFN-HR
RNM
RNM
RNM
RNM
RNM
RNM
RNM
RNM
15
15
15
15
15
15
15
15
3000
250
346.0
182.0
346.0
182.0
346.0
210.0
182.0
210.0
346.0
182.0
346.0
182.0
346.0
185.0
182.0
185.0
33.0
20.0
33.0
20.0
33.0
35.0
20.0
35.0
3000
250
3000
3000
250
250
Pack Materials-Page 2
PACKAGE OUTLINE
RNM0015A
VQFN - 1 mm max height
SCALE 4.000
PLASTIC QUAD FLATPACK - NO LEAD
2.6
2.4
A
B
PIN 1 INDEX AREA
3.1
2.9
1.0
0.8
C
SEATING PLANE
0.08 C
0.05
0.00
PKG
2X 0.725
2X 0.775
(0.2) TYP
2X 0.5
5
7
8
2X (0.25)
0.5 TYP
1.6
1.4
4
9
SYMM
1.5
1
11
1.25
1.05
2X
1
15
13
12
0.5
0.3
0.5
8X
2X
0.3
0.2
0.3
15X
0.1
0.05
C B A
C
4222000/B 03/2020
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
www.ti.com
EXAMPLE BOARD LAYOUT
RNM0015A
VQFN - 1 mm max height
PLASTIC QUAD FLATPACK - NO LEAD
2X (0.75)
2X (0.725)
14
2X (0.525)
4X (0.6)
15
13
12
8X (0.6)
1
8X (0.25)
SYMM
2X (1.35)
11
2X
(0.5)
(2.8)
9
5X (0.5)
3X
(0.25)
4
(1.7)
(R0.05) TYP
2X (0.25)
4X (0.25)
8
7
5
6
(0.6)
(1.15)
2X (0.775)
PKG
LAND PATTERN EXAMPLE
SCALE:20X
SOLDER MASK
OPENING
METAL
METAL UNDER
SOLDER MASK
SOLDER MASK
OPENING
0.05 MIN
ALL AROUND
0.05 MAX
ALL AROUND
SOLDER MASK
DEFINED
PADS 7-13
NON SOLDER MASK
DEFINED
PADS 1-6, 14 & 15
SOLDER MASK DETAILS
4222000/B 03/2020
NOTES: (continued)
3. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271).
4. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
RNM0015A
VQFN - 1 mm max height
PLASTIC QUAD FLATPACK - NO LEAD
2X (0.75)
2X (0.725)
14
2X (0.525)
4X (0.6)
13
12
15
8X (0.6)
14X (0.25)
SOLDER MASK
EDGE,TYP
(1.06)
3X
EXPOSED
METAL
1
11
2X
EXPOSED
METAL
2X (0.72)
SYMM
10
(2.8)
(0.5)
TYP
5X (0.5)
9
4X
(0.575)
(0.14)
4
(R0.05) TYP
2X (0.25)
METAL UNDER
SOLDER MASK
TYP
5
6
7
8
2X (0.388)
4X (0.25)
(1.15)
2X (1.163)
PKG
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
FOR EXPOSED PADS 9-11
85% PRINTED SOLDER COVERAGE BY AREA
SCALE:30X
4222000/B 03/2020
NOTES: (continued)
5. For alternate stencil design recommendations, see IPC-7525 or board assembly site preference.
www.ti.com
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