TPS65146_技术文档

TPS65146

www.ti.com ........................................................................................................................................................................................... SLVS869–NOVEMBER 2008

Compact LCD Bias IC with LDO, VCOM Buffer and Reset Function

1

FEATURES

•

LCD Discharge Function

Overvoltage Protection

Thermal Shutdown

•

2.5V to 6.0V Input Voltage Range

16.5V Boost Converter With 2A Switch Current

650kHz/1.2MHz Selectable Switching

Frequency

Undervoltage Lockout

24-Pin 4×4mm QFN Package

•

Adjustable Soft-Start for the Boost Converter

500mA LDO

APPLICATIONS

•

Notebook PC

Reset Function (XAO Signal)

Regulated VGH

•

Monitor

Gate Voltage Shaping

VCOM Buffer

DESCRIPTION

The TPS65146 offers a very compact power supply solution designed to supply the LCD bias voltages required

by TFT (Thin Film Transistor) LCD panels running from a typical 3.3 V or 5 V supply rail. The device integrates a

step-up converter for V_S(Source Driver voltage), a positive charge pump regulator for V_GH(Gate Driver High

voltage), a logic voltage rail using an integrated LDO and a Vcom buffer driving the LCD backplane. In addition to

that, a gate voltage shaping block is integrated for V_GH, modulating the signal (into V_GHM) with high flexibility by

using a logic input VFLK and an external discharge resistor connected to RE pin. Also, an external discrete

negative charge pump can be set using the boost converter of the TPS65146 to generate V_GL(Gate Driver Low

voltage). The integrated reset function together with the LCD discharge function available in the TPS65146

provide the signals enabling the discharge of the LCD TFT pixels when powering-off. The device includes safety

features like overvoltage protection (OVP), as well as thermal shutdown.

Space between text and graphic

Boost Converter

and

Over Voltage Protection

V

S

IN

9 V/300 mA

3.3 V

Positive Charge Pump Regulator,

Gate Voltage Shaping

and

LCD Discharge Function

V

GHM

20 V/±0 mA

V

LVOUT

LDO

2.5 V/500 mA

VCOM Buffer

(unity gain)

V

COM

±±20 mA

Reset function

XAO

1

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

TPS65146

SLVS869–NOVEMBER 2008 ........................................................................................................................................................................................... www.ti.com

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

ORDERING INFORMATION⁽¹⁾

T_A

ORDERING

PACKAGE

PACKAGE MARKING

–40°C to 85°C

TPS65146RGER

24-pin QFN

CEZ

(1) The RGE package is available taped an reeled. For the most current package and ordering information, see the Package Option

Addendum at the end of this document, or see the TI website at www.ti.com.

ABSOLUTE MAXIMUM RATINGS

over operating free-air temperature range (unless otherwise noted)

(1)

VALUE

UNIT

Input voltage range VIN, LVIN⁽²⁾

–0.3 to 6.5

V

Voltage range on pins FB, SS, FREQ, COMP, ADJ, LVOUT, XAO, FBP, VDPM, VFLK, VDET, CDET

(2)

Voltage on pin SW, OPI, OPO, SUP, DRVP⁽²⁾

Input voltage on VGH, VGHM, RE⁽²⁾

ESD rating HBM

20

35

V

2

kV

V

ESD rating MM

200

500

ESD rating CDM

V

Continuous power dissipation

Storage temperature range

Lead temperature (soldering, 10 sec)

See Dissipation Rating Table

–65 to 150

260

°C

(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating

conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) All voltage values are with respect to network ground terminal.

DISSIPATION RATINGS⁽¹⁾⁽²⁾

PACKAGE

R_θJA

T_A≤25°C

T_A= 70°C

T_A= 85°C

POWER RATING

QFN

30°C/W

3.3 W

1.8 W

1.3 W

(1) P_D= (T_J– T_A)/R_θJA.

(2) R_θJA.given for High-K PCB board.

RECOMMENDED OPERATING CONDITIONS

over operating free-air temperature range (unless otherwise noted)

MIN

TYP

MAX

6.0

UNIT

V_IN, V_LVIN

Input voltage range, with V_LVIN≤ V_IN

Operating ambient temperature

Operating junction temperature

2.5

–40

V

T_A

T_J

85

°C

125

2

Submit Documentation Feedback

Product Folder Link(s) :TPS65146

TPS65146

www.ti.com ........................................................................................................................................................................................... SLVS869–NOVEMBER 2008

ELECTRICAL CHARACTERISTICS

V_IN= V_LVIN= 3.3 V, V_S= V_SUP= 9V, V_LVOUT= 2.5 V, V_GH= 20 V, T_A= –40°C to 85°C, typical values are at T_A= 25°C (unless

otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

SUPPLY

V_IN

Input voltage range

2.5

6.0

0.5

45

V

I_QIN

Operating quiescent current into VIN

Operating quiescent current into LVIN

Operating quiescent current into VGH

Operating quiescent current into SUP

Shutdown current into VIN

Device not switching, V_FB= 1.240 V + 3%

V_ADJ= 1.240 V, V_LVOUT= open, no load

VFLK = GND

0.17

25

22

1.8

20

30

0.1

3

mA

µA

mA

µA

I_QLVIN

I_QVGH

I_QSUP

I_SDVIN

I_SDVGH

I_SDLVIN

I_SDSUP

40

Device not switching, V_FB= 1.240 V + 3%

V_IN= 1.8 V, V_S= GND

33

50

2

Shutdown current into VGH

V_IN= 1.8 V, V_GH= 32 V

V_IN= 1.8 V, V_LVOUT= open

V_IN= 1.8 V, V_SUP= 16.5 V

V_INfalling

Shutdown current into LVIN

Shutdown current into SUP

5

2.0

2.2

2.3

V_UVLO

Under-voltage lockout threshold

V

V_INrising

T_SD

Thermal shutdown

Temperature rising

150

14

°C

T_SDHYS

Thermal shutdown hysteresis

LOGIC SIGNALS FREQ, VFLK

I_LEAKInput leakage current

V_IH

VFLK = 6.0 V, FREQ = GND

V_IN= 2.5 V to 6 V

0.1

0.5

µA

V

Logic high input voltage

Logic low input voltage

2

V_IL

V_IN= 2.5 V to 6 V

V

BOOST CONVERTER

V_S

Output voltage boost converter⁽¹⁾

7

16.9

16.5

19

V

V_OVP

V_FB

Overvoltage protection

V_Srising

18

1.240

Feedback regulation voltage

T_A= -40°C to 85°C

T_A= 25°C

1.226

1.230

1.254

1.250

0.1

I_FB

Feedback input bias current

V_FB= 1.240V

µA

gm

Transconductiance error amplifier gain

115

0.13

0.15

µA/V

V_IN= V_GS= 5 V, I_SW= current limit

V_IN= V_GS= 3.3 V, I_SW= current limit

V_IN= 1.8 V, V_SW= 17 V

0.38

0.44

30

R_DS(ON)

N-channel MOSFET on-resistance

Ω

I_{LEAK_SW}

I_LIM

SW leakage current

µA

A

N-Channel MOSFET current limit

Softstart current

2.0

2.5

4

3.0

I_SS

V_SS= 1.240 V

µA

FREQ = high

0.9

1.2

1.5

MHz

kHZ

µA

f_osc

Switching frequency

FREQ = low

470

625

4

780

I_FREQ

FREQ sink current

Line regulation

FREQ = 3.3 V

V_IN= 2.5 V to 6.0 V, I_OUT= 10 mA

I_OUT= 0 A to 500 mA, V_IN= 3.3 V

0.008

0.15

%/V

%/A

Load regulation

LDO REGULATOR

V_LVOUTLDO output voltage range

V_ADJ

1.240

1.222

4

V

Feedback regulation voltage

I_LVOUT= 2mA, V_LVOUT= 1.240 V, T_A= -40°C to

85°C

1.240

1.258

I_LVOUT= 2mA, V_LVOUT= 1.240 V, T_A= 25°C

V_ADJ= 1.240 V

1.225

1.255

0.1

I_ADJ

Feedback input bias current

Short circuit current limit

µA

mA

mV

I_{SC_LDO}

V_IN= V_LVIN= 6 V, LVOUT = GND, ADJ = GND

I_LVOUT= 350 mA, V_LVIN= V_LVOUT– 0.1V

I_LVOUT= 500 mA, V_LVIN= V_LVOUT– 0.1V

V_LVIN= 2.7 V to 5.5 V, I_LVOUT= 100 mA

I_LVOUT= 1 mA to 300 mA

750

410

620

280

430

V_DO

Dropout voltage

Line regulation

Load regulation

0.005

0.6

%/V

%/A

(1) Maximum output voltage limited by the Overvoltage Protection and not the maximum power switch rating of the boost converter.

Submit Documentation Feedback

3

Product Folder Link(s) :TPS65146

TPS65146

SLVS869–NOVEMBER 2008 ........................................................................................................................................................................................... www.ti.com

ELECTRICAL CHARACTERISTICS (continued)

V_IN= V_LVIN= 3.3 V, V_S= V_SUP= 9V, V_LVOUT= 2.5 V, V_GH= 20 V, T_A= –40°C to 85°C, typical values are at T_A= 25°C (unless

otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

VGH REGULATOR

f_SW

Switching frequency

0.5 × f_OSC

1.240

MHz

V

V_FBP

Reference voltage of feedback

T_A= -40°C to 85°C

1.210

1.221

1.270

1.259

0.1

T_A= 25°C

1.240

I_FBP

Feedback input bias current

DRVP R_DS(ON)(Q1 PMOS)

DRVP R_DS(ON)(Q2 NMOS)

V_FBP= 1.240 V

µA

Ω

R_DS(ON)Q1

R_DS(ON)Q2

V_S= 9 V, I_DRVP= 40 mA

V_S= 9 V, I_DRVP= - 40 mA

8

2

20

6

Ω

GATE VOLTAGE SHAPING VGHM

I_DPM

Capacitor charge current VDPM pin

20

13

µA

Ω

R_DS(ON)M1

R_DS(ON)M2

RESET FUNCTION

V_{IN_DET}Operating voltage for V_IN

V_DET

VGH to VGHM R_DS(ON)(M1 PMOS)

VFLK = high, I_VGHM= 20 mA, V_GH= 20 V

VFLK = low, I_VGHM= 20 mA, V_GHM= 7.5 V

25

VGHM to RE R_DS(ON)(M2 PMOS)

Ω

1.6

1.074

1.079

6.0

1.126

1.121

V

Tthreshold voltage

Falling, T_A= -40°C to 85°C

Falling, T_A= 25°C

1.100

65

V_{DET_HYS}

I_{DET_B}

Threshold hysterisis

Iinput bias current

mV

µA

mA

V

V_DET= 1.1 V

0.1

I_CDET

Delay capacitor charge current

Sink current capability⁽²⁾

Low voltage level

V_CDET≤ 1.240 V

10

I_XAO(ON)

V_XAO(ON)

I_{LEAK_XAO}

VCOM BUFFER

V_SUP

V_XAO(ON)= 0.5 V

I_XAO(ON)= 1 mA

1

0.5

2

Leakage current

V_XAO= V_IN= 3.3V

µA

V_Ssupply range⁽³⁾

7

–15

-1

16.5

15

V

mV

µA

V

V_OFFSET

I_B

Input offset voltage

V_CM= V_OPI= V_SUP/2 = 4.5 V

Input bias current

V_CM= V_OPI= V_SUP/2 = 4.5 V

1

V_CM

Common mode input voltage range

Common mode rejection ratio

Output voltage swing low

Output voltage swing high

V_OFFSET= 10 mV, I_OPO= 10 mA

V_CM= V_OPI= V_SUP/2 = 4.5 V, 1 MHz

I_OPO= 10 mA

2

V_S-2

CMRR

V_OL

66

dB

V

0.10

0.20

V_OH

I_OPO= 10 mA

V_S- 0.80 V_S- 0.65

V

Source (V_OPI= V_SUP/2 = 4.5 V, OPO = GND)

Sink (V_OPI= V_SUP/2 = 4.5 V, V_COM= V_SUP= 9 V)

Source (V_OPI= V_SUP/2 = 4.5V, V_OFFSET= 15 mV)

Sink (V_OPI= V_SUP/2 = 4.5V, V_OFFSET= 15 mV)

90

135

160

120

130

40

Short circuit current

Output current

mA

I_sc

I_o

100

PSRR

SR

Power supply rejection ratio

Slew rate

dB

A_V= 1, V_OPI= 2 Vpp

40

V/µs

MHz

BW

–3db bandwidth

A_V= 1, V_OPI= 60 mVpp

60

(2) External pull-up resistor to be chosen so that the current flowing into XAO Pin (XAO = 0 V) when active is below I_{XAO_MIN}= 1mA.

(3) Maximum output voltage limited by the Overvoltage Protection and not the maximum power switch rating of the boost converter.

4

Submit Documentation Feedback

Product Folder Link(s) :TPS65146

TPS65146

www.ti.com ........................................................................................................................................................................................... SLVS869–NOVEMBER 2008

PIN ASSIGNMENT

24 Pin QFN Package 4x4 mm

(Top View)

24

23

22

21

20

19

1

2

3

4

18

17

16

15

SW

VIN

SUP

DRVP

FBP

PowerPAD^®

SS

Exposed Thermal Die

AGND

ADJ

VGH

VGHM

RE

5

6

14

13

LVOUT

7

8

9

10

11

12

TERMINAL FUNCTIONS

I/O

DESCRIPTION

NAME

SW

NO.

1

Switch pin of the boost converter.

Input supply pin.

VIN

SS

2

I

3

I/O

Boost soft-start control pin. Connect a capacitor to this pin if a soft-start is needed. Open = no

soft-start.

AGND

4, exposed

pad

Analog ground.

ADJ

5

6

I

O

I

LDO feedback pin.

LVOUT

LVIN

VDET

XAO

LDO output pin.

7

LDO input supply pin.

8

I

Reset function threshold pin. Connect a voltage divider to this pin to set the threshold voltage.

Reset function output pin. XAO signal is active low.

9

O

I/O

I

CDET

VDPM

VFLK

RE

10

11

12

13

Sets the reset delay time. Pin for external capacitor. Floating if no delay is needed.

Sets the delay to enable VGHM Output. Pin for external capacitor. Floating if no delay needed.

Input pin for charge/discharge signal for V_GHM. VFLK = “high” discharges V_GHMthrough RE pin.

Slope adjustment pin for gate voltage shaping. Connect a resistor to this pin to set the discharging

slope of V_GHMwhen VFLK = “high”.

VGHM

VGH

14

15

16

17

18

O

I

Gate voltage shaping output pin

Input pin for the positive charge pump voltage.

Positive charge pump feedback pin.

FBP

I

DRVP

SUP

O

I

Voltage driver pin of the positive charge pump.

Input supply pin for the gate voltage shaping and operational amplifier blocks. Also overvoltage

protection sense pin. SUP pin must be supplied by V_Svoltage.

OPO

OPI

19

20

21

22

23

O

Output pin of the VCOM Buffer.

Input pin of the VCOM Buffer.

Boost converter compensation pin .

Boost converter feedback pin.

I

I/O

I

COMP

FB

FREQ

I

Boost converter frequency select pin. Oscillator is 650 kHz when FREQ is connected to GND and

1.2 MHz when FREQ is connected to VIN.

PGND

24

Power ground.

Submit Documentation Feedback

5

Product Folder Link(s) :TPS65146

TPS65146

SLVS869–NOVEMBER 2008 ........................................................................................................................................................................................... www.ti.com

FUNCTIONAL BLOCK DIAGRAM

V

GL

V

V_S

IN

FREQ

FB

Boost Converter

(V )

S

V

LVOUT

ADJ

LDO

(V_LVOUT

)

DRVP

FBP

V

LVOUT

Positive Charge

Pump Regulator

V

IN

(V_GH

)

XAO

Reset Function

(XAO)

VDET

CDET

VGH

V_S

VGHM

V

GHM

Gate Voltage

Shaping

RE

(V_GHM

)

OPI

VFLK

VCOM

V

COM

(V_COM

)

OPO

VDPM

6

Submit Documentation Feedback

Product Folder Link(s) :TPS65146

TPS65146

www.ti.com ........................................................................................................................................................................................... SLVS869–NOVEMBER 2008

TYPICAL CHARACTERISTICS

TABLE OF GRAPHS

FIGURE

Efficieny vs Load Current

Efficiency vs Load Current

V_IN= 3.3 V, V_S= 9 V, f = 650 kHz/1.2

MHz

Figure 1

V_IN= 3.3 V, V_S= 12 V, f = 650 kHz/1.2

MHz

Figure 2

PWM Switching Discontinuous Conduction Mode

PWM Switching Continuous Conduction Mode

V_IN= 3.3 V, V_S= 9 V/ 4 mA, f = 1.2 MHz

Figure 3

Figure 4

V_IN= 3.3 V, V_S= 9 V/ 300 mA, f = 1.2

MHz

Boost Frequency vs Load Current

Boost Frequency vs Supply Voltage

V_IN= 3.3 V, V_S= 9 V, f = 650 kHz/1.2

MHz

Figure 5

V_S= 9 V/150 mA, f = 650 kHz/1.2 MHz

Figure 6

Figure 7

Load Transient Response Boost Converter High

Frequency

V_IN= 3.3 V, V_S= 9 V, I_OUT= 50 mA ~

200 mA, f = 1.2 MHz

Load Transient Response Boost Converter Low

Frequency

V_IN= 3.3 V, V_S= 9 V, I_OUT= 50 mA ~

200 mA, f = 650 kHz

Figure 8

Soft-start Boost Converter

V_IN= 3.3 V, V_S= 9 V, I_OUT= 300 mA

V_IN= 3.3 V, V_S= 9 V

Figure 9

Figure 10

Figure 11

Overvoltage Protection Boost Converter (OVP)

Load Transient Response LDO

V_LVIN= 3.3 V, V_LVOUT= 2.5 V, I_LVOUT

100 mA - 300 mA

=

Gate Voltage Shaping

V_GH= 20 V

Figure 12

Figure 13

Figure 14

Figure 15

V_GHMVoltage vs Load Current

V_GLVoltage vs Load Current

V_IN= 3.3 V, V_S= 9 V, V_GHM= 19.8 V

V_IN= 3.3 V, V_S= 9 V, V_GL= -6.7 V

V_IN= 3.3 V, V_S= 9 V, V_GHM= 20 V

Power on Sequencing XAO Signal and VGHM

Delay

Power off Sequencing XAO Signal and VGHM

Delay

V_IN= 3.3 V, V_S= 9 V, V_GHM= 20 V

Figure 16

Figure 17

Power on Sequencing

V_IN= 3.3 V, V_S= 9 V, V_LVOUT= 2.5 V,

V_VCOM= 4.5V, V_GHM= V_GH= 20 V, V_GL

= -7V

Power off Sequencing

V_IN= 3.3 V, V_S= 9 V, V_LVOUT= 2.5 V,

V_VCOM= 4.5V, V_GHM= V_GH= 20 V, V_GL

= -7V

Figure 18

EFFICIENCY

vs

LOAD CURRENT (V_s= 9 V)

EFFICIENCY

vs

Load Current (V_s= 12 V)

100

f = 650 kHz,

V

= 3.3 V,

= 12 V

V

= 3.3 V,

= 9 V

IN

L = 10 mH

90

80

70

60

90

80

70

60

L = 10 mH

S

f = 1.2 MHz,

L = 5 mH

f = 1.2 MHz,

L = 5 mH

50

40

50

40

30

20

30

20

10

0

10

0

0.001

0.01

0.1

-Load current - A

1

0.001

0.01

0.1

1

I

-Load current - A

O

Figure 1.

Figure 2.

Submit Documentation Feedback

7

Product Folder Link(s) :TPS65146

TPS65146

SLVS869–NOVEMBER 2008 ........................................................................................................................................................................................... www.ti.com

PWM SWITCHING

DISCONTINUOUS CONDUCTION MODE

PWM SWITCHING

CONTINUOUS CONDUCTION MODE

V

SW

V

SW

5 V/div

V

S_AC

V

S_AC

50 mV/div

V

= 3.3 V,

IN

S

= 9 V/4 mA

V

= 3.3 V,

I

IN

S

L

I

L

= 9 V/300 mA

200 mA/div

400 ns/div

Figure 3.

Figure 4.

BOOST FREQUENCY

vs

LOAD CURRENT

BOOST FREQUENCY

vs

SUPPLY VOLTAGE

1600

1400

1600

1400

f = V

IN

V

= 9 V/150 mA

V

= 3.3 V,

= 9 V

S

f = V

IN

L = 5 mH

S

1200

1000

800

1200

1000

f = GND

L = 10 mH

800

600

400

200

400

200

0

0.4

2.0

2.5

3.0

3.5

4.0

4.5

5.0

5.5

6.0

0.2

0.3

0.6

0.1

0.5

V

- Supply voltage - V

I

- Load current - A

IN

O

Figure 5.

Figure 6.

LOAD TRANSIENT RESPONSE

BOOST CONVERTER HIGH FREQUENCY

LOAD TRANSIENT RESPONSE

BOOST CONVERTER LOW FREQUENCY

V

= 3.3 V,

= 9 V

V

= 3.3 V,

= 9 V

C

= 20 mF,

C

= 20 mF,

IN

OUT

L = 5 mH,

OUT

L = 10 mH,

S

R

C

= 18 kW,

R

C

= 18 kW,

COMP

= 3.3 nF

V

S_AC

200 mV/div

I

OUT

100 mA/div

I

= 50 mA - 200 mA

I

= 50 mA - 200 mA

OUT

200 ms/div

Figure 7.

Figure 8.

8

Submit Documentation Feedback

Product Folder Link(s) :TPS65146

TPS65146

www.ti.com ........................................................................................................................................................................................... SLVS869–NOVEMBER 2008

BOOST CONVERTER

SOFT-START

OVERVOLTAGE PROTECTION

BOOST CONVERTER (OVP)

V_IN

V

FB shorted

to GND

S

2 V/div

5 V/div

V_IN= 5 V

V_S= 15 V / 500 mA

V_S

5 V/div

V

SW

5 V/div

I_L

C_SS= 100 nF

500 mA/div

200 ms/div

10 ms/div

Figure 9.

Figure 10.

LOAD TRANSIENT RESPONSE LDO

GATE VOLTAGE SHAPING

V

FLK

V

LVOUT_AC

5 V/div

50 mV/div

V

= 3.3 V

LVIN

V

LVOUT_AC

50 mV/div

= 2.5 V

= 1 µF

LVOUT

C

OUT

V

GHM

10 V/div

V

= 20 V down to GND

GHM

I

LVOUT

RE = 80 kW

200 mA/div

I

LVOUT = 100 mA - 300 mA

40 ms/div

10 µs/div

Figure 11.

Figure 12.

VGHM VOLTAGE

vs

LOAD CURRENT

VGL VOLTAGE

vs

LOAD CURRENT

20.5

20.0

0

-1

-2

-3

-4

-5

-6

-7

-8

V

= 3.3 V

IN

T

= - 40 °C

A

= 9 V

S

= -6.7 V

T

= 25 °C

19.5

19.0

GH

A

18.5

18.0

17.5

T

= - 40 °C

A

V

= 3.3 V

= 12 V

IN

T

A

= 25 °C

S

T

= 85 °C

A

= 19.8 V

GH

17.0

16.5

T

A

= 85 °C

20

0

10

30

40

50

60

70

0

10

20

30

40

50

60

70

80

90

100

l_GL- Load Current - mA

I_GH- Load Current - mA

Figure 13.

Figure 14.

Submit Documentation Feedback

9

Product Folder Link(s) :TPS65146

TPS65146

SLVS869–NOVEMBER 2008 ........................................................................................................................................................................................... www.ti.com

POWER ON SEQUENCING

XAO SIGNAL AND VGHM DELAY

POWER OFF SEQUENCING

XAO SIGNAL AND VGHM DELAY

V

IN

V

IN

2 V/div

Set by

CDET

2 V/div

VDET_threshold

reached

XAO

2 V/div

V

FLK

V

FLX

5 V/div

Set by

CDPM

V

= V

GH

GHM

10 V/div

Boost PG

10 ms/div

Figure 15.

Figure 16.

POWER ON SEQUENCE

POWER OFF SEQUENCE

V

IN

5 V/div

V

LVOUT

V

LVOUT

5 V/div

V

S

V

S

10 V/div

V

COM

V

COM

10 V/div

V

GH

V

GHM

10 V/div

V

GH

V

GHM

10 V/div

VGL

10 V/div

10 ms/div

Figure 17.

Figure 18.

10

Submit Documentation Feedback

Product Folder Link(s) :TPS65146

TPS65146

www.ti.com ........................................................................................................................................................................................... SLVS869–NOVEMBER 2008

APPLICATION INFORMATION

BOOST CONVERTER

V_IN

V_S

SW

VIN

FREQ

SUP

Over Voltage

Protection

(OVP)

SS

Current limit

and

Soft Start

Toff Generator

Bias Vref = 1.24V

UVLO

Thermal Shutdown

Ton

Gate Driver of

Power

PWM

Generator

Transistor

COMP

GM Amplifier

FB

Vref

PGND

Figure 19. Boost converter block diagram

The boost converter is designed for output voltages up to 16.5 V with a switch peak current limit of 2.0 A

minimum. The device, which operates in a current mode scheme with quasi-constant frequency, is externally

compensated for maximum flexibility and stability. The switching frequency is selectable between 650 kHz and

1.2 MHz and the minimum input voltage is 2.5 V. To limit the inrush current at start-up a soft-start pin is

available.

During the on-time, the current rises into the inductor. When the current reaches a threshold value set by the

internal GM amplifier, the power transistor is turned off. The polarity of the inductor changes and forward biases

the Schottky diode which lets the current flow towards the output of the boost converter. The off-time is fixed for

a certain V_INand V_S, and therefore maintains the same frequency when varying these parameters.

However, for different output loads, the frequency slightly changes due to the voltage drop across the R_DS(ON)of

the power transistor which will have an effect on the voltage across the inductor and thus on t_ON(t_OFFremains

fixed).

The fixed off-time maintains a quasi-fixed frequency that provides better stability for the system over a wide

range of input and output voltages than conventional boost converters. The TPS65146 topology has also the

benefits of providing very good load and line regulations, and excellent line and load transient responses.

Submit Documentation Feedback

11

Product Folder Link(s) :TPS65146

TPS65146

SLVS869–NOVEMBER 2008 ........................................................................................................................................................................................... www.ti.com

Boost Converter Design Procedure

The first step in the design procedure is to verify whether the maximum possible output current of the boost

converter supports the specific application requirements. A simple approach is to estimate the converter

efficiency, by taking the efficiency numbers from the provided efficiency curves or to use a worst case

assumption for the expected efficiency, e.g. 85%.

V^IN´h

1. Duty Cycle:

D =1-

V^S

V ´ D

IN

2.

Inductor ripple current:

ΔI_L=

fs´L

ΔI_L

2

æ

ö

Maximum output current:

3.

I_OUT

=

I_swpeak

-

´ (1 -D)

ç

÷

è

ø

ΔI_L

2

I_out

Peak switch Current:

I_swpeak

=

+

4.

1-D

and

I_swpeak= converter switch current (minimum switch current limit = 2.0 A)

ƒ_S= Converter switching frequency (typically 1.2 MHz or 650 kHz)

L = Selected inductor value

η = Estimated converter efficiency (please use the number from the efficiency plots or 85% as an estimation)

ΔI_L= Inductor peak-to-peak ripple current

The peak switch current is the steady state peak switch current the integrated switch, inductor and external

Schottky diode has to be able to handle. The calculation must be done for the minimum input voltage where the

peak switch current is highest.

Soft-Start (Boost Converter)

The boost converter has an adjustable soft-start to prevent high inrush current during start-up. To minimize the

inrush current during start-up an external capacitor connected to the soft-start pin SS is used to slowly ramp up

the internal current limit of the boost converter. When the V_INexceeds the Undervoltage Lockout (UVLO)

threshold, the soft-start capacitor C_SSis immediately charged up to 0.3 V. The capacitor is then charged at a

constant current of 4 µA typically until the output of the boost converter V_Shas reached its Power Good threshold

(90% of V_Snominal value). During this time, the voltage on SS pin directly controls the peak inductor current,

starting with 0 A at V_SS= 0.3 V up to the full current limit at V_SS≈ 800 mV. The maximum load current is

available after the soft-start is completed. The larger the capacitor, the slower the ramp of the current limit and

the longer the soft-start time. A 100 nF capacitor is usually sufficient for most of the applications. When V_INfalls

down below the UVLO level, the soft-start capacitor is discharged to ground.

Frequency Select Pin (FREQ)

The frequency select pin FREQ allows to set the switching frequency of the device to 650 kHz (FREQ = low) or

1.2 MHz (FREQ = high). Higher switching frequency improves load transient response but reduces slightly the

efficiency. The other benefits of higher switching frequency are a lower output voltage ripple. Usually, it is

recommended to use 1.2 MHz switching frequency unless light load efficiency is a major concern.

Inductor Selection

The main parameter for the inductor selection is the saturation current of the inductor which should be higher

than the peak switch current as calculated above with additional margin to cover for heavy load transients. An

alternative, more conservative, is to choose the inductor with a saturation current at least as high as the

maximum switch current limit of 3.0 A. Another important parameter is the inductor DC resistance. Usually the

lower the DC resistance the higher the efficiency. It is important to note that the inductor DC resistance is not the

only parameter determining the efficiency. Especially for a boost converter where the inductor is the energy

storage element, the type and core material of the inductor influences the efficiency as well. At high switching

12

Submit Documentation Feedback

Product Folder Link(s) :TPS65146

TPS65146

www.ti.com ........................................................................................................................................................................................... SLVS869–NOVEMBER 2008

frequencies of 1.2 MHz inductor core losses, proximity effects and skin effects become more important. Usually

an inductor with a larger form factor gives higher efficiency. The efficiency difference between different inductors

can vary between 2% to 10%. For the TPS65146, inductor values between 3.3 µH and 6.8 µH are a good choice

with a switching frequency of 1.2 MHz. At 650 kHz we recommend inductors between 7 µH and 13 µH. Possible

inductors are shown in Table 1.

Table 1. Inductor Selection

L

(µH)

COMPONENT SUPPLIER

COMPONENT CODE

SIZE

(LxWxH mm)

DCR TYP

(mΩ)

Isat

(A)

1.2 MHz

CDRH3D14

LPS4414-472ML

CDRH5D28

MSS7341

4.7

4.2

5.0

Sumida

Coilcraft

Sumida

Coilcraft

4 × 4 × 1.5

4.3 × 4.3 × 1.4

5.7 × 5.7 × 3

7.3 × 7.3 × 4.1

120

215

23

1.1

1.5

2.2

2.9

24

650 kHz

10

Sumida

CDC5D23B

CDR6D23MNNP

744778910

6 × 6 × 2.5

5 × 5 × 2.4

102

83

1.04

1.75

2.2

Würth Elektronik

Sumida

7.3 × 7.3 × 3.2

8.3 × 8.3 × 3

51

CDRH8D28

36

2.7

Rectifier Diode Selection

To achieve high efficiency a Schottky type should be used for the rectifier diode. The reverse voltage rating

should be higher than the maximum output voltage of the converter. The averaged rectified forward current Iavg,

the Schottky diode needs to be rated for, is equal to the output current I_out

I_avg= I_out

:

(1)

Usually a Schottky diode with 1 A to 1.5 A maximum average rectified forward current rating is sufficient for most

of the applications. Also, the Schottky rectifier has to be able to dissipate the power. The dissipated power is the

average rectified forward current times the diode forward voltage.

P_D= I_avg× V_forward

Typically the diode should be able to dissipate around 500mW depending on the load current and forward

voltage.

Table 2. Rectifier Diode Selection

CURRENT

V_r

V_forward/ I_avg

COMPONENT SUPPLIER

COMPONENT CODE

PACKAGE TYPE

RATING l_avg

750 mA

1 A

20 V

25 V

0.425 V/750 mA

0.39 V/1 A

0.5 V/1 A

Fairchild Semiconductor

FYV0704S

PMEG2010AEH

SS12

SOT 23

SOD 123

NXP

1 A

Vishay

SMA

1 A

0.44 V/1 A

0.5 V/1 A

MSS1P2L

BYS10-25

µ-SMP (Low Profile)

SMA

1.5 A

Submit Documentation Feedback

13

Product Folder Link(s) :TPS65146

TPS65146

SLVS869–NOVEMBER 2008 ........................................................................................................................................................................................... www.ti.com

Setting the Output Voltage

The output voltage is set by an external resistor divider. Typically, a minimum current of 50 µA flowing through

the feedback divider is enough to cover the noise fluctuation. The resistors are then calculated as

V_S

R1

æ

ç

è

ö

÷

ø

V_ref

V_S

R2 =

» 18 kΩ

R1 = R2 ´

-1

V_FB

70 μA

V_ref

R2

(2)

with V_ref= 1.240 V

Compensation (COMP)

The regulator loop can be compensated by adjusting the external components connected to the COMP pin. The

COMP pin is the output of the internal transconductance error amplifier. The compensation capacitor will adjust

the low frequency gain and the resistor value will adjust the high frequency gain. Lower output voltages require a

higher gain and therefore a lower compensation capacitor value. A good start, that will work for the majority of

the applications is C_COMP= 3.3 nF and R_COMP= 18 kΩ for a 3.3 V input.

Input Capacitor Selection

For good input voltage filtering low ESR ceramic capacitors are recommended. TPS65146 has an analog input

VIN. A 1-µF bypass is required as close as possible from VIN to GND.

One 10-µF ceramic input capacitor is sufficient for most of the applications. For better input voltage filtering this

value can be increased. Refer to Table 3 and typical applications for input capacitor recommendations.

Output Capacitor Selection

For best output voltage filtering a low ESR output capacitor is recommended. Two 10-µF ceramic output

capacitors work for most of the applications. Higher capacitor values can be used to improve the load transient

response. Refer to Table 3 for the selection of the output capacitor.

Table 3. Rectifier Input and Output Capacitor Selection

CAPACITOR

VOLTAGE

RATING

COMPONENT SUPPLIER COMPONENT CODE

COMMENTS

10 µF/0805

1 µF/0603

10 µF/1206

10 V

25 V

Taiyo Yuden

LMK212 BJ 106KD

EMK107 BJ 105KA

TMK316 BJ 106ML

Cin

VIN bypass

Cout

To calculate the output voltage ripple that following equations can be used:

V_S- V

I_OUT

IN

V_{RIPPLE_C}

=

´

V_{RIPPLE_C_ESR}= DI_L´R_{C_ESR}

V_S´ f

C

(3)

V_{RIPPLE_C_ESR}can be neglected in many cases since ceramic capacitors provides very low ESR.

14

Submit Documentation Feedback

Product Folder Link(s) :TPS65146

TPS65146

www.ti.com ........................................................................................................................................................................................... SLVS869–NOVEMBER 2008

Undervoltage Lockout (UVLO)

To avoid mis-operation of the device at low input voltages an undervoltage lockout is included that disables the

device, if the input voltage falls below 2.0 V.

Thermal shutdown

A thermal shutdown is implemented to prevent damages because of excessive heat and power dissipation.

Typically the thermal shutdown threshold for the junction temperature is 150°C. When the thermal shutdown is

triggered the device stops switching until the junction temperature falls below typically 136 °C. Then the device

starts switching again.

Overvoltage Protection

The boost converter has an integrated overvoltage protection to prevent the power switch from exceeding the

absolute maximum switch voltage rating at pin SW in case the feedback (FB) pin is floating or shorted to GND. In

such an event, the output voltage rises and is monitored with the overvoltage protection comparator over the

SUP pin. As soon as the comparator trips at typically 18 V, the boost converter turns the N-Channel MOSFET

switch off. The output voltage falls below the overvoltage threshold and the converter continues to operate. In

order to detect overvoltage, the SUP pin needs to be connected to the output voltage of the boost converter V_S.

LOW DROPOUT LINEAR REGULATOR (LDO)

The TPS65146 includes a Low Dropout Regulator providing the logic voltage to the panel. The LDO is designed

to operate typically with a 1-µF ceramic output capacitor. The LDO has an internal softstart feature to limit the

inrush current. A minimum current of 50 µA flowing through the feedback divider is usually enough to cover the

noise fluctuation. The resistors of the voltage divider are calculated as:

V_LVOUT

R3

V

Vref

æ

ö

LVOUT

R4 =

» 18 kW

R3 = R4 ´

-1

÷

ç

V_ADJ

70 μA

Vref

è

ø

R4

(4)

with V_ref= 1.240 V

Submit Documentation Feedback

15

Product Folder Link(s) :TPS65146

TPS65146

SLVS869–NOVEMBER 2008 ........................................................................................................................................................................................... www.ti.com

REGULATED POSITIVE CHARGE PUMP

The positive charge pump sets the voltage applied on the VGH input pin, up to 32 V in tripler mode configuration.

The charge pump block regulates the V_GHvoltage by adjusting the drive current I_DRVP. Typically, a minimum

current of 50 µA flowing through the feedback divider is usually enough to cover the noise fluctuation. The

resistors of the divider used to set the V_GHvoltage are calculated as:

V_GH

R10

Vref

VGH

Vref

æ

ö

R6 =

» 18 kW

R5 = R6 ´

-1

÷

ç

V_FBP

70 μA

è

ø

R11

(5)

with V_ref= 1.240 V

2 V_S

3 V_S

V_IN

V_S

SW

SUP

DRVP

Power

Transistor Boost

VGH

I_SOURCE(Q1)

Positive

Charge

Pump

Clock Boost

Converter

2

Regulator

I_SINK(Q2)

M1

M2

VGHM

RE

Gate Voltage

Shaping

(GPM)

VFLK

VDPM

FBP

Vref

AGND

PGND

Figure 20. Positive Charge Pump regulator and Gate Voltage Shaping blocks

Doubler Mode: to use the positive Charge Pump in doubler mode configuration, the Schottky diode connected

between the capacitor of DRVP pin and the 2.V_Spoint has to be connected to the 3.V_Spoint (seeFigure 20).

Tripler Mode: since VGH pin is rated to maximum 32 V, the maximum output voltage of the boost converter (V_S)

possible is then limited to 11 V.

16

Submit Documentation Feedback

Product Folder Link(s) :TPS65146

TPS65146

www.ti.com ........................................................................................................................................................................................... SLVS869–NOVEMBER 2008

POSTIVE CHARGE PUMP CURRENT CAPABILITY

The possible output current that the positive charge pump is able to deliver in doubler mode depends mainly on

the headroom (2*V_S- V_GH) and the internal voltage drop V_{drop_internal}. The graph below (Figure 21) helps defining

the headroom range that the system needs:

Positive Charge Pump Output Current

vs Internal Vdrop

70

65

Maximum I_GHpossible

60

55

P_{DISS_INTERNAL}= 200 mW

50

P_{DISS_INTERNAL}= 150 mW

45

P_{DISS_INTERNAL}= 100 mW

40

35

P_{DISS_INTERNAL}= 50 mW

30

25

20

15

10

5

0

1

2

3

4

5

6

7

8

9

10

Vdrop_internal for Positive Charge Pump - V

Figure 21.

Example:

For I_GH= 20 mA, we refer to the “maximum I_GHpossible” curve to determine the minimum headroom needed.

V_{headroom _ 20mA}= 2.V_SUP- V_GH³ V_{drop _ int_ 20mA}+ 2.V_Diode* = 0.5+ 2V = 2.5V

(6)

* in the case where V_Diode= 1 V

This means that the headroom in this example must be more than 2.5 V to be able to source 20 mA at the output

of the positive charge pump.

However, generating a too large headroom can lead to excessive power dissipation. The dashed curves show

the internal power dissipation generated by a certain internal voltage drop. In the above example, if V_{headroom_20mA}

= 7 V (with V_Diode= 1 V), V_{drop_internal_min}= 5 V and the internal power dissipation P_{DISS_INTERNAL}for the positive

charge pump would reach 100 mW. The power dissipation of the charge pump block needs to be taken into

account for the overall power dissipation rating.

NOTE:

refer to the power rating table not to exceed the overall maximum package power

dissipation allowed.

Submit Documentation Feedback

17

Product Folder Link(s) :TPS65146

TPS65146

SLVS869–NOVEMBER 2008 ........................................................................................................................................................................................... www.ti.com

EXTERNAL NEGATIVE CHARGE PUMP

The external negative charge pump works with two stages (charge pump and regulation). The charge pump

provides a negative regulated output voltage. Figure 22 shows the operation details of the negative charge

pump. With the first stage, the voltage on the collector of the bipolar transistor is slightly equal to –V_S+V_D.

The next stage regulates the output voltage V_GL. A resistor and a Zener diode are used to clamp the voltage to

the desired output value. The bipolar transistor is used to reduce the quiescent current and increase the

efficiency. The output voltage on V_GLwill be equal to V_Z–V_be.

V

D2

GL

T1

-V

BAV99

-7 V/10 mA

S

BC857B

C14

470 nF

R15

C13

470 nF

7 kW

C22

1 mF/

16 V

D8

D3

BZX84C

7V5

BAV99

V

IN

2.5 V to 6 V

D1

S

Q1

9 V/300 mA

Figure 22. Partially Regulated External Negative

Capacitors (Charge Pumps)

For best output voltage filtering a low ESR output capacitor is recommended. Ceramic capacitors have a low

ESR value but depending on the application tantalum capacitors can be used as well. For every capacitor, the

reactance value has to be calculated as followed:

1

Xc =

2 ´ p ´ f ´ C

(7)

This value should be as low as possible in order to reduce the voltage drop due to the current flowing through it.

The rated voltage of the capacitor has to be able to withstand the voltage across it. Capacitors rated at 50 V are

enough for most of the applications. Typically a 470-nF capacitance is sufficient for the flying capacitors whereas

bigger values like 1 µF can be used for the output capacitors to reduce the output voltage ripple.

CAPACITOR

100 nF/0603

470 nF/0805

1 µF/1210

COMPONENT SUPPLIER

Taiyo Yuden

COMPONENT CODE

UMK107 BJ 104KA

UMK212 BJ 474KG

UMK325 BJ 105KH

COMMENTS

Flying Cap

Taiyo Yuden

Output Cap 1

Output Cap 2

Taiyo Yuden

Diodes (Charge Pumps)

For high efficiency, one has to minimize the forward voltage drop of the diodes. Schottky diodes are

recommended. The reverse voltage rating must withstand the maximum output voltage V_Sof the boost converter.

Usually a Schottky diode with 200 mA average forward rectified current is suitable for most of the applications.

CURRENT

RATING I_avg

V_r

V_forward/ I_avg

COMPONENT

SUPPLIER

COMPONENT

CODE

PACKAGE

TYPE

200 mA

30 V

0.5V / 30mA

International Rectifier

BAT54S

SOT 23

GATE VOLTAGE SHAPING FUNCTION

Sequencing

At start-up, the VGHM output is enabled once VDPM voltage is higher than V_ref= 1.240 V. The capacitor

connected to VDPM pin sets a delay from the Power Good signal of the boost converter.

18

Submit Documentation Feedback

Product Folder Link(s) :TPS65146

TPS65146

www.ti.com ........................................................................................................................................................................................... SLVS869–NOVEMBER 2008

I_DPM´ t_DPM

20 mA ´ t_DPM

C_VDPM

=

V

1.240 V

ref

(8)

At power off, VGHM is connected to VGH as soon as V_INreaches the threshold voltage of the reset function.

Setting the Discharge Slope for Gate Voltage Shaping

VFLK = ‘high’ → VGHM discharges to 0V

VFLK = ‘low’ → VGHM = VGH

The slope at which V_GHMdischarges is set by the external resistor connected to RE, the internal MOSFET

R_DS(ON)(typ. 13Ω for M2 – see block diagram below) and by the external gate line capacitance connected to

VGHM pin.

Boost

Power Good

VFLK = “high”

VFLK

VFLK = “low”

Unknown state

Delay set

by VDPM

VGH

Slope set

by RE

VGHM

0V

Figure 23. Gate Voltage Shaping Timing

If VFLK = ’high’ and RE is connected with a resistor to ground (see Figure 23), V_GHMwill discharge from V_GHto

0V. Since 5*τ ( τ = R*C) are needed to fully discharge C though R, we can define the time-constant of the gate

voltage shaping block as follow:

τ = (RE + R_DS(ON)M2) × C_VGHM

Therefore, if the discharge of C_VGHMshould finish during V_{FLK = ‘high’}

:

V_FLK='high'

t_discharge= 5 ´ t = V_FLK='high'

Þ

RE =

-R_DS(ON)M2

5 ´ C_VGHM

(9)

VGHM

V_S

Re’

Re

M2

RE

Option 2

Re

Option 3

Figure 24. Discharge Path Options for VGHM

Options 2 and 3 from Figure 24 work like option 1 explained above. When M2 is turned on, V_GHMdischarges with

a slope set by Re from V_GHlevel down to V_Sin option 2 configuration and in option 3 configuration down to the

voltage set by the resistor divider.

Submit Documentation Feedback

19

Product Folder Link(s) :TPS65146

TPS65146

SLVS869–NOVEMBER 2008 ........................................................................................................................................................................................... www.ti.com

VCOM BUFFER

The VCOM Buffer power supply pin is the SUP pin connected to the boost converter V_S. To achieve good

performance and minimize the output noise, a 1-µF ceramic bypass capacitor is required directly from the SUP

pin to ground. The buffer is not designed to drive high capacitive loads; therefore it is recommended to connect a

series resistor at the output to provide stable operation when driving high capacitive load. With a 3.3-Ω series

resistor, a capacitive load of 10 nF can be driven, which is usually sufficient for typical LCD applications.

RESET FUNCTION

The device has an integrated reset function with an open drain output capable of sinking 1 mA. The reset

function monitors the voltage applied to its sense input VDET. As soon as the voltage on VDET falls below the

threshold voltage (V_DET) of typically 1.1 V, the reset function asserts its reset signal by pulling XAO low. Typically,

a minimum current of 50µA flowing through the feedback divider is enough to cover the noise fluctuation.

Therefore, to select R9, one has to set the input voltage limit (V_{IN_LIM}) at which the reset function will pull XAO to

low state. V_{IN_LIM}must be higher than the UVLO threshold.

V_IN

R6

V

æ

ç

è

ö

V_DET

IN_LIM

R7 =

» 18 kW

R6 = R7 ´

-1

÷

V_DET

70 μA

1.1 V

ø

R7

(10)

with V_DET= 1.1 V

When the input voltage V_INrises, once the voltage on VDET pin exceeds its threshold voltage plus hysterisis the

XAO signal will go high after the delay time set by the capacitor connected to CDET.

10 mA ´ t_DET

C_DET

=

1.240 V

(11)

The reset function is operational for V_IN≥ 1.6 V.

V

DET

V

DET_threshold_hys

V

Min. Operating

voltage

DET_threshold

1.6 V

GND

XAO

Unknown

state

Delay set by

CDET

GND

Figure 25. Voltage Detection and XAO Pin

The reset function is configured as a standard open-drain and requires a pull-up resistor. The resistor R_XAO

connected between the XAO pin and V_LVOUT(any other V_Xvoltage, greater than 2V - high logic level -, can be

used instead of V_LVOUT), should be chosen as follow:

V_X

V_X- 2 V

R_{XAO_min}

>

&

R_{XAO_max}<

1 mA

2 mA

(12)

20

Submit Documentation Feedback

Product Folder Link(s) :TPS65146

TPS65146

www.ti.com ........................................................................................................................................................................................... SLVS869–NOVEMBER 2008

Power on sequencing

Once the input voltage V_INreaches the Under Voltage Lockout (UVLO), the device is internally enabled and the

LDO starts rising. When V_LVOUTof the LDO is at its Power Good voltage, the boost converter, as well as the

Vcom buffer are enabled. As soon as V_Sof the boost converter reaches its Power Good (90% of its nominal

value), the positive charge pump block is enabled. Then the capacitor connected to VDPM is charged, setting the

gate voltage shaping block delay time, and finally enables the VGHM signal.

1. LDO

2. Boost converter & VCOM Buffer

3. VGH and VDPM (delay time to enable the gate voltage shaping function)

4. VGHM (after proper delay)

UVLO

V

DET_THRESHOLD

UVLO

VIN

Device

ENABLED

Device

DISABLED

LDO

BOOST

VCOM

VGH

VGL (external)

Vref

VDPM

VFLK

Unknown state

Delay set

by VDPM

Slope set

by RE

VGHM

Figure 26. Sequencing TPS65146

Power off sequencing and LCD discharge function

When the input voltage V_INfalls below a predefined threshold (set by V_{DET_THRESHOLD}- see Figure 26 ), XAO is

driven low and V_GHMis driven to V_GH. (Note that when V_INfalls below the UVLO threshold, all IC functions are

disabled except XAO and V_GHM). Since VGHM is connected to VGH, it tracks the output of the positive charge

pump as it decays. This feature, together with XAO can be used to discharge the panel by turning on all the pixel

TFTs and discharging them into the gradually decaying V_GHMvoltage. V_GHMis held low during power-up.

Submit Documentation Feedback

21

Product Folder Link(s) :TPS65146

TPS65146

SLVS869–NOVEMBER 2008 ........................................................................................................................................................................................... www.ti.com

APPLICATION INFORMATION

D2

BAT54S

C14

470 nF

V

GL

T1

BC857B

-7 V/10 mA

C13

470 nF

R15

7 kW

C12

1 µF/

16 V

C16

1 µF/

50V

C18

470 nF

D6

BAT54S

D8

BZX84C

7V5

D3

BAT54S

D7

BAT54S

L

10 µH

D1

PMEG2010AEH

V

V_S

IN

3.3 V

15 V/200 mA

C1

10 µF/

10 V

C4

10 µF/

25 V

C5

10 µF/

25 V

C2

1 µF/

10 V

C3

1 µF/

10 V

C6

1 µF/

25 V

R1

200 kW

FREQ

FB

Boost Converter

(V_S)

V

LVOUT

2.5 V/300 mA

LVOUT

ADJ

R2

18 kW

LDO

(V_LVOUT

)

R3

18 kW

C9

1 µF/

6.3 V

R4

18 kW

DRVP

V

LVOUT

R5

10 kW

Positive Charge

Pump Regulator

R10

330 kW

V

IN

(V_GH

)

FBP

XAO

R6

27 kW

XAO

Reset Function

(XAO)

R11

18 kW

VDET

R7

18 kW

CDET

VGH

C10

100 nF

V_S

V

VGHM

GHM

Gate Voltage

Shaping

24 V/10 mA

RE

R8

18 kW

(V_GHM

)

OPI

R12

80 kW

VFLK

V

COM

VCOM

(V_COM

R9

18 kW

)

4.5 V/100 mA

OPO

VDPM

C11

100 nF

C7

2.7 nF

C8

100 nF

R13

18 kW

Figure 27. TPS65146 Typical Application with Positive Charge Pump in Doubler Mode Configuration

22

Submit Documentation Feedback

Product Folder Link(s) :TPS65146

TPS65146

www.ti.com ........................................................................................................................................................................................... SLVS869–NOVEMBER 2008

D2

BAT54S

C14

470 nF

C15

470 nF

V

GL

C17

1 µF/

50 V

T1

BC857B

D4

BAT54S

-7 V/10 mA

D5

BAT54S

C13

470 nF

R15

7 kW

C12

1 µF/

16 V

C18

470 nF

C16

470 nF

D6

BAT54S

D8

BZX84C

7V5

D3

BAT54S

D7

BAT54S

L

10 µH

D1

PMEG2010AEH

V

V_S

IN

2.5 V to 6 V

9 V/300 mA

C1

10 µF/

10 V

C4

10 µF/

25 V

C5

10 µF/

25 V

C2

1 µF/

10 V

C3

1 µF/

10 V

C6

1 µF/

25 V

R1

113 kW

FREQ

FB

Boost Converter

(V )

V

LVOUT

S

2.5 V/300 mA

LVOUT

ADJ

R2

18 kW

LDO

(V_LVOUT

)

R3

18 kW

C9

1 µF/

6.3 V

R4

18 kW

DRVP

V

LVOUT

R5

10 kW

Positive Charge

Pump Regulator

R10

270 kW

V

IN

(V_GH

)

FBP

XAO

R6

27 kW

XAO

Reset Function

(XAO)

R11

18 kW

VDET

R7

18 kW

CDET

VGH

C10

100 nF

V_S

V

VGHM

GHM

Gate Voltage

Shaping

20 V/10 mA

RE

R8

18 kW

(V

)

GHM

OPI

R12

80 kW

VFLK

V

COM

VCOM

(V

R9

18 kW

)

COM

4.5 V/100 mA

OPO

VDPM

C11

100 nF

C7

2.7 nF

C8

100 nF

R13

18 kW

Figure 28. TPS65146 Typical Application with Positive Charge Pump in Tripler Mode Configuration

Submit Documentation Feedback

23

Product Folder Link(s) :TPS65146

PACKAGE OPTION ADDENDUM

www.ti.com

3-Dec-2008

PACKAGING INFORMATION

Orderable Device

Status ⁽¹⁾

Package Package

Pins Package Eco Plan ⁽²⁾Lead/Ball Finish MSL Peak Temp ⁽³⁾

Qty

Type

Drawing

TPS65146RGER

ACTIVE

VQFN

RGE

24

3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

⁽¹⁾The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in

a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2)

Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check

http://www.ti.com/productcontent for the latest availability information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements

for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered

at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and

package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS

compatible) as defined above.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame

retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

(3)

MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder

temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is

provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the

accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take

reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on

incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited

information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI

to Customer on an annual basis.

Addendum-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com

17-Dec-2008

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device

Package Package Pins

Type Drawing

SPQ

Reel

A0 (mm)

B0 (mm)

K0 (mm)

P1

W

Pin1

Diameter Width

(mm) W1 (mm)

(mm) (mm) Quadrant

TPS65146RGER

VQFN

RGE

24

3000

330.0

12.4

4.3

1.5

8.0

12.0

Q2

Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com

17-Dec-2008

*All dimensions are nominal

Device

Package Type Package Drawing Pins

VQFN RGE 24

SPQ

Length (mm) Width (mm) Height (mm)

346.0 346.0 29.0

TPS65146RGER

3000

Pack Materials-Page 2

IMPORTANT NOTICE

Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements,

and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should

obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are

sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.

TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard

warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where

mandated by government requirements, testing of all parameters of each product is not necessarily performed.

TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and

applications using TI components. To minimize the risks associated with customer products and applications, customers should provide

adequate design and operating safeguards.

TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right,

or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information

published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a

warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual

property of the third party, or a license from TI under the patents or other intellectual property of TI.

Reproduction of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied

by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive

business practice. TI is not responsible or liable for such altered documentation. Information of third parties may be subject to additional

restrictions.

Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all

express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not

responsible or liable for any such statements.

TI products are not authorized for use in safety-critical applications (such as life support) where a failure of the TI product would reasonably

be expected to cause severe personal injury or death, unless officers of the parties have executed an agreement specifically governing

such use. Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications, and

acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products

and any use of TI products in such safety-critical applications, notwithstanding any applications-related information or support that may be

provided by TI. Further, Buyers must fully indemnify TI and its representatives against any damages arising out of the use of TI products in

such safety-critical applications.

TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products are

specifically designated by TI as military-grade or "enhanced plastic." Only products designated by TI as military-grade meet military

specifications. Buyers acknowledge and agree that any such use of TI products which TI has not designated as military-grade is solely at

the Buyer's risk, and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use.

TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products are

designated by TI as compliant with ISO/TS 16949 requirements. Buyers acknowledge and agree that, if they use any non-designated

products in automotive applications, TI will not be responsible for any failure to meet such requirements.

Following are URLs where you can obtain information on other Texas Instruments products and application solutions:

Products

Applications

Audio

Automotive

Broadband

Digital Control

Medical

Amplifiers

Data Converters

DSP

Clocks and Timers

Interface

amplifier.ti.com

dataconverter.ti.com

dsp.ti.com

www.ti.com/clocks

interface.ti.com

logic.ti.com

www.ti.com/audio

www.ti.com/automotive

www.ti.com/broadband

www.ti.com/digitalcontrol

www.ti.com/medical

www.ti.com/military

Logic

Military

Power Mgmt

Microcontrollers

RFID

power.ti.com

microcontroller.ti.com

www.ti-rfid.com

Optical Networking

Security

Telephony

Video & Imaging

Wireless

www.ti.com/opticalnetwork

www.ti.com/security

www.ti.com/telephony

www.ti.com/video

RF/IF and ZigBee® Solutions www.ti.com/lprf

www.ti.com/wireless

Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265


型号：	TPS65146
厂家：	TEXAS INSTRUMENTS
描述：	Compact LCD Bias IC with LDO, VCOM Buffer and Reset Function 紧凑型LCD偏置IC，具有LDO ， VCOM缓冲器和复位功能 CD
文件：	总30页 (文件大小：1210K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

TPS65146 [TI]

相关型号：

TPS65146RGER

TPS65148

TPS65148RHB

TPS65148RHBR

TPS65148RHBT

TPS65149

TPS65149RSHR

TPS65150

TPS65150-Q1

TPS65150PWP

TPS65150PWPG4

TPS65150PWPR