UC17132J [TI]
Smart Power Switch;
| 型号： | UC17132J |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | Smart Power Switch 驱动 接口集成电路 |
| 文件： | 总10页 (文件大小：92K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
UC17131/2/3
UC27131/2/3
UC37131/2/3
Smart Power Switch
FEATURES
DESCRIPTION
• 300mA Continuous Output Current
The UC37131, UC37132 and UC37133 are a family of smart power
switches which can drive resistive or inductive loads from the high side or
low side.
• Low Side or High Side Switch
Configuration
The UC37132 is available in 14 pin (DIP), 16 pin (SOIC), or 20 pin (CLCC)
packages and can accommodate both low side (load to VCC) or high side
(load to GND) configurations. The UC37131 and UC37133 are exclusively
for a low side or a high side configuration respectively and both are avail-
able in an 8 pin package. Both high side and low side configurations provide
high current switching with low saturation voltages which can drive resistive
or inductive loads.
• 8V to 65V Operation
• Overload and Short Circuit Protection
• Power Interruption Protection
• +6V Regulated Voltage
• 2mA Quiescent Current
The input to the switch is driven by a low voltage signal, typically 5V. Addi-
tionally, UC37132 features adjustable hysteresis. The output of the device
can switch a load between 8V and 65V. Output current capability is 300mA
continuous or 700mA peak.
• Programmable Overcurrent and
Power Interruption Protection
• 1% to 30% Programmable Input
Comparator Hysteresis (on UC37132)
The device also has inherent smart features that allow for programmable
turn-on delay in enabling the output following startup. The same capacitor
that specifies the turn-on delay is also used to program a VCC power inter-
ruption time. If VCC drops below a threshold for a time specified by this ca-
pacitor, the output is turned off and a new turn-on delay will be re-triggered.
Similarly, if high current persists longer than the response delay, the output
driver will operate in a very low duty cycle mode to protect the IC.
• Low and High Side Internal High
Current Clamps When Driving
Inductive Loads
UC37132 BLOCK DIAGRAM
6V
VREF 11
6V/8mA
7
6
5
VCC
CSH
LS
PRE-REGULATOR
INPUT
COMPARATOR
IN 13
72V
QOUT
TURN-ON/OFF
AND
SHORT CIRCUIT
PROTECTION
4
3
2
HS
1/2
VREF
CSL
GND
12
9
10
HYST
LED
CDEL
UDG-98026
SLUS340 - APRIL 1999
UC17131/2/3
UC27131/2/3
UC37131/2/3
UC37131 BLOCK DIAGRAM
6V
VREF
3
8
7
VCC
LS
PRE-REGULATOR
6V/8mA
INPUT
COMPARATOR
IN
4
72V
HYST (FIXED) =
30%
QOUT
TURN-ON/OFF
AND
SHORT CIRCUIT
PROTECTION
1/2
VREF
6
5
CSL
GND
1
2
LED
CDEL
UDG-98059
UC37133 BLOCK DIAGRAM
6V
VREF
3
4
8
7
VCC
PRE-REGULATOR
6V/8mA
CSH
INPUT
COMPARATOR
IN
HYST (FIXED) =
30%
72V
QOUT
TURN-ON/OFF
AND
SHORT CIRCUIT
PROTECTION
6
5
HS
1/2
VREF
GND
1
2
LED
CDEL
UDG-98060
2
UC17131/2/3
UC27131/2/3
UC37131/2/3
CONNECTION DIAGRAMS
ABSOLUTE MAXIMUM RATINGS
VCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65V
LS – HS (Clamped by internal circuitry) . . . . . . . . . . . . . . . 78V
CSH, LED . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65V
Output Current
SOIC-16 (Top View)
(for UCX7132)
D Package
Continuous . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400mA
Peak . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 900mA
Remaining Pin Voltages . . . . . . . . . . . . . . . . . . . . . –0.3V to 9V
Storage Temperature . . . . . . . . . . . . . . . . . . . −65°C to +150°C
Junction Temperature. . . . . . . . . . . . . . . . . . . –55°C to +150°C
Lead Temperature (Soldering, 10 sec.) . . . . . . . . . . . . . +300°C
N/C
1
16
15
14
13
12
11
10
9
N/C
GND
CSL
HS
2
3
4
5
6
7
8
IN
HYST
VREF
CDEL
LED
N/C
Currents are positive into, negative out of the specified termi-
nal. Consult Packaging Section of Databook for thermal limita-
tions and considerations of packages.
LS
CSH
N/C
VCC
PLCC-20 (Top View)
(for UCX7132)
N/C
L Packages
N/C
LS
HS
CSH
CSL
DIL-8, SOIC-8 (Top View)
(for UCX7131)
J, N, or D Packages
3
2
1
20 19
18
N/C
VCC
N/C
N/C
N/C
4
5
6
7
8
N/C
GND
N/C
N/C
IN
17
16
15
14
LED
CDEL
VREF
IN
8
VCC
1
2
3
4
7
6
5
LS
9
10 11 12 13
N/C
HYST
VREF
CDEL
CSL
GND
LED
DIL-14 (Top View)
(for UCX7132)
J, or N Packages
DIL-8, SOIC-8 (Top View)
(for UCX7133)
J, N, or D Packages
N/C
GND
CSL
HS
14
13
12
11
10
9
N/C
1
2
3
4
5
6
7
IN
LED
CDEL
VREF
IN
8
VCC
CSH
HS
HYST
VREF
CDEL
LED
N/C
1
2
3
4
7
6
5
LS
CSH
VCC
GND
8
PRODUCT SELECTION TABLES
PART
PACKAGE
PART
TEMPERATURE
RANGE
AVAILABLE
PACKAGES
NUMBER
UCX7131
UCX7132
UCX7133
CONFIGURATIONS
Low Side Only
PIN COUNT
NUMBER
8
14, 16, 20
8
UC1713X
UC2713X
UC3713X
–55°C to +125°C
–40°C to +85°C
0°C to +70°C
J, L
D, N
D, N
Low Side or High Side
High Side Only
3
UC17131/2/3
UC27131/2/3
UC37131/2/3
ELECTRICAL CHARACTERISTICS Unless otherwise specified, CDEL = 10nF, VCC = 25V, CSL = GND, CSH = LS;
RCSH = 0.5Ω (Note 1); IN=0V (for OFF condition) and IN=5V (for ON condition); TA = TJ.
PARAMETER TEST CONDITIONS MAX UNITS
MIN
TYP
Reference
VREF
25°C
5.8
5.6
6
6.2
6.4
35
50
35
V
–55°C to 125°C
VCC = 8V to 64V
0 < IREF < 8mA
REF = 0V
6
V
Line Regulation
Load Regulation
10
10
20
mV
mV
mA
Short Circuit Current
Input Comparator
Turn-On Threshold Voltage
Input Bias Current
Hysteresis
2.7
3
3.3
5
V
µA
V
VIN = 3.5V
RHYST = GND (Internally for X31, X33)
RHYST = 96.67k for (X32)
0.775
0.9
30
1.025
mV
Output: High Side (UCX7133: CSH = LS and CSL = GND Internally; See Fig. 2a)
Rise Time (Off to On)
Fall Time (On to Off)
Output Short Circuit
Voltage Clamp
RLOAD = 250Ω to GND
RLOAD = 250Ω to GND
HS = 0.25Ω to GND
30
30
80
80
V/µs
V/µs
mA
V
500
67
900
77
LS–HS
72
Saturation Voltage
25°C, RLOAD = 100Ω to GND
–40°C, RLOAD = 100Ω to GND
–55°C, RLOAD = 100Ω to GND
1.2
1.3
1.4
5
V
V
V
Leakage Current
µA
Output: Low Side (UCX7131; CSH = VCC and CSL = HS Internally; See Fig. 2b)
Rise Time (On to Off)
Fall Time (Off to On)
Output Short Circuit
Voltage Clamp
RLOAD = 250Ω to VCC, RCSL = 0.5Ω
RLOAD = 250Ω to VCC, RCSL = 0.5Ω
LS = 0.25Ω to VCC
15
25
50
60
V/µs
V/µs
mA
V
500
67
700
72
900
77
LS–HS
Saturation Voltage
25°C, RLOAD = 100Ω to VCC, RCSL = 0.5Ω
–40°C, RLOAD = 100Ω to VCC, RCSL = 0.5Ω
–55°C, RLOAD = 100Ω to VCC, RCSL = 0.5Ω
1.2
1.3
1.4
5
V
V
V
Leakage Current
µA
VCC Fault Section
Output Turn-On Delay, tD(ON)
Output Turn-Off Delay, tD(OFF)
Step VCC from 0V to 8V (See Fig. 3a)
9.5
11
13.5
700
ms
Pulse VCC from 25V to VCC Turn-Off
Threshold
300
500
µs
VCC Turn-Off Threshold
CDEL Section
Pulse VCC Low
6.5
7
7.5
V
VCDEL_MAX
5.8
4.9
1.0
V
V
V
VFAULT_H
VFAULT_L
Overcurrent Fault Section (See Fig. 3c)
Short Circuit Turn-Off Delay, tSC
Short Circuit Recovery Time, tROFF
High Side Current Threshold, ITH-H
Low Side Current Threshold, ITH-L
Overcurrent Duty Cycle
Step ILOAD: 0mA to 400mA
ILOAD = 400mA, 100µs
RCSH = 0.5Ω
75
10
µs
ms
mA
mA
%
250
250
0.6
325
325
0.8
400
400
1.0
RCSL = 0.5Ω
RLOAD = 0.25Ω to GND
4
UC17131/2/3
UC27131/2/3
UC37131/2/3
ELECTRICAL CHARACTERISTICS Unless otherwise specified, CDEL = 10nF, VCC = 25V, CSL = GND, CSH = LS;
RCSH = 0.5Ω (Note 1); IN=0V (for OFF condition) and IN=5V (for ON condition); TA = TJ.
PARAMETER TEST CONDITIONS MAX UNITS
MIN
TYP
LED Output
SINK, tDOFF, tROFF
ILEAKAGE
Overall
I
VLED = 7V
5.0
8.0
1
11.0
5
mA
µA
Delay to Output
ICC
3
6
2.8
3
µs
Output Off
2.0
2.3
2.5
mA
mA
mA
IL = 1mA, 250mA (High Side)
IL = 1mA, 250mA (Low Side)
4
Note 1: All test conditions are for a high side configuration as in Fig. 2a, unless otherwise specified.
PIN DESCRIPTIONS
CDEL: A capacitor connected to this pin is used to pro- HS: (For UC37132 and UC37133) The output of the
gram both VCC pulse interruption time and power switching transistor in the high side configuration. The
turn-on delay. The capacitor discharge time corresponds emitter of the output transistor is the HS pin which is con-
to VCC interruption and the charge time to VCC turn-on nected to the load. For the UC37132, the HS pin must be
delay. The ratio between turn-on delay and turn-off delay tied to the CSL pin in a low side application.
will be fixed based on internal charge and discharge cur-
rents and voltage thresholds.
HYST: (For UC37132) The pin used to program the in-
put comparator hysteresis by connecting a resistor to
The same fault circuitry and capacitor is used for short
circuit and overload protection. If an overcurrent or short
circuit is detected, the capacitor starts charging and
turns off the output if the condition persists at the end of
its charge time. The output will then operate in a low-duty
cycle mode to protect the IC. After short circuit recovery,
the output will be reactivated in order to check if the short
circuit was removed. If the overcurrent persists the chip
will continue in this pulsing mode.
ground. The hysteresis defaults to 30% with HYST
grounded (internally for UC37131 and UC37133).
3000
VHYST
=
(3330 + RHYST
)
IN: The input to the comparator that detects when the
output transistor should be turned on. The input thresh-
old is 3.0V (1/2 VREF) and the input voltage range is 0V
to VREF.
CSH: (For UC37132 and UC37133) This high side cur-
rent sense pin is used to program the current limit for
high side applications by connecting a resistor between
VCC and CSH. An over load current is detected when
the voltage drop between VCC and CSH exceeds
150mV. For the UC37132, in a high side application, the
CSH pin must be tied to the LS pin; in a low side applica-
tion, the CSH pin must be tied to VCC
LED: Open collector output intended to drive an LED.
This pin is driven low whenever the output is turned off
and is externally pulled high when the output is turned on
(see Fig. 3b and 3c).
LS: (For UC37131 and UC37132) The output of the
switching transistor in the low side configuration. The col-
lector of the output transistor is the LS pin which is con-
nected to the load. For the UC37132, the LS pin must be
tied to the CSH pin in a high side application.
CSL: (For UC37131 and UC37132) This low side cur-
rent sense pin is used to program the current limit for low
side applications by connecting a resistor between CSL
and GND. An over load current is detected when the volt-
age drop between CSL and GND exceeds 150mV. For
the UC37132, in a high side application, the CSL pin
must be tied to GND; in a low side application, the CSL
pin must be tied to the HS pin.
VREF: The 6V regulated reference capable of supplying
up to 8mA. The recommended decoupling capacitor is
1nF.
VCC: The supply voltage for the chip. Decouple this pin
with a good quality ceramic capacitor to ground.
GND: The reference point for the internal reference, all
thresholds, and the return for the remainder of the de-
vice.
5
UC17131/2/3
UC27131/2/3
UC37131/2/3
DESCRIPTION OF OPERATION
Reference
current of approximately 4µA. If the power stays off lon-
ger than this time, then a power up delay will be initial-
ized once power is resumed. This delay is the time it
The UC37131/2/3 family of devices features a 6V
bandgap reference that is used to bias on-chip logic. Al-
though the 6V reference is not trimmed, this bandgap ref-
erence provides less than 200ppm/°C. It is also used to
generate the on-chip 3V input comparator threshold and
is needed for the programmable hysteresis. The on-chip
reference has 8mA maximum current sourcing capacity
that is designed to power up external circuitry.
takes for CDEL to charge from 0V to V
of 4.9V.
FAULT_H
The overcurrent fault normal operation consists of the
chip staying off until CDEL fully recharges to V of
FAULT_H
4.9V. This is t . Once CDEL reaches 4.9V, the driver
R(OFF)
will turn back on. If the overcurrent fault is still present,
the chip will operate in a very low duty cycle (approxi-
mately 0.7%) based on the discharge (driver on) and
charge time (driver off) of the CDEL capacitor. This
overcurrent timing makes the chip act "smart" by allowing
very high currents needed to drive large capacitive loads
without setting off an overcurrent fault.
Input Comparator
The input comparator is a high gain comparator with hys-
teresis that fully switches with either a small signal
(30mV, minimum for 1% hysteresis) or a logic signal (0 to
6V max). Only a 5mV overdrive of the 3V threshold is
needed to switch the driver.
The overcurrent and current limit thresholds are pro-
grammed with the resistor R
from CSH to VCC (high
CSH
The hysteresis is set to 30% on the UC37131 and
UC37133. (This is 30% of 3V equating to 0.9V of hyster-
esis.) On the UC37132 it is programmable from 1% to
30%.
side) or R
a 150mV (I
from CSL to GND (low side). For example,
CSL
• R ) threshold will set the high side
CSH
LOAD
overcurrent fault threshold. An overall short circuit protec-
tion threshold is set at 300mV. Therefore, the recom-
mended R
of 0.5Ω will result in the 600mA short
Fault Logic
CSH
circuit. By changing the R
mally set the overcurrent and short circuit current limits.
value the user can opti-
CSH
The output of the comparator is logic ANDed with the
output of the fault logic. If a fault, either a power interrupt
or an overcurrent condition, persists longer than it takes
Output Driver
for the CDEL to discharge from its V
level of
CDEL_MAX
Once the turn-on signal is gated through from the input
comparator, the output transistor is turned on. The output
drive transistor is a composite PNP, NPN structure. This
is a specially designed structure that keeps all the drive
current needed for the load to be sourced through the LS
pin. This keeps the overall power dissipation to less than
4mA independent of the load.
5.8V to its V
of 1.3V, the fault protection block will
FAULT_L
output a logic 0 to the NAND gate and turn off the output
driver. If the fault goes away prior to CDEL being dis-
charged to 1.3V, the chip will resume normal operation
without going through a turn-on delay.
The power interrupt normal operation consists of the chip
turning the driver immediately back on if the interrupt
goes away prior to CDEL reaching its lower threshold as
described above. The CDEL capacitor is chosen based
upon the maximum power interrupt time (t ) allowed
without the output experiencing a turn-on delay. This in-
The output driver also has a 72V zener diode wired be-
tween its base and collector. This allows the output to
swing and clamp to 72V above ground when discharging
an inductive load in a low side application. The inductive
zener clamp can discharge the 250mA to 400mA full
load current. This consequently allows the LS pin to
safely swing above VCC. Similarly, the 72V zener diode
will allow the HS pin to safely swing and clamp 72V be-
low LS/VCC when discharging an inductive load in a high
side application. This 72V zener diode simplifies the user
application by eliminating the need for external clamp di-
odes.
INT
terrupt time must be less than t
where t
is
D(OFF)
D(OFF)
equal to the time it takes the CDEL capacitor to dis-
charge from V (5.8V) to V (1.3V) with a
CDEL_MAX
FAULT_L
discharge current of approximately 94µA. If the power
stays off only as long as t , the minimum power up
D(OFF)
delay will be equal to the time it takes to charge CDEL
from V (1.3V) to V (4.9V) with a charge
FAULT_L
FAULT_H
6
UC17131/2/3
UC27131/2/3
UC37131/2/3
APPLICATION INFORMATION
Choosing The CDEL Capacitor
ence an indeterminate state during this interruption, but
resume normal operation when VCC power returns to
normal.
The maximum amount of time that VCC power can be in-
terrupted and not require the outputs to go through a
turn-on delay cycle is user programmable by the CDEL
capacitor value. While VCC is interrupted, the outputs
will be in an indeterminate state and they may turn off
If the VCC power is interrupted for a time equal to or lon-
ger than t
then the following relationships apply.
D(OFF)
As the CDEL capacitor discharges past the V
FAULT_L
threshold, the output is fully disabled and must cycle
through a power up delay equal to t . The charge
current for the CDEL capacitor is equal to 4µA. The out-
during this interval, t . However, as long as the pro-
grammed interruption time is not exceeded, the outputs
will immediately turn back on with the return of VCC.
INT
D(ON)
puts will turn on when the CDEL capacitor charges up to
For example:
the V
threshold of 4.9V. The minimum turn-on
FAULT_H
tINT ≈ 500µs (User specified)
delay the outputs will experience will occur if t
is ex-
INT
actly equal to the t
has only discharged to V . This would be the mini-
FAULT_L
time and the CDEL capacitor
CDEL is selected such that the time it takes for this ca-
D(OFF)
pacitor to discharge from V
(5.8V) to V
CDEL_MAX
FAULT_L
mum turn-on delay time and is calculated with the follow-
ing equation:
(1.3V) with a discharge current of 94µA is just greater
than this t . This time is referred to as t
in Fig.
INT
D(OFF)
3b.
CDEL • VFAULT _L −VFAULT _H
tD ON
=
(
)
min
IDISCHARGE • tD
ICHARGE
OFF
(
)
CDEL =
VCDEL_MAX −VFAULT _L
Using the 10nF CDEL capacitor, for example, the mini-
mum turn-on delay calculates to 9ms. If the CDEL ca-
pacitor discharges completely to zero, then the 10nF
CDEL capacitor would cause a turn-on delay of 12.25ms.
The outputs would be off for this amount of time after
VCC power is restored. The total amount of time the out-
If t
is set equal to t , which the user has selected
D(OFF)
INT
to be 500µs, the minimum CDEL capacitor is calculated:
94µA • 500µs
CDEL =
5.8V − 1.3V
puts could be disabled is equal to the t
may include the indeterminate time of t
time, which
INT
For this application, the CDEL capacitor value calculates
to 10.4nF. By using a 10nF capacitor on CDEL, VCC can
be interrupted for up to 478µs and the outputs will experi-
, and the
D(OFF)
t
time, as shown in Fig. 3b.
D(ON)
VREF
VCC
7
6V
11
+ L
PRE-REGULATOR
ICC
RCSH
CREF
CSH
6
POWER
SUPPLY
LS
5
INPUT
COMPARATOR
IN 13
VREF
GND
72V
CCC
QOUT
HS
4
OUT
1/2
TURN-ON/OFF
AND SHORT
CIRCUIT
VREF
LOAD
CSL
3
PROTECTION
GND
2
– L
IGND
12
9
LED
10
HYST
CDEL
CCDEL
R HYST
UDG-98027
Figure 2a. High side application.
7
UC17131/2/3
UC27131/2/3
UC37131/2/3
APPLICATION INFORMATION (cont.)
VREF
VCC
ICC
6V
11
7
+ L
PRE-REGULATOR
CREF
CSH
LS
LOAD
CCC
6
5
OUT
INPUT
COMPARATOR
IN 13
72V
POWER
SUPPLY
VREF
GND
QOUT
HS
4
3
TURN-ON/OFF
AND SHORT
CIRCUIT
CSL
1/2
VREF
PROTECTION
RCSL
GND
2
– L
IGND
12
9
10
CDEL
HYST
LED
CCDEL
RHYST
UDG-98028
Figure 2b. Low side application.
tINT
VCC
t
t
VCDEL_MAX = 5.8V
VFAULT_H = 4.9V
VCDEL
VFAULT_H
tD(ON)
OUTPUT
DRIVER
DISABLED
ENABLED
ENABLED
t
INDETERMINATE
STATE
UDG-98029
Figure 3a. Power interrupt ignore operation, high side configuration, V = 5VDC.
IN
8
UC17131/2/3
UC27131/2/3
UC37131/2/3
APPLICATION INFORMATION (cont.)
tINT
VCC
t
t
VCDEL_MAX = 5.8V
VFAULT_H = 4.9V
VFAULT_L = 1.0V
VCDEL
VFAULT_H
tD(OFF)
tD(ON)
tD(ON)
OUTPUT
DRIVER
DISABLED
DISABLED
ENABLED
ENABLED
t
LED
t
INDETERMINATE
STATE
UDG-98030
Figure 3b. Power interrupt fault operation, high side configuration, V = 5VDC.
IN
I
LOAD
t
4.9V
V
CDEL
t
t
tSC
OUTPUT
DRIVER
tR(OFF)
LED
t
UDG-98031
Figure 3c. Overcurrent fault operation.
UNITRODE CORPORATION
7 CONTINENTAL BOULEVARD • MERRIMACK, NH 03054
TEL (603) 424-2410 • FAX (603) 424-3460
9
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Copyright 1999, Texas Instruments Incorporated
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