UC1842A [TI]
CURRENT-MODE PWM CONTROLLER; 电流模式PWM控制器
| 型号： | UC1842A |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | CURRENT-MODE PWM CONTROLLER |
| 文件： | 总11页 (文件大小：427K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
UC1842A-EP, UC1843A-EP, UC1844A-EP, UC1845A-EP
CURRENT-MODE PWM CONTROLLER
SGLS134B – SEPTEMBER 2002 – REVISED APRIL 2003
D
Controlled Baseline
– One Assembly/Test Site, One Fabrication
Site
D
D
D
D
D
D
D
D
D
Automatic Feed Forward Compensation
Pulse-by-Pulse Current Limiting
Enhanced Load Response Characteristics
Under-Voltage Lockout With Hysteresis
Double Pulse Suppression
D
D
D
D
D
Extended Temperature Performance of
–55°C to 125°C
Enhanced Diminishing Manufacturing
Sources (DMS) Support
High Current Totem Pole Output
Internally Trimmed Bandgap Reference
500 kHz Operation
Enhanced Product Change Notification
†
Qualification Pedigree
Low R Error Amp
O
Optimized for Off-line and DC to DC
Converters
D PACKAGE
(TOP VIEW)
D
Low Start Up Current (<0.5 mA)
D
Trimmed Oscillator Discharge Current
†
Component qualification in accordance with JEDEC and industry
standards to ensure reliable operation over an extended
temperature range. This includes, but is not limited to, Highly
Accelerated Stress Test (HAST) or biased 85/85, temperature
cycle, autoclave or unbiased HAST, electromigration, bond
intermetallic life, and mold compound life. Such qualification
testing should not be viewed as justifying use of this component
beyond specified performance and environmental limits.
COMP
V
V
1
2
3
4
8
7
6
5
REF
CC
V
FB
I
OUTPUT
GND
SENSE
R /C
T
T
description
The UC1842A/3A/4A/5A family of control ICs is a pin for pin compatible improved version of the UC3842/3/4/5
family. Providing the necessary features to control current mode switched mode power supplies, this family has
the following improved features. Start up current is guaranteed to be less than 0.5 mA. Oscillator discharge is
trimmed to 8.3 mA. During under voltage lockout, the output stage can sink at least 10 mA at less than 1.2 V
for V
over 5 V.
CC
The difference between members of this family are shown in the table below.
PART NUMBER
UC1842A
UVLO ON
16 V
UVLO OFF
10 V
MAXIMUM DUTY CYCLE
<100%
<100%
<50%
UC1843A
8.5 V
7.9 V
UC1844A
16 V
10 V
UC1845A
8.5 V
7.9 V
<50%
‡
ORDERING INFORMATION
ORDERABLE
TOP-SIDE
MARKING
‡
PACKAGE
T
A
PART NUMBER
UC1842AMDREP
UC1843AMDREP
UC1844AMDREP
UC1845AMDREP
–55°C to 125°C
–55°C to 125°C
–55°C to 125°C
–55°C to 125°C
SOP – D
SOP – D
SOP – D
SOP – D
Tape and reel
Tape and reel
Tape and reel
Tape and reel
1842AME
1843AME
1844AME
1845AME
‡
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2002 – 2003, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
UC1842A-EP, UC1843A-EP, UC1844A-EP, UC1845A-EP
CURRENT-MODE PWM CONTROLLER
SGLS134B – SEPTEMBER 2002 – REVISED APRIL 2003
block diagram
NOTES: 1. A = DIL-8 Pin Number. B = SO-14 Pin Number.
2. Toggle flip flop used only in 1844A and 1845A.
Ordering Information
184
4
M
UC
A
D
R
EP
ENHANCED PLASTIC INDICATOR
TAPE and REEL INDICATOR
PACKAGE
D
= Plastic SOIC
MILITARY TEMPERATURE RANGE INDICATOR
IMPROVED PERFORMANCE INDICATOR
PRODUCT OPTION
2 through 5
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
UC1842A-EP, UC1843A-EP, UC1844A-EP, UC1845A-EP
CURRENT-MODE PWM CONTROLLER
SGLS134B – SEPTEMBER 2002 – REVISED APRIL 2003
†‡
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
V
V
voltage (low impedance source) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 V
CC
CC
voltage (I
mA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . self limiting
CC
Output current, I
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±1 A
O
Output energy (capacitive load) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 µJ
Analog Inputs (pins 3, 5) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 6.3 V
Error Amp Output Sink current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 mA
Power Dissipation at T < +25_C (D package) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 W
A
Package thermal impedance, θ (see Note 1): D (8-pin) package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97°C/W
JA
Storage temperature range, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65_C to 150_C
stg
Lead temperature soldering 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . 260_C
†
‡
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
Unless otherwise indicated, voltages are reference to ground and currents are positive into and negative out of the specified terminals.
NOTE 1: Long term high–temperature storage and/or extended use at maximum recommended operating conditions may result in a reduction
of overall device life. See http://www.ti.com/ep_quality for additional information on enhanced plastic packaging.
electrical characteristics, T = –55_C to 125_C for the UC184xAM-EP, V
= 15 V (see Note 1),
A
CC
R = 10 kΩ, C = 3.3 nF, and T = T (unless otherwise stated)
T
T
A
J
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Reference Section
Output voltage
4.95
5.0
5.05
20
V
T
= 25_C,
I
O
= 1 mA
J
Line regulation voltage
Load regulation voltage
Temperature stability
Total output variation voltage
V
= 12 V to 25 V
6
6
mV
mV
IN
I
O
= 1 mA to 20 mA
25
See Notes 2 and 3
Line, Load, Temp.
0.2
0.4 mV/_C
5.1
4.9
V
f = 10 Hz to 10 kHz,
See Note 2
Output noise voltage
T
T
= 25_C
50
µV
J
Long term stability
Output short-circuit current
Oscillator Section
Initial accuracy
1000 hours,
See Note 2
= 125_C
5
25
mV
mA
A
–30
–100
–180
See Note 4
T
J
= 25_C
47
52
0.2
5
57
1
kHz
%
Voltage stability
V
= 12 V to 25 V
CC
= MIN to MAX, See Note 2
Temperature stability
Amplitude peak-to-peak
T
A
%
V pin 7,
See Note 2
1.7
8.3
V
T
T
= 25_C
7.8
7.5
8.8
8.8
J
Discharge current
V pin 7 = 2 V,
See Note 5
mA
= Full range
J
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
UC1842A-EP, UC1843A-EP, UC1844A-EP, UC1845A-EP
CURRENT-MODE PWM CONTROLLER
SGLS134B – SEPTEMBER 2002 – REVISED APRIL 2003
electrical characteristics, T = –55_C to 125_C for the UC184xAM-EP, V
= 15 V (see Note 1),
A
CC
R = 10 kΩ, C = 3.3 nF, and T = T (unless otherwise stated)
T
T
A
J
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Error Amplifier Section
Input voltage
COMP = 2.5 V
2.45
2.5
2.55
V
µA
dB
MHz
dB
mA
mA
V
Input bias current
Open loop voltage gain (A
Unity gain bandwidth
PSRR
–0.3
90
1
–1
V
O
= 2 V to 4 V
65
0.7
60
VOL)
See Note 2
= 12 V to 25 V
T
= 25_C
J
V
CC
70
6
Output sink current
Output source current
FB = 2.7 V,
FB = 2.3 V,
FB = 2.3 V,
FB = 2.7 V,
COMP = 1.1 V
COMP = 5 V
2
–0.5
5
–0.8
6
V
V
high
low
R
R
= 15 kΩ to GND
OUT
L
L
= 15 kΩ to V
0.7
1.1
V
OUT
REF
Current Sense Section
Gain
See Notes 6 and 7
COMP = 5 V,
2.85
0.9
3
1
3.15
1.1
V/V
V
Maximum input signal
PSRR
See Note 6
V
CC
= 12 V to 25 V,See Note 6
70
–2
150
dB
µA
ns
Input bias current
Delay to output
Output Section (OUT)
–10
I
= 0 V to 2 V,
See Note 2
300
SENSE
I
I
I
I
= 20 mA
0.1
15
0.4
2.2
OUT
OUT
OUT
OUT
Low-level output voltage
High-level output voltage
V
V
= 200 mA
= –20 mA
13
12
13.5
13.5
50
= –200 mA
Rise time
C
C
= 1 nF,
See Note 2
See Note 2
= 10 mA
T
T
= 25_C
= 25_C
150
150
1.2
ns
ns
V
L
J
Fall time
= 1 nF,
50
L
J
UVLO saturation
V
= 5 V,
I
0.7
CC
OUT
Undervoltage Lockout Section
UC1842A,
UC1844A
15
7.8
9
16
8.4
10
17
9
Start threshold
V
V
UC1843A,
UC1845A
UC1842A,
UC1844A
11
8.2
Minimum operation voltage after turn on
UC1843A,
UC1845A
7
7.6
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
UC1842A-EP, UC1843A-EP, UC1844A-EP, UC1845A-EP
CURRENT-MODE PWM CONTROLLER
SGLS134B – SEPTEMBER 2002 – REVISED APRIL 2003
electrical characteristics, T = –55_C to 125_C for the UC184xAM-EP, V
= 15 V (see Note 1),
A
CC
R = 10 kΩ, C = 3.3 nF, and T = T (unless otherwise stated)
T
T
A
J
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
PWM Section
UC1842A, UC1843A
UC1844A, UC1845A
94
96
100
Maximum duty cycle
%
%
47
48
50
0
Minimum duty cycle
Total Standby Current
Start-up current
0.3
11
0.5
17
mA
mA
V
Operating supply current
FB = 0 V,
SENSE = 0 V
V
internal zener voltage
I
= 25 mA
30
34
CC
NOTES: 1. Adjust V
CC
above the start threshold before setting at 15 V.
CC
2. Not production tested.
3. Temperature stability, sometimes referred to as average temperature coefficient, is described by the equation:
. V (max) and V (min) are the maximum and minimum reference voltage
V
(max) – V
(min)
(max) – T (min)
REF
REF
REF
REF
Temp Stability =
T
J
J
measured over the appropriate temperature range. Note that the extremes in voltage do not necessarily occur at the extremes in
temperature.
4. Output frequency equals oscillator frequency for the UC1842A and UC1843A. Output frequency is one half oscillator frequency for
the UC1844A and UC1845A.
5. This parameter is measured with R = 10 kΩ to V
. This contributes approximately 300 µA of current to the measurement. The
T
REF
total current flowing into the R
T/C
pin will be approximately 300 µA higher than the measured value.
6. Parameter measured at trip point of latch with V
at 0 V.
v 0.8 V.
FB
7. Gain is defined by:
; 0 v V
DV
SENSE
COMP
DV
SENSE
A =
PARAMETER MEASUREMENT INFORMATION
Error Amp can source and sink up to 0.5 mA, and sink up to 2 mA.
Figure 1. Error Amp Configuration
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
UC1842A-EP, UC1843A-EP, UC1844A-EP, UC1845A-EP
CURRENT-MODE PWM CONTROLLER
SGLS134B – SEPTEMBER 2002 – REVISED APRIL 2003
PARAMETER MEASUREMENT INFORMATION
During UVLO, the Output is low.
Figure 2. Under Voltage Lockout
Peak Current (Is) is Determined By The Formula:
1.0V
RS
IsmaxȀ
A small RC filter may be required to supress switch transients.
Figure 3. Current Sense Circuit
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
UC1842A-EP, UC1843A-EP, UC1844A-EP, UC1845A-EP
CURRENT-MODE PWM CONTROLLER
SGLS134B – SEPTEMBER 2002 – REVISED APRIL 2003
PARAMETER MEASUREMENT INFORMATION
Error Amplifier Open-Loop Frequency Response
Output Saturation Characteristics
Figure 5
Figure 4
APPLICATION INFORMATION
Oscillator Frequency vs Timing Resistance
Maximum Duty Cycle vs Timing Resistor
Figure 6. Oscillator
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
UC1842A-EP, UC1843A-EP, UC1844A-EP, UC1845A-EP
CURRENT-MODE PWM CONTROLLER
SGLS134B – SEPTEMBER 2002 – REVISED APRIL 2003
APPLICATION INFORMATION
High peak currents associated with capacitive loads necessitate careful grounding techniques. Timing and bypass capacitors should be
connected close to pin 5 in a single point ground. The transistor and 5k potentiometer are used to sample the oscillator waveform and apply an
adjustable ramp to pin 3.
Figure 7. Open-Loop Laboratory Text Fixture
A fraction of the oscillator ramp can be resistively summed
with the current sense signal to provide slope compensation
for converters requiring duty cycles over 50%.
Note that capacitor, C, forms a filter with R2 to suppress the
leading edge switch spikes.
Figure 8. Slope Complression
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
UC1842A-EP, UC1843A-EP, UC1844A-EP, UC1845A-EP
CURRENT-MODE PWM CONTROLLER
SGLS134B – SEPTEMBER 2002 – REVISED APRIL 2003
APPLICATION INFORMATION
Power Supply Specifications
1. Input Voltage
2. Line Isolation
95VAC to 130VAC (50Hz/60Hz)
3750V
3. Switching Frequency 40 kHz
4. Efficiency, Full Load
5. Output Voltage:
70%
A. +5V, ±5%; 1A to 4A Load
B. +12V, ±3%; 0.1A to 0.3A Load Ripple voltage: 100 mV P-P Max
C. –12V, ±3%; 0.1A to 0.3A Load Ripple voltage: 100 mV P-P Max
Figure 9. Off-Line Flyback Regulator
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
UC1842A-EP, UC1843A-EP, UC1844A-EP, UC1845A-EP
CURRENT-MODE PWM CONTROLLER
SGLS134B – SEPTEMBER 2002 – REVISED APRIL 2003
MECHANICAL DATA
D (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
8 PINS SHOWN
0.020 (0,51)
0.050 (1,27)
0.010 (0,25)
0.014 (0,35)
8
5
0.244 (6,20)
0.228 (5,80)
0.008 (0,20) NOM
0.157 (4,00)
0.150 (3,81)
Gage Plane
1
4
0.010 (0,25)
0°– 8°
A
0.044 (1,12)
0.016 (0,40)
Seating Plane
0.010 (0,25)
0.069 (1,75) MAX
0.004 (0,10)
0.004 (0,10)
PINS **
8
14
16
DIM
A MAX
0.197
(5,00)
0.344
(8,75)
0.394
(10,00)
0.189
(4,80)
0.337
(8,55)
0.386
(9,80)
A MIN
4040047/E 09/01
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15).
D. Falls within JEDEC MS-012
10
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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enhancements, improvements, and other changes to its products and services at any time and to discontinue
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deems necessary to support this warranty. Except where mandated by government requirements, testing of all
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Copyright 2003, Texas Instruments Incorporated
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