UC2524J [TI]
ADVANCED REGULATING PULSE WIDTH MODULATORS; 高级稳压脉宽调制器型号: | UC2524J |
厂家: | TEXAS INSTRUMENTS |
描述: | ADVANCED REGULATING PULSE WIDTH MODULATORS |
文件: | 总18页 (文件大小:802K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
UC1524
UC2524
UC3524
www.ti.com
SLUS180E–NOVEMBER 1999–REVISED OCTOBER 2005
ADVANCED REGULATING PULSE WIDTH MODULATORS
FEATURES
DESCRIPTION
•
Complete PWM Power Control Circuitry
The UC1524, UC2524 and UC3524 incorporate on a
single monolithic chip all the functions required for the
construction of regulating power supplies, inverters or
switching regulators. They can also be used as the
control element for high-power-output applications.
The UC1524 family was designed for switching
regulators of either polarity, transformer-coupled
dc-to-dc converters, transformerless voltage doublers
and polarity converter applications employing fixed-
frequency, pulse-width modulation techniques. The
dual alternating outputs allow either single-ended or
push-pull applications. Each device includes an
on-chip reference, error amplifier, programmable
oscillator, pulse-steering flip-flop, two uncommitted
•
Uncommitted Outputs for Single-Ended or
Push-Pull Applications
•
•
Low Standby Current . . . 8 mA Typical
Interchangeable With SG1524, SG2524 and
SG3524, Respectively
output transistors,
a high-gain comparator, and
current-limiting and shut-down circuitry. The UC1524
is characterized for operation over the full military
temperature range of –55°C to 125°C. The UC2524
and UC3524 are designed for operation from –25°C
to 85°C and 0°C to 70°C, respectively.
BLOCK DIAGRAM
V
OSC OUT
REF
16
3
+5V TO ALL
INTERNAL
V
15
IN
REFERENCE
C
12
A
+5V
Q
R
6
T
R
Q
OSC
C
E
A
7
11
T
(RAMP)
C
13
B
+5V
+5V
INV INPUT
1
COMPARATOR
–
E A
2
NI INPUT
+
E
14
B
GROUND
8
–SENSE
5
10k
C L
1k
+SENSE
4
9
10
SHUTDOWN
COMPENSATION
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1999–2005, Texas Instruments Incorporated
UC1524
UC2524
UC3524
www.ti.com
SLUS180E–NOVEMBER 1999–REVISED OCTOBER 2005
CONNECTION DIAGRAM
S/D
COMP
V
E
C
C
E
V
IN
B
B
A
A
REF
16
15
14
13
12
11
10
9
REFERENCE
REGULATOR
S/D
CURRENT
AMP
ERROR
AMP
OSCILLATOR
1
2
3
4
5
6
7
8
GND
CL
NON INV
INPUT
INV INPUT
CL
OSC OUT
R
C
T
T
SENSE(+)
SENSE (–-)
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)
UNIT
VCC
Supply voltage(1)(2)
40 V
100 mA
Collector output current
Reference output current
Current through CT terminalg
50 mA
–50 mA
TA = 25°C(3)
TC = 25°C(3)
1000 mW
Power dissipation
2000 mW
Operating junction temperature range
Storage temperature range
–55°C to 150°C
–65°C to +150°C
(1) All voltage values are with respect to the ground terminal, pin 8.
(2) The reference regulator may be bypassed for operation from a fixed 5 V supply by connecting the VCC and reference output pins both to
the supply voltage. In this configuration the maximum supply voltage is 6 V.
(3) Consult packaging section of data book for thermal limitations and considerations of package.
RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range (unless otherwise noted)
MIN
8
NOM
MAX
40
UNIT
V
VCC
Supply voltage
Reference output current
Current through CT terminal
Timing resistor
0
20
mA
mA
kΩ
–0.03
1.8
–2
RT
CT
100
0.1
125
85
Timing capacitor
0.001
–55
–25
0
µF
UC1524
Operating ambient temperature range UC2524
UC3524
°C
70
2
UC1524
UC2524
UC3524
www.ti.com
SLUS180E–NOVEMBER 1999–REVISED OCTOBER 2005
ELECTRICAL CHARACTERISTICS
these specifications apply for TA = –55°C to 125°C for the UC1524, –25°C to 85°C for the UC2524, and 0°C to 70°C for the
UC3524, VIN = 20 V, and f = 20 kHz, TA = TJ, over operating free-air temperature range (unless otherwise noted)
UC1524/UC2524
UC3524
TYP
PARAMETER
TEST CONDITIONS
UNIT
MIN
TYP
MAX
MIN
MAX
REFERENCE SECTION
Output voltage
4.8
5.0
10
5.2
20
50
4.6
5.0
10
5.4
30
50
V
Line regulation
VIN = 8 V to 40 V
mV
mV
dB
Load regulation
IL = 0 mA to 20 mA
20
20
Ripple rejection
f = 120 Hz, TJ = 25°C
66
66
Short circuit current limit
Temperature stability
Long term stability
OSCILLATOR SECTION
Maximum frequency
Initial accuracy
VREF = 0, TJ = 25°C
100
0.3%
20
100
0.3%
20
mA
Over operating temperature range
TJ = 125°C, t = 1000 Hrs
1%
1%
mV
CT = 1 nF, RT = 2 kΩ
300
5%
300
5%
kHz
RT and CT constant
Voltage stability
VIN = 8 V to 40 V, TJ = 25°C
Over operating temperature range
Pin 3, TJ = 25°C
1%
5%
1%
5%
Temperature stability
Output amplitude
3.5
0.5
3.5
0.5
V
Output pulse width
ERROR AMPLIFIER SECTION
Input offset voltage
Input bias current
CT = 0.01 mfd, TJ = 25°C
µs
VCM = 2.5 V
VCM = 2.5 V
0.5
2
5
2
2
10
10
mV
µA
dB
V
10
Open loop voltage gain
Common mode voltage
Common mode rejection ratio
Small signal bandwidth
Output voltage
72
80
60
80
TJ = 25°C
1.8
3.4
1.8
3.4
TJ = 25°C
70
3
70
3
dB
MHz
V
AV = 0 dB, TJ = 25°C
TJ = 25°C
0.5
0%
3.8
0.5
0%
3.8
COMPARATOR SECTION
Duty-cycle
% Each output on
Zero duty-cycle
45%
45%
1
3.5
1
1
3.5
1
Input threshold
V
Maximum duty-cycle
Input bias current
µA
CURRENT LIMITING SECTION
Sense voltage
Pin 9 = 2 V with error amplifier set for
maximum out, TJ = 25°C
190
200
0.2
210
180
–1
200
0.2
220
1
mV
Sense voltage T.C.
mV/°C
TJ = –55°C to 85°C for the –1 V to 1 V limit
TJ = 25°C
–1
1
1
Common mode voltage
V
–0.3
OUTPUT SECTION (EACH OUTPUT)
Collector-emitter voltage
40
17
40
17
V
µ A
V
Collector leakage current
Saturation voltage
Emitter output voltage
Rise Time
VCE = 40 V
0.1
1
50
2
0.1
1
50
2
IC = 50 mA
VIN = 20 V
18
0.2
0.1
8
18
0.2
0.1
8
V
RC = 2 kΩ, TJ = 25°C
RC = 2 kΩ, TJ = 25°C
VIN = 40 V
µs
µs
mA
Fall Time
Total standby current (Note)
10
10
3
UC1524
UC2524
UC3524
www.ti.com
SLUS180E–NOVEMBER 1999–REVISED OCTOBER 2005
PRINCIPLES OF OPERATION
flip-flop, which is synchronously toggled by the
oscillator output. The oscillator output pulse also
serves as a blanking pulse to assure both outputs are
never on simultaneously during the transition times.
The width of the blanking pulse is controlled by the
valve of CT. The outputs may be applied in a
push-pull configuration in which their frequency is half
that of the base oscillator Note that for buck regulator
topologies, the two outputs can be wire-ORed for an
effective 0-90% duty cycle range. With this
connection, the output frequency is the same as the
oscillator frequency. The output of the error amplifier
shares a common input to the comparator with the
current limiting and shutdown circuitry and can be
overridden by signals from either of these inputs. This
common point is also available externally and may be
employed to control the gain of, or to compensate,
the error amplifier or to provide additional control to
the regulator.
The UC1524 is a fixed-frequency pulse-width-modu-
lation voltage regulator control circuit. The regulator
operates at a frequency that is programmed by one
timing resistor (RT), and one timing capacitor (CT), RT
establishes a constant charging current for CT. This
results in a linear voltage ramp at CT, which is fed to
the comparator providing linear control of the output
pulse width by the error amplifier. The UC1524
contains an on-board 5 V regulator that serves as a
reference as well as powering the UC1524’s internal
control circuitry and is also useful in supplying
external support functions. This reference voltage is
lowered externally by a resistor divider to provide a
reference within the common-mode range of the error
amplifier or an external reference may be used. The
power supply output is sensed by a second resistor
divider network to generate a feedback signal to the
error amplifier. The amplifier output voltage is then
compared to the linear voltage ramp at CT. The
resulting modulated pulse out of the high-gain
comparator is then steered to the appropriate output
pass transistor (Q1 or Q2) by the pulse-steering
4
UC1524
UC2524
UC3524
www.ti.com
SLUS180E–NOVEMBER 1999–REVISED OCTOBER 2005
TYPICAL CHARACTERISTICS
OPEN-LOOP VOLTRAGE AMPLIFICATION
OSCILLATOR FREQUENCY
vs
TIMING COMPONENTS
OF ERROR AMPLIFIER
vs
FREQUENCY
90
1 M
100 k
10 k
C
T
= 0.001 mF
R
=
V
IN
= 20 V
F
V
= 20 V
IN
80
T = 25 C
J
T
= 25 C
J
R
= 1M
F
mF
= 0.003
C
T
70
60
50
40
30
mF
= 0.01
C
T
R
= 300 k
F
R
= 100 k
F
R
= 30 k
F
20
mF
= 0.003
C
T
1 k
R
F
is Resistance From
10
Pin 9 to Ground
0
mF
= 0.1
C
NOTE: Value of R Below 30 kW
F
T
Will Began to Limit Maximum Duty-Cycle
−10
100
100
1 k 10 k 100 k 1 M
10 M
1
2
5
10
20
50
100
f − Frequency − Hz
R − Timing Resistor − kW
T
Figure 1.
Figure 2.
OUTPUT DEAD TIME
vs
TIMING CAPACITANCE VALUE
OUTPUT SATURATION VOLTAGE
vs
LOAD CURRENT
10
4
V
IN
= 20 V
V
CC
= 20 V
T
J
= 25 C
3.5
4
3
2.5
T
= 125 C
J
1
2
T
= 25 C
J
1.5
T
= −55 C
J
0.4
1
0.5
NOTE: Dead Time = Blanking Pulse Width
Plus Outplay Delay
0.1
0
0.001
0.004 0.01
0.04
0.1
0
20
40
60
80
100
C
− Capacitance −
F
Load Current − mA
T
Figure 3.
Figure 4.
5
UC1524
UC2524
UC3524
www.ti.com
SLUS180E–NOVEMBER 1999–REVISED OCTOBER 2005
APPLICATION INFORMATION
OSCILLATOR
SYNCHRONOUS OPERATIONS
The oscillator controls the frequency of the UC1524
and is programmed by RT and CT according to the
approximate formula:
When an external clock is desired, a clock pulse of
approximately 3 V can be applied directly to the
oscillator output terminal. The impedance to ground
at this point is approximately
2 kΩ. In this
1.18
f
configuration RT CT must be selected for a clock
period slightly greater than that of the external clock.
R C
T T
(1)
where
If two or more UC1524 regulators are to operated
synchronously, all oscillator output terminals should
be tied together, all CT terminals connected to single
timing capacitor, and the timing resistor connected to
a single RT, terminal.
RT is in kΩ
CT is in µF
f is in kHz
Practical values of CT fall between 1 nF and 100 nF.
Practical values of RT fall between 1.8 kΩ and 100
kΩ. This results in a frequency range typically from
120 Hz to 500 kHz.
16
REF
1N916
5 k
COMP
9
BLANKING
GND
8
The output pulse of the oscillator is used as a
blanking pulse at the output. This pulse width is
controlled by the value of CT. If small values of CT are
required for frequency control, the oscillator output
pulse width may still be increased by applying a shunt
capacitance of up to 100 pF from pin 3 to ground. If
still greater dead-time is required, it should be
accomplished by limiting the maximum duty cycle by
clamping the output of the error amplifier. This can
easily be done with the circuit in Figure 5.
Figure 5. Error Amplifier Clamp
The other RT terminals can be left open or shorted to
VREF. Minimum lead lengths should be used between
the CT terminals.
V+
+28 V
+5V, 5A
5 k
PIC600
R2
5 k
15
1
12
5 k
mF
500
11
2
5 k
mF
0.1
13
16
1.5 k
UC1524
3 k
6
14
4
7
mF
0.02
3
5
9
10
mF
0.001
50 k
9
V−
0.1
Figure 6. Single-Ended LC Switching Regulator Circuit
6
UC1524
UC2524
UC3524
www.ti.com
SLUS180E–NOVEMBER 1999–REVISED OCTOBER 2005
V+
+28 V
15
VIN
UC1524
5 k
1 k
1 W
5 k
1
12
1 k
1 W
INV INPUT
CA
5 V
5 k
5 A
11
2
NON INV INPUT
EA
2N4150
+
5 k
20T
5T
mF
0.1
100
mF
1500
16
13
14
4
CB
VREF
100
20T
5T
2 k
6
RT
EB
2N4150
mF
0.1
7
CT
CLSENSE(+)
CLSENSE(−)
COMP
0.1 k
3
5
OSC OUT
0.001
mF
9
10
SD
mF
500
GND
50 k
8
Figure 7. Push-Pull Transformer Coupled Circuit
2 k
1 W
2 k
I
S
1 W
V
IN
15
12
OUTPUT
UC1524
13
11
4
Osc. OUT
3
V
REF
16
8
6
7
2
1
9
10
4
5
CURRENT
N.I.
INPUT
INV.
SHUT
RAMP
COMP
INPUT
Down
LIMET
V
IN
8-40 V
2 k
10 k
1 k
2 k
10 k
0.1
C1
1 k
R1
Figure 8. Open Loop Test Circuit
7
PACKAGE OPTION ADDENDUM
www.ti.com
23-Apr-2013
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
Top-Side Markings
Samples
Drawing
Qty
(1)
(2)
(3)
(4)
UC1524J
UC1524J/80937
UC1524J883B
UC2524DW
OBSOLETE
OBSOLETE
OBSOLETE
ACTIVE
CDIP
CDIP
CDIP
SOIC
J
J
16
16
16
16
TBD
TBD
TBD
Call TI
Call TI
Call TI
Call TI
-55 to 125
-55 to 125
-55 to 125
-25 to 85
J
Call TI
Call TI
DW
40
40
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
UC2524DW
UC2524DWG4
ACTIVE
SOIC
DW
16
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-25 to 85
UC2524DW
UC2524J
UC2524N
OBSOLETE
ACTIVE
CDIP
PDIP
J
16
16
TBD
Call TI
Call TI
-25 to 85
-25 to 85
N
25
25
Green (RoHS
& no Sb/Br)
CU NIPDAU
N / A for Pkg Type
UC2524N
UC2524N
UC2524NG4
ACTIVE
PDIP
N
16
Green (RoHS
& no Sb/Br)
CU NIPDAU
N / A for Pkg Type
-25 to 85
UC3524-W
UC3524D
ACTIVE WAFERSALE
YS
D
0
TBD
Call TI
Call TI
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
16
40
40
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
UC3524D
UC3524DG4
UC3524DW
D
16
16
16
16
16
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
UC3524D
DW
DW
DW
DW
40
Green (RoHS
& no Sb/Br)
UC3524DW
UC3524DW
UC3524DW
UC3524DW
UC3524DWG4
UC3524DWTR
UC3524DWTRG4
40
Green (RoHS
& no Sb/Br)
2000
2000
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
UC3524J
UC3524N
OBSOLETE
ACTIVE
CDIP
PDIP
J
16
16
TBD
Call TI
Call TI
0 to 70
0 to 70
N
25
25
Green (RoHS
& no Sb/Br)
CU NIPDAU
N / A for Pkg Type
UC3524N
UC3524N
UC3524NG4
ACTIVE
PDIP
N
16
Green (RoHS
& no Sb/Br)
CU NIPDAU
N / A for Pkg Type
0 to 70
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
23-Apr-2013
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a
continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF UC1524, UC3524 :
Catalog: UC3524
•
Military: UC1524
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
Military - QML certified for Military and Defense Applications
•
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
UC3524DWTR
SOIC
DW
16
2000
330.0
16.4
10.75 10.7
2.7
12.0
16.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SOIC DW 16
SPQ
Length (mm) Width (mm) Height (mm)
367.0 367.0 38.0
UC3524DWTR
2000
Pack Materials-Page 2
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