UC5603NTR [TI]

IC SCSI BUS TERMINATOR, Bus Terminator;
UC5603NTR
型号: UC5603NTR
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

IC SCSI BUS TERMINATOR, Bus Terminator

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UC5603  
9-Line SCSI Active Terminator  
FEATURES  
DESCRIPTION  
Complies with SCSI, SCSI-2 and  
SPI-2 Standards  
The UC5603 provides 9 lines of active termination for a SCSI (Small Comput-  
ers Systems Interface) parallel bus. The SCSI standard recommends active  
termination at both ends of the cable segment.  
6pF Channel Capacitance during  
Disconnect  
The UC5603 provides a disconnect feature which, when opened or driven  
high, will disconnect all terminating resistors, and disables the regulator;  
greatly reducing standby power. The output channels remain high impedance  
even without Termpwr applied. A low channel capacitance of 6pF allows units  
at interim points of the bus to have little to no effect on the signal integrity.  
100µA Supply Current in  
Disconnect Mode  
Meets SCSI Hot Plugging  
Functionally the UC5603 is similar to its predecessor, the UC5601 - 18 line  
Active Terminator. Several electrical enhancements were incorporated in the  
UC5603, such as a sink/source regulator output stage to accommodate all  
signal lines at +5V, while the regulator remains at its nominal value, reduced  
channel capacitance to 6pF typical, and as with the UC5601, custom power  
packages are utilized to allow normal operation at full power conditions (1.2  
watts).  
-400mA Sourcing Current for  
Termination  
+400mA Sinking Current for  
Active Negation Drivers  
Logic Command Disconnects all  
Termination Lines  
Trimmed Termination Current to  
3%  
Internal circuit trimming is utilized, first to trim the impedance to a 3% toler-  
ance, and then most importantly, to trim the output current to a 3% tolerance,  
as close to the max SCSI spec as possible, which maximizes noise margin in  
fast SCSI operation.  
Trimmed Impedance to 3%  
Negative Clamping on all Signal  
Lines  
Other features include negative clamping on all signal lines to protect exter-  
nal circuitry from latch-up, thermal shutdown and current limit.  
Current Limit and Thermal  
Shutdown Protection  
This device is offered in low thermal resistance versions of the industry stand-  
ard 16 pin narrow body SOIC, 16 pin ZIP (zig-zag in line package) and 24 pin  
TSSOP.  
BLOCK DIAGRAM  
UDG-94049  
Circuit Design Patented  
3/97  
UC5603  
ABSOLUTE MAXIMUM RATINGS  
Termpwr Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7V  
Signal Line Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0V to +7V  
Regulator Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5A  
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to +150°C  
Operating Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55°C to +150°C  
Lead Temperature (Soldering, 10 Sec.) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +300°C  
Unless otherwise specified all voltages are with respect to Ground. Currents are posi-  
tive into, negative out of the specified terminal.  
Consult Packaging Section of Unitrode Integrated Circuits databook for thermal limita-  
tions and considerations of packages.  
RECOMMENDED OPERATING CONDITIONS  
Termpwr Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.8V to 5.25V  
Signal Line Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0V to +5V  
Disconnect Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0V to Termpwr  
CONNECTION DIAGRAMS  
DIL-16 (Top View)  
N or J Package  
TSSOP-24 (Top View)  
PWP Package  
* PWP package pin 5 serves as signal ground; pins 6, 7, 8, 9,  
17, 18, 19, and 20 serve as heatsink/ground.  
ZIP-16 (Top View)  
Z Package  
SOIC-16 (Top View)  
DP Package  
* DP package pin 5 serves as signal ground; pins 4, 12, 13  
serve as heatsink/ground.  
Note: Drawings are not to scale.  
2
UC5603  
ELECTRICAL CHARACTERISTICS Unless otherwise stated, these specifications apply for TA= 0°C to 70°C.  
TRMPWR = 4.75V DISCNCT = 0V. TA = TJ.  
PARAMETER  
Supply Current Section  
Termpwr Supply Current  
TEST CONDITIONS  
MIN  
TYP  
MAX UNITS  
All termination lines = Open  
12  
18  
mA  
mA  
µA  
All termination lines = 0.5V  
DISCNCT = Open  
200  
100  
220  
150  
Power Down Mode  
Output Section (Terminator Lines)  
Terminator Impedance  
Output High Voltage  
ILINE = -5mA to -15mA  
VTRMPWR = 4V (Note 1)  
VLINE = 0.5V  
107  
2.7  
110  
2.9  
113 Ohms  
V
Max Output Current  
TJ = 25°C  
0°C < TJ < 70°C -20.5 -21.9 -22.4  
TJ = 25°C -20.3 -21.9 -22.4  
0°C < TJ < 70°C -19.8 -21.9 -22.4  
VLINE = 0.2V, TRMPWR = 4.0V to 5.25V 0°C < TJ < 70°C –22.0 –24.0 –25.4  
-21.1 -21.9 -22.4  
mA  
mA  
mA  
mA  
mA  
V
Max Output Current  
VLINE = 0.5V, TRMPWR = 4V (Note 1)  
Output Clamp Level  
Output Leakage  
ILINE = -30mA  
-0.2  
-0.05  
10  
0.1  
400  
100  
400  
TRMPWR = 0V to 5.25V VLINE = 0 to 4V  
REG = 0V  
nA  
µA  
nA  
VLINE = 5.25V  
DISCNCT = 4V  
TRMPWR = 0V to 5.25V, REG = Open  
VLINE = 0V to 5.25V  
10  
6
Output Capacitance  
Regulator Section  
DISCNCT = Open (Note 2) (DP Package)  
8
pF  
Regulator Output Voltage  
Regulator Output Voltage  
Line Regulation  
2.8  
2.8  
2.9  
2.9  
10  
3
3
V
V
All Termination Lines = 5V  
TRMPWR = 4V to 6V  
IREG = +100mA to -100mA  
All Termination Lines = 0.5V  
VREG = 0V  
20  
50  
1
mV  
mV  
V
Load Regulation  
20  
Drop Out Voltage  
0.7  
-400  
400  
170  
10  
Short Circuit Current  
Sinking Current Capability  
Thermal Shutdown  
-200  
200  
-600  
600  
mA  
mA  
°C  
°C  
VREG = 3.5V  
Thermal Shutdown Hysteresis  
Disconnect Section  
Disconnect Threshold  
Threshold Hysteresis  
1.3  
1.5  
1.7  
V
100  
160  
250  
mV  
Note 1: Measuring each termination line while other 8 are low (0.5V).  
Note 2: Guaranteed by design. Not 100% tested in production.  
3
UC5603  
APPLICATION INFORMATION  
UDG-94050  
Figure 1: Typical Wide SCSI Bus Configurations Utilizing 1 UC5601 and 1 UC5603 Device  
UDG-94051  
Figure 2: Typical Wide SCSI Bus Configurations Utilizing 3 UC5603 Devices.  
UNITRODE CORPORATION  
7 CONTINENTAL BLVD. MERRIMACK, NH 03054  
TEL. (603) 424-2410 FAX (603) 424-3460  
4
IMPORTANT NOTICE  
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue  
any product or service without notice, and advise customers to obtain the latest version of relevant information  
to verify, before placing orders, that information being relied on is current and complete. All products are sold  
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those  
pertaining to warranty, patent infringement, and limitation of liability.  
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in  
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent  
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily  
performed, except those mandated by government requirements.  
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF  
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL  
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR  
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER  
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO  
BE FULLY AT THE CUSTOMER’S RISK.  
In order to minimize risks associated with the customer’s applications, adequate design and operating  
safeguards must be provided by the customer to minimize inherent or procedural hazards.  
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent  
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other  
intellectual property right of TI covering or relating to any combination, machine, or process in which such  
semiconductor products or services might be or are used. TI’s publication of information regarding any third  
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.  
Copyright 1999, Texas Instruments Incorporated  

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