UCC1889N [TI]
IC,SMPS CONTROLLER,VOLTAGE-MODE,BICMOS,DIP,8PIN,PLASTIC;
| 型号： | UCC1889N |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | IC,SMPS CONTROLLER,VOLTAGE-MODE,BICMOS,DIP,8PIN,PLASTIC 信息通信管理 光电二极管 |
| 文件： | 总7页 (文件大小：411K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
UCC1889
UCC2889
UCC3889
Off-line Power Supply Controller
DESCRIPTION
FEATURES
•
Transformerless Off-line
Applications
The UCC1889 controller is optimized for use as an off-line, low power, low voltage,
regulated bias supply. The unique circuit topology utilized in this device can be
visualized as two cascaded flyback converters, each operating in the discontinu-
ous mode, and both driven from a single external power switch. The significant
benefit of this approach is the ability to achieve voltage conversion ratios of 400V
to 12V with no transformer and low internal losses.
•
•
•
•
Ideal Primary-side Bias Supply
Efficient BiCMOS Design
Wide Input Range
The control algorithm utilized by the UCC1889 is to force the switch on time to be
inversely proportional to the input line voltage while the switch off time is made in-
versely proportional to the output voltage. This action is automatically controlled by
an internal feedback loop and reference. The cascaded configuration allows a volt-
age conversion from 400V to 12V to be achieved with a switch duty cycle greater
than 10%. This topology also offers inherent short circuit protection since as the
output voltage falls to zero, the switch off time approaches infinity.
Fixed or Adjustable
Low Voltage Output
•
•
•
Uses Low Cost SMD Inductors
Short Circuit Protected
Optional Isolation Capability
The output voltage can be easily set to 12V or 18V. Moreover, it can be pro-
grammed for other output voltages less than 18V with a few additional compo-
nents. An isolated version can be achieved with this topology as described further
in Unitrode Application Note U-149.
OPERATION
With reference to the application diagram below, when input voltage is first applied,
the RON current into TON is directed to VCC where it charges the external capacitor,
C3, connected to VCC. As voltage builds on VCC, an internal undervoltage lockout
holds the circuit off and the output at DRIVE low until VCC reaches 8.4V. At this
time, DRIVE goes high turning on the power switch, Q1, and redirecting the current
into TON to the timing capacitor, CT. CT charges to a fixed threshold with a current
ICHG=0.8 • (VIN - 4.5V)/RON. Since DRIVE will only be high for as long as CT
charges, the power switch on time will be inversely proportional to line voltage.
This provides a constant line voltage-switch on time product.
TYPICAL APPLICATION
UDG-93060-1
Note: This device incorporates patented technology used under license from Lambda Electronics, Inc.
SLUS158A - FEBRUARY 1995 - REVISED FEBRUARY 2003
UCC1889
UCC2889
UCC3889
OPERATION (cont.)
At the end of the on time, Q1 is turned off and the RON
current into TON is again diverted to VCC. Thus the cur-
rent through RON, which charges CT during the on time,
contributes to supplying control power during the off time.
IDCHG = (VOUT - 0.7V) / ROFF
As VOUT increases, IDCHG increases resulting in the
reduction of off time. The frequency of operation in-
creases and VOUT rises quickly to its regulated value.
The power switch off time is controlled by the discharge
of CT which, in turn, is programmed by the regulated out-
put voltage. The relationship between CT discharge cur-
rent, IDCHG, and output voltage is illustrated as follows:
3. In this region, a transconductance amplifier reduces
IDCHG in order to maintain VOUT in regulation.
4. If VOUT should rise above its regulation range, IDCHG
falls to zero and the circuit returns to the minimum fre-
quency established by RS and CT.
The range of switching frequencies is established by
RON, ROFF, RS, and CT as follows:
Frequency = 1/(TON + TOFF)
TON = RON • CT • 4.6 V/(VIN - 4.5V)
TOFF (max) = 1.4 • RS • CT
Regions 1 and 4
TOFF = ROFF • CT • 3.7V /(VOUT - 0.7V)
Region 2, excluding the effects of RS
which have a minimal impact on TOFF.
1. When VOUT = 0, the off time is infinite. This feature
provides inherent short circuit protection. However, to
ensure output voltage startup when the output is not a
short, a high value resistor, RS, is placed in parallel
with CT to establish a minimum switching frequency.
The above equations assume that VCC equals 9V. The
voltage at TON increases from approximately 2.5V to
6.5V while CT is charging. To take this into account, VIN
is adjusted by 4.5V in the calculation of TON. The voltage
at TOFF is approximately 0.7V.
2. As VOUT rises above approximately 0.7V to its regu-
lated value, IDCHG is defined by ROFF, and therefore is
equal to:
DESIGN EXAMPLE
The UCC3889 regulates a 12 volt, 1 Watt nonisolated DC output from AC inputs between 80 and 265 volts. In this ex-
ample, the IC is programmed to deliver a maximum on time gate drive pulse width of 2.4 microseconds which occurs
at 80 VAC. The corresponding switching frequency is approximately 100kHz at low line, and overall efficiency is ap-
proximately 50%. Additional design information is available in Unitrode Application Note U-149.
UDG-93062-3
2
UCC1889
UCC2889
UCC3889
ABSOLUTE MAXIMUM RATINGS
CONNECTION DIAGRAM
ICC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA
Current into TON Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5mA
Voltage on VOUT Pin. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20V
Current into TOFF Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . 250µA
Storage Temperature . . . . . . . . . . . . . . . . . . . . -65°C to +150°C
Note: Unless otherwise indicated, voltages are referenced to
ground and currents are positive into, negative out of, the speci-
fied terminals.
DIL-8, SOIC-8 (Top View)
N or J, D Package
Unless otherwise stated, these specifications hold for TA = 0°C to 70°C for the
UCC3889, -40°C to +85°C for the UCC2889, and -55°C to +125°C for the UCC1889.
No load at DRIVE pin (CLOAD=0).
ELECTRICAL CHARACTERISTICS
PARAMETER
General
TEST CONDITIONS
MIN
TYP
MAX UNITS
VCC Zener Voltage
Startup Current
ICC < 1.5mA
VOUT = 0
8.6
9.0
150
1.2
9.3
250
2.5
V
µA
mA
Operating Current I(VOUT)
Under-Voltage-Lockout
Start Threshold
VOUT = 11V, F = 150kHz
VOUT = 0
VOUT = 0
VOUT = 0
8.0
6.0
1.8
8.4
6.3
8.8
6.6
V
V
V
Minimum Operating Voltage after Start
Hysteresis
Oscillator
Amplitude
VCC = 9V
3.5
3.7
100
50
3.9
200
100
V
CT to DRIVE high Propagation Delay
CT to DRIVE low Propagation Delay
Driver
Overdrive = 0.2V
Overdrive = 0.2V
ns
ns
VOL
I = 20mA, VCC = 9V
I = 100mA, VCC = 9V
I = −20mA, VCC = 9V
I = −100mA, VCC = 9V
CLOAD = 1nF
0.15
0.7
8.8
7.8
35
0.4
1.8
V
V
VOH
8.5
6.1
V
V
Rise Time
70
60
ns
ns
Fall Time
CLOAD = 1nF
30
Line Voltage Detection
Charge Coefficient: ICHG / I(TON)
Minimum Line Voltage for Fault
Minimum Current I(TON) for Fault
On Time During Fault
VCT = 3V, DRIVE = High, I(TON) = 1mA
RON = 330k
0.73
60
0.79
80
0.85
100
V
RON = 330k
220
2
µA
µs
ms
CT = 150pF, VLINE = Min − 1V
Oscillator Restart Delay after Fault
VOUT Error Amp
0.5
VOUT Regulated 12V (ADJ Open)
VOUT Regulated 18V (ADJ = 0V)
Discharge Ratio: IDCHG / I(TOFF)
Voltage at TOFF
VCC = 9V, IDCHG = I(TOFF)/2
VCC = 9V, IDCHG = I(TOFF)/2
I(TOFF) = 50µA
11.2
16.5
0.93
0.6
11.9 12.8
17.5 19.5
V
V
1.00
0.95
1.0
1.07
1.3
I(TOFF) = 50µA
V
Regulation gm (Note 1)
Max IDCHG = 50µA
mA/V
mA/V
Max IDCHG = 125µA
0.8
1.7
2.9
Note 1: gm is defined as ∆IDCHG for the values of VOUT when VOUT is in regulation. The two points used to calculate gm are for
∆VOUT
IDCHG at 65% and 35% of its maximum value.
3
UCC1889
UCC2889
UCC3889
PIN DESCRIPTIONS
ADJ: The ADJ pin is used to provide a 12V or an 18V resistor connected between VOUT and TOFF.
regulated supply without additional external components.
TON (line voltage control): TON serves three functions.
When CT is discharging (off time), the current through
TON is routed to VCC. When CT is charging (on time), the
current through TON is split 80% to set the CT charge
time and 20% to sense minimum line voltage which oc-
curs for a TON current of 220µA. For a minimum line volt-
age of 80V, RON is 330kΩ.
To select the 12V option, ADJ pin is left open. To select
the 18V option, ADJ pin must be grounded. For other out-
put voltages less than 18V, a resistor divider between
VOUT, ADJ and GND is needed. Note, however, that for
output voltages less than VCC, the device needs addi-
tional bootstrapping to VCC from an external source such
as the line voltage. If so, precautions must be taken to
ensure that total ICC does not exceed 5mA.
The CT voltage slightly affects the value of the charge
current during the on time. During this time, the voltage at
the TON pin increases from approximately 2.5V to 6.5V.
CT (timing capacitor): The signal voltage across CT has
a peak-to-peak swing of 3.7V for 9V VCC. As the voltage
on CT crosses the oscillator upper threshold, DRIVE goes
low. As the voltage on CT crosses the oscillator lower
threshold, DRIVE goes high.
VCC (chip supply voltage): The supply voltage of the
device at pin VCC is internally clamped at 9V. Normally,
VCC is not directly powered from an external voltage
source such as the line voltage. In the event that VCC is
directly connected to a voltage source for additional boot-
strapping, precautions must be taken to ensure that total
ICC does not exceed 5mA.
DRIVE: This output is a CMOS stage capable of sinking
200mA peak and sourcing 150mA peak. The output volt-
age swing is 0 to VCC.
GND (chip ground): All voltages are measured with re-
spect to GND.
VOUT (regulated output): The VOUT pin is directly con-
nected to the power supply output voltage. When VOUT is
greater than VCC, VOUT bootstraps VCC.
TOFF (regulated output control): TOFF sets the dis-
charge current of the timing capacitor through an external
BLOCK DIAGRAM
UDG-93064-2
4
UCC1889
UCC2889
UCC3889
TYPICAL WAVEFORMS
5
UCC1889
UCC2889
UCC3889
UNITRODE INTEGRATED CIRCUITS
7 CONTINENTAL BLVD. • MERRIMACK, NH 03054
TEL. 603-424-2410 • FAX 603-424-3460
6
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