V62/03601-01XE [TI]

16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS; 具有三态输出的16位总线收发器
V62/03601-01XE
型号: V62/03601-01XE
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
具有三态输出的16位总线收发器

总线收发器 输出元件
文件: 总14页 (文件大小:655K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
SN74ACT16245Q-EP  
16-BIT BUS TRANSCEIVER  
WITH 3-STATE OUTPUTS  
SCAS677A – MAY 2002 – REVISED JULY 2002  
DL PACKAGE  
(TOP VIEW)  
Controlled Baseline  
– One Assembly/Test Site, One Fabrication  
Site  
1DIR  
1B1  
1B2  
GND  
1B3  
1B4  
1
2
3
4
5
6
7
8
9
48 1G  
Extended Temperature Performance of  
–40°C to 125°C  
47 1A1  
46 1A2  
45 GND  
44 1A3  
43 1A4  
Enhanced Diminishing Manufacturing  
Sources (DMS) Support  
Enhanced Product Change Notification  
V
42  
V
Qualification Pedigree  
CC  
CC  
1B5  
1B6  
41 1A5  
40 1A6  
39 GND  
38 1A7  
37 1A8  
36 2A1  
35 2A2  
34 GND  
33 2A3  
32 2A4  
Member of the Texas Instruments  
Widebus Family  
GND 10  
1B7 11  
1B8 12  
2B1 13  
2B2 14  
GND 15  
2B3 16  
2B4 17  
Inputs Are TTL-Voltage Compatible  
3-State Outputs Drive Bus Lines Directly  
Flow-Through Architecture Optimizes PCB  
Layout  
Distributed V  
High-Speed Switching Noise  
and GND Pins Minimize  
CC  
Component qualification in accordance with JEDEC and industry  
standards to ensure reliable operation over an extended  
temperature range. This includes, but is not limited to, highly  
accelerated stress test (HAST) or biased 85/85, temperature  
cycle, autoclave or unbiased HAST, electromigration, bond  
intermetallic life, and mold compound life.  
V
18  
31  
V
CC  
CC  
2B5 19  
2B6 20  
GND 21  
2B7 22  
2B8 23  
2DIR 24  
30 2A5  
29 2A6  
28 GND  
27 2A7  
26 2A8  
25 2G  
description  
The SN74ACT16245Q-EP is a 16-bit bus  
transceiver organized as dual-octal noninverting  
3-state transceivers and designed for  
asynchronous two-way communication between  
data buses. The control-function implementation  
minimizes external timing requirements.  
The device allows data transmission from the A bus to the B bus or from the B bus to the A bus, depending on  
the logic level at the direction-control (DIR) input. The enable (G) input can be used to disable the devices so  
that the buses are effectively isolated.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
T
A
PACKAGE  
–40°C to 125°C  
SSOP – DL Tape and reel  
SN74ACT16245QDLREP  
ACT16245QEP  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus is a trademark of Texas Instruments.  
Copyright 2002, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN74ACT16245Q-EP  
16-BIT BUS TRANSCEIVER  
WITH 3-STATE OUTPUTS  
SCAS677A MAY 2002 REVISED JULY 2002  
FUNCTION TABLE  
(each section)  
CONTROL  
INPUTS  
OPERATION  
G
DIR  
L
L
L
B data to A bus  
A data to B bus  
Isolation  
H
H
X
logic diagram (positive logic)  
1
24  
1DIR  
2DIR  
48  
2
25  
13  
2G  
1G  
47  
36  
1A1  
2A1  
1B1  
2B1  
To Seven Other Transceivers  
To Seven Other Transceivers  
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)  
Supply voltage range, V  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V  
CC  
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to V  
+ 0.5 V  
+ 0.5 V  
I
CC  
CC  
Output voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to V  
O
Input clamp current, I (V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA  
IK  
I
I
CC  
Output clamp current, I  
(V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±24 mA  
OK  
O O CC  
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±24 mA  
Continuous current through V  
Maximum power dissipation at T = 55°C (in still air) (see Note 2): DL package . . . . . . . . . . . . . . . . . . . 1.2 W  
Storage temperature range, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C  
O
O
CC  
CC  
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±260 mA  
A
stg  
Stresses beyond those listed under absolute maximum ratingsmay cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditionsis not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.  
2. The maximum package power dissipation is calculated using a junction temperature of 150°C and a board trace length of 750 mils.  
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN74ACT16245Q-EP  
16-BIT BUS TRANSCEIVER  
WITH 3-STATE OUTPUTS  
SCAS677A MAY 2002 REVISED JULY 2002  
recommended operating conditions (see Note 3)  
MIN  
4.5  
2
MAX  
UNIT  
V
V
V
V
V
V
Supply voltage (see Note 4)  
High-level input voltage  
Low-level input voltage  
Input voltage  
5.5  
CC  
IH  
IL  
V
0.8  
V
0
0
V
V
V
I
CC  
Output voltage  
V
O
CC  
I
I
High-level output current  
Low-level output current  
Input transition rise or fall rate  
Operating free-air temperature  
16  
16  
mA  
mA  
ns/V  
°C  
OH  
OL  
t/v  
0
10  
T
40  
125  
A
NOTES: 3. Unused inputs should be tied to V  
through a pullup resistor of approximately 5 k or greater to keep them from floating. Refer  
to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.  
CC  
4. All V  
and GND pins must be connected to the proper-voltage power supply.  
CC  
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN74ACT16245Q-EP  
16-BIT BUS TRANSCEIVER  
WITH 3-STATE OUTPUTS  
SCAS677A MAY 2002 REVISED JULY 2002  
electrical characteristics over recommended operating free-air temperature range (unless  
otherwise noted)  
T
A
= 25°C  
PARAMETER  
TEST CONDITIONS  
V
MIN  
MAX  
UNIT  
CC  
MIN  
4.4  
TYP  
MAX  
4.5 V  
5.5 V  
4.5 V  
5.5 V  
5.5 V  
4.5 V  
5.5 V  
4.5 V  
5.5 V  
5.5 V  
5.5 V  
5.5 V  
5.5 V  
5.5 V  
5 V  
4.4  
5.4  
I
= 50 A  
OH  
5.4  
V
3.94  
4.94  
3.94  
4.94  
3.85  
V
OH  
I
I
I
= 16 mA  
= 24 mA  
OH  
OH  
OL  
0.1  
0.1  
0.1  
0.1  
0.5  
0.5  
0.5  
±1  
= 50  
A
V
0.36  
0.36  
V
OL  
I
I
= 16 mA  
= 24 mA  
OL  
OL  
I
I
I
Control inputs  
A or B ports  
V = V  
or GND  
±0.1  
±0.5  
8
A
A
I
I
CC  
V
= V  
or GND  
±10  
160  
1
OZ  
CC  
O
CC  
V = V  
or GND,  
I
O
= 0  
A
I
CC  
One input at 3.4 V, Other inputs at GND or V  
CC  
0.9  
mA  
pF  
pF  
I  
CC  
C
C
Control inputs  
A or B ports  
V = V  
or GND  
4.5  
16  
i
I
CC  
= V or GND  
CC  
V
5 V  
io  
O
§
Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms.  
For I/O ports, the parameter I includes the input leakage current I .  
This is the increase in supply current for each input that is at one of the specified TTL-voltage levels rather than 0 V or V  
OZ  
I
.
CC  
switching characteristics over recommended ranges of supply voltage and operating free-air  
temperature (unless otherwise noted) (see Figure 1)  
T
A
= 25°C  
TYP  
6.9  
FROM  
(INPUT)  
TO  
(OUTPUT)  
PARAMETER  
MIN  
MAX  
UNIT  
ns  
MIN  
3.2  
2.6  
2.7  
3.4  
5.8  
5.5  
MAX  
9.3  
t
t
t
t
t
t
3.2  
2.6  
2.7  
3.4  
5.8  
5.5  
11.5  
11.1  
10.9  
12.6  
13.4  
12.7  
PLH  
PHL  
PZH  
PZL  
PHZ  
PLZ  
A or B  
B or A  
B or A  
B or A  
6.4  
9.2  
6.4  
9.1  
ns  
G
G
7.4  
10.5  
11.6  
10.8  
9.2  
ns  
8.5  
operating characteristics, V  
= 5 V, T = 25°C  
A
CC  
PARAMETER  
TEST CONDITIONS  
= 50 pF, f = 1 MHz  
L
TYP  
52  
UNIT  
Outputs enabled  
Outputs disabled  
C
Power dissipation capacitance per transceiver  
C
pF  
pd  
10  
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN74ACT16245Q-EP  
16-BIT BUS TRANSCEIVER  
WITH 3-STATE OUTPUTS  
SCAS677A MAY 2002 REVISED JULY 2002  
PARAMETER MEASUREMENT INFORMATION  
2 × V  
CC  
Open  
GND  
TEST  
S1  
S1  
500 Ω  
t
/t  
Open  
PLH PHL  
/t  
From Output  
Under Test  
t
2 × V  
CC  
GND  
PLZ PZL  
t
/t  
PHZ PZH  
C
= 50 pF  
L
500 Ω  
(see Note A)  
LOAD CIRCUIT  
Output  
Control  
(low-level  
enabling)  
3 V  
0 V  
1.5 V  
1.5 V  
t
t
PLZ  
PZL  
3 V  
0 V  
Output  
Waveform 1  
V  
CC  
1.5 V  
1.5 V  
Input  
50% V  
CC  
20% V  
S1 at 2 × V  
(see Note B)  
CC  
CC  
V
OL  
t
t
PHL  
PLH  
t
t
PHZ  
PZH  
Output  
Waveform 2  
S1 at GND  
V
OH  
V
OH  
80% V  
CC  
50% V  
50% V  
Output  
CC  
CC  
50% V  
CC  
V
OL  
0 V  
(see Note B)  
VOLTAGE WAVEFORMS  
VOLTAGE WAVEFORMS  
NOTES: A.  
C
includes probe and jig capacitance.  
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.  
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.  
C. All input pulses are supplied by generators having the following characteristics: PRR 1 MHz, Z = 50 , t = 3 ns, t = 3 ns.  
O
r
f
D. The outputs are measured one at a time with one input transition per measurement.  
Figure 1. Load Circuit and Voltage Waveforms  
5
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
PACKAGE OPTION ADDENDUM  
www.ti.com  
5-Feb-2007  
PACKAGING INFORMATION  
Orderable Device  
SN74ACT16245QDLREP  
V62/03601-01XE  
Status (1)  
ACTIVE  
ACTIVE  
Package Package  
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)  
Qty  
Type  
Drawing  
SSOP  
DL  
48  
1000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SSOP  
DL  
48  
1000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in  
a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2)  
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check  
http://www.ti.com/productcontent for the latest availability information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements  
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered  
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and  
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS  
compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame  
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)  
(3)  
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder  
temperature.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is  
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the  
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take  
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on  
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited  
information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI  
to Customer on an annual basis.  
Addendum-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
5-Aug-2008  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0 (mm)  
B0 (mm)  
K0 (mm)  
P1  
W
Pin1  
Diameter Width  
(mm) W1 (mm)  
(mm) (mm) Quadrant  
SN74ACT16245QDLREP SSOP  
DL  
48  
1000  
330.0  
32.4  
11.35  
16.2  
3.1  
16.0  
32.0  
Q1  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
5-Aug-2008  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SSOP DL 48  
SPQ  
Length (mm) Width (mm) Height (mm)  
346.0 346.0 49.0  
SN74ACT16245QDLREP  
1000  
Pack Materials-Page 2  
MECHANICAL DATA  
MSSO001C – JANUARY 1995 – REVISED DECEMBER 2001  
DL (R-PDSO-G**)  
PLASTIC SMALL-OUTLINE PACKAGE  
48 PINS SHOWN  
0.025 (0,635)  
48  
0.0135 (0,343)  
0.008 (0,203)  
0.005 (0,13)  
M
25  
0.010 (0,25)  
0.005 (0,13)  
0.299 (7,59)  
0.291 (7,39)  
0.420 (10,67)  
0.395 (10,03)  
Gage Plane  
0.010 (0,25)  
0°ā8°  
1
24  
0.040 (1,02)  
0.020 (0,51)  
A
Seating Plane  
0.004 (0,10)  
0.008 (0,20) MIN  
PINS **  
0.110 (2,79) MAX  
28  
48  
0.630  
56  
DIM  
0.380  
(9,65)  
0.730  
A MAX  
A MIN  
(16,00) (18,54)  
0.370  
(9,40)  
0.620  
0.720  
(15,75) (18,29)  
4040048/E 12/01  
NOTES: A. All linear dimensions are in inches (millimeters).  
B. This drawing is subject to change without notice.  
C. Body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15).  
D. Falls within JEDEC MO-118  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
PACKAGE OPTION ADDENDUM  
www.ti.com  
16-Aug-2010  
PACKAGING INFORMATION  
Status (1)  
Eco Plan (2)  
MSL Peak Temp (3)  
Samples  
Orderable Device  
Package Type Package  
Drawing  
Pins  
Package Qty  
Lead/  
Ball Finish  
(Requires Login)  
74ACT16245QDLREPG4  
SN74ACT16245QDLREP  
V62/03601-01XE  
ACTIVE  
ACTIVE  
ACTIVE  
SSOP  
SSOP  
SSOP  
DL  
DL  
DL  
48  
48  
48  
1000  
1000  
1000  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU Level-1-260C-UNLIM  
Contact TI Distributor  
or Sales Office  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
Contact TI Distributor  
or Sales Office  
Green (RoHS  
& no Sb/Br)  
Contact TI Distributor  
or Sales Office  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability  
information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that  
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between  
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight  
in homogeneous material)  
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
Addendum-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
14-Jul-2012  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
SN74ACT16245QDLREP SSOP  
DL  
48  
1000  
330.0  
32.4  
11.35 16.2  
3.1  
16.0  
32.0  
Q1  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
14-Jul-2012  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SSOP DL 48  
SPQ  
Length (mm) Width (mm) Height (mm)  
367.0 367.0 55.0  
SN74ACT16245QDLREP  
1000  
Pack Materials-Page 2  
MECHANICAL DATA  
MSSO001C – JANUARY 1995 – REVISED DECEMBER 2001  
DL (R-PDSO-G**)  
PLASTIC SMALL-OUTLINE PACKAGE  
48 PINS SHOWN  
0.025 (0,635)  
48  
0.0135 (0,343)  
0.008 (0,203)  
0.005 (0,13)  
M
25  
0.010 (0,25)  
0.005 (0,13)  
0.299 (7,59)  
0.291 (7,39)  
0.420 (10,67)  
0.395 (10,03)  
Gage Plane  
0.010 (0,25)  
0°ā8°  
1
24  
0.040 (1,02)  
0.020 (0,51)  
A
Seating Plane  
0.004 (0,10)  
0.008 (0,20) MIN  
PINS **  
0.110 (2,79) MAX  
28  
48  
0.630  
56  
DIM  
0.380  
(9,65)  
0.730  
A MAX  
A MIN  
(16,00) (18,54)  
0.370  
(9,40)  
0.620  
0.720  
(15,75) (18,29)  
4040048/E 12/01  
NOTES: A. All linear dimensions are in inches (millimeters).  
B. This drawing is subject to change without notice.  
C. Body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15).  
D. Falls within JEDEC MO-118  
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