V62/03606-01XE [TI]
ANALOG MULTIPLEXER/DEMULTIPLEXER; 模拟复用器/解复用器
| 型号： | V62/03606-01XE |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | ANALOG MULTIPLEXER/DEMULTIPLEXER |
| 文件： | 总15页 (文件大小：426K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CD74HC4051-EP
ANALOG MULTIPLEXER/DEMULTIPLEXER
SCLS464 – SEPTEMBER 2002
Controlled Baseline
– One Assembly/Test Site, One Fabrication
Site
Low Crosstalk Between Switches
Fast Switching and Propagation Speeds
Break-Before-Make Switching
Extended Temperature Performance of
–55°C to 125°C
Operation Control Voltage = 2 V to 6 V
Switch Voltage = 0 V to 10 V
Enhanced Diminishing Manufacturing
Sources (DMS) Support
High Noise Immunity N = 30%, N = 30%
IL
IH
of V , V
= 5 V
CC CC
Enhanced Product Change Notification
†
Qualification Pedigree
M PACKAGE
(TOP VIEW)
Wide Analog Input Voltage Range of
±5 V Max
Low ON Resistance
CHANNEL I/O A4
CHANNEL I/O A6
COM OUT/IN A
CHANNEL I/O A7
CHANNEL I/O A5
E
V
CC
1
2
3
4
5
6
7
8
16
15
14
13
12
11
– 70 Ω Typical (V
– 40 Ω Typical (V
– V = 4.5 V)
EE
CHANNEL I/O A2
CHANNEL I/O A1
CHANNEL I/O A0
CHANNEL I/O A3
ADDRESS SEL S0
CC
CC
– V = 9 V)
EE
†
Component qualification in accordance with JEDEC and industry
standards to ensure reliable operation over an extended
temperature range. This includes, but is not limited to, Highly
Accelerated Stress Test (HAST) or biased 85/85, temperature
cycle, autoclave or unbiased HAST, electromigration, bond
intermetallic life, and mold compound life. Such qualification
testing should not be viewed as justifying use of this component
beyond specified performance and environmental limits.
V
10 ADDRESS SEL S1
ADDRESS SEL S2
EE
GND
9
description
ThisdeviceisadigitallycontrolledanalogswitchthatutilizessilicongateCMOStechnologytoachieveoperating
speeds similar to LSTTL, with the low power consumption of standard CMOS integrated circuits.
This analog multiplexer/demultiplexer controls analog voltages that may vary across the voltage supply range
(i.e., V
to V ). These bidirectional switches allow any analog input to be used as an output and vice versa.
CC
EE
The switches have low ON resistance and low OFF leakages. In addition, the device has an enable control (E)
that, when high, disables all switches to their OFF state.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
‡
T
A
PACKAGE
–55°C to 125°C
SOIC – M Tape and reel
CD74HC4051MM96EP
HC4051MEP
‡
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2002, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
CD74HC4051-EP
ANALOG MULTIPLEXER/DEMULTIPLEXER
SCLS464 – SEPTEMBER 2002
FUNCTION TABLE
INPUTS
ON
CHANNEL(S)
S
2
S
0
E
L
L
L
L
L
L
L
L
H
S
1
L
L
L
L
A0
A1
L
H
H
L
H
L
L
A2
L
H
L
A3
H
H
H
H
X
A4
L
H
L
A5
H
H
X
A6
H
X
A7
None
X = Don’t care
logic diagram (positive logic)
CHANNEL I/O
A
7
A
6
A
5
A
4
A
A
A
A
0
V
CC
3
2
1
16
4
2
5
1
12
15
14
13
TG
TG
TG
TG
TG
TG
TG
TG
S
11
10
9
0
S
1
Binary
To
1 of 8
Decoder
With
3
COM OUT/IN A
Logic
Level
Conversion
Enable
S
2
6
E
8
7
GND
V
EE
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
CD74HC4051-EP
ANALOG MULTIPLEXER/DEMULTIPLEXER
SCLS464 – SEPTEMBER 2002
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
Supply voltage range, V
Supply voltage range, V
– V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 10.5 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.5 V to –7 V
CC
CC
EE
EE
Input clamp current, I (V < –0.5 V or V > V + 0.5 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
IK
I
I
CC
Output clamp current, I
(V < V – 0.5 V or V > V
+ 0.5 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
CC
OK
O
EE
O
Switch current (V > V – 0.5 V or V < V + 0.5 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA
I
EE
I
CC
Continuous current through V
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
CC
V
current, I
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –20 mA
EE
EE
Package thermal impedance, θ (see Note 2): M package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73°C/W
JA
Maximum junction temperature, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
Lead temperature (during soldering):
J
At distance 1/16 ± 1/32 inch (1,59 ± 0,79 mm) from case for 10 s max . . . . . . . . . . . . . . . . . . . . . . . 300°C
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltages referenced to GND unless otherwise specified.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
MIN
2
MAX
6
UNIT
V
V
V
Supply voltage (see Note 4)
Supply voltage, V – V
V
V
V
CC
EE
IH
(see Figure 1)
EE
2
10
CC
Supply voltage, (see Note 4 and Figure 2)
0
–6
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 2 V
1.5
3.15
4.2
High-level input voltage
= 4.5 V
= 6 V
V
V
= 2 V
0.5
1.35
1.8
V
IL
Low-level input voltage
= 4.5 V
= 6 V
V
V
Input control voltage
0
V
V
V
V
I
CC
Analog switch I/O voltage
V
IS
EE
0
CC
V
CC
V
CC
V
CC
= 2 V
1000
500
400
125
t
t
Input transition (rise and fall) time
Operating free-air temperature
= 4.5 V
= 6 V
0
0
ns
T
A
–55
°C
NOTES: 3. All unused inputs of the device must be held at V
CC
or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
4. In certain applications, the external load resistor current may include both V
and signal-line components. To avoid drawing V
CC
CC
current when switch current flows into the transmission gate inputs, the voltage drop across the bidirectional switch must not exceed
0.6V(calculatedfromr valuesshowninelectricalcharacteristicstable).NoV
into the COM OUT/IN A terminal.
currentflowsthroughR iftheswitchcurrentflows
on
CC
L
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
CD74HC4051-EP
ANALOG MULTIPLEXER/DEMULTIPLEXER
SCLS464 – SEPTEMBER 2002
recommended operating area as a function of supply voltages
8
8
6
6
HCT
HCT
HC
4
2
0
HC
4
2
0
0
2
4
6
8
10
12
0
–2
–4
–6
–8
(V
CC
– V ) – V
EE
(V
EE
– GND) – V
Figure 1
Figure 2
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
T
= –55°C
A
T
A
= 25°C
TO 125°C
PARAMETER
TEST CONDITIONS
V
EE
V
CC
UNIT
MIN
TYP
70
60
40
90
80
45
10
8.5
5
MAX
160
140
120
180
160
130
MIN MAX
0 V
0 V
4.5 V
6 V
240
210
180
270
240
195
V
IS
V
IS
= V
= V
or V
to V
CC
CC
EE
I
= 1 mA,
O
I
–4.5 V 4.5 V
r
Ω
V = V or V
See Figure 8
,
on
IH IL
0 V
0 V
4.5 V
6 V
EE
–4.5 V 4.5 V
0 V
0 V
4.5 V
6 V
∆r
Between any two channels
For switch OFF:
Ω
on
–4.5 V 4.5 V
When V = V , V
IS CC OS
= V
= V
;
0 V
6 V
5 V
±0.2
±0.4
±2
±4
EE
CC
When V = V , V
IS
EE OS
I
IZ
For switch ON:
µA
All applicable combinations of V and V
voltage levels,
IS
OS
–5 V
V = V or V
I
IH
IL
I
I
V = V
or GND
0 V
0 V
6 V
6 V
±0.1
±1
µA
µA
IL
I
CC
When V = V
IS
,
EE
8
160
V
= V
I
= 0,
OS
CC
O
CC
V = V
or GND
I
CC
When V = V
,
CC
IS
= V
–5 V
5 V
16
320
V
OS
EE
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
CD74HC4051-EP
ANALOG MULTIPLEXER/DEMULTIPLEXER
SCLS464 – SEPTEMBER 2002
switching characteristics over recommended operating free-air temperature range (unless
otherwise noted) (see Figure 7)
T
= –55°C
A
T
= 25°C
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
A
TO 125°C
PARAMETER
V
V
UNIT
EE
CC
MIN
MAX
4
MIN MAX
C
C
C
C
C
C
C
= 15 pF
= 50 pF
= 15 pF
= 50 pF
= 15 pF
= 50 pF
= 50 pF
5 V
2 V
ns
L
L
L
L
L
L
L
60
12
10
8
90
18
15
12
t
t
t
IN
OUT
OUT
OUT
0 V
4.5 V
6 V
pd
en
dis
ns
ns
–4.5 V 4.5 V
5 V
2 V
19
225
45
38
32
19
225
45
38
32
10
340
68
ADDRESS SEL or E
0 V
4.5 V
6 V
57
–4.5 V 4.5 V
48
5 V
2 V
340
68
57
48
10
ADDRESS SEL or E
Control
0 V
4.5 V
6 V
ns
–4.5 V 4.5 V
C
pF
I
operating characteristics, V
= 5 V, T = 25°C, Input t , t = 6 ns
CC
A
r f
PARAMETER
TYP
UNIT
C
Power dissipation capacitance (see Note 5)
50
pF
pd
NOTE 5:
C
is used to determine the dynamic power consumption, per package.
pd
= C
2
2
f
P
V
f + Σ (C + C ) V
D
pd CC
I
L
S
CC
O
f
O
= output frequency
f = input frequency
I
C
C
= output load capacitance
= switch capacitance
= supply voltage
L
S
V
CC
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
CD74HC4051-EP
ANALOG MULTIPLEXER/DEMULTIPLEXER
SCLS464 – SEPTEMBER 2002
analog channel characteristics, T = 25°C
A
PARAMETER
TEST CONDITIONS
V
EE
V
CC
MIN
TYP
5
MAX
UNIT
pF
C
C
Switch input capacitance
Common output capacitance
I
25
pF
COM
–2.25 V 2.25 V
–4.5 V 4.5 V
–2.25 V 2.25 V
–4.5 V 4.5 V
–2.25 V 2.25 V
–4.5 V 4.5 V
–2.25 V 2.25 V
–4.5 V 4.5 V
145
Minimum switch frequency
response at –3 dB
See Figure 3 and Figure 9, and
Notes 6 and 7
f
MHz
%
max
180
0.035
0.018
(TBD)
(TBD)
–73
Sine-wave distortion
See Figure 4
E or ADDRESS SEL to
switch feed-through noise
See Figure 5, and Notes 7 and 8
mV
dB
Switch OFF signal feed
through
See Figure 6 and Figure 10, and
Notes 7 and 8
–75
NOTES: 6. Adjust input voltage to obtain 0 dBm at V
for f = 1 MHz.
IN
OS
7.
V
IS
is centered at (V
– V )/2.
CC EE
8. Adjust input for 0 dBm.
PARAMETER MEASUREMENT INFORMATION
V
V
CC
CC
V
IS
V
= V
IH
I
V
OS
SWITCH
ON
SINE-
WAVE
SWITCH
ON
V
IS
V
OS
0.1
F
10
F
V
IS
dB
METER
50 Ω
10 pF
10k Ω
50 pF
DISTORTION
METER
V
/2
V
/2
CC
CC
f
IS
= 1 kHz to 10 kHz
Figure 3. Frequency-Response Test Circuit
Figure 4. Sine-Wave Distortion Test Circuit
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
CD74HC4051-EP
ANALOG MULTIPLEXER/DEMULTIPLEXER
SCLS464 – SEPTEMBER 2002
PARAMETER MEASUREMENT INFORMATION
E
V
f
≥ 1-MHz SINE WAVE
IS
V
CC
V
P–P
R = 50 Ω
C = 10 pF
V
OS
CC
SWITCH
600 Ω
ALTERNATING
ON AND OFF
V
0.1 µF
V
= V
R
OS
C
IL
V
OS
SWITCH
OFF
V
IS
t , t ≤ 6 ns
r
f
V
/2
CC
f
= 1 MHz
600 Ω
50 pF
CONT
50% DUTY
CYCLE
dB
SCOPE
R
C
METER
V
/2
CC
V
/2
V
/2
CC
CC
Figure 5. Control to Switch Feed-Through Noise
Test Circuit
Figure 6. Switch OFF Signal Feed-Through
Test Circuit
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
CD74HC4051-EP
ANALOG MULTIPLEXER/DEMULTIPLEXER
SCLS464 – SEPTEMBER 2002
PARAMETER MEASUREMENT INFORMATION
V
CC
PARAMETER
S1
S2
t
Open
Closed
Open
Closed
Open
PZH
S1
S2
t
en
Test
t
t
t
PZL
PHZ
PLZ
Point
R
= 1 kΩ
L
From Output
Under Test
Closed
t
t
dis
pd
C
Closed
Open
Open
Open
L
(see Note A)
V
EE
LOAD CIRCUIT
V
V
CC
V
CC
Input
50% V
50% V
CC
CC
Output
Control
50% V
50% V
CC
CC
EE
0 V
t
t
PLH
PHL
90%
t
t
PLZ
PZL
V
OH
In-Phase
Output
90%
≈V
Output
Waveform 1
(see Note B)
CC
50%
10%
50% V
10%
CC
V
50% V
CC
OL
10%
V
OL
t
t
f
r
t
t
PHL
90%
PLH
t
t
PZH
PHZ
V
V
OH
90%
Out-of-Phase
Output
50% V
10%
50%
10%
Output
Waveform 2
(see Note B)
V
OH
CC
90%
50% V
OL
CC
t
f
t
≈0 V
r
VOLTAGE WAVEFORMS
PROPAGATION DELAY AND OUTPUT TRANSITION TIMES
VOLTAGE WAVEFORMS
OUTPUT ENABLE AND DISABLE TIMES
NOTES: A. includes probe and test-fixture capacitance.
C
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following
characteristics: PRR ≤ 1 MHz, Z = 50 Ω, t = 6 ns, t = 6 ns.
O
r
f
D. For clock inputs, f
is measured with the input duty cycle at 50%.
max
E. The outputs are measured one at a time with one input transition per measurement.
F.
G.
H.
t
t
t
and t
and t
and t
are the same as t
are the same as t
are the same as t
.
dis
en
.
pd
PLZ
PZL
PLH
PHZ
PZH
PHL
.
Figure 7. Load Circuit and Voltage Waveforms
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
CD74HC4051-EP
ANALOG MULTIPLEXER/DEMULTIPLEXER
SCLS464 – SEPTEMBER 2002
TYPICAL CHARACTERISTICS
120
100
80
V
– V
= 4.5 V
V
CC
EE
60
– V
= 6 V
EE
CC
40
V
– V
= 9 V
EE
CC
20
1
2
3
4
5
6
7
8
9
Input Signal Voltage – V
Figure 8. Typical ON Resistance vs Input Signal Voltage
0
0
V
= 4.5 V
CC
GND = –4.5 V
–20
–40
–2
–4
–6
V
= 2.25 V
CC
GND = –2.25 V
V
= –4.5 V
= 50 Ω
EE
R
L
V
= –2.25 V
= 50 Ω
EE
R
PIN 12 TO 3
L
V
= 2.25 V
CC
GND = –2.25 V
= –2.25 V
PIN 12 TO 3
V
EE
–60
R
= 50 Ω
L
V
= 4.5 V
PIN 12 TO 3
CC
GND = –4.5 V
V
= –4.5 V
= 50 Ω
EE
–80
–8
R
L
PIN 12 TO 3
–100
–10
1M
10K
100K
10M
100M
10K
100K
1M
10M
100M
Frequency – Hz
Frequency – Hz
Figure 9. Channel ON Bandwidth
Figure 10. Channel OFF Feed Through
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
18-Sep-2008
PACKAGING INFORMATION
Orderable Device
CD74HC4051MM96EP
V62/03606-01XE
Status (1)
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOIC
D
16
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
D
16
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF CD74HC4051-EP :
Catalog: CD74HC4051
Automotive: CD74HC4051-Q1
Military: CD54HC4051
•
•
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
Military - QML certified for Military and Defense Applications
•
•
•
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Nov-2008
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0 (mm)
B0 (mm)
K0 (mm)
P1
W
Pin1
Diameter Width
(mm) W1 (mm)
(mm) (mm) Quadrant
CD74HC4051MM96EP
SOIC
D
16
2500
330.0
16.4
6.5
10.3
2.1
8.0
16.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Nov-2008
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SOIC 16
SPQ
Length (mm) Width (mm) Height (mm)
333.2 345.9 28.6
CD74HC4051MM96EP
D
2500
Pack Materials-Page 2
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